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-rw-r--r--board/servo_v4/board.c183
-rw-r--r--board/servo_v4/board.h59
-rw-r--r--board/servo_v4/build.mk2
-rw-r--r--board/servo_v4/ec.tasklist2
-rw-r--r--board/servo_v4/gpio.inc2
-rw-r--r--board/servo_v4/usb_pd_config.h55
-rw-r--r--board/servo_v4/usb_pd_pdo.c10
-rw-r--r--board/servo_v4/usb_pd_pdo.h2
-rw-r--r--board/servo_v4/usb_pd_policy.c239
9 files changed, 270 insertions, 284 deletions
diff --git a/board/servo_v4/board.c b/board/servo_v4/board.c
index b304408f74..5320d7fd1c 100644
--- a/board/servo_v4/board.c
+++ b/board/servo_v4/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+/* Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -33,8 +33,8 @@
#include "usb-stream.h"
#include "util.h"
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args)
+#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args)
/******************************************************************************
* GPIO interrupt handlers.
@@ -175,23 +175,22 @@ void board_config_pre_init(void)
/* ADC channels */
const struct adc_t adc_channels[] = {
/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
- [ADC_CHG_CC1_PD] = {"CHG_CC1_PD", 3300, 4096, 0, STM32_AIN(2)},
- [ADC_CHG_CC2_PD] = {"CHG_CC2_PD", 3300, 4096, 0, STM32_AIN(4)},
- [ADC_DUT_CC1_PD] = {"DUT_CC1_PD", 3300, 4096, 0, STM32_AIN(0)},
- [ADC_DUT_CC2_PD] = {"DUT_CC2_PD", 3300, 4096, 0, STM32_AIN(5)},
- [ADC_SBU1_DET] = {"SBU1_DET", 3300, 4096, 0, STM32_AIN(3)},
- [ADC_SBU2_DET] = {"SBU2_DET", 3300, 4096, 0, STM32_AIN(7)},
- [ADC_SUB_C_REF] = {"SUB_C_REF", 3300, 4096, 0, STM32_AIN(1)},
+ [ADC_CHG_CC1_PD] = { "CHG_CC1_PD", 3300, 4096, 0, STM32_AIN(2) },
+ [ADC_CHG_CC2_PD] = { "CHG_CC2_PD", 3300, 4096, 0, STM32_AIN(4) },
+ [ADC_DUT_CC1_PD] = { "DUT_CC1_PD", 3300, 4096, 0, STM32_AIN(0) },
+ [ADC_DUT_CC2_PD] = { "DUT_CC2_PD", 3300, 4096, 0, STM32_AIN(5) },
+ [ADC_SBU1_DET] = { "SBU1_DET", 3300, 4096, 0, STM32_AIN(3) },
+ [ADC_SBU2_DET] = { "SBU2_DET", 3300, 4096, 0, STM32_AIN(7) },
+ [ADC_SUB_C_REF] = { "SUB_C_REF", 3300, 4096, 0, STM32_AIN(1) },
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
-
/******************************************************************************
* Forward UARTs as a USB serial interface.
*/
-#define USB_STREAM_RX_SIZE 16
-#define USB_STREAM_TX_SIZE 16
+#define USB_STREAM_RX_SIZE 16
+#define USB_STREAM_TX_SIZE 16
/******************************************************************************
* Forward USART3 as a simple USB serial interface.
@@ -200,29 +199,19 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
static struct usart_config const usart3;
struct usb_stream_config const usart3_usb;
-static struct queue const usart3_to_usb = QUEUE_DIRECT(64, uint8_t,
- usart3.producer, usart3_usb.consumer);
-static struct queue const usb_to_usart3 = QUEUE_DIRECT(64, uint8_t,
- usart3_usb.producer, usart3.consumer);
+static struct queue const usart3_to_usb =
+ QUEUE_DIRECT(64, uint8_t, usart3.producer, usart3_usb.consumer);
+static struct queue const usb_to_usart3 =
+ QUEUE_DIRECT(64, uint8_t, usart3_usb.producer, usart3.consumer);
static struct usart_config const usart3 =
- USART_CONFIG(usart3_hw,
- usart_rx_interrupt,
- usart_tx_interrupt,
- 115200,
- 0,
- usart3_to_usb,
- usb_to_usart3);
-
-USB_STREAM_CONFIG(usart3_usb,
- USB_IFACE_USART3_STREAM,
- USB_STR_USART3_STREAM_NAME,
- USB_EP_USART3_STREAM,
- USB_STREAM_RX_SIZE,
- USB_STREAM_TX_SIZE,
- usb_to_usart3,
- usart3_to_usb)
+ USART_CONFIG(usart3_hw, usart_rx_interrupt, usart_tx_interrupt, 115200,
+ 0, usart3_to_usb, usb_to_usart3);
+USB_STREAM_CONFIG(usart3_usb, USB_IFACE_USART3_STREAM,
+ USB_STR_USART3_STREAM_NAME, USB_EP_USART3_STREAM,
+ USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart3,
+ usart3_to_usb)
/******************************************************************************
* Forward USART4 as a simple USB serial interface.
@@ -231,44 +220,34 @@ USB_STREAM_CONFIG(usart3_usb,
static struct usart_config const usart4;
struct usb_stream_config const usart4_usb;
-static struct queue const usart4_to_usb = QUEUE_DIRECT(64, uint8_t,
- usart4.producer, usart4_usb.consumer);
-static struct queue const usb_to_usart4 = QUEUE_DIRECT(64, uint8_t,
- usart4_usb.producer, usart4.consumer);
+static struct queue const usart4_to_usb =
+ QUEUE_DIRECT(64, uint8_t, usart4.producer, usart4_usb.consumer);
+static struct queue const usb_to_usart4 =
+ QUEUE_DIRECT(64, uint8_t, usart4_usb.producer, usart4.consumer);
static struct usart_config const usart4 =
- USART_CONFIG(usart4_hw,
- usart_rx_interrupt,
- usart_tx_interrupt,
- 9600,
- 0,
- usart4_to_usb,
- usb_to_usart4);
-
-USB_STREAM_CONFIG(usart4_usb,
- USB_IFACE_USART4_STREAM,
- USB_STR_USART4_STREAM_NAME,
- USB_EP_USART4_STREAM,
- USB_STREAM_RX_SIZE,
- USB_STREAM_TX_SIZE,
- usb_to_usart4,
- usart4_to_usb)
+ USART_CONFIG(usart4_hw, usart_rx_interrupt, usart_tx_interrupt, 9600, 0,
+ usart4_to_usb, usb_to_usart4);
+
+USB_STREAM_CONFIG(usart4_usb, USB_IFACE_USART4_STREAM,
+ USB_STR_USART4_STREAM_NAME, USB_EP_USART4_STREAM,
+ USB_STREAM_RX_SIZE, USB_STREAM_TX_SIZE, usb_to_usart4,
+ usart4_to_usb)
/*
* Define usb interface descriptor for the `EMPTY` usb interface, to satisfy
* UEFI and kernel requirements (see b/183857501).
*/
-const struct usb_interface_descriptor
-USB_IFACE_DESC(USB_IFACE_EMPTY) = {
- .bLength = USB_DT_INTERFACE_SIZE,
- .bDescriptorType = USB_DT_INTERFACE,
- .bInterfaceNumber = USB_IFACE_EMPTY,
- .bAlternateSetting = 0,
- .bNumEndpoints = 0,
- .bInterfaceClass = USB_CLASS_VENDOR_SPEC,
+const struct usb_interface_descriptor USB_IFACE_DESC(USB_IFACE_EMPTY) = {
+ .bLength = USB_DT_INTERFACE_SIZE,
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bInterfaceNumber = USB_IFACE_EMPTY,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 0,
+ .bInterfaceClass = USB_CLASS_VENDOR_SPEC,
.bInterfaceSubClass = 0,
.bInterfaceProtocol = 0,
- .iInterface = 0,
+ .iInterface = 0,
};
/******************************************************************************
@@ -276,39 +255,38 @@ USB_IFACE_DESC(USB_IFACE_EMPTY) = {
*/
const void *const usb_strings[] = {
- [USB_STR_DESC] = usb_string_desc,
- [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
- [USB_STR_PRODUCT] = USB_STRING_DESC("Servo V4"),
- [USB_STR_SERIALNO] = USB_STRING_DESC("1234-a"),
- [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
- [USB_STR_I2C_NAME] = USB_STRING_DESC("I2C"),
+ [USB_STR_DESC] = usb_string_desc,
+ [USB_STR_VENDOR] = USB_STRING_DESC("Google LLC"),
+ [USB_STR_PRODUCT] = USB_STRING_DESC("Servo V4"),
+ [USB_STR_SERIALNO] = USB_STRING_DESC("1234-a"),
+ [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
+ [USB_STR_I2C_NAME] = USB_STRING_DESC("I2C"),
[USB_STR_CONSOLE_NAME] = USB_STRING_DESC("Servo EC Shell"),
- [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("DUT UART"),
- [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("Atmega UART"),
- [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"),
+ [USB_STR_USART3_STREAM_NAME] = USB_STRING_DESC("DUT UART"),
+ [USB_STR_USART4_STREAM_NAME] = USB_STRING_DESC("Atmega UART"),
+ [USB_STR_UPDATE_NAME] = USB_STRING_DESC("Firmware update"),
};
BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT);
-
-
/******************************************************************************
* Support I2C bridging over USB.
*/
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
- {
- .name = "master",
- .port = I2C_PORT_MASTER,
- .kbps = 100,
- .scl = GPIO_MASTER_I2C_SCL,
- .sda = GPIO_MASTER_I2C_SDA
- },
+ { .name = "master",
+ .port = I2C_PORT_MASTER,
+ .kbps = 100,
+ .scl = GPIO_MASTER_I2C_SCL,
+ .sda = GPIO_MASTER_I2C_SDA },
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-int usb_i2c_board_is_enabled(void) { return 1; }
+int usb_i2c_board_is_enabled(void)
+{
+ return 1;
+}
/******************************************************************************
* Initialize board.
@@ -317,14 +295,13 @@ int usb_i2c_board_is_enabled(void) { return 1; }
/*
* Support tca6416 I2C ioexpander.
*/
-#define GPIOX_I2C_ADDR_FLAGS 0x20
-#define GPIOX_IN_PORT_A 0x0
-#define GPIOX_IN_PORT_B 0x1
-#define GPIOX_OUT_PORT_A 0x2
-#define GPIOX_OUT_PORT_B 0x3
-#define GPIOX_DIR_PORT_A 0x6
-#define GPIOX_DIR_PORT_B 0x7
-
+#define GPIOX_I2C_ADDR_FLAGS 0x20
+#define GPIOX_IN_PORT_A 0x0
+#define GPIOX_IN_PORT_B 0x1
+#define GPIOX_OUT_PORT_A 0x2
+#define GPIOX_OUT_PORT_B 0x3
+#define GPIOX_DIR_PORT_A 0x6
+#define GPIOX_DIR_PORT_B 0x7
/* Write a GPIO output on the tca6416 I2C ioexpander. */
static void write_ioexpander(int bank, int gpio, int val)
@@ -394,15 +371,15 @@ static void init_ioexpander(void)
* Max observed USB low across sampled systems: 666mV
* Min observed USB high across sampled systems: 3026mV
*/
-#define GND_MAX_MV 700
-#define USB_HIGH_MV 2500
-#define SBU_DIRECT 0
-#define SBU_FLIP 1
+#define GND_MAX_MV 700
+#define USB_HIGH_MV 2500
+#define SBU_DIRECT 0
+#define SBU_FLIP 1
-#define MODE_SBU_DISCONNECT 0
-#define MODE_SBU_CONNECT 1
-#define MODE_SBU_FLIP 2
-#define MODE_SBU_OTHER 3
+#define MODE_SBU_DISCONNECT 0
+#define MODE_SBU_CONNECT 1
+#define MODE_SBU_FLIP 2
+#define MODE_SBU_OTHER 3
static void ccd_measure_sbu(void);
DECLARE_DEFERRED(ccd_measure_sbu);
@@ -445,12 +422,12 @@ static void ccd_measure_sbu(void)
} else {
count++;
}
- /*
- * If SuzyQ is enabled, we'll poll for a persistent no-signal for
- * 500ms. Since USB is differential, we should never see GND/GND
- * while the device is connected.
- * If disconnected, electrically remove SuzyQ.
- */
+ /*
+ * If SuzyQ is enabled, we'll poll for a persistent no-signal
+ * for 500ms. Since USB is differential, we should never see
+ * GND/GND while the device is connected. If disconnected,
+ * electrically remove SuzyQ.
+ */
} else if ((mux_en) && (sbu1 < GND_MAX_MV) && (sbu2 < GND_MAX_MV)) {
/* Check for SBU disconnect if connected. */
if (last != MODE_SBU_DISCONNECT) {
diff --git a/board/servo_v4/board.h b/board/servo_v4/board.h
index 910d6caacc..289c117989 100644
--- a/board/servo_v4/board.h
+++ b/board/servo_v4/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+/* Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -38,9 +38,10 @@
#define CONFIG_STM_HWTIMER32
#define CONFIG_HW_CRC
#define CONFIG_PVD
-/* See 'Programmable voltage detector characteristics' in the STM32F072x8 Datasheet.
- PVD Threshold 1 corresponds to a falling voltage threshold of min:2.09V, max:2.27V. */
-#define PVD_THRESHOLD (1)
+/* See 'Programmable voltage detector characteristics' in the STM32F072x8
+ Datasheet. PVD Threshold 1 corresponds to a falling voltage threshold of
+ min:2.09V, max:2.27V. */
+#define PVD_THRESHOLD (1)
/* USB Configuration */
#define CONFIG_USB
@@ -60,23 +61,23 @@
#define DEFAULT_MAC_ADDR "Uninitialized"
/* USB interface indexes (use define rather than enum to expand them) */
-#define USB_IFACE_CONSOLE 0
-#define USB_IFACE_EMPTY 1
-#define USB_IFACE_I2C 2
-#define USB_IFACE_USART3_STREAM 3
-#define USB_IFACE_USART4_STREAM 4
-#define USB_IFACE_UPDATE 5
-#define USB_IFACE_COUNT 6
+#define USB_IFACE_CONSOLE 0
+#define USB_IFACE_EMPTY 1
+#define USB_IFACE_I2C 2
+#define USB_IFACE_USART3_STREAM 3
+#define USB_IFACE_USART4_STREAM 4
+#define USB_IFACE_UPDATE 5
+#define USB_IFACE_COUNT 6
/* USB endpoint indexes (use define rather than enum to expand them) */
-#define USB_EP_CONTROL 0
-#define USB_EP_CONSOLE 1
-#define USB_EP_EMPTY 2
-#define USB_EP_I2C 3
-#define USB_EP_USART3_STREAM 4
-#define USB_EP_USART4_STREAM 5
-#define USB_EP_UPDATE 6
-#define USB_EP_COUNT 7
+#define USB_EP_CONTROL 0
+#define USB_EP_CONSOLE 1
+#define USB_EP_EMPTY 2
+#define USB_EP_I2C 3
+#define USB_EP_USART3_STREAM 4
+#define USB_EP_USART4_STREAM 5
+#define USB_EP_UPDATE 6
+#define USB_EP_COUNT 7
/* Enable console recasting of GPIO type. */
#define CONFIG_CMD_GPIO_EXTENDED
@@ -113,7 +114,7 @@
/* PD features */
#define CONFIG_ADC
-#undef CONFIG_ADC_WATCHDOG
+#undef CONFIG_ADC_WATCHDOG
#define CONFIG_BOARD_PRE_INIT
/*
* If task profiling is enabled then the rx falling edge detection interrupts
@@ -122,7 +123,7 @@
#undef CONFIG_TASK_PROFILING
#define CONFIG_CHARGE_MANAGER
-#undef CONFIG_CHARGE_MANAGER_SAFE_MODE
+#undef CONFIG_CHARGE_MANAGER_SAFE_MODE
#define CONFIG_USB_POWER_DELIVERY
#define CONFIG_USB_PD_TCPMV1
#define CONFIG_CMD_PD
@@ -144,22 +145,22 @@
#define CONFIG_USB_PD_INITIAL_DRP_STATE PD_DRP_FORCE_SINK
/* Variable-current Rp no connect and Ra attach macros */
-#define CC_NC(port, cc, sel) (pd_tcpc_cc_nc(port, cc, sel))
-#define CC_RA(port, cc, sel) (pd_tcpc_cc_ra(port, cc, sel))
+#define CC_NC(port, cc, sel) (pd_tcpc_cc_nc(port, cc, sel))
+#define CC_RA(port, cc, sel) (pd_tcpc_cc_ra(port, cc, sel))
/*
* TODO(crosbug.com/p/60792): The delay values are currently just place holders
* and the delay will need to be relative to the circuitry that allows VBUS to
* be supplied to the DUT port from the CHG port.
*/
-#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */
/* Define typical operating power and max power */
#define PD_OPERATING_POWER_MW 15000
-#define PD_MAX_POWER_MW 60000
-#define PD_MAX_CURRENT_MA 3000
-#define PD_MAX_VOLTAGE_MV 20000
+#define PD_MAX_POWER_MW 60000
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
/*
* Define PDO selection logic for SourceCap.
* On a 45W PD charger, it might provide PDOs with 15V/3A and 20V/2.25A.
@@ -180,8 +181,7 @@
/* Timer selection */
#define TIM_CLOCK32 2
-#define TIM_ADC 3
-
+#define TIM_ADC 3
#include "gpio_signal.h"
@@ -200,7 +200,6 @@ enum usb_strings {
USB_STR_COUNT
};
-
/* ADC signal */
enum adc_channel {
ADC_CHG_CC1_PD,
diff --git a/board/servo_v4/build.mk b/board/servo_v4/build.mk
index 6c39be0475..05a0684696 100644
--- a/board/servo_v4/build.mk
+++ b/board/servo_v4/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright 2016 The Chromium OS Authors. All rights reserved.
+# Copyright 2016 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
diff --git a/board/servo_v4/ec.tasklist b/board/servo_v4/ec.tasklist
index 2111c6b761..f51780dce4 100644
--- a/board/servo_v4/ec.tasklist
+++ b/board/servo_v4/ec.tasklist
@@ -1,4 +1,4 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+/* Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/servo_v4/gpio.inc b/board/servo_v4/gpio.inc
index 76b9a06d0f..afc5789636 100644
--- a/board/servo_v4/gpio.inc
+++ b/board/servo_v4/gpio.inc
@@ -1,6 +1,6 @@
/* -*- mode:c -*-
*
- * Copyright 2016 The Chromium OS Authors. All rights reserved.
+ * Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/servo_v4/usb_pd_config.h b/board/servo_v4/usb_pd_config.h
index af9d84922c..8437af3118 100644
--- a/board/servo_v4/usb_pd_config.h
+++ b/board/servo_v4/usb_pd_config.h
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -56,22 +56,22 @@
#define CONFIG_HW_CRC
/* Servo v4 CC configuration */
-#define CC_DETACH BIT(0) /* Emulate detach: both CC open */
-#define CC_DISABLE_DTS BIT(1) /* Apply resistors to single or both CC? */
-#define CC_ALLOW_SRC BIT(2) /* Allow charge through by policy? */
-#define CC_ENABLE_DRP BIT(3) /* Enable dual-role port */
-#define CC_SNK_WITH_PD BIT(4) /* Force enabling PD comm for sink role */
-#define CC_POLARITY BIT(5) /* CC polarity */
+#define CC_DETACH BIT(0) /* Emulate detach: both CC open */
+#define CC_DISABLE_DTS BIT(1) /* Apply resistors to single or both CC? */
+#define CC_ALLOW_SRC BIT(2) /* Allow charge through by policy? */
+#define CC_ENABLE_DRP BIT(3) /* Enable dual-role port */
+#define CC_SNK_WITH_PD BIT(4) /* Force enabling PD comm for sink role */
+#define CC_POLARITY BIT(5) /* CC polarity */
/* Servo v4 DP alt-mode configuration */
-#define ALT_DP_ENABLE BIT(0) /* Enable DP alt-mode or not */
-#define ALT_DP_PIN_C BIT(1) /* Pin assignment C supported */
-#define ALT_DP_PIN_D BIT(2) /* Pin assignment D supported */
-#define ALT_DP_PIN_E BIT(3) /* Pin assignment E supported */
-#define ALT_DP_MF_PREF BIT(4) /* Multi-Function preferred */
-#define ALT_DP_PLUG BIT(5) /* Plug or receptacle */
-#define ALT_DP_OVERRIDE_HPD BIT(6) /* Override the HPD signal */
-#define ALT_DP_HPD_LVL BIT(7) /* HPD level if overridden */
+#define ALT_DP_ENABLE BIT(0) /* Enable DP alt-mode or not */
+#define ALT_DP_PIN_C BIT(1) /* Pin assignment C supported */
+#define ALT_DP_PIN_D BIT(2) /* Pin assignment D supported */
+#define ALT_DP_PIN_E BIT(3) /* Pin assignment E supported */
+#define ALT_DP_MF_PREF BIT(4) /* Multi-Function preferred */
+#define ALT_DP_PLUG BIT(5) /* Plug or receptacle */
+#define ALT_DP_OVERRIDE_HPD BIT(6) /* Override the HPD signal */
+#define ALT_DP_HPD_LVL BIT(7) /* HPD level if overridden */
/* TX uses SPI1 on PB3-4 for CHG port, SPI2 on PB 13-14 for DUT port */
#define SPI_REGS(p) ((p) ? STM32_SPI2_REGS : STM32_SPI1_REGS)
@@ -94,14 +94,14 @@ static inline void spi_enable_clock(int port)
#define TIM_TX_CCR_IDX(p) ((p) ? TIM_TX_CCR_DUT : TIM_TX_CCR_CHG)
#define TIM_RX_CCR_IDX(p) ((p) ? TIM_RX_CCR_DUT : TIM_RX_CCR_CHG)
-#define TIM_CCR_CS 1
+#define TIM_CCR_CS 1
/*
* EXTI line 21 is connected to the CMP1 output,
* EXTI line 22 is connected to the CMP2 output,
* CHG uses CMP2, and DUT uses CMP1.
*/
-#define EXTI_COMP_MASK(p) ((p) ? (1<<21) : BIT(22))
+#define EXTI_COMP_MASK(p) ((p) ? (1 << 21) : BIT(22))
#define IRQ_COMP STM32_IRQ_COMP
/* triggers packet detection on comparator falling edge */
@@ -193,13 +193,25 @@ static inline void pd_select_polarity(int port, int polarity)
if (port == 0) {
/* CHG use the right comparator inverted input for COMP2 */
STM32_COMP_CSR = (val & ~STM32_COMP_CMP2INSEL_MASK) |
- (polarity ? STM32_COMP_CMP2INSEL_INM4 /* PA4: C0_CC2 */
- : STM32_COMP_CMP2INSEL_INM6);/* PA2: C0_CC1 */
+ (polarity ?
+ STM32_COMP_CMP2INSEL_INM4 /* PA4:
+ C0_CC2
+ */
+ :
+ STM32_COMP_CMP2INSEL_INM6); /* PA2:
+ C0_CC1
+ */
} else {
/* DUT use the right comparator inverted input for COMP1 */
STM32_COMP_CSR = (val & ~STM32_COMP_CMP1INSEL_MASK) |
- (polarity ? STM32_COMP_CMP1INSEL_INM5 /* PA5: C1_CC2 */
- : STM32_COMP_CMP1INSEL_INM6);/* PA0: C1_CC1 */
+ (polarity ?
+ STM32_COMP_CMP1INSEL_INM5 /* PA5:
+ C1_CC2
+ */
+ :
+ STM32_COMP_CMP1INSEL_INM6); /* PA0:
+ C1_CC1
+ */
}
}
@@ -279,7 +291,6 @@ static inline void pd_config_init(int port, uint8_t power_role)
/* Initialize TX pins and put them in Hi-Z */
pd_tx_init();
-
}
int pd_adc_read(int port, int cc);
diff --git a/board/servo_v4/usb_pd_pdo.c b/board/servo_v4/usb_pd_pdo.c
index 8df0eac2c2..b2eeee8e52 100644
--- a/board/servo_v4/usb_pd_pdo.c
+++ b/board/servo_v4/usb_pd_pdo.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -12,9 +12,9 @@
#define CHG_PDO_FIXED_FLAGS (PDO_FIXED_DATA_SWAP)
const uint32_t pd_snk_pdo[] = {
- PDO_FIXED(5000, 500, CHG_PDO_FIXED_FLAGS),
- PDO_BATT(4750, 21000, 15000),
- PDO_VAR(4750, 21000, 3000),
+ PDO_FIXED(5000, 500, CHG_PDO_FIXED_FLAGS),
+ PDO_BATT(4750, 21000, 15000),
+ PDO_VAR(4750, 21000, 3000),
};
const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
@@ -48,7 +48,7 @@ int charge_manager_get_source_pdo(const uint32_t **src_pdo, const int port)
* port, otherwise we provide no power.
*/
if (charge_port_is_active()) {
- *src_pdo = pd_src_chg_pdo;
+ *src_pdo = pd_src_chg_pdo;
pdo_cnt = chg_pdo_cnt;
}
diff --git a/board/servo_v4/usb_pd_pdo.h b/board/servo_v4/usb_pd_pdo.h
index bb9d8adca6..acab299690 100644
--- a/board/servo_v4/usb_pd_pdo.h
+++ b/board/servo_v4/usb_pd_pdo.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/servo_v4/usb_pd_policy.c b/board/servo_v4/usb_pd_policy.c
index 61931cda8b..1dbe586585 100644
--- a/board/servo_v4/usb_pd_policy.c
+++ b/board/servo_v4/usb_pd_policy.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -28,55 +28,57 @@
#include "usb_pd_pdo.h"
#include "usb_pd_tcpm.h"
-#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
-#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args)
-#define DUT_PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
- PDO_FIXED_COMM_CAP)
+#define DUT_PDO_FIXED_FLAGS \
+ (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP | PDO_FIXED_COMM_CAP)
-#define VBUS_UNCHANGED(curr, pend, new) (curr == new && pend == new)
+#define VBUS_UNCHANGED(curr, pend, new) (curr == new &&pend == new)
/* Macros to config the PD role */
#define CONF_SET_CLEAR(c, set, clear) ((c | (set)) & ~(clear))
-#define CONF_SRC(c) CONF_SET_CLEAR(c, \
- CC_DISABLE_DTS | CC_ALLOW_SRC, \
- CC_ENABLE_DRP | CC_SNK_WITH_PD)
-#define CONF_SNK(c) CONF_SET_CLEAR(c, \
- CC_DISABLE_DTS, \
- CC_ALLOW_SRC | CC_ENABLE_DRP | CC_SNK_WITH_PD)
-#define CONF_PDSNK(c) CONF_SET_CLEAR(c, \
- CC_DISABLE_DTS | CC_SNK_WITH_PD, \
- CC_ALLOW_SRC | CC_ENABLE_DRP)
-#define CONF_DRP(c) CONF_SET_CLEAR(c, \
- CC_DISABLE_DTS | CC_ALLOW_SRC | CC_ENABLE_DRP, \
- CC_SNK_WITH_PD)
-#define CONF_SRCDTS(c) CONF_SET_CLEAR(c, \
- CC_ALLOW_SRC, \
- CC_ENABLE_DRP | CC_DISABLE_DTS | CC_SNK_WITH_PD)
-#define CONF_SNKDTS(c) CONF_SET_CLEAR(c, \
- 0, \
- CC_ALLOW_SRC | CC_ENABLE_DRP | \
- CC_DISABLE_DTS | CC_SNK_WITH_PD)
-#define CONF_PDSNKDTS(c) CONF_SET_CLEAR(c, \
- CC_SNK_WITH_PD, \
- CC_ALLOW_SRC | CC_ENABLE_DRP | CC_DISABLE_DTS)
-#define CONF_DRPDTS(c) CONF_SET_CLEAR(c, \
- CC_ALLOW_SRC | CC_ENABLE_DRP, \
- CC_DISABLE_DTS | CC_SNK_WITH_PD)
+#define CONF_SRC(c) \
+ CONF_SET_CLEAR(c, CC_DISABLE_DTS | CC_ALLOW_SRC, \
+ CC_ENABLE_DRP | CC_SNK_WITH_PD)
+#define CONF_SNK(c) \
+ CONF_SET_CLEAR(c, CC_DISABLE_DTS, \
+ CC_ALLOW_SRC | CC_ENABLE_DRP | CC_SNK_WITH_PD)
+#define CONF_PDSNK(c) \
+ CONF_SET_CLEAR(c, CC_DISABLE_DTS | CC_SNK_WITH_PD, \
+ CC_ALLOW_SRC | CC_ENABLE_DRP)
+#define CONF_DRP(c) \
+ CONF_SET_CLEAR(c, CC_DISABLE_DTS | CC_ALLOW_SRC | CC_ENABLE_DRP, \
+ CC_SNK_WITH_PD)
+#define CONF_SRCDTS(c) \
+ CONF_SET_CLEAR(c, CC_ALLOW_SRC, \
+ CC_ENABLE_DRP | CC_DISABLE_DTS | CC_SNK_WITH_PD)
+#define CONF_SNKDTS(c) \
+ CONF_SET_CLEAR(c, 0, \
+ CC_ALLOW_SRC | CC_ENABLE_DRP | CC_DISABLE_DTS | \
+ CC_SNK_WITH_PD)
+#define CONF_PDSNKDTS(c) \
+ CONF_SET_CLEAR(c, CC_SNK_WITH_PD, \
+ CC_ALLOW_SRC | CC_ENABLE_DRP | CC_DISABLE_DTS)
+#define CONF_DRPDTS(c) \
+ CONF_SET_CLEAR(c, CC_ALLOW_SRC | CC_ENABLE_DRP, \
+ CC_DISABLE_DTS | CC_SNK_WITH_PD)
+#define CONF_DTSOFF(c) CONF_SET_CLEAR(c, CC_DISABLE_DTS, 0)
+#define CONF_DTSON(c) CONF_SET_CLEAR(c, 0, CC_DISABLE_DTS)
/* Macros to apply Rd/Rp to CC lines */
-#define DUT_ACTIVE_CC_SET(r, flags) \
- gpio_set_flags(cc_config & CC_POLARITY ? \
- CONCAT2(GPIO_USB_DUT_CC2_, r) : \
- CONCAT2(GPIO_USB_DUT_CC1_, r), \
+#define DUT_ACTIVE_CC_SET(r, flags) \
+ gpio_set_flags(cc_config &CC_POLARITY ? \
+ CONCAT2(GPIO_USB_DUT_CC2_, r) : \
+ CONCAT2(GPIO_USB_DUT_CC1_, r), \
flags)
-#define DUT_INACTIVE_CC_SET(r, flags) \
- gpio_set_flags(cc_config & CC_POLARITY ? \
- CONCAT2(GPIO_USB_DUT_CC1_, r) : \
- CONCAT2(GPIO_USB_DUT_CC2_, r), \
+#define DUT_INACTIVE_CC_SET(r, flags) \
+ gpio_set_flags(cc_config &CC_POLARITY ? \
+ CONCAT2(GPIO_USB_DUT_CC1_, r) : \
+ CONCAT2(GPIO_USB_DUT_CC2_, r), \
flags)
-#define DUT_BOTH_CC_SET(r, flags) \
- do { \
+#define DUT_BOTH_CC_SET(r, flags) \
+ do { \
gpio_set_flags(CONCAT2(GPIO_USB_DUT_CC1_, r), flags); \
gpio_set_flags(CONCAT2(GPIO_USB_DUT_CC2_, r), flags); \
} while (0)
@@ -94,15 +96,15 @@ static int cc_config = CC_ALLOW_SRC;
/* Voltage thresholds for no connect in DTS mode */
static int pd_src_vnc_dts[TYPEC_RP_RESERVED][2] = {
- {PD_SRC_3_0_VNC_MV, PD_SRC_1_5_VNC_MV},
- {PD_SRC_1_5_VNC_MV, PD_SRC_DEF_VNC_MV},
- {PD_SRC_3_0_VNC_MV, PD_SRC_DEF_VNC_MV},
+ { PD_SRC_3_0_VNC_MV, PD_SRC_1_5_VNC_MV },
+ { PD_SRC_1_5_VNC_MV, PD_SRC_DEF_VNC_MV },
+ { PD_SRC_3_0_VNC_MV, PD_SRC_DEF_VNC_MV },
};
/* Voltage thresholds for Ra attach in DTS mode */
static int pd_src_rd_threshold_dts[TYPEC_RP_RESERVED][2] = {
- {PD_SRC_3_0_RD_THRESH_MV, PD_SRC_1_5_RD_THRESH_MV},
- {PD_SRC_1_5_RD_THRESH_MV, PD_SRC_DEF_RD_THRESH_MV},
- {PD_SRC_3_0_RD_THRESH_MV, PD_SRC_DEF_RD_THRESH_MV},
+ { PD_SRC_3_0_RD_THRESH_MV, PD_SRC_1_5_RD_THRESH_MV },
+ { PD_SRC_1_5_RD_THRESH_MV, PD_SRC_DEF_RD_THRESH_MV },
+ { PD_SRC_3_0_RD_THRESH_MV, PD_SRC_DEF_RD_THRESH_MV },
};
/* Voltage thresholds for no connect in normal SRC mode */
static int pd_src_vnc[TYPEC_RP_RESERVED] = {
@@ -139,7 +141,8 @@ static uint8_t allow_dr_swap = 1;
static uint32_t max_supported_voltage(void)
{
int board_max_mv = board_get_version() >= BOARD_VERSION_BLACK ?
- PD_MAX_VOLTAGE_MV : MAX_MV_RED_BLUE;
+ PD_MAX_VOLTAGE_MV :
+ MAX_MV_RED_BLUE;
return board_max_mv < user_limited_max_mv ? board_max_mv :
user_limited_max_mv;
@@ -263,8 +266,8 @@ static void update_ports(void)
break;
/* Find the 'best' PDO <= voltage */
- pdo_index =
- pd_find_pdo_index(pd_get_src_cap_cnt(CHG),
+ pdo_index = pd_find_pdo_index(
+ pd_get_src_cap_cnt(CHG),
pd_get_src_caps(CHG),
pd_src_voltages_mv[i], &pdo);
/* Don't duplicate PDOs */
@@ -287,9 +290,9 @@ static void update_ports(void)
} else {
/* 5V PDO */
pd_src_chg_pdo[0] = PDO_FIXED_VOLT(PD_MIN_MV) |
- PDO_FIXED_CURR(vbus[CHG].ma) |
- DUT_PDO_FIXED_FLAGS |
- PDO_FIXED_UNCONSTRAINED;
+ PDO_FIXED_CURR(vbus[CHG].ma) |
+ DUT_PDO_FIXED_FLAGS |
+ PDO_FIXED_UNCONSTRAINED;
chg_pdo_cnt = 1;
}
@@ -314,8 +317,8 @@ int board_set_active_charge_port(int charge_port)
return 0;
}
-void board_set_charge_limit(int port, int supplier, int charge_ma,
- int max_ma, int charge_mv)
+void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma,
+ int charge_mv)
{
if (port != CHG)
return;
@@ -361,8 +364,9 @@ int pd_tcpc_cc_nc(int port, int cc_volt, int cc_sel)
if (cc_config & CC_DISABLE_DTS)
nc = cc_volt >= pd_src_vnc[rp_index];
else
- nc = cc_volt >= pd_src_vnc_dts[rp_index][
- cc_config & CC_POLARITY ? !cc_sel : cc_sel];
+ nc = cc_volt >=
+ pd_src_vnc_dts[rp_index]
+ [cc_config & CC_POLARITY ? !cc_sel : cc_sel];
return nc;
}
@@ -388,8 +392,10 @@ int pd_tcpc_cc_ra(int port, int cc_volt, int cc_sel)
if (cc_config & CC_DISABLE_DTS)
ra = cc_volt < pd_src_rd_threshold[rp_index];
else
- ra = cc_volt < pd_src_rd_threshold_dts[rp_index][
- cc_config & CC_POLARITY ? !cc_sel : cc_sel];
+ ra = cc_volt <
+ pd_src_rd_threshold_dts[rp_index]
+ [cc_config & CC_POLARITY ? !cc_sel :
+ cc_sel];
return ra;
}
@@ -548,7 +554,6 @@ int pd_set_rp_rd(int port, int cc_pull, int rp_value)
DUT_ACTIVE_CC_PD(RD);
else
DUT_BOTH_CC_PD(RD);
-
}
rp_value_stored = rp_value;
@@ -591,8 +596,7 @@ __override void pd_transition_voltage(int idx)
/* Wait for CHG transition */
deadline.val = get_time().val + PD_T_PS_TRANSITION;
CPRINTS("Waiting for CHG port transition");
- while (charge_port_is_active() &&
- vbus[CHG].mv != mv &&
+ while (charge_port_is_active() && vbus[CHG].mv != mv &&
get_time().val < deadline.val)
msleep(10);
@@ -652,9 +656,7 @@ void pd_power_supply_reset(int port)
int pd_snk_is_vbus_provided(int port)
{
-
- return gpio_get_level(port ? GPIO_USB_DET_PP_DUT :
- GPIO_USB_DET_PP_CHG);
+ return gpio_get_level(port ? GPIO_USB_DET_PP_DUT : GPIO_USB_DET_PP_CHG);
}
__override int pd_check_power_swap(int port)
@@ -671,7 +673,8 @@ __override int pd_check_power_swap(int port)
if (port == CHG)
return 0;
- if (pd_get_power_role(port) == PD_ROLE_SINK && !(cc_config & CC_ALLOW_SRC))
+ if (pd_get_power_role(port) == PD_ROLE_SINK &&
+ !(cc_config & CC_ALLOW_SRC))
return 0;
if (pd_snk_is_vbus_provided(CHG))
@@ -680,8 +683,7 @@ __override int pd_check_power_swap(int port)
return 0;
}
-__override int pd_check_data_swap(int port,
- enum pd_data_role data_role)
+__override int pd_check_data_swap(int port, enum pd_data_role data_role)
{
/*
* Servo should allow data role swaps to let DUT see the USB hub, but
@@ -693,8 +695,7 @@ __override int pd_check_data_swap(int port,
return allow_dr_swap;
}
-__override void pd_execute_data_swap(int port,
- enum pd_data_role data_role)
+__override void pd_execute_data_swap(int port, enum pd_data_role data_role)
{
/*
* TODO(b/137887386): Turn on the fastboot/DFU path when data swap to
@@ -702,8 +703,7 @@ __override void pd_execute_data_swap(int port,
*/
}
-__override void pd_check_pr_role(int port,
- enum pd_power_role pr_role,
+__override void pd_check_pr_role(int port, enum pd_power_role pr_role,
int flags)
{
/*
@@ -714,9 +714,7 @@ __override void pd_check_pr_role(int port,
*/
}
-__override void pd_check_dr_role(int port,
- enum pd_data_role dr_role,
- int flags)
+__override void pd_check_dr_role(int port, enum pd_data_role dr_role, int flags)
{
if (port == CHG)
return;
@@ -726,15 +724,14 @@ __override void pd_check_dr_role(int port,
pd_request_data_swap(port);
}
-
/* ----------------- Vendor Defined Messages ------------------ */
/*
* DP alt-mode config, user configurable.
* Default is the mode disabled, supporting the C and D pin assignment,
* multi-function preferred, and a plug.
*/
-static int alt_dp_config = (ALT_DP_PIN_C | ALT_DP_PIN_D | ALT_DP_MF_PREF |
- ALT_DP_PLUG);
+static int alt_dp_config =
+ (ALT_DP_PIN_C | ALT_DP_PIN_D | ALT_DP_MF_PREF | ALT_DP_PLUG);
/**
* Get the pins based on the user config.
@@ -769,8 +766,8 @@ const uint32_t vdo_idh = VDO_IDH(0, /* data caps as USB host */
const uint32_t vdo_product = VDO_PRODUCT(CONFIG_USB_PID, CONFIG_USB_BCD_DEV);
const uint32_t vdo_ama = VDO_AMA(CONFIG_USB_PD_IDENTITY_HW_VERS,
- CONFIG_USB_PD_IDENTITY_SW_VERS,
- 0, 0, 0, 0, /* SS[TR][12] */
+ CONFIG_USB_PD_IDENTITY_SW_VERS, 0, 0, 0,
+ 0, /* SS[TR][12] */
0, /* Vconn power */
0, /* Vconn power required */
0, /* Vbus power required */
@@ -808,13 +805,13 @@ uint32_t vdo_dp_mode[MODE_CNT];
static int svdm_response_modes(int port, uint32_t *payload)
{
- vdo_dp_mode[0] =
- VDO_MODE_DP(0, /* UFP pin cfg supported: none */
- alt_dp_config_pins(), /* DFP pin */
- 1, /* no usb2.0 signalling in AMode */
- alt_dp_config_cable(), /* plug or receptacle */
- MODE_DP_V13, /* DPv1.3 Support, no Gen2 */
- MODE_DP_SNK); /* Its a sink only */
+ vdo_dp_mode[0] = VDO_MODE_DP(0, /* UFP pin cfg supported: none */
+ alt_dp_config_pins(), /* DFP pin */
+ 1, /* no usb2.0 signalling in AMode */
+ alt_dp_config_cable(), /* plug or
+ receptacle */
+ MODE_DP_V13, /* DPv1.3 Support, no Gen2 */
+ MODE_DP_SNK); /* Its a sink only */
/* CCD uses the SBU lines; don't enable DP when dts-mode enabled */
if (!(cc_config & CC_DISABLE_DTS))
@@ -881,17 +878,18 @@ static int dp_status(int port, uint32_t *payload)
int hpd = get_hpd_level();
if (opos != OPOS)
- return 0; /* NAK */
-
- payload[1] = VDO_DP_STATUS(
- 0, /* IRQ_HPD */
- hpd, /* HPD_HI|LOW */
- 0, /* request exit DP */
- 0, /* request exit USB */
- (alt_dp_config & ALT_DP_MF_PREF) != 0, /* MF pref */
- is_typec_dp_muxed(),
- 0, /* power low */
- hpd ? 0x2 : 0);
+ return 0; /* NAK */
+
+ payload[1] =
+ VDO_DP_STATUS(0, /* IRQ_HPD */
+ hpd, /* HPD_HI|LOW */
+ 0, /* request exit DP */
+ 0, /* request exit USB */
+ (alt_dp_config & ALT_DP_MF_PREF) != 0, /* MF
+ pref
+ */
+ is_typec_dp_muxed(), 0, /* power low */
+ hpd ? 0x2 : 0);
return 2;
}
@@ -911,7 +909,7 @@ static int svdm_enter_mode(int port, uint32_t *payload)
/* SID & mode request is valid */
if ((PD_VDO_VID(payload[0]) != USB_SID_DISPLAYPORT) ||
(PD_VDO_OPOS(payload[0]) != OPOS))
- return 0; /* NAK */
+ return 0; /* NAK */
alt_mode = OPOS;
return 1;
@@ -950,7 +948,7 @@ const struct svdm_response svdm_rsp = {
};
__override int pd_custom_vdm(int port, int cnt, uint32_t *payload,
- uint32_t **rpayload)
+ uint32_t **rpayload)
{
int cmd = PD_VDO_CMD(payload[0]);
@@ -962,7 +960,7 @@ __override int pd_custom_vdm(int port, int cnt, uint32_t *payload,
case VDO_CMD_VERSION:
/* guarantee last byte of payload is null character */
*(payload + cnt - 1) = 0;
- CPRINTF("ver: %s\n", (char *)(payload+1));
+ CPRINTF("ver: %s\n", (char *)(payload + 1));
break;
case VDO_CMD_CURRENT:
CPRINTF("Current: %dmA\n", payload[1]);
@@ -984,12 +982,10 @@ static void print_cc_mode(void)
gpio_get_level(GPIO_DUT_CHG_EN) ? "on" : "off");
ccprintf("chg allowed: %s\n", cc_config & CC_ALLOW_SRC ? "on" : "off");
ccprintf("drp enabled: %s\n", cc_config & CC_ENABLE_DRP ? "on" : "off");
- ccprintf("cc polarity: %s\n", cc_config & CC_POLARITY ? "cc2" :
- "cc1");
+ ccprintf("cc polarity: %s\n", cc_config & CC_POLARITY ? "cc2" : "cc1");
ccprintf("pd enabled: %s\n", pd_comm_is_enabled(DUT) ? "on" : "off");
}
-
static void do_cc(int cc_config_new)
{
int chargeable;
@@ -1059,7 +1055,7 @@ static void do_cc(int cc_config_new)
}
}
-static int command_cc(int argc, char **argv)
+static int command_cc(int argc, const char **argv)
{
int cc_config_new = cc_config;
@@ -1090,6 +1086,10 @@ static int command_cc(int argc, char **argv)
cc_config_new = CONF_PDSNKDTS(cc_config_new);
else if (!strcasecmp(argv[1], "drpdts"))
cc_config_new = CONF_DRPDTS(cc_config_new);
+ else if (!strcasecmp(argv[1], "dtsoff"))
+ cc_config_new = CONF_DTSOFF(cc_config_new);
+ else if (!strcasecmp(argv[1], "dtson"))
+ cc_config_new = CONF_DTSON(cc_config_new);
else
return EC_ERROR_PARAM2;
}
@@ -1108,7 +1108,7 @@ static int command_cc(int argc, char **argv)
}
DECLARE_CONSOLE_COMMAND(cc, command_cc,
"[off|on|src|snk|pdsnk|drp|srcdts|snkdts|pdsnkdts|"
- "drpdts] [cc1|cc2]",
+ "drpdts|dtsoff|dtson] [cc1|cc2]",
"Servo_v4 DTS and CHG mode");
static void fake_disconnect_end(void)
@@ -1128,7 +1128,7 @@ static void fake_disconnect_start(void)
}
DECLARE_DEFERRED(fake_disconnect_start);
-static int cmd_fake_disconnect(int argc, char *argv[])
+static int cmd_fake_disconnect(int argc, const char *argv[])
{
int delay_ms, duration_ms;
char *e;
@@ -1150,18 +1150,18 @@ static int cmd_fake_disconnect(int argc, char *argv[])
fake_pd_disconnect_duration_us = duration_ms * MSEC;
hook_call_deferred(&fake_disconnect_start_data, delay_ms * MSEC);
- ccprintf("Fake disconnect for %d ms starting in %d ms.\n",
- duration_ms, delay_ms);
+ ccprintf("Fake disconnect for %d ms starting in %d ms.\n", duration_ms,
+ delay_ms);
return EC_SUCCESS;
}
DECLARE_CONSOLE_COMMAND(fakedisconnect, cmd_fake_disconnect,
"<delay_ms> <duration_ms>", NULL);
-static int cmd_ada_srccaps(int argc, char *argv[])
+static int cmd_ada_srccaps(int argc, const char *argv[])
{
int i;
- const uint32_t * const ada_srccaps = pd_get_src_caps(CHG);
+ const uint32_t *const ada_srccaps = pd_get_src_caps(CHG);
for (i = 0; i < pd_get_src_cap_cnt(CHG); ++i) {
uint32_t max_ma, max_mv, unused;
@@ -1176,11 +1176,10 @@ static int cmd_ada_srccaps(int argc, char *argv[])
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(ada_srccaps, cmd_ada_srccaps,
- "",
+DECLARE_CONSOLE_COMMAND(ada_srccaps, cmd_ada_srccaps, "",
"Print adapter SrcCap");
-static int cmd_dp_action(int argc, char *argv[])
+static int cmd_dp_action(int argc, const char *argv[])
{
int i;
char *e;
@@ -1199,8 +1198,8 @@ static int cmd_dp_action(int argc, char *argv[])
alt_dp_config &= ~ALT_DP_ENABLE;
} else if (!strcasecmp(argv[1], "pins")) {
if (argc >= 3) {
- alt_dp_config &= ~(ALT_DP_PIN_C | ALT_DP_PIN_D |
- ALT_DP_PIN_E);
+ alt_dp_config &=
+ ~(ALT_DP_PIN_C | ALT_DP_PIN_D | ALT_DP_PIN_E);
for (i = 0; i < 3; i++) {
if (!argv[2][i])
break;
@@ -1273,10 +1272,10 @@ static int cmd_dp_action(int argc, char *argv[])
}
}
CPRINTS("HPD source: %s",
- (alt_dp_config & ALT_DP_OVERRIDE_HPD) ? "overridden"
- : "external");
+ (alt_dp_config & ALT_DP_OVERRIDE_HPD) ? "overridden" :
+ "external");
CPRINTS("HPD level: %d", get_hpd_level());
- } else if (!strcasecmp(argv[1], "help")) {
+ } else if (!strcasecmp(argv[1], "help")) {
CPRINTS("Usage: usbc_action dp [enable|disable|hpd|mf|pins|"
"plug]");
}
@@ -1284,7 +1283,7 @@ static int cmd_dp_action(int argc, char *argv[])
return EC_SUCCESS;
}
-static int cmd_usbc_action(int argc, char *argv[])
+static int cmd_usbc_action(int argc, const char *argv[])
{
if (argc >= 2 && !strcasecmp(argv[1], "dp"))
return cmd_dp_action(argc - 1, &argv[1]);