6 files changed, 0 insertions, 198 deletions
diff --git a/board/stm32l476g-eval/board.c b/board/stm32l476g-eval/board.c
deleted file mode 100644
index c7ebc2c6b8..0000000000
--- a/board/stm32l476g-eval/board.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "common.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "registers.h"
-#include "i2c.h"
-
-#ifdef CTS_MODULE
-/*
- * Mock interrupt handler. It's supposed to be overwritten by each suite
- * if needed.
- */
-__attribute__((weak)) void cts_irq(enum gpio_signal signal)
-{
-}
-#endif
-
-#include "gpio_list.h"
-
-void tick_event(void)
-{
-	static int count;
-
-	gpio_set_level(GPIO_LED_GREEN, (count & 0x03) == 0);
-
-	count++;
-}
-DECLARE_HOOK(HOOK_TICK, tick_event, HOOK_PRIO_DEFAULT);
-
-#ifdef CTS_MODULE_I2C
-const struct i2c_port_t i2c_ports[]  = {
-	{"test", STM32_I2C2_PORT, 100, GPIO_I2C2_SCL, GPIO_I2C2_SDA},
-};
-const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-#endif
diff --git a/board/stm32l476g-eval/board.h b/board/stm32l476g-eval/board.h
deleted file mode 100644
index e8ce99845f..0000000000
--- a/board/stm32l476g-eval/board.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* STM32L476G-Eval board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-#ifdef CTS_MODULE
-/* CTS tests are small. We can use smaller size to expedite flash time. */
-#undef  CONFIG_FLASH_SIZE_BYTES
-#define CONFIG_FLASH_SIZE_BYTES 0x00040000	/* 256k */
-#endif
-
-/* Optional features */
-#undef CONFIG_WATCHDOG_HELP
-#undef CONFIG_LID_SWITCH
-
-/* Console is on LPUART (PG7/8). Undef it to use USART1 (PB6/7). */
-#define STM32L476G_EVAL_USE_LPUART_CONSOLE
-#undef CONFIG_UART_CONSOLE
-
-#ifdef STM32L476G_EVAL_USE_LPUART_CONSOLE
-#define CONFIG_UART_CONSOLE 9
-#define CONFIG_UART_TX_DMA_CH STM32_DMAC_CH14
-#define CONFIG_UART_TX_DMA_PH 4
-#else
-#define CONFIG_UART_CONSOLE 1
-#define CONFIG_UART_TX_DMA_CH STM32_DMAC_USART1_TX
-#define CONFIG_UART_TX_DMA_PH 2
-#endif
-
-/* Optional features */
-#define CONFIG_STM_HWTIMER32
-
-#ifdef CTS_MODULE_I2C
-#define CONFIG_I2C
-#define CONFIG_I2C_PERIPHERAL
-#define CONFIG_HOSTCMD_I2C_SLAVE_ADDR 0x3c
-#define I2C_PORT_EC STM32_I2C2_PORT
-#endif
-
-/*
- * Allow dangerous commands all the time, since we don't have a write protect
- * switch.
- */
-#define CONFIG_SYSTEM_UNLOCKED
-
-#ifndef __ASSEMBLER__
-
-#undef CONFIG_FLASH_CROS
-#undef CONFIG_FLASH_PHYSICAL
-
-/* Timer selection */
-#define TIM_CLOCK32	5
-
-/* External clock speeds (8 MHz) */
-#define STM32_HSE_CLOCK 8000000
-
-/* PLL configuration. Freq = STM32_HSE_CLOCK * n/m/r */
-#undef STM32_PLLM
-#define STM32_PLLM	1
-#undef STM32_PLLN
-#define STM32_PLLN	10
-#undef STM32_PLLR
-#define STM32_PLLR	2
-
-#include "gpio_signal.h"
-
-#endif /* !__ASSEMBLER__ */
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/stm32l476g-eval/build.mk b/board/stm32l476g-eval/build.mk
deleted file mode 100644
index 23c7cd9d38..0000000000
--- a/board/stm32l476g-eval/build.mk
+++ /dev/null
@@ -1,12 +0,0 @@
-# -*- makefile -*-
-# Copyright 2016 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-
-CHIP:=stm32
-CHIP_FAMILY:=stm32l4
-CHIP_VARIANT:=stm32l476
-
-board-y=board.o
diff --git a/board/stm32l476g-eval/ec.tasklist b/board/stm32l476g-eval/ec.tasklist
deleted file mode 100644
index adfd7c7e92..0000000000
--- a/board/stm32l476g-eval/ec.tasklist
+++ /dev/null
@@ -1,12 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/**
- * See CONFIG_TASK_LIST in config.h for details.
- */
-#define CONFIG_TASK_LIST \
-	TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \
-	TASK_ALWAYS(CONSOLE, console_task, NULL, TASK_STACK_SIZE)
-
diff --git a/board/stm32l476g-eval/gpio.inc b/board/stm32l476g-eval/gpio.inc
deleted file mode 100644
index 9cf5bc0aa4..0000000000
--- a/board/stm32l476g-eval/gpio.inc
+++ /dev/null
@@ -1,43 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first. */
-#ifdef CTS_MODULE
-#ifndef CTS_MODULE_GPIO
-/* Overload C10 for notification. Enabled only for non-GPIO suites as
- * GPIO tests don't require a separate notification line. */
-GPIO_INT(CTS_NOTIFY, PIN(C, 10), GPIO_INT_FALLING | GPIO_PULL_UP , cts_irq)
-#endif
-#endif
-
-/* Outputs */
-GPIO(LED_GREEN,   PIN(B, 2), GPIO_OUT_LOW)
-GPIO(LED_RED,    PIN(C, 1), GPIO_OUT_LOW)
-
-/* Unimplemented signals which we need to emulate for now */
-UNIMPLEMENTED(ENTERING_RW)
-UNIMPLEMENTED(WP_L)
-
-ALTERNATE(PIN_MASK(B, 0xC0), GPIO_ALT_F7, MODULE_UART,  0) /* USART1: PB6/7 */
-ALTERNATE(PIN_MASK(G, 0x0180), GPIO_ALT_F8, MODULE_UART,  0) /* LPUART: PG7/8 */
-
-#ifdef CTS_MODULE
-/* CTS Signals */
-GPIO(HANDSHAKE_OUTPUT, PIN(A, 9), GPIO_ODR_LOW)
-GPIO(HANDSHAKE_INPUT, PIN(A, 8), GPIO_INPUT | GPIO_PULL_UP)
-GPIO(OUTPUT_TEST, PIN(C, 11), GPIO_ODR_LOW)
-GPIO(CTS_IRQ2, PIN(C, 12), GPIO_ODR_LOW)
-#ifdef CTS_MODULE_GPIO
-GPIO(INPUT_TEST, PIN(C, 10), GPIO_INPUT | GPIO_PULL_UP)
-#endif
-
-GPIO(I2C2_SCL, PIN(B, 10), GPIO_ODR_HIGH) /* I2C port 2 SCL */
-GPIO(I2C2_SDA, PIN(B, 11), GPIO_ODR_HIGH) /* I2C port 2 SDA */
-
-ALTERNATE(PIN_MASK(B, 0x0C00), GPIO_ALT_F4, MODULE_I2C,  GPIO_ODR_HIGH) /* I2C2: PB10/11 */
-#endif
-\ No newline at end of file
diff --git a/board/stm32l476g-eval/openocd-flash.cfg b/board/stm32l476g-eval/openocd-flash.cfg
deleted file mode 100644
index a347f88b79..0000000000
--- a/board/stm32l476g-eval/openocd-flash.cfg
+++ /dev/null
@@ -1,19 +0,0 @@
-# Copyright 2016 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-source [find board/stm32l4discovery.cfg]
-
-# For flashing, force the board into reset on connect, this ensures that
-# code running on the core can't interfere with programming.
-reset_config connect_assert_srst
-
-gdb_port 0
-tcl_port 0
-telnet_port 0
-init
-reset init
-flash write_image erase $BUILD_DIR/ec.bin 0x08000000
-reset halt
-resume
-shutdown