diff options
Diffstat (limited to 'board/twinkie')
| -rw-r--r-- | board/twinkie/board.c | 81 | ||||
| -rw-r--r-- | board/twinkie/board.h | 149 | ||||
| -rw-r--r-- | board/twinkie/build.mk | 14 | ||||
| -rw-r--r-- | board/twinkie/ec.tasklist | 13 | ||||
| -rw-r--r-- | board/twinkie/gpio.inc | 50 | ||||
| -rw-r--r-- | board/twinkie/injector.c | 603 | ||||
| -rw-r--r-- | board/twinkie/injector.h | 88 | ||||
| -rw-r--r-- | board/twinkie/simpletrace.c | 287 | ||||
| -rw-r--r-- | board/twinkie/sniffer.c | 402 | ||||
| -rw-r--r-- | board/twinkie/usb_pd_config.h | 180 | ||||
| -rw-r--r-- | board/twinkie/usb_pd_policy.c | 91 | ||||
| -rw-r--r-- | board/twinkie/vif_override.xml | 3 |
12 files changed, 0 insertions, 1961 deletions
diff --git a/board/twinkie/board.c b/board/twinkie/board.c deleted file mode 100644 index 6572f27281..0000000000 --- a/board/twinkie/board.c +++ /dev/null @@ -1,81 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Twinkie dongle configuration */ - -#include "adc.h" -#include "common.h" -#include "console.h" -#include "ec_version.h" -#include "gpio.h" -#include "hooks.h" -#include "i2c.h" -#include "ina2xx.h" -#include "registers.h" -#include "task.h" -#include "usb_descriptor.h" -#include "util.h" - -void cc2_event(enum gpio_signal signal) -{ - ccprintf("INA!\n"); -} - -void vbus_event(enum gpio_signal signal) -{ - ccprintf("INA!\n"); -} - -#include "gpio_list.h" - -/* Initialize board. */ -void board_config_pre_init(void) -{ - /* enable SYSCFG clock */ - STM32_RCC_APB2ENR |= BIT(0); - /* Remap USART DMA to match the USART driver and TIM2 DMA */ - STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10) /* Remap USART1 RX/TX DMA */ - | BIT(29);/* Remap TIM2 DMA */ - /* 40 MHz pin speed on UART PA9/PA10 */ - STM32_GPIO_OSPEEDR(GPIO_A) |= 0x003C0000; - /* 40 MHz pin speed on TX clock out PB9 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000C0000; -} - -static void board_init(void) -{ - /* Enable interrupts for INAs. */ - gpio_enable_interrupt(GPIO_CC2_ALERT_L); - gpio_enable_interrupt(GPIO_VBUS_ALERT_L); - - /* Calibrate INA0 (VBUS) with 1mA/LSB scale */ - ina2xx_init(0, 0x8000, INA2XX_CALIB_1MA(15 /*mOhm*/)); - /* Disable INA1 (VCONN2) to avoid leaking current */ - ina2xx_init(1, 0, INA2XX_CALIB_1MA(15 /*mOhm*/)); -} -DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); - -/* ADC channels */ -const struct adc_t adc_channels[] = { - /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ - [ADC_CH_CC1_PD] = {"CC1_PD", 3300, 4096, 0, STM32_AIN(1)}, - [ADC_CH_CC2_PD] = {"CC2_PD", 3300, 4096, 0, STM32_AIN(3)}, -}; -BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); - -/* I2C ports */ -const struct i2c_port_t i2c_ports[] = { - {"master", I2C_PORT_MASTER, 100, GPIO_I2C_SCL, GPIO_I2C_SDA}, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); - -const void * const usb_strings[] = { - [USB_STR_DESC] = usb_string_desc, - [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."), - [USB_STR_PRODUCT] = USB_STRING_DESC("Twinkie"), - [USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32), - [USB_STR_SNIFFER] = USB_STRING_DESC("USB-PD Sniffer"), - [USB_STR_CONSOLE_NAME] = USB_STRING_DESC("Shell"), -}; -BUILD_ASSERT(ARRAY_SIZE(usb_strings) == USB_STR_COUNT); diff --git a/board/twinkie/board.h b/board/twinkie/board.h deleted file mode 100644 index 3d601ee979..0000000000 --- a/board/twinkie/board.h +++ /dev/null @@ -1,149 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Twinkie dongle configuration */ - -#ifndef __CROS_EC_BOARD_H -#define __CROS_EC_BOARD_H - -/* 48 MHz SYSCLK clock frequency */ -#define CPU_CLOCK 48000000 - -/* the UART console is on USART1 (PA9/PA10) */ -#define CONFIG_UART_CONSOLE 1 - -/* Optional features */ -#define CONFIG_USB -#define CONFIG_USB_BOS -#define CONFIG_USB_CONSOLE -#define CONFIG_WEBUSB_URL "storage.googleapis.com/webtwinkie.org/tool.html" - -#define CONFIG_USB_POWER_DELIVERY -#define CONFIG_USB_PD_TCPMV1 -#define CONFIG_USB_PD_CUSTOM_PDO -#define CONFIG_USB_PD_DUAL_ROLE -#define CONFIG_USB_PD_INTERNAL_COMP -#define CONFIG_USB_PD_PORT_MAX_COUNT 1 -#define CONFIG_USB_PD_TCPC -#define CONFIG_USB_PD_TCPM_STUB -#define CONFIG_USB_PD_VBUS_DETECT_GPIO -#define CONFIG_PD_USE_DAC_AS_REF -#define CONFIG_HW_CRC - -#ifndef HAS_TASK_PD_C0 /* PD sniffer mode */ -#undef CONFIG_DMA_DEFAULT_HANDLERS -#define CONFIG_USB_PD_TX_PHY_ONLY -/* override the comparator interrupt handler */ -#undef CONFIG_USB_PD_RX_COMP_IRQ -#endif - -#define CONFIG_ADC -#define CONFIG_BOARD_PRE_INIT -#define CONFIG_I2C -#define CONFIG_I2C_CONTROLLER -#define CONFIG_INA231 -#undef CONFIG_WATCHDOG_HELP -#undef CONFIG_LID_SWITCH -#undef CONFIG_TASK_PROFILING - -/* I2C ports configuration */ -#define I2C_PORT_MASTER 0 - -/* USB configuration */ -#define CONFIG_USB_PID 0x500A -/* By default, enable all console messages excepted USB */ -#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USB)) - -/* - * Allow dangerous commands all the time, since we don't have a write protect - * switch. - */ -#define CONFIG_SYSTEM_UNLOCKED - -#ifndef __ASSEMBLER__ - -#include <stdint.h> - -void sniffer_init(void); - -int wait_packet(int pol, uint32_t min_edges, uint32_t timeout_us); - -int expect_packet(int pol, uint8_t cmd, uint32_t timeout_us); - -uint8_t recording_enable(uint8_t mask); - -void trace_packets(void); - -void set_trace_mode(int mode); - -/* Timer selection */ -#define TIM_CLOCK_MSB 3 -#define TIM_CLOCK_LSB 15 -#define TIM_ADC 16 - -#include "gpio_signal.h" - -/* ADC signal */ -enum adc_channel { - ADC_CH_CC1_PD = 0, - ADC_CH_CC2_PD, - /* Number of ADC channels */ - ADC_CH_COUNT -}; - -/* USB string indexes */ -enum usb_strings { - USB_STR_DESC = 0, - USB_STR_VENDOR, - USB_STR_PRODUCT, - USB_STR_VERSION, - USB_STR_SNIFFER, - USB_STR_CONSOLE_NAME, - - USB_STR_COUNT -}; - -/* Standard-current Rp */ -#define PD_SRC_VNC PD_SRC_DEF_VNC_MV -#define PD_SRC_RD_THRESHOLD PD_SRC_DEF_RD_THRESH_MV - -/* delay necessary for the voltage transition on the power supply */ -#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */ -#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */ - -/* Define typical operating power and max power */ -#define PD_OPERATING_POWER_MW 15000 -#define PD_MAX_POWER_MW 60000 -#define PD_MAX_CURRENT_MA 3000 -#define PD_MAX_VOLTAGE_MV 20000 - -#endif /* !__ASSEMBLER__ */ - -/* USB interface indexes (use define rather than enum to expand them) */ -#define USB_IFACE_CONSOLE 0 -#define USB_IFACE_VENDOR 1 - -/* USB endpoint indexes (use define rather than enum to expand them) */ -#define USB_EP_CONTROL 0 -#define USB_EP_CONSOLE 1 - -/* - * Endpoint 2 is missing because the console used to use two bidirectional - * endpoints. It now uses a single bidirectional endpoint relying on the - * direction bit as an additional bit identifying the endpoint used. It is - * safe to reallocate endpoint 2 in the future. - */ - -#ifdef HAS_TASK_SNIFFER -#define USB_EP_SNIFFER 3 -#define USB_EP_COUNT 4 -#define USB_IFACE_COUNT 2 -#else -#define USB_EP_COUNT 2 -/* No IFACE_VENDOR for the sniffer */ -#define USB_IFACE_COUNT 1 -#endif - -#endif /* __CROS_EC_BOARD_H */ diff --git a/board/twinkie/build.mk b/board/twinkie/build.mk deleted file mode 100644 index 6fc2067d8f..0000000000 --- a/board/twinkie/build.mk +++ /dev/null @@ -1,14 +0,0 @@ -# -*- makefile -*- -# Copyright 2014 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. -# -# Board specific files build - -# the IC is STmicro STM32F072B -CHIP:=stm32 -CHIP_FAMILY:=stm32f0 -CHIP_VARIANT:=stm32f07x - -board-y=board.o usb_pd_policy.o injector.o simpletrace.o -board-$(HAS_TASK_SNIFFER)+=sniffer.o diff --git a/board/twinkie/ec.tasklist b/board/twinkie/ec.tasklist deleted file mode 100644 index 600df47c60..0000000000 --- a/board/twinkie/ec.tasklist +++ /dev/null @@ -1,13 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * See CONFIG_TASK_LIST in config.h for details. - */ -#define CONFIG_TASK_LIST \ - TASK_ALWAYS(HOOKS, hook_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ - TASK_ALWAYS_RO(SNIFFER, sniffer_task, NULL, TASK_STACK_SIZE) \ - TASK_ALWAYS_RW(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/twinkie/gpio.inc b/board/twinkie/gpio.inc deleted file mode 100644 index 551cb73748..0000000000 --- a/board/twinkie/gpio.inc +++ /dev/null @@ -1,50 +0,0 @@ -/* -*- mode:c -*- - * - * Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Declare symbolic names for all the GPIOs that we care about. - * Note: Those with interrupt handlers must be declared first. */ - -GPIO_INT(CC2_ALERT_L, PIN(A, 7), GPIO_INT_BOTH | GPIO_PULL_UP, cc2_event) -GPIO_INT(VBUS_ALERT_L, PIN(B, 2), GPIO_INT_BOTH | GPIO_PULL_UP, vbus_event) - -GPIO(CC1_EN, PIN(A, 0), GPIO_OUT_HIGH) -GPIO(CC1_PD, PIN(A, 1), GPIO_ANALOG) -GPIO(CC2_EN, PIN(A, 2), GPIO_OUT_HIGH) -GPIO(CC2_PD, PIN(A, 3), GPIO_ANALOG) -GPIO(DAC, PIN(A, 4), GPIO_ANALOG) -GPIO(CC2_TX_DATA, PIN(A, 6), GPIO_OUT_LOW) - -GPIO(CC1_RA, PIN(A, 8), GPIO_ODR_HIGH) -GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG) -GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG) -GPIO(CC1_RPUSB, PIN(A, 13), GPIO_ODR_HIGH) -GPIO(CC1_RP1A5, PIN(A, 14), GPIO_ODR_HIGH) -GPIO(CC1_RP3A0, PIN(A, 15), GPIO_ODR_HIGH) -GPIO(CC2_RPUSB, PIN(B, 0), GPIO_ODR_HIGH) - -GPIO(CC1_TX_EN, PIN(B, 1), GPIO_OUT_LOW) -GPIO(CC2_TX_EN, PIN(B, 3), GPIO_OUT_LOW) -GPIO(CC1_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) -GPIO(CC1_RD, PIN(B, 5), GPIO_ODR_HIGH) -GPIO(I2C_SCL, PIN(B, 6), GPIO_INPUT) -GPIO(I2C_SDA, PIN(B, 7), GPIO_INPUT) -GPIO(CC2_RD, PIN(B, 8), GPIO_ODR_HIGH) -GPIO(LED_G_L, PIN(B, 11), GPIO_ODR_HIGH) -GPIO(LED_R_L, PIN(B, 13), GPIO_ODR_HIGH) -GPIO(LED_B_L, PIN(B, 14), GPIO_ODR_HIGH) -GPIO(CC2_RA, PIN(B, 15), GPIO_ODR_HIGH) -GPIO(CC2_RP1A5, PIN(C, 14), GPIO_ODR_HIGH) -GPIO(CC2_RP3A0, PIN(C, 15), GPIO_ODR_HIGH) - -/* Unimplemented signals which we need to emulate for now */ -UNIMPLEMENTED(ENTERING_RW) -UNIMPLEMENTED(WP_L) - -ALTERNATE(PIN_MASK(A, 0x0020), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PA5) */ -ALTERNATE(PIN_MASK(B, 0x0200), 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ -ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ -ALTERNATE(PIN_MASK(B, 0x00C0), 1, MODULE_I2C, 0) /* I2C1 MASTER:PB6/7 */ diff --git a/board/twinkie/injector.c b/board/twinkie/injector.c deleted file mode 100644 index cae1d3557f..0000000000 --- a/board/twinkie/injector.c +++ /dev/null @@ -1,603 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "common.h" -#include "console.h" -#include "dma.h" -#include "gpio.h" -#include "hooks.h" -#include "hwtimer.h" -#include "injector.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "usb_pd.h" -#include "usb_pd_config.h" -#include "util.h" -#include "watchdog.h" - -/* FSM command/data buffer */ -static uint32_t inj_cmds[INJ_CMD_COUNT]; - -/* Current polarity for sending operations */ -static enum inj_pol inj_polarity = INJ_POL_CC1; - -/* - * CCx Resistors control definition - * - * Resistor control GPIOs : - * CC1_RA A8 - * CC1_RPUSB A13 - * CC1_RP1A5 A14 - * CC1_RP3A0 A15 - * CC2_RPUSB B0 - * CC1_RD B5 - * CC2_RD B8 - * CC2_RA B15 - * CC2_RP1A5 C14 - * CC2_RP3A0 C15 - */ -static const struct res_cfg { - const char *name; - struct config { - enum gpio_signal signal; - uint32_t flags; - } cfgs[2]; -} res_cfg[] = { - [INJ_RES_NONE] = {"NONE"}, - [INJ_RES_RA] = {"RA", {{GPIO_CC1_RA, GPIO_ODR_LOW}, - {GPIO_CC2_RA, GPIO_ODR_LOW} } }, - [INJ_RES_RD] = {"RD", {{GPIO_CC1_RD, GPIO_ODR_LOW}, - {GPIO_CC2_RD, GPIO_ODR_LOW} } }, - [INJ_RES_RPUSB] = {"RPUSB", {{GPIO_CC1_RPUSB, GPIO_OUT_HIGH}, - {GPIO_CC2_RPUSB, GPIO_OUT_HIGH} } }, - [INJ_RES_RP1A5] = {"RP1A5", {{GPIO_CC1_RP1A5, GPIO_OUT_HIGH}, - {GPIO_CC2_RP1A5, GPIO_OUT_HIGH} } }, - [INJ_RES_RP3A0] = {"RP3A0", {{GPIO_CC1_RP3A0, GPIO_OUT_HIGH}, - {GPIO_CC2_RP3A0, GPIO_OUT_HIGH} } }, -}; - -#define CC_RA(cc) (cc < PD_SRC_RD_THRESHOLD) -#define CC_RD(cc) ((cc > PD_SRC_RD_THRESHOLD) && (cc < PD_SRC_VNC)) -#define GET_POLARITY(cc1, cc2) (CC_RD(cc2) || CC_RA(cc1)) - -#ifdef HAS_TASK_SNIFFER -/* we don't have the default DMA handlers */ -void dma_event_interrupt_channel_3(void) -{ - if (STM32_DMA1_REGS->isr & STM32_DMA_ISR_TCIF(STM32_DMAC_CH3)) { - dma_clear_isr(STM32_DMAC_CH3); - task_wake(TASK_ID_CONSOLE); - } -} -DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_2_3, dma_event_interrupt_channel_3, 3); -#endif - -static void twinkie_init(void) -{ - /* configure TX clock pins */ - gpio_config_module(MODULE_USB_PD, 1); - /* Initialize physical layer */ - pd_hw_init(0, PD_ROLE_SINK); -} -DECLARE_HOOK(HOOK_INIT, twinkie_init, HOOK_PRIO_DEFAULT); - -/* ------ Helper functions ------ */ - -static inline int disable_tracing_save(void) -{ - int tr_enabled = STM32_EXTI_IMR & EXTI_COMP_MASK(0); - - if (tr_enabled) - pd_rx_disable_monitoring(0); - return tr_enabled; -} - -static inline void enable_tracing_ifneeded(int flag) -{ - if (flag) - pd_rx_enable_monitoring(0); -} - -static int send_message(int polarity, uint16_t header, - uint8_t cnt, const uint32_t *data) -{ - int bit_len; - - /* Don't get preempted by the tracing */ - int flag = disable_tracing_save(); - - bit_len = prepare_message(0, header, cnt, data); - /* Transmit the packet */ - pd_start_tx(0, polarity, bit_len); - pd_tx_done(0, polarity); - - enable_tracing_ifneeded(flag); - - return bit_len; -} - -static int send_hrst(int polarity) -{ - int off; - int flag = disable_tracing_save(); - /* 64-bit preamble */ - off = pd_write_preamble(0); - /* Hard-Reset: 3x RST-1 + 1x RST-2 */ - off = pd_write_sym(0, off, 0b0011010101); /* RST-1 = 00111 */ - off = pd_write_sym(0, off, 0b0011010101); /* RST-1 = 00111 */ - off = pd_write_sym(0, off, 0b0011010101); /* RST-1 = 00111 */ - off = pd_write_sym(0, off, 0b0101001101); /* RST-2 = 11001 */ - /* Ensure that we have a final edge */ - off = pd_write_last_edge(0, off); - /* Transmit the packet */ - pd_start_tx(0, polarity, off); - pd_tx_done(0, polarity); - enable_tracing_ifneeded(flag); - - return off; -} - -static void set_resistor(int pol, enum inj_res res) -{ - /* reset everything on one CC to high impedance */ - gpio_set_flags(res_cfg[INJ_RES_RA].cfgs[pol].signal, GPIO_ODR_HIGH); - gpio_set_flags(res_cfg[INJ_RES_RD].cfgs[pol].signal, GPIO_ODR_HIGH); - gpio_set_flags(res_cfg[INJ_RES_RPUSB].cfgs[pol].signal, GPIO_ODR_HIGH); - gpio_set_flags(res_cfg[INJ_RES_RP1A5].cfgs[pol].signal, GPIO_ODR_HIGH); - gpio_set_flags(res_cfg[INJ_RES_RP3A0].cfgs[pol].signal, GPIO_ODR_HIGH); - - /* connect the resistor if needed */ - if (res != INJ_RES_NONE) - gpio_set_flags(res_cfg[res].cfgs[pol].signal, - res_cfg[res].cfgs[pol].flags); -} - -static enum inj_pol guess_polarity(enum inj_pol pol) -{ - int cc1_volt, cc2_volt; - /* polarity forced by the user */ - if (pol == INJ_POL_CC1 || pol == INJ_POL_CC2) - return pol; - /* Auto-detection */ - cc1_volt = pd_adc_read(0, 0); - cc2_volt = pd_adc_read(0, 1); - return GET_POLARITY(cc1_volt, cc2_volt); -} - -/* ------ FSM commands ------ */ - -static void fsm_send(uint32_t w) -{ - uint16_t header = INJ_ARG0(w); - int idx = INJ_ARG1(w); - uint8_t cnt = INJ_ARG2(w); - - /* Buffer overflow */ - if (idx > INJ_CMD_COUNT) - return; - - send_message(inj_polarity, header, cnt, inj_cmds + idx); -} - -static void fsm_wave(uint32_t w) -{ - uint16_t bit_len = INJ_ARG0(w); - int idx = INJ_ARG1(w); - int off = 0; - int nbwords = DIV_ROUND_UP(bit_len, 32); - int i; - int flag; - - /* Buffer overflow */ - if (idx + nbwords > INJ_CMD_COUNT) - return; - - flag = disable_tracing_save(); - - for (i = idx; i < idx + nbwords; i++) - off = encode_word(0, off, inj_cmds[i]); - /* Ensure that we have a final edge */ - off = pd_write_last_edge(0, bit_len); - /* Transmit the packet */ - pd_start_tx(0, inj_polarity, off); - pd_tx_done(0, inj_polarity); - enable_tracing_ifneeded(flag); -} - -static void fsm_wait(uint32_t w) -{ -#ifdef HAS_TASK_SNIFFER - uint32_t timeout_ms = INJ_ARG0(w); - uint32_t min_edges = INJ_ARG12(w); - - wait_packet(inj_polarity, min_edges, timeout_ms * 1000); -#endif -} - -static void fsm_expect(uint32_t w) -{ - uint32_t timeout_ms = INJ_ARG0(w); - uint8_t cmd = INJ_ARG2(w); - - expect_packet(inj_polarity, cmd, timeout_ms * 1000); -} -static void fsm_get(uint32_t w) -{ - int store_idx = INJ_ARG0(w); - int param_idx = INJ_ARG1(w); - uint32_t *store_ptr = inj_cmds + store_idx; - - /* Buffer overflow */ - if (store_idx > INJ_CMD_COUNT) - return; - - switch (param_idx) { - case INJ_GET_CC: - *store_ptr = pd_adc_read(0, 0) | (pd_adc_read(0, 1) << 16); - break; - case INJ_GET_VBUS: - *store_ptr = (ina2xx_get_voltage(0) & 0xffff) | - ((ina2xx_get_current(0) & 0xffff) << 16); - break; - case INJ_GET_VCONN: - *store_ptr = (ina2xx_get_voltage(1) & 0xffff) | - ((ina2xx_get_current(1) & 0xffff) << 16); - break; - case INJ_GET_POLARITY: - *store_ptr = inj_polarity; - break; - default: - /* Do nothing */ - break; - } -} - -static void fsm_set(uint32_t w) -{ - int val = INJ_ARG0(w); - int idx = INJ_ARG1(w); - - switch (idx) { - case INJ_SET_RESISTOR1: - case INJ_SET_RESISTOR2: - set_resistor(idx - INJ_SET_RESISTOR1, val); - break; - case INJ_SET_RECORD: -#ifdef HAS_TASK_SNIFFER - recording_enable(val); -#endif - break; - case INJ_SET_TX_SPEED: - pd_set_clock(0, val * 1000); - break; - case INJ_SET_RX_THRESH: - /* set DAC voltage (Vref = 3.3V) */ - STM32_DAC_DHR12RD = val * 4096 / 3300; - break; - case INJ_SET_POLARITY: - inj_polarity = guess_polarity(val); - break; - case INJ_SET_TRACE: - set_trace_mode(val); - break; - default: - /* Do nothing */ - break; - } -} - -static int fsm_run(int index) -{ - while (index < INJ_CMD_COUNT) { - uint32_t w = inj_cmds[index]; - int cmd = INJ_CMD(w); - switch (cmd) { - case INJ_CMD_END: - return index; - case INJ_CMD_SEND: - fsm_send(w); - break; - case INJ_CMD_WAVE: - fsm_wave(w); - break; - case INJ_CMD_HRST: - send_hrst(inj_polarity); - break; - case INJ_CMD_WAIT: - fsm_wait(w); - break; - case INJ_CMD_GET: - fsm_get(w); - break; - case INJ_CMD_SET: - fsm_set(w); - break; - case INJ_CMD_JUMP: - index = INJ_ARG0(w); - continue; /* do not increment index */ - case INJ_CMD_EXPCT: - fsm_expect(w); - break; - case INJ_CMD_NOP: - default: - /* Do nothing */ - break; - } - index += 1; - watchdog_reload(); - } - return index; -} - -/* ------ Console commands ------ */ - -static int hex8tou32(char *str, uint32_t *val) -{ - char *ptr = str; - uint32_t tmp = 0; - - while (*ptr) { - char c = *ptr++; - if (c >= '0' && c <= '9') - tmp = (tmp << 4) + (c - '0'); - else if (c >= 'A' && c <= 'F') - tmp = (tmp << 4) + (c - 'A' + 10); - else if (c >= 'a' && c <= 'f') - tmp = (tmp << 4) + (c - 'a' + 10); - else - return EC_ERROR_INVAL; - } - if (ptr != str + 8) - return EC_ERROR_INVAL; - *val = tmp; - return EC_SUCCESS; -} - -static int cmd_fsm(int argc, char **argv) -{ - int index; - char *e; - - if (argc < 1) - return EC_ERROR_PARAM2; - - index = strtoi(argv[0], &e, 10); - if (*e) - return EC_ERROR_PARAM2; - index = fsm_run(index); - ccprintf("FSM Done %d\n", index); - - return EC_SUCCESS; -} - - -static int cmd_send(int argc, char **argv) -{ - int pol, cnt, i; - uint16_t header; - uint32_t data[VDO_MAX_SIZE]; - char *e; - int bit_len; - - cnt = argc - 2; - if (argc < 2 || cnt > VDO_MAX_SIZE) - return EC_ERROR_PARAM_COUNT; - - pol = strtoi(argv[0], &e, 10) - 1; - if (*e || pol > 1 || pol < 0) - return EC_ERROR_PARAM2; - header = strtoi(argv[1], &e, 16); - if (*e) - return EC_ERROR_PARAM3; - - for (i = 0; i < cnt; i++) - if (hex8tou32(argv[i+2], data + i)) - return EC_ERROR_INVAL; - - bit_len = send_message(pol, header, cnt, data); - ccprintf("Sent CC%d %04x + %d = %d\n", pol + 1, header, cnt, bit_len); - - return EC_SUCCESS; -} - -static int cmd_cc_level(int argc, char **argv) -{ - ccprintf("CC1 = %d mV ; CC2 = %d mV\n", - pd_adc_read(0, 0), pd_adc_read(0, 1)); - - return EC_SUCCESS; -} - -static int cmd_resistor(int argc, char **argv) -{ - int p, r; - - if (argc < 2) - return EC_ERROR_PARAM_COUNT; - - for (p = 0; p < 2; p++) { - int is_set = 0; - for (r = 0; r < ARRAY_SIZE(res_cfg); r++) - if (strcasecmp(res_cfg[r].name, argv[p]) == 0) { - set_resistor(p, r); - is_set = 1; - break; - } - /* Unknown name : set to No resistor */ - if (!is_set) - set_resistor(p, INJ_RES_NONE); - } - return EC_SUCCESS; -} - -static int cmd_tx_clock(int argc, char **argv) -{ - int freq; - char *e; - - if (argc < 1) - return EC_ERROR_PARAM2; - - freq = strtoi(argv[0], &e, 10); - if (*e) - return EC_ERROR_PARAM2; - pd_set_clock(0, freq); - ccprintf("TX frequency = %d Hz\n", freq); - - return EC_SUCCESS; -} - -static int cmd_rx_threshold(int argc, char **argv) -{ - int mv; - char *e; - - if (argc < 1) - return EC_ERROR_PARAM2; - - mv = strtoi(argv[0], &e, 10); - if (*e) - return EC_ERROR_PARAM2; - - /* set DAC voltage (Vref = 3.3V) */ - STM32_DAC_DHR12RD = mv * 4096 / 3300; - ccprintf("RX threshold = %d mV\n", mv); - - return EC_SUCCESS; -} - -static int cmd_ina_dump(int argc, char **argv, int index) -{ - if (index == 1) { /* VCONN INA is off by default, switch it on */ - ina2xx_write(index, INA2XX_REG_CONFIG, 0x4123); - /* - * wait for the end of conversion : 2x 1.1ms as defined - * by the Vb and Vsh CT bits in the CONFIG register above. - */ - udelay(2200); - } - - ccprintf("%s = %d mV ; %d mA\n", index == 0 ? "VBUS" : "VCONN", - ina2xx_get_voltage(index), ina2xx_get_current(index)); - - if (index == 1) /* power off VCONN INA */ - ina2xx_write(index, INA2XX_REG_CONFIG, 0); - - return EC_SUCCESS; -} - -static int cmd_bufwr(int argc, char **argv) -{ - int idx, cnt, i; - char *e; - - cnt = argc - 1; - if (argc < 2 || cnt > INJ_CMD_COUNT) - return EC_ERROR_PARAM_COUNT; - - idx = strtoi(argv[0], &e, 10); - if (*e || idx + cnt > INJ_CMD_COUNT) - return EC_ERROR_PARAM2; - - for (i = 0; i < cnt; i++) - if (hex8tou32(argv[i+1], inj_cmds + idx + i)) - return EC_ERROR_INVAL; - - return EC_SUCCESS; -} - -static int cmd_bufrd(int argc, char **argv) -{ - int idx, i; - int cnt = 1; - char *e; - - if (argc < 1) - return EC_ERROR_PARAM_COUNT; - - idx = strtoi(argv[0], &e, 10); - if (*e || idx > INJ_CMD_COUNT) - return EC_ERROR_PARAM2; - - if (argc >= 2) - cnt = strtoi(argv[1], &e, 10); - - if (*e || idx + cnt > INJ_CMD_COUNT) - return EC_ERROR_PARAM3; - - for (i = idx; i < idx + cnt; i++) - ccprintf("%08x ", inj_cmds[i]); - ccprintf("\n"); - - return EC_SUCCESS; -} - -static int cmd_sink(int argc, char **argv) -{ - /* - * Jump to the RW section which should contain a firmware acting - * as a USB PD sink - */ - system_run_image_copy(EC_IMAGE_RW); - - return EC_SUCCESS; -} - -static int cmd_trace(int argc, char **argv) -{ - if (argc < 1) - return EC_ERROR_PARAM_COUNT; - - if (!strcasecmp(argv[0], "on") || - !strcasecmp(argv[0], "1")) - set_trace_mode(TRACE_MODE_ON); - else if (!strcasecmp(argv[0], "raw")) - set_trace_mode(TRACE_MODE_RAW); - else if (!strcasecmp(argv[0], "off") || - !strcasecmp(argv[0], "0")) - set_trace_mode(TRACE_MODE_OFF); - else - return EC_ERROR_PARAM2; - - return EC_SUCCESS; -} - -static int command_tw(int argc, char **argv) -{ - if (!strcasecmp(argv[1], "send")) - return cmd_send(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "fsm")) - return cmd_fsm(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "bufwr")) - return cmd_bufwr(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "bufrd")) - return cmd_bufrd(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "cc")) - return cmd_cc_level(argc - 2, argv + 2); - else if (!strncasecmp(argv[1], "resistor", 3)) - return cmd_resistor(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "sink")) - return cmd_sink(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "trace")) - return cmd_trace(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "txclock")) - return cmd_tx_clock(argc - 2, argv + 2); - else if (!strncasecmp(argv[1], "rxthresh", 8)) - return cmd_rx_threshold(argc - 2, argv + 2); - else if (!strcasecmp(argv[1], "vbus")) - return cmd_ina_dump(argc - 2, argv + 2, 0); - else if (!strcasecmp(argv[1], "vconn")) - return cmd_ina_dump(argc - 2, argv + 2, 1); - else - return EC_ERROR_PARAM1; - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(twinkie, command_tw, - "[send|fsm|cc|resistor|txclock|rxthresh|vbus|vconn]", - "Manual Twinkie tweaking"); diff --git a/board/twinkie/injector.h b/board/twinkie/injector.h deleted file mode 100644 index 4a33f8ecf0..0000000000 --- a/board/twinkie/injector.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_INJECTOR_H -#define __CROS_EC_INJECTOR_H - -/* - * Finite state machine definition for sending complex sequences - * - * the 32-bit commands have the following definition : - * [31:28] [27:0] - * Command arg - * INJ_CMD_x - * [27:16] [15:0] - * arg12 arg0 - * [27:24] [23:16] [15:0] - * arg2 arg1 arg0 - */ - -/* Macros to extract values from FSM command words */ -#define INJ_CMD(w) ((w) >> 28) -#define INJ_ARG(w) ((w) & 0x0FFFFFFF) -#define INJ_ARG0(w) ((w) & 0x0000FFFF) -#define INJ_ARG1(w) (((w) >> 16) & 0xFF) -#define INJ_ARG2(w) (((w) >> 24) & 0xF) -#define INJ_ARG12(w) (((w) >> 16) & 0xFFF) - -enum inj_cmd { - INJ_CMD_END = 0x0, /* stop the FSM */ - INJ_CMD_SEND = 0x1, /* Send message on CCx */ - /* arg0: header arg1/2:payload index/count */ - INJ_CMD_WAVE = 0x2, /* Send arbitrary waveform */ - /* stored at index arg1 of len arg0 */ - INJ_CMD_HRST = 0x3, /* Send Hard Reset on CCx */ - INJ_CMD_WAIT = 0x4, /* Wait for arg12 edges if arg12 != 0 */ - /* and timeout after arg0 ms */ - INJ_CMD_GET = 0x5, /* Get parameter arg1 (INJ_GET_x) at index arg0 */ - INJ_CMD_SET = 0x6, /* Set parameter arg1 (INJ_SET_x) with arg0 */ - INJ_CMD_JUMP = 0x8, /* Jump to index (as arg0) */ - INJ_CMD_EXPCT = 0xC, /* Expect a packet with command arg2 */ - /* and timeout after arg0 ms */ - INJ_CMD_NOP = 0xF, /* No-Operation */ -}; - -enum inj_set { - INJ_SET_RESISTOR1 = 0, /* CC1 resistor as arg0 (INJ_RES_x) */ - INJ_SET_RESISTOR2 = 1, /* CC2 resistor as arg0 (INJ_RES_x) */ - INJ_SET_RECORD = 2, /* Recording on/off */ - INJ_SET_TX_SPEED = 3, /* TX frequency is arg0 kHz */ - INJ_SET_RX_THRESH = 4, /* RX voltage threshold is arg0 mV */ - INJ_SET_POLARITY = 5, /* Polarity for other operations (INJ_POL_CC) */ - INJ_SET_TRACE = 6, /* Text packet trace on/raw/off */ -}; - -enum inj_get { - INJ_GET_CC = 0, /* CC1/CC2 voltages in mV */ - INJ_GET_VBUS = 1, /* VBUS voltage in mV and current in mA */ - INJ_GET_VCONN = 2, /* VCONN voltage in mV and current in mA */ - INJ_GET_POLARITY = 3, /* Current polarity (INJ_POL_CC) */ -}; - -enum inj_res { - INJ_RES_NONE = 0, - INJ_RES_RA = 1, - INJ_RES_RD = 2, - INJ_RES_RPUSB = 3, - INJ_RES_RP1A5 = 4, - INJ_RES_RP3A0 = 5, -}; - -enum inj_pol { - INJ_POL_CC1 = 0, - INJ_POL_CC2 = 1, - INJ_POL_AUTO = 0xffff, -}; - -enum trace_mode { - TRACE_MODE_OFF = 0, - TRACE_MODE_RAW = 1, - TRACE_MODE_ON = 2, -}; - -/* Number of words in the FSM command/data buffer */ -#define INJ_CMD_COUNT 128 - -#endif /* __CROS_EC_INJECTOR_H */ diff --git a/board/twinkie/simpletrace.c b/board/twinkie/simpletrace.c deleted file mode 100644 index 9f151f761f..0000000000 --- a/board/twinkie/simpletrace.c +++ /dev/null @@ -1,287 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "adc.h" -#include "common.h" -#include "console.h" -#include "dma.h" -#include "gpio.h" -#include "hooks.h" -#include "hwtimer.h" -#include "injector.h" -#include "registers.h" -#include "system.h" -#include "task.h" -#include "timer.h" -#include "usb_pd.h" -#include "usb_pd_config.h" -#include "util.h" - -/* PD packet text tracing state : TRACE_MODE_OFF/RAW/ON */ -int trace_mode; - -/* The FSM is waiting for the following command (0 == None) */ -uint8_t expected_cmd; - -static const char * const ctrl_msg_name[] = { - [0] = "RSVD-C0", - [PD_CTRL_GOOD_CRC] = "GOODCRC", - [PD_CTRL_GOTO_MIN] = "GOTOMIN", - [PD_CTRL_ACCEPT] = "ACCEPT", - [PD_CTRL_REJECT] = "REJECT", - [PD_CTRL_PING] = "PING", - [PD_CTRL_PS_RDY] = "PSRDY", - [PD_CTRL_GET_SOURCE_CAP] = "GSRCCAP", - [PD_CTRL_GET_SINK_CAP] = "GSNKCAP", - [PD_CTRL_DR_SWAP] = "DRSWAP", - [PD_CTRL_PR_SWAP] = "PRSWAP", - [PD_CTRL_VCONN_SWAP] = "VCONNSW", - [PD_CTRL_WAIT] = "WAIT", - [PD_CTRL_SOFT_RESET] = "SFT-RST", - [14] = "RSVD-C14", - [15] = "RSVD-C15", -}; - -static const char * const data_msg_name[] = { - [0] = "RSVD-D0", - [PD_DATA_SOURCE_CAP] = "SRCCAP", - [PD_DATA_REQUEST] = "REQUEST", - [PD_DATA_BIST] = "BIST", - [PD_DATA_SINK_CAP] = "SNKCAP", - /* 5-14 Reserved */ - [PD_DATA_VENDOR_DEF] = "VDM", -}; - -static const char * const svdm_cmd_name[] = { - [CMD_DISCOVER_IDENT] = "DISCID", - [CMD_DISCOVER_SVID] = "DISCSVID", - [CMD_DISCOVER_MODES] = "DISCMODE", - [CMD_ENTER_MODE] = "ENTER", - [CMD_EXIT_MODE] = "EXIT", - [CMD_ATTENTION] = "ATTN", - [CMD_DP_STATUS] = "DPSTAT", - [CMD_DP_CONFIG] = "DPCFG", -}; - -static const char * const svdm_cmdt_name[] = { - [CMDT_INIT] = "INI", - [CMDT_RSP_ACK] = "ACK", - [CMDT_RSP_NAK] = "NAK", - [CMDT_RSP_BUSY] = "BSY", -}; - -static void print_pdo(uint32_t word) -{ - if ((word & PDO_TYPE_MASK) == PDO_TYPE_BATTERY) - ccprintf(" %dmV/%dmW", ((word>>10)&0x3ff)*50, - (word&0x3ff)*250); - else - ccprintf(" %dmV/%dmA", ((word>>10)&0x3ff)*50, - (word&0x3ff)*10); -} - -static void print_rdo(uint32_t word) -{ - ccprintf("{%d} %08x", RDO_POS(word), word); -} - -static void print_vdo(int idx, uint32_t word) -{ - if (idx == 0 && (word & VDO_SVDM_TYPE)) { - const char *cmd = svdm_cmd_name[PD_VDO_CMD(word)]; - const char *cmdt = svdm_cmdt_name[PD_VDO_CMDT(word)]; - uint16_t vid = PD_VDO_VID(word); - if (!cmd) - cmd = "????"; - ccprintf(" V%04x:%s,%s:%08x", vid, cmd, cmdt, word); - } else { - ccprintf(" %08x", word); - } -} - -static void print_packet(int head, uint32_t *payload) -{ - int i; - int cnt = PD_HEADER_CNT(head); - int typ = PD_HEADER_TYPE(head); - int id = PD_HEADER_ID(head); - const char *name; - const char *prole; - - if (trace_mode == TRACE_MODE_RAW) { - ccprintf("%pT[%04x]", PRINTF_TIMESTAMP_NOW, head); - for (i = 0; i < cnt; i++) - ccprintf(" %08x", payload[i]); - ccputs("\n"); - return; - } - name = cnt ? data_msg_name[typ] : ctrl_msg_name[typ]; - prole = head & (PD_ROLE_SOURCE << 8) ? "SRC" : "SNK"; - ccprintf("%pT %s/%d [%04x]%s", - PRINTF_TIMESTAMP_NOW, prole, id, head, name); - if (!cnt) { /* Control message : we are done */ - ccputs("\n"); - return; - } - /* Print payload for data message */ - for (i = 0; i < cnt; i++) - switch (typ) { - case PD_DATA_SOURCE_CAP: - case PD_DATA_SINK_CAP: - print_pdo(payload[i]); - break; - case PD_DATA_REQUEST: - print_rdo(payload[i]); - break; - case PD_DATA_BIST: - ccprintf("mode %d cnt %04x", payload[i] >> 28, - payload[i] & 0xffff); - break; - case PD_DATA_VENDOR_DEF: - print_vdo(i, payload[i]); - break; - default: - ccprintf(" %08x", payload[i]); - } - ccputs("\n"); -} - -static void print_error(enum pd_rx_errors err) -{ - if (err == PD_RX_ERR_INVAL) - ccprintf("%pT TMOUT\n", PRINTF_TIMESTAMP_NOW); - else if (err == PD_RX_ERR_HARD_RESET) - ccprintf("%pT HARD-RST\n", PRINTF_TIMESTAMP_NOW); - else if (err == PD_RX_ERR_UNSUPPORTED_SOP) - ccprintf("%pT SOP*\n", PRINTF_TIMESTAMP_NOW); - else - ccprintf("ERR %d\n", err); -} - -/* keep track of RX edge timing in order to trigger receive */ -static timestamp_t rx_edge_ts[2][PD_RX_TRANSITION_COUNT]; -static int rx_edge_ts_idx[2]; - -void rx_event(void) -{ - int pending, i; - int next_idx; - pending = STM32_EXTI_PR; - - /* Iterate over the 2 CC lines */ - for (i = 0; i < 2; i++) { - if (pending & (1 << (21 + i))) { - rx_edge_ts[i][rx_edge_ts_idx[i]].val = get_time().val; - next_idx = (rx_edge_ts_idx[i] == - PD_RX_TRANSITION_COUNT - 1) ? - 0 : rx_edge_ts_idx[i] + 1; - - /* - * If we have seen enough edges in a certain amount of - * time, then trigger RX start. - */ - if ((rx_edge_ts[i][rx_edge_ts_idx[i]].val - - rx_edge_ts[i][next_idx].val) - < PD_RX_TRANSITION_WINDOW) { - /* acquire the message only on the active CC */ - STM32_COMP_CSR &= ~(i ? STM32_COMP_CMP1EN - : STM32_COMP_CMP2EN); - /* start sampling */ - pd_rx_start(0); - /* - * ignore the comparator IRQ until we are done - * with current message - */ - pd_rx_disable_monitoring(0); - /* trigger the analysis in the task */ -#ifdef HAS_TASK_SNIFFER - task_set_event(TASK_ID_SNIFFER, 1 << i); -#endif - /* start reception only one CC line */ - break; - } else { - /* do not trigger RX start, just clear int */ - STM32_EXTI_PR = EXTI_COMP_MASK(0); - } - rx_edge_ts_idx[i] = next_idx; - } - } -} -#ifdef HAS_TASK_SNIFFER -DECLARE_IRQ(STM32_IRQ_COMP, rx_event, 1); -#endif - -void trace_packets(void) -{ - int head; - uint32_t payload[7]; - -#ifdef HAS_TASK_SNIFFER - /* Disable sniffer DMA configuration */ - dma_disable(STM32_DMAC_CH6); - dma_disable(STM32_DMAC_CH7); - task_disable_irq(STM32_IRQ_DMA_CHANNEL_4_7); - /* remove TIM1 CH1/2/3 DMA remapping */ - STM32_SYSCFG_CFGR1 &= ~BIT(28); -#endif - - /* "classical" PD RX configuration */ - pd_hw_init_rx(0); - pd_select_polarity(0, 0); - /* detect messages on both CCx lines */ - STM32_COMP_CSR |= STM32_COMP_CMP2EN | STM32_COMP_CMP1EN; - /* Enable the RX interrupts */ - pd_rx_enable_monitoring(0); - - while (1) { - task_wait_event(-1); - if (trace_mode == TRACE_MODE_OFF) - break; - /* incoming packet processing */ - head = pd_analyze_rx(0, payload); - pd_rx_complete(0); - /* re-enabled detection on both CCx lines */ - STM32_COMP_CSR |= STM32_COMP_CMP2EN | STM32_COMP_CMP1EN; - pd_rx_enable_monitoring(0); - /* print the last packet content */ - if (head > 0) - print_packet(head, payload); - else - print_error(head); - if (head > 0 && expected_cmd == PD_HEADER_TYPE(head)) - task_wake(TASK_ID_CONSOLE); - } - - task_disable_irq(STM32_IRQ_COMP); - /* Disable tracer DMA configuration */ - dma_disable(STM32_DMAC_CH2); - /* Put back : sniffer RX hardware configuration */ -#ifdef HAS_TASK_SNIFFER - sniffer_init(); -#endif -} - -int expect_packet(int pol, uint8_t cmd, uint32_t timeout_us) -{ - uint32_t evt; - - expected_cmd = cmd; - evt = task_wait_event(timeout_us); - - return !(evt == TASK_EVENT_TIMER); -} - -void set_trace_mode(int mode) -{ - /* No change */ - if (mode == trace_mode) - return; - - trace_mode = mode; - /* kick the task to take into account the new value */ -#ifdef HAS_TASK_SNIFFER - task_wake(TASK_ID_SNIFFER); -#endif -} diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c deleted file mode 100644 index 00effb8539..0000000000 --- a/board/twinkie/sniffer.c +++ /dev/null @@ -1,402 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "atomic.h" -#include "clock.h" -#include "common.h" -#include "console.h" -#include "dma.h" -#include "gpio.h" -#include "hwtimer.h" -#include "hooks.h" -#include "injector.h" -#include "link_defs.h" -#include "registers.h" -#include "task.h" -#include "timer.h" -#include "usb_descriptor.h" -#include "usb_hw.h" -#include "util.h" -#include "ina2xx.h" - -/* Size of one USB packet buffer */ -#define EP_BUF_SIZE 64 - -#define EP_PACKET_HEADER_SIZE 4 -/* Size of the payload (packet minus the header) */ -#define EP_PAYLOAD_SIZE (EP_BUF_SIZE - EP_PACKET_HEADER_SIZE) - -/* Buffer enough to avoid overflowing due to USB latencies on both sides */ -#define RX_COUNT (16 * EP_PAYLOAD_SIZE) - -/* Task event for the USB transfer interrupt */ -#define USB_EVENT TASK_EVENT_CUSTOM_BIT(0) - -/* Bitmap of enabled capture channels : CC1+CC2 by default */ -static uint8_t channel_mask = 0x3; - -/* edge timing samples */ -static uint8_t samples[2][RX_COUNT]; -/* bitmap of the samples sub-buffer filled with DMA data */ -static volatile uint32_t filled_dma; -/* timestamps of the beginning of DMA buffers */ -static uint16_t sample_tstamp[4]; -/* sequence number of the beginning of DMA buffers */ -static uint16_t sample_seq[4]; - -/* Bulk endpoint double buffer */ -static usb_uint ep_buf[2][EP_BUF_SIZE / 2] __usb_ram; -/* USB Buffers not used, ready to be filled */ -static volatile uint32_t free_usb = 3; - -static inline void led_set_activity(int ch) -{ - static int accumul[2]; - static uint32_t last_ts[2]; - uint32_t now = __hw_clock_source_read(); - int delta = now - last_ts[ch]; - last_ts[ch] = now; - accumul[ch] = MAX(0, accumul[ch] + (30000 - delta)); - gpio_set_level(ch ? GPIO_LED_R_L : GPIO_LED_G_L, !accumul[ch]); -} - -static inline void led_set_record(void) -{ - gpio_set_level(GPIO_LED_B_L, 0); -} - -static inline void led_reset_record(void) -{ - gpio_set_level(GPIO_LED_B_L, 1); -} - -/* USB descriptors */ -const struct usb_interface_descriptor USB_IFACE_DESC(USB_IFACE_VENDOR) = { - .bLength = USB_DT_INTERFACE_SIZE, - .bDescriptorType = USB_DT_INTERFACE, - .bInterfaceNumber = USB_IFACE_VENDOR, - .bAlternateSetting = 0, - .bNumEndpoints = 1, - .bInterfaceClass = USB_CLASS_VENDOR_SPEC, - .bInterfaceSubClass = USB_CLASS_VENDOR_SPEC, - .bInterfaceProtocol = 0, - .iInterface = USB_STR_SNIFFER, -}; -const struct usb_endpoint_descriptor USB_EP_DESC(USB_IFACE_VENDOR, - USB_EP_SNIFFER) = { - .bLength = USB_DT_ENDPOINT_SIZE, - .bDescriptorType = USB_DT_ENDPOINT, - .bEndpointAddress = 0x80 | USB_EP_SNIFFER, - .bmAttributes = 0x02 /* Bulk IN */, - .wMaxPacketSize = USB_MAX_PACKET_SIZE, - .bInterval = 1 -}; - -/* USB callbacks */ -static void ep_tx(void) -{ - static int b; /* current buffer index */ - if (btable_ep[USB_EP_SNIFFER].tx_count) { - /* we have transmitted the previous buffer, toggle it */ - free_usb |= 1 << b; - b = b ? 0 : 1; - btable_ep[USB_EP_SNIFFER].tx_addr = usb_sram_addr(ep_buf[b]); - } - /* re-enable data transmission if we have available data */ - btable_ep[USB_EP_SNIFFER].tx_count = (free_usb & (1<<b)) ? 0 - : EP_BUF_SIZE; - STM32_TOGGLE_EP(USB_EP_SNIFFER, EP_TX_MASK, EP_TX_VALID, 0); - /* wake up the processing */ - task_set_event(TASK_ID_SNIFFER, USB_EVENT); -} - -static void ep_event(enum usb_ep_event evt) -{ - if (evt != USB_EVENT_RESET) - return; - - /* Bulk IN endpoint */ - btable_ep[USB_EP_SNIFFER].tx_addr = usb_sram_addr(ep_buf[0]); - btable_ep[USB_EP_SNIFFER].tx_count = EP_BUF_SIZE; - STM32_USB_EP(USB_EP_SNIFFER) = (USB_EP_SNIFFER << 0) /*Endpoint Num*/ | - (3 << 4) /* TX Valid */ | - (0 << 9) /* Bulk EP */ | - (0 << 12) /* RX Disabled */; -} -USB_DECLARE_EP(USB_EP_SNIFFER, ep_tx, ep_tx, ep_event); - - -/* --- RX operation using comparator linked to timer --- */ -/* RX on CC1 is using COMP1 triggering TIM1 CH1 */ -#define TIM_RX1 1 -#define DMAC_TIM_RX1 STM32_DMAC_CH6 -#define TIM_RX1_CCR_IDX 1 -/* RX on CC1 is using COMP2 triggering TIM2 CH4 */ -#define TIM_RX2 2 -#define DMAC_TIM_RX2 STM32_DMAC_CH7 -#define TIM_RX2_CCR_IDX 4 - -/* Clock divider for RX edges timings (2.4Mhz counter from 48Mhz clock) */ -#define RX_CLOCK_DIV (20 - 1) - -static const struct dma_option dma_tim_cc1 = { - DMAC_TIM_RX1, (void *)&STM32_TIM_CCRx(TIM_RX1, TIM_RX1_CCR_IDX), - STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT | - STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE -}; - -static const struct dma_option dma_tim_cc2 = { - DMAC_TIM_RX2, (void *)&STM32_TIM_CCRx(TIM_RX2, TIM_RX2_CCR_IDX), - STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT | - STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE -}; - -/* sequence number for sample buffers */ -static volatile uint32_t seq; -/* Buffer overflow count */ -static uint32_t oflow; - -#define SNIFFER_CHANNEL_CC1 0 -#define SNIFFER_CHANNEL_CC2 1 - -#define get_channel(b) (((b) >> 12) & 0x1) - -void tim_rx1_handler(uint32_t stat) -{ - stm32_dma_regs_t *dma = STM32_DMA1_REGS; - int idx = !(stat & STM32_DMA_ISR_HTIF(DMAC_TIM_RX1)); - uint32_t mask = idx ? 0xFF00 : 0x00FF; - uint32_t next = idx ? 0x0001 : 0x0100; - - sample_tstamp[idx] = __hw_clock_source_read(); - sample_seq[idx] = ((seq++ << 3) & 0x0ff8) | - (SNIFFER_CHANNEL_CC1<<12); - if (filled_dma & next) { - oflow++; - sample_seq[idx] |= 0x8000; - } else { - led_set_record(); - } - filled_dma |= mask; - dma->ifcr = STM32_DMA_ISR_ALL(DMAC_TIM_RX1); - led_set_activity(0); -} - -void tim_rx2_handler(uint32_t stat) -{ - stm32_dma_regs_t *dma = STM32_DMA1_REGS; - int idx = !(stat & STM32_DMA_ISR_HTIF(DMAC_TIM_RX2)); - uint32_t mask = idx ? 0xFF000000 : 0x00FF0000; - uint32_t next = idx ? 0x00010000 : 0x01000000; - - idx += 2; - sample_tstamp[idx] = __hw_clock_source_read(); - sample_seq[idx] = ((seq++ << 3) & 0x0ff8) | - (SNIFFER_CHANNEL_CC2<<12); - if (filled_dma & next) { - oflow++; - sample_seq[idx] |= 0x8000; - } else { - led_set_record(); - } - filled_dma |= mask; - dma->ifcr = STM32_DMA_ISR_ALL(DMAC_TIM_RX2); - led_set_activity(1); -} - -void tim_dma_handler(void) -{ - stm32_dma_regs_t *dma = STM32_DMA1_REGS; - uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1) - | STM32_DMA_ISR_TCIF(DMAC_TIM_RX1) - | STM32_DMA_ISR_HTIF(DMAC_TIM_RX2) - | STM32_DMA_ISR_TCIF(DMAC_TIM_RX2)); - if (stat & STM32_DMA_ISR_ALL(DMAC_TIM_RX2)) - tim_rx2_handler(stat); - else - tim_rx1_handler(stat); - /* time to process the samples */ - task_set_event(TASK_ID_SNIFFER, USB_EVENT); -} -DECLARE_IRQ(STM32_IRQ_DMA_CHANNEL_4_7, tim_dma_handler, 1); - -static void rx_timer_init(int tim_id, timer_ctlr_t *tim, int ch_idx, int up_idx) -{ - int bit_idx = 8 * ((ch_idx - 1) % 2); - /* --- set counter for RX timing : 2.4Mhz rate, free-running --- */ - __hw_timer_enable_clock(tim_id, 1); - /* Timer configuration */ - tim->cr1 = 0x0004; - tim->cr2 = 0x0000; - /* Auto-reload value : 8-bit free running counter */ - tim->arr = 0xFF; - /* Counter reloading event after 106us */ - tim->ccr[1] = 0xFF; - /* Timer ICx input configuration */ - if (ch_idx <= 2) - tim->ccmr1 = 1 << bit_idx; - else - tim->ccmr2 = 1 << bit_idx; - tim->ccer = 0xB << ((ch_idx - 1) * 4); - /* TODO: add input filtering */ - /* configure DMA request on CCRx update and overflow/update event */ - tim->dier = (1 << (8 + ch_idx)) | (1 << (8 + up_idx)); - /* set prescaler to /26 (F=2.4Mhz, T=0.4us) */ - tim->psc = RX_CLOCK_DIV; - /* Reload the pre-scaler and reset the counter, clear CCRx */ - tim->egr = 0x001F; - /* clear update event from reloading */ - tim->sr = 0; -} - - - -void sniffer_init(void) -{ - /* remap TIM1 CH1/2/3 to DMA channel 6 */ - STM32_SYSCFG_CFGR1 |= BIT(28); - - /* TIM1 CH1 for CC1 RX */ - rx_timer_init(TIM_RX1, (void *)STM32_TIM_BASE(TIM_RX1), - TIM_RX1_CCR_IDX, 2); - /* TIM3 CH4 for CC2 RX */ - rx_timer_init(TIM_RX2, (void *)STM32_TIM_BASE(TIM_RX2), - TIM_RX2_CCR_IDX, 2); - - /* turn on COMP/SYSCFG */ - STM32_RCC_APB2ENR |= BIT(0); - STM32_COMP_CSR = STM32_COMP_CMP1EN | STM32_COMP_CMP1MODE_HSPEED | - STM32_COMP_CMP1INSEL_VREF12 | - STM32_COMP_CMP1OUTSEL_TIM1_IC1 | - STM32_COMP_CMP1HYST_HI | - STM32_COMP_CMP2EN | STM32_COMP_CMP2MODE_HSPEED | - STM32_COMP_CMP2INSEL_VREF12 | - STM32_COMP_CMP2OUTSEL_TIM2_IC4 | - STM32_COMP_CMP2HYST_HI; - - /* start sampling the edges on the CC lines using the RX timers */ - dma_start_rx(&dma_tim_cc1, RX_COUNT, samples[0]); - dma_start_rx(&dma_tim_cc2, RX_COUNT, samples[1]); - task_enable_irq(STM32_IRQ_DMA_CHANNEL_4_7); - /* start RX timers on CC1 and CC2 */ - STM32_TIM_CR1(TIM_RX1) |= 1; - STM32_TIM_CR1(TIM_RX2) |= 1; -} -DECLARE_HOOK(HOOK_INIT, sniffer_init, HOOK_PRIO_DEFAULT); - -/* state of the simple text tracer */ -extern int trace_mode; - -/* Task to post-process the samples and copy them the USB endpoint buffer */ -void sniffer_task(void) -{ - int u = 0; /* current USB buffer index */ - int d = 0; /* current DMA buffer index */ - int off = 0; /* DMA buffer offset */ - - while (1) { - /* Wait for a new buffer of samples or a new USB free buffer */ - task_wait_event(-1); - /* send the available samples over USB if we have a buffer*/ - while (filled_dma && free_usb) { - while (!(filled_dma & BIT(d))) { - d = (d + 1) & 31; - off += EP_PAYLOAD_SIZE; - if (off >= RX_COUNT) - off = 0; - } - - ep_buf[u][0] = sample_seq[d >> 3] | (d & 7); - ep_buf[u][1] = sample_tstamp[d >> 3]; - - memcpy_to_usbram( - ((void *)usb_sram_addr(ep_buf[u] - + (EP_PACKET_HEADER_SIZE>>1))), - samples[d >> 4]+off, - EP_PAYLOAD_SIZE); - atomic_clear_bits((uint32_t *)&free_usb, 1 << u); - u = !u; - atomic_clear_bits((uint32_t *)&filled_dma, 1 << d); - } - led_reset_record(); - - if (trace_mode != TRACE_MODE_OFF) { - uint8_t curr = recording_enable(0); - trace_packets(); - recording_enable(curr); - } - } -} - -int wait_packet(int pol, uint32_t min_edges, uint32_t timeout_us) -{ - stm32_dma_chan_t *chan = dma_get_channel(pol ? DMAC_TIM_RX2 - : DMAC_TIM_RX1); - uint32_t t0 = __hw_clock_source_read(); - uint32_t c0 = chan->cndtr; - uint32_t t_gap = t0; - uint32_t c_gap = c0; - uint32_t total_edges = 0; - - while (1) { - uint32_t t = __hw_clock_source_read(); - uint32_t c = chan->cndtr; - if (t - t0 > timeout_us) /* Timeout */ - break; - if (min_edges) { /* real packet detection */ - int nb = (int)c_gap - (int)c; - if (nb < 0) - nb = RX_COUNT - nb; - if (nb > 3) { /* NOT IDLE */ - t_gap = t; - c_gap = c; - total_edges += nb; - } else { - if ((t - t_gap) > 20 && - (total_edges - (t - t0)/256) >= min_edges) - /* real gap after the packet */ - break; - } - } - } - return (__hw_clock_source_read() - t0 > timeout_us); -} - -uint8_t recording_enable(uint8_t new_mask) -{ - uint8_t old_mask = channel_mask; - uint8_t diff = channel_mask ^ new_mask; - /* start/stop RX timers according to the channel mask */ - if (diff & 1) { - if (new_mask & 1) - STM32_TIM_CR1(TIM_RX1) |= 1; - else - STM32_TIM_CR1(TIM_RX1) &= ~1; - } - if (diff & 2) { - if (new_mask & 2) - STM32_TIM_CR1(TIM_RX2) |= 1; - else - STM32_TIM_CR1(TIM_RX2) &= ~1; - } - channel_mask = new_mask; - return old_mask; -} - -static void sniffer_sysjump(void) -{ - /* Stop DMA before jumping to avoid memory corruption */ - recording_enable(0); -} -DECLARE_HOOK(HOOK_SYSJUMP, sniffer_sysjump, HOOK_PRIO_DEFAULT); - -static int command_sniffer(int argc, char **argv) -{ - ccprintf("Seq number:%d Overflows: %d\n", seq, oflow); - - return EC_SUCCESS; -} -DECLARE_CONSOLE_COMMAND(sniffer, command_sniffer, - "[]", "Buffering status"); diff --git a/board/twinkie/usb_pd_config.h b/board/twinkie/usb_pd_config.h deleted file mode 100644 index 1c20a9df77..0000000000 --- a/board/twinkie/usb_pd_config.h +++ /dev/null @@ -1,180 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery board configuration */ - -#ifndef __CROS_EC_USB_PD_CONFIG_H -#define __CROS_EC_USB_PD_CONFIG_H - -#include "ina2xx.h" - -/* Timer selection for baseband PD communication */ -#define TIM_CLOCK_PD_TX_C0 17 -#define TIM_CLOCK_PD_RX_C0 1 - -#define TIM_CLOCK_PD_TX(p) TIM_CLOCK_PD_TX_C0 -#define TIM_CLOCK_PD_RX(p) TIM_CLOCK_PD_RX_C0 - -/* TX and RX timer register */ -#define TIM_REG_TX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_TX_C0)) -#define TIM_REG_RX_C0 (STM32_TIM_BASE(TIM_CLOCK_PD_RX_C0)) -#define TIM_REG_TX(p) TIM_REG_TX_C0 -#define TIM_REG_RX(p) TIM_REG_RX_C0 - -/* Timer channel */ -#define TIM_RX_CCR_C0 1 -#define TIM_TX_CCR_C0 1 - -/* RX timer capture/compare register */ -#define TIM_CCR_C0 (&STM32_TIM_CCRx(TIM_CLOCK_PD_RX_C0, TIM_RX_CCR_C0)) -#define TIM_RX_CCR_REG(p) TIM_CCR_C0 - -/* use the hardware accelerator for CRC */ -#define CONFIG_HW_CRC - -/* TX is using SPI1 on PA6/PB4 */ -#define SPI_REGS(p) STM32_SPI1_REGS -#define DMAC_SPI_TX(p) STM32_DMAC_CH3 - -static inline void spi_enable_clock(int port) -{ - STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1; -} - -/* RX is using COMP1 or COMp2 triggering TIM1 CH1 */ -#define CMP1OUTSEL STM32_COMP_CMP1OUTSEL_TIM1_IC1 -#define CMP2OUTSEL STM32_COMP_CMP2OUTSEL_TIM1_IC1 - -#define DMAC_TIM_RX(p) STM32_DMAC_CH2 -#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0 -#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0 -#define TIM_CCR_CS 1 -#define EXTI_COMP_MASK(p) (BIT(21) | BIT(22)) -#define IRQ_COMP STM32_IRQ_COMP -/* triggers packet detection on comparator falling edge */ -#define EXTI_XTSR STM32_EXTI_FTSR - -/* the pins used for communication need to be hi-speed */ -static inline void pd_set_pins_speed(int port) -{ - /* 40 MHz pin speed on SPI TX PB4 */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00000300; - /* 40 MHz pin speed on SPI TX PA6 */ - STM32_GPIO_OSPEEDR(GPIO_A) |= 0x00003000; - /* 40 MHz pin speed on TIM17_CH1 (PB9) */ - STM32_GPIO_OSPEEDR(GPIO_B) |= 0x000C0000; -} - -/* Reset SPI peripheral used for TX */ -static inline void pd_tx_spi_reset(int port) -{ - /* Reset SPI1 */ - STM32_RCC_APB2RSTR |= BIT(12); - STM32_RCC_APB2RSTR &= ~BIT(12); -} - -/* Drive the CC line from the TX block */ -static inline void pd_tx_enable(int port, int polarity) -{ -#if 0 /* Transmit only on the active CC line */ - if (polarity) { - gpio_set_level(GPIO_CC2_TX_EN, 1); - /* TX_DATA on PA6 is now connected to SPI1 */ - gpio_set_alternate_function(GPIO_A, 0x0040, 0); - } else { - gpio_set_level(GPIO_CC1_TX_EN, 1); - /* TX_DATA on PB4 is now connected to SPI1 */ - gpio_set_alternate_function(GPIO_B, 0x0010, 0); - } -#else /* Transmit on both CC lines */ - gpio_set_level(GPIO_CC2_TX_EN, 1); - gpio_set_level(GPIO_CC1_TX_EN, 1); - /* TX_DATA on PA6 is now connected to SPI1 */ - gpio_set_alternate_function(GPIO_A, 0x0040, 0); - /* TX_DATA on PB4 is now connected to SPI1 */ - gpio_set_alternate_function(GPIO_B, 0x0010, 0); -#endif -} - -/* Put the TX driver in Hi-Z state */ -static inline void pd_tx_disable(int port, int polarity) -{ - /* TX_DATA on PB4 is an output low GPIO to disable the FET */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2*4))) - | (1 << (2*4)); - /* TX_DATA on PA6 is an output low GPIO to disable the FET */ - STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A) & ~(3 << (2*6))) - | (1 << (2*6)); - /* - * Tri-state the low side after the high side - * to ensure we are not going above Vnc - */ - gpio_set_level(GPIO_CC1_TX_EN, 0); - gpio_set_level(GPIO_CC2_TX_EN, 0); -} - -/* we know the plug polarity, do the right configuration */ -static inline void pd_select_polarity(int port, int polarity) -{ - /* use the right comparator */ - STM32_COMP_CSR = (STM32_COMP_CSR - & ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK - |STM32_COMP_CMP1EN | STM32_COMP_CMP2EN)) - | STM32_COMP_CMP1INSEL_INM4 | STM32_COMP_CMP2INSEL_INM4 - | (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN); -} - -/* Initialize pins used for clocking */ -static inline void pd_tx_init(void) -{ - gpio_config_module(MODULE_USB_PD, 1); - -#ifndef CONFIG_USB_PD_TX_PHY_ONLY - /* Detect when VBUS crosses the 4.5V threshold (1.25mV/bit) */ - ina2xx_write(0, INA2XX_REG_ALERT, 4500 * 100 / 125); - ina2xx_write(0, INA2XX_REG_MASK, INA2XX_MASK_EN_BOL); - /* start as a power consumer */ - gpio_set_level(GPIO_CC1_RD, 0); - gpio_set_level(GPIO_CC2_RD, 0); -#endif /* CONFIG_USB_PD_TX_PHY_ONLY */ -} - -static inline void pd_set_host_mode(int port, int enable) -{ - if (enable) { - gpio_set_level(GPIO_CC1_RD, 1); - gpio_set_level(GPIO_CC2_RD, 1); - /* set Rp by driving high RPUSB GPIO */ - gpio_set_flags(GPIO_CC1_RPUSB, GPIO_OUT_HIGH); - gpio_set_flags(GPIO_CC2_RPUSB, GPIO_OUT_HIGH); - } else { - /* put back RPUSB GPIO in the default state and set Rd */ - gpio_set_flags(GPIO_CC1_RPUSB, GPIO_ODR_HIGH); - gpio_set_flags(GPIO_CC2_RPUSB, GPIO_ODR_HIGH); - gpio_set_level(GPIO_CC1_RD, 0); - gpio_set_level(GPIO_CC2_RD, 0); - } -} - -static inline void pd_config_init(int port, uint8_t power_role) -{ -#ifndef CONFIG_USB_PD_TX_PHY_ONLY - /* Set CC pull resistors */ - pd_set_host_mode(port, power_role); -#endif /* CONFIG_USB_PD_TX_PHY_ONLY */ - - /* Initialize TX pins and put them in Hi-Z */ - pd_tx_init(); -} - -static inline int pd_adc_read(int port, int cc) -{ - if (cc == 0) - return adc_read_channel(ADC_CH_CC1_PD); - else - return adc_read_channel(ADC_CH_CC2_PD); -} - -#endif /* __CROS_EC_USB_PD_CONFIG_H */ diff --git a/board/twinkie/usb_pd_policy.c b/board/twinkie/usb_pd_policy.c deleted file mode 100644 index 62ecd6e0db..0000000000 --- a/board/twinkie/usb_pd_policy.c +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "config.h" -#include "console.h" -#include "gpio.h" -#include "hooks.h" -#include "registers.h" -#include "task.h" -#include "timer.h" -#include "util.h" -#include "usb_pd.h" - -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) - -#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP) - -const uint32_t pd_src_pdo[] = { - PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS), - PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS), -}; -const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); - -const uint32_t pd_snk_pdo[] = { - PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), - PDO_BATT(4750, 21000, 15000), - PDO_VAR(4750, 21000, 3000), -}; -const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); - -void pd_set_input_current_limit(int port, uint32_t max_ma, - uint32_t supply_voltage) -{ - int red = supply_voltage == 20000; - int green = supply_voltage == 5000; - int blue = supply_voltage && !(red || green); - gpio_set_level(GPIO_LED_R_L, !red); - gpio_set_level(GPIO_LED_G_L, !green); - gpio_set_level(GPIO_LED_B_L, !blue); -} - -int pd_set_power_supply_ready(int port) -{ - return EC_SUCCESS; /* we are ready */ -} - -void pd_power_supply_reset(int port) -{ -} - -int pd_snk_is_vbus_provided(int port) -{ - /* assume the alert was programmed to detect bus voltage above 4.5V */ - return (gpio_get_level(GPIO_VBUS_ALERT_L) == 0); -} - -__override int pd_check_power_swap(int port) -{ - /* Always refuse power swap */ - return 0; -} - -__override int pd_check_data_swap(int port, - enum pd_data_role data_role) -{ - /* Always allow data swap */ - return 1; -} - -__override void pd_check_pr_role(int port, - enum pd_power_role pr_role, - int flags) -{ -} - -__override void pd_check_dr_role(int port, - enum pd_data_role dr_role, - int flags) -{ -} - -__override int pd_custom_vdm(int port, int cnt, uint32_t *payload, - uint32_t **rpayload) -{ - return 0; -} diff --git a/board/twinkie/vif_override.xml b/board/twinkie/vif_override.xml deleted file mode 100644 index 32736caf64..0000000000 --- a/board/twinkie/vif_override.xml +++ /dev/null @@ -1,3 +0,0 @@ -<!-- Add VIF field overrides here. See genvif.c and the Vendor Info File - Definition from the USB-IF. ---> |