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-rw-r--r--board/twinkie/board.c24
-rw-r--r--board/twinkie/board.h36
-rw-r--r--board/twinkie/build.mk2
-rw-r--r--board/twinkie/ec.tasklist2
-rw-r--r--board/twinkie/gpio.inc2
-rw-r--r--board/twinkie/injector.c88
-rw-r--r--board/twinkie/injector.h60
-rw-r--r--board/twinkie/simpletrace.c112
-rw-r--r--board/twinkie/sniffer.c72
-rw-r--r--board/twinkie/usb_pd_config.h23
-rw-r--r--board/twinkie/usb_pd_pdo.c14
-rw-r--r--board/twinkie/usb_pd_pdo.h2
-rw-r--r--board/twinkie/usb_pd_policy.c18
13 files changed, 224 insertions, 231 deletions
diff --git a/board/twinkie/board.c b/board/twinkie/board.c
index f3f8460c8d..97c69fb126 100644
--- a/board/twinkie/board.c
+++ b/board/twinkie/board.c
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -36,7 +36,7 @@ void board_config_pre_init(void)
STM32_RCC_APB2ENR |= BIT(0);
/* Remap USART DMA to match the USART driver and TIM2 DMA */
STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10) /* Remap USART1 RX/TX DMA */
- | BIT(29);/* Remap TIM2 DMA */
+ | BIT(29); /* Remap TIM2 DMA */
/* 40 MHz pin speed on UART PA9/PA10 */
STM32_GPIO_OSPEEDR(GPIO_A) |= 0x003C0000;
/* 40 MHz pin speed on TX clock out PB9 */
@@ -59,26 +59,24 @@ DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
/* ADC channels */
const struct adc_t adc_channels[] = {
/* USB PD CC lines sensing. Converted to mV (3300mV/4096). */
- [ADC_CH_CC1_PD] = {"CC1_PD", 3300, 4096, 0, STM32_AIN(1)},
- [ADC_CH_CC2_PD] = {"CC2_PD", 3300, 4096, 0, STM32_AIN(3)},
+ [ADC_CH_CC1_PD] = { "CC1_PD", 3300, 4096, 0, STM32_AIN(1) },
+ [ADC_CH_CC2_PD] = { "CC2_PD", 3300, 4096, 0, STM32_AIN(3) },
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
- {
- .name = "master",
- .port = I2C_PORT_MASTER,
- .kbps = 100,
- .scl = GPIO_I2C_SCL,
- .sda = GPIO_I2C_SDA
- },
+ { .name = "master",
+ .port = I2C_PORT_MASTER,
+ .kbps = 100,
+ .scl = GPIO_I2C_SCL,
+ .sda = GPIO_I2C_SDA },
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-const void * const usb_strings[] = {
+const void *const usb_strings[] = {
[USB_STR_DESC] = usb_string_desc,
- [USB_STR_VENDOR] = USB_STRING_DESC("Google Inc."),
+ [USB_STR_VENDOR] = USB_STRING_DESC("Google LLC"),
[USB_STR_PRODUCT] = USB_STRING_DESC("Twinkie"),
[USB_STR_VERSION] = USB_STRING_DESC(CROS_EC_VERSION32),
[USB_STR_SNIFFER] = USB_STRING_DESC("USB-PD Sniffer"),
diff --git a/board/twinkie/board.h b/board/twinkie/board.h
index 3d601ee979..b1379fb15b 100644
--- a/board/twinkie/board.h
+++ b/board/twinkie/board.h
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -54,7 +54,7 @@
/* USB configuration */
#define CONFIG_USB_PID 0x500A
/* By default, enable all console messages excepted USB */
-#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USB))
+#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_USB))
/*
* Allow dangerous commands all the time, since we don't have a write protect
@@ -79,9 +79,9 @@ void trace_packets(void);
void set_trace_mode(int mode);
/* Timer selection */
-#define TIM_CLOCK_MSB 3
+#define TIM_CLOCK_MSB 3
#define TIM_CLOCK_LSB 15
-#define TIM_ADC 16
+#define TIM_ADC 16
#include "gpio_signal.h"
@@ -106,28 +106,28 @@ enum usb_strings {
};
/* Standard-current Rp */
-#define PD_SRC_VNC PD_SRC_DEF_VNC_MV
-#define PD_SRC_RD_THRESHOLD PD_SRC_DEF_RD_THRESH_MV
+#define PD_SRC_VNC PD_SRC_DEF_VNC_MV
+#define PD_SRC_RD_THRESHOLD PD_SRC_DEF_RD_THRESH_MV
/* delay necessary for the voltage transition on the power supply */
-#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 50000 /* us */
#define PD_POWER_SUPPLY_TURN_OFF_DELAY 50000 /* us */
/* Define typical operating power and max power */
#define PD_OPERATING_POWER_MW 15000
-#define PD_MAX_POWER_MW 60000
-#define PD_MAX_CURRENT_MA 3000
-#define PD_MAX_VOLTAGE_MV 20000
+#define PD_MAX_POWER_MW 60000
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
#endif /* !__ASSEMBLER__ */
/* USB interface indexes (use define rather than enum to expand them) */
#define USB_IFACE_CONSOLE 0
-#define USB_IFACE_VENDOR 1
+#define USB_IFACE_VENDOR 1
/* USB endpoint indexes (use define rather than enum to expand them) */
-#define USB_EP_CONTROL 0
-#define USB_EP_CONSOLE 1
+#define USB_EP_CONTROL 0
+#define USB_EP_CONSOLE 1
/*
* Endpoint 2 is missing because the console used to use two bidirectional
@@ -137,13 +137,13 @@ enum usb_strings {
*/
#ifdef HAS_TASK_SNIFFER
-#define USB_EP_SNIFFER 3
-#define USB_EP_COUNT 4
-#define USB_IFACE_COUNT 2
+#define USB_EP_SNIFFER 3
+#define USB_EP_COUNT 4
+#define USB_IFACE_COUNT 2
#else
-#define USB_EP_COUNT 2
+#define USB_EP_COUNT 2
/* No IFACE_VENDOR for the sniffer */
-#define USB_IFACE_COUNT 1
+#define USB_IFACE_COUNT 1
#endif
#endif /* __CROS_EC_BOARD_H */
diff --git a/board/twinkie/build.mk b/board/twinkie/build.mk
index 3ced5f2966..f710000486 100644
--- a/board/twinkie/build.mk
+++ b/board/twinkie/build.mk
@@ -1,5 +1,5 @@
# -*- makefile -*-
-# Copyright 2014 The Chromium OS Authors. All rights reserved.
+# Copyright 2014 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
#
diff --git a/board/twinkie/ec.tasklist b/board/twinkie/ec.tasklist
index 600df47c60..0dcfd38308 100644
--- a/board/twinkie/ec.tasklist
+++ b/board/twinkie/ec.tasklist
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/twinkie/gpio.inc b/board/twinkie/gpio.inc
index 551cb73748..45b34de766 100644
--- a/board/twinkie/gpio.inc
+++ b/board/twinkie/gpio.inc
@@ -1,6 +1,6 @@
/* -*- mode:c -*-
*
- * Copyright 2014 The Chromium OS Authors. All rights reserved.
+ * Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/twinkie/injector.c b/board/twinkie/injector.c
index ef5bfb3e32..7688b68128 100644
--- a/board/twinkie/injector.c
+++ b/board/twinkie/injector.c
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -48,20 +48,25 @@ static const struct res_cfg {
uint32_t flags;
} cfgs[2];
} res_cfg[] = {
- [INJ_RES_NONE] = {"NONE"},
- [INJ_RES_RA] = {"RA", {{GPIO_CC1_RA, GPIO_ODR_LOW},
- {GPIO_CC2_RA, GPIO_ODR_LOW} } },
- [INJ_RES_RD] = {"RD", {{GPIO_CC1_RD, GPIO_ODR_LOW},
- {GPIO_CC2_RD, GPIO_ODR_LOW} } },
- [INJ_RES_RPUSB] = {"RPUSB", {{GPIO_CC1_RPUSB, GPIO_OUT_HIGH},
- {GPIO_CC2_RPUSB, GPIO_OUT_HIGH} } },
- [INJ_RES_RP1A5] = {"RP1A5", {{GPIO_CC1_RP1A5, GPIO_OUT_HIGH},
- {GPIO_CC2_RP1A5, GPIO_OUT_HIGH} } },
- [INJ_RES_RP3A0] = {"RP3A0", {{GPIO_CC1_RP3A0, GPIO_OUT_HIGH},
- {GPIO_CC2_RP3A0, GPIO_OUT_HIGH} } },
+ [INJ_RES_NONE] = { "NONE" },
+ [INJ_RES_RA] = { "RA",
+ { { GPIO_CC1_RA, GPIO_ODR_LOW },
+ { GPIO_CC2_RA, GPIO_ODR_LOW } } },
+ [INJ_RES_RD] = { "RD",
+ { { GPIO_CC1_RD, GPIO_ODR_LOW },
+ { GPIO_CC2_RD, GPIO_ODR_LOW } } },
+ [INJ_RES_RPUSB] = { "RPUSB",
+ { { GPIO_CC1_RPUSB, GPIO_OUT_HIGH },
+ { GPIO_CC2_RPUSB, GPIO_OUT_HIGH } } },
+ [INJ_RES_RP1A5] = { "RP1A5",
+ { { GPIO_CC1_RP1A5, GPIO_OUT_HIGH },
+ { GPIO_CC2_RP1A5, GPIO_OUT_HIGH } } },
+ [INJ_RES_RP3A0] = { "RP3A0",
+ { { GPIO_CC1_RP3A0, GPIO_OUT_HIGH },
+ { GPIO_CC2_RP3A0, GPIO_OUT_HIGH } } },
};
-#define CC_RA(cc) (cc < PD_SRC_RD_THRESHOLD)
+#define CC_RA(cc) (cc < PD_SRC_RD_THRESHOLD)
#define CC_RD(cc) ((cc > PD_SRC_RD_THRESHOLD) && (cc < PD_SRC_VNC))
#define GET_POLARITY(cc1, cc2) (CC_RD(cc2) || CC_RA(cc1))
@@ -103,8 +108,8 @@ static inline void enable_tracing_ifneeded(int flag)
pd_rx_enable_monitoring(0);
}
-static int send_message(int polarity, uint16_t header,
- uint8_t cnt, const uint32_t *data)
+static int send_message(int polarity, uint16_t header, uint8_t cnt,
+ const uint32_t *data)
{
int bit_len;
@@ -215,7 +220,7 @@ static void fsm_wait(uint32_t w)
uint32_t timeout_ms = INJ_ARG0(w);
uint32_t min_edges = INJ_ARG12(w);
- wait_packet(inj_polarity, min_edges, timeout_ms * 1000);
+ wait_packet(inj_polarity, min_edges, timeout_ms * 1000);
#endif
}
@@ -224,7 +229,7 @@ static void fsm_expect(uint32_t w)
uint32_t timeout_ms = INJ_ARG0(w);
uint8_t cmd = INJ_ARG2(w);
- expect_packet(inj_polarity, cmd, timeout_ms * 1000);
+ expect_packet(inj_polarity, cmd, timeout_ms * 1000);
}
static void fsm_get(uint32_t w)
{
@@ -242,11 +247,11 @@ static void fsm_get(uint32_t w)
break;
case INJ_GET_VBUS:
*store_ptr = (ina2xx_get_voltage(0) & 0xffff) |
- ((ina2xx_get_current(0) & 0xffff) << 16);
+ ((ina2xx_get_current(0) & 0xffff) << 16);
break;
case INJ_GET_VCONN:
*store_ptr = (ina2xx_get_voltage(1) & 0xffff) |
- ((ina2xx_get_current(1) & 0xffff) << 16);
+ ((ina2xx_get_current(1) & 0xffff) << 16);
break;
case INJ_GET_POLARITY:
*store_ptr = inj_polarity;
@@ -336,9 +341,9 @@ static int fsm_run(int index)
/* ------ Console commands ------ */
-static int hex8tou32(char *str, uint32_t *val)
+static int hex8tou32(const char *str, uint32_t *val)
{
- char *ptr = str;
+ const char *ptr = str;
uint32_t tmp = 0;
while (*ptr) {
@@ -358,7 +363,7 @@ static int hex8tou32(char *str, uint32_t *val)
return EC_SUCCESS;
}
-static int cmd_fsm(int argc, char **argv)
+static int cmd_fsm(int argc, const char **argv)
{
int index;
char *e;
@@ -375,8 +380,7 @@ static int cmd_fsm(int argc, char **argv)
return EC_SUCCESS;
}
-
-static int cmd_send(int argc, char **argv)
+static int cmd_send(int argc, const char **argv)
{
int pol, cnt, i;
uint16_t header;
@@ -396,7 +400,7 @@ static int cmd_send(int argc, char **argv)
return EC_ERROR_PARAM3;
for (i = 0; i < cnt; i++)
- if (hex8tou32(argv[i+2], data + i))
+ if (hex8tou32(argv[i + 2], data + i))
return EC_ERROR_INVAL;
bit_len = send_message(pol, header, cnt, data);
@@ -405,15 +409,15 @@ static int cmd_send(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_cc_level(int argc, char **argv)
+static int cmd_cc_level(int argc, const char **argv)
{
- ccprintf("CC1 = %d mV ; CC2 = %d mV\n",
- pd_adc_read(0, 0), pd_adc_read(0, 1));
+ ccprintf("CC1 = %d mV ; CC2 = %d mV\n", pd_adc_read(0, 0),
+ pd_adc_read(0, 1));
return EC_SUCCESS;
}
-static int cmd_resistor(int argc, char **argv)
+static int cmd_resistor(int argc, const char **argv)
{
int p, r;
@@ -435,7 +439,7 @@ static int cmd_resistor(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_tx_clock(int argc, char **argv)
+static int cmd_tx_clock(int argc, const char **argv)
{
int freq;
char *e;
@@ -452,7 +456,7 @@ static int cmd_tx_clock(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_rx_threshold(int argc, char **argv)
+static int cmd_rx_threshold(int argc, const char **argv)
{
int mv;
char *e;
@@ -471,7 +475,7 @@ static int cmd_rx_threshold(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_ina_dump(int argc, char **argv, int index)
+static int cmd_ina_dump(int argc, const char **argv, int index)
{
if (index == 1) { /* VCONN INA is off by default, switch it on */
ina2xx_write(index, INA2XX_REG_CONFIG, 0x4123);
@@ -483,7 +487,7 @@ static int cmd_ina_dump(int argc, char **argv, int index)
}
ccprintf("%s = %d mV ; %d mA\n", index == 0 ? "VBUS" : "VCONN",
- ina2xx_get_voltage(index), ina2xx_get_current(index));
+ ina2xx_get_voltage(index), ina2xx_get_current(index));
if (index == 1) /* power off VCONN INA */
ina2xx_write(index, INA2XX_REG_CONFIG, 0);
@@ -491,7 +495,7 @@ static int cmd_ina_dump(int argc, char **argv, int index)
return EC_SUCCESS;
}
-static int cmd_bufwr(int argc, char **argv)
+static int cmd_bufwr(int argc, const char **argv)
{
int idx, cnt, i;
char *e;
@@ -505,13 +509,13 @@ static int cmd_bufwr(int argc, char **argv)
return EC_ERROR_PARAM2;
for (i = 0; i < cnt; i++)
- if (hex8tou32(argv[i+1], inj_cmds + idx + i))
+ if (hex8tou32(argv[i + 1], inj_cmds + idx + i))
return EC_ERROR_INVAL;
return EC_SUCCESS;
}
-static int cmd_bufrd(int argc, char **argv)
+static int cmd_bufrd(int argc, const char **argv)
{
int idx, i;
int cnt = 1;
@@ -537,7 +541,7 @@ static int cmd_bufrd(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_sink(int argc, char **argv)
+static int cmd_sink(int argc, const char **argv)
{
/*
* Jump to the RW section which should contain a firmware acting
@@ -548,18 +552,16 @@ static int cmd_sink(int argc, char **argv)
return EC_SUCCESS;
}
-static int cmd_trace(int argc, char **argv)
+static int cmd_trace(int argc, const char **argv)
{
if (argc < 1)
return EC_ERROR_PARAM_COUNT;
- if (!strcasecmp(argv[0], "on") ||
- !strcasecmp(argv[0], "1"))
+ if (!strcasecmp(argv[0], "on") || !strcasecmp(argv[0], "1"))
set_trace_mode(TRACE_MODE_ON);
else if (!strcasecmp(argv[0], "raw"))
set_trace_mode(TRACE_MODE_RAW);
- else if (!strcasecmp(argv[0], "off") ||
- !strcasecmp(argv[0], "0"))
+ else if (!strcasecmp(argv[0], "off") || !strcasecmp(argv[0], "0"))
set_trace_mode(TRACE_MODE_OFF);
else
return EC_ERROR_PARAM2;
@@ -567,7 +569,7 @@ static int cmd_trace(int argc, char **argv)
return EC_SUCCESS;
}
-static int command_tw(int argc, char **argv)
+static int command_tw(int argc, const char **argv)
{
if (!strcasecmp(argv[1], "send"))
return cmd_send(argc - 2, argv + 2);
diff --git a/board/twinkie/injector.h b/board/twinkie/injector.h
index 4a33f8ecf0..ed39522969 100644
--- a/board/twinkie/injector.h
+++ b/board/twinkie/injector.h
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -21,50 +21,50 @@
/* Macros to extract values from FSM command words */
#define INJ_CMD(w) ((w) >> 28)
-#define INJ_ARG(w) ((w) & 0x0FFFFFFF)
-#define INJ_ARG0(w) ((w) & 0x0000FFFF)
+#define INJ_ARG(w) ((w)&0x0FFFFFFF)
+#define INJ_ARG0(w) ((w)&0x0000FFFF)
#define INJ_ARG1(w) (((w) >> 16) & 0xFF)
#define INJ_ARG2(w) (((w) >> 24) & 0xF)
#define INJ_ARG12(w) (((w) >> 16) & 0xFFF)
enum inj_cmd {
- INJ_CMD_END = 0x0, /* stop the FSM */
- INJ_CMD_SEND = 0x1, /* Send message on CCx */
- /* arg0: header arg1/2:payload index/count */
- INJ_CMD_WAVE = 0x2, /* Send arbitrary waveform */
- /* stored at index arg1 of len arg0 */
- INJ_CMD_HRST = 0x3, /* Send Hard Reset on CCx */
- INJ_CMD_WAIT = 0x4, /* Wait for arg12 edges if arg12 != 0 */
- /* and timeout after arg0 ms */
- INJ_CMD_GET = 0x5, /* Get parameter arg1 (INJ_GET_x) at index arg0 */
- INJ_CMD_SET = 0x6, /* Set parameter arg1 (INJ_SET_x) with arg0 */
- INJ_CMD_JUMP = 0x8, /* Jump to index (as arg0) */
+ INJ_CMD_END = 0x0, /* stop the FSM */
+ INJ_CMD_SEND = 0x1, /* Send message on CCx */
+ /* arg0: header arg1/2:payload index/count */
+ INJ_CMD_WAVE = 0x2, /* Send arbitrary waveform */
+ /* stored at index arg1 of len arg0 */
+ INJ_CMD_HRST = 0x3, /* Send Hard Reset on CCx */
+ INJ_CMD_WAIT = 0x4, /* Wait for arg12 edges if arg12 != 0 */
+ /* and timeout after arg0 ms */
+ INJ_CMD_GET = 0x5, /* Get parameter arg1 (INJ_GET_x) at index arg0 */
+ INJ_CMD_SET = 0x6, /* Set parameter arg1 (INJ_SET_x) with arg0 */
+ INJ_CMD_JUMP = 0x8, /* Jump to index (as arg0) */
INJ_CMD_EXPCT = 0xC, /* Expect a packet with command arg2 */
- /* and timeout after arg0 ms */
- INJ_CMD_NOP = 0xF, /* No-Operation */
+ /* and timeout after arg0 ms */
+ INJ_CMD_NOP = 0xF, /* No-Operation */
};
enum inj_set {
- INJ_SET_RESISTOR1 = 0, /* CC1 resistor as arg0 (INJ_RES_x) */
- INJ_SET_RESISTOR2 = 1, /* CC2 resistor as arg0 (INJ_RES_x) */
- INJ_SET_RECORD = 2, /* Recording on/off */
- INJ_SET_TX_SPEED = 3, /* TX frequency is arg0 kHz */
- INJ_SET_RX_THRESH = 4, /* RX voltage threshold is arg0 mV */
- INJ_SET_POLARITY = 5, /* Polarity for other operations (INJ_POL_CC) */
- INJ_SET_TRACE = 6, /* Text packet trace on/raw/off */
+ INJ_SET_RESISTOR1 = 0, /* CC1 resistor as arg0 (INJ_RES_x) */
+ INJ_SET_RESISTOR2 = 1, /* CC2 resistor as arg0 (INJ_RES_x) */
+ INJ_SET_RECORD = 2, /* Recording on/off */
+ INJ_SET_TX_SPEED = 3, /* TX frequency is arg0 kHz */
+ INJ_SET_RX_THRESH = 4, /* RX voltage threshold is arg0 mV */
+ INJ_SET_POLARITY = 5, /* Polarity for other operations (INJ_POL_CC) */
+ INJ_SET_TRACE = 6, /* Text packet trace on/raw/off */
};
enum inj_get {
- INJ_GET_CC = 0, /* CC1/CC2 voltages in mV */
- INJ_GET_VBUS = 1, /* VBUS voltage in mV and current in mA */
- INJ_GET_VCONN = 2, /* VCONN voltage in mV and current in mA */
+ INJ_GET_CC = 0, /* CC1/CC2 voltages in mV */
+ INJ_GET_VBUS = 1, /* VBUS voltage in mV and current in mA */
+ INJ_GET_VCONN = 2, /* VCONN voltage in mV and current in mA */
INJ_GET_POLARITY = 3, /* Current polarity (INJ_POL_CC) */
};
enum inj_res {
- INJ_RES_NONE = 0,
- INJ_RES_RA = 1,
- INJ_RES_RD = 2,
+ INJ_RES_NONE = 0,
+ INJ_RES_RA = 1,
+ INJ_RES_RD = 2,
INJ_RES_RPUSB = 3,
INJ_RES_RP1A5 = 4,
INJ_RES_RP3A0 = 5,
@@ -79,7 +79,7 @@ enum inj_pol {
enum trace_mode {
TRACE_MODE_OFF = 0,
TRACE_MODE_RAW = 1,
- TRACE_MODE_ON = 2,
+ TRACE_MODE_ON = 2,
};
/* Number of words in the FSM command/data buffer */
diff --git a/board/twinkie/simpletrace.c b/board/twinkie/simpletrace.c
index 811bd428fd..fdc4cbfbb2 100644
--- a/board/twinkie/simpletrace.c
+++ b/board/twinkie/simpletrace.c
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -11,6 +11,7 @@
#include "hooks.h"
#include "hwtimer.h"
#include "injector.h"
+#include "printf.h"
#include "registers.h"
#include "system.h"
#include "task.h"
@@ -25,61 +26,57 @@ int trace_mode;
/* The FSM is waiting for the following command (0 == None) */
uint8_t expected_cmd;
-static const char * const ctrl_msg_name[] = {
- [0] = "RSVD-C0",
- [PD_CTRL_GOOD_CRC] = "GOODCRC",
- [PD_CTRL_GOTO_MIN] = "GOTOMIN",
- [PD_CTRL_ACCEPT] = "ACCEPT",
- [PD_CTRL_REJECT] = "REJECT",
- [PD_CTRL_PING] = "PING",
- [PD_CTRL_PS_RDY] = "PSRDY",
+static const char *const ctrl_msg_name[] = {
+ [0] = "RSVD-C0",
+ [PD_CTRL_GOOD_CRC] = "GOODCRC",
+ [PD_CTRL_GOTO_MIN] = "GOTOMIN",
+ [PD_CTRL_ACCEPT] = "ACCEPT",
+ [PD_CTRL_REJECT] = "REJECT",
+ [PD_CTRL_PING] = "PING",
+ [PD_CTRL_PS_RDY] = "PSRDY",
[PD_CTRL_GET_SOURCE_CAP] = "GSRCCAP",
- [PD_CTRL_GET_SINK_CAP] = "GSNKCAP",
- [PD_CTRL_DR_SWAP] = "DRSWAP",
- [PD_CTRL_PR_SWAP] = "PRSWAP",
- [PD_CTRL_VCONN_SWAP] = "VCONNSW",
- [PD_CTRL_WAIT] = "WAIT",
- [PD_CTRL_SOFT_RESET] = "SFT-RST",
- [14] = "RSVD-C14",
- [15] = "RSVD-C15",
+ [PD_CTRL_GET_SINK_CAP] = "GSNKCAP",
+ [PD_CTRL_DR_SWAP] = "DRSWAP",
+ [PD_CTRL_PR_SWAP] = "PRSWAP",
+ [PD_CTRL_VCONN_SWAP] = "VCONNSW",
+ [PD_CTRL_WAIT] = "WAIT",
+ [PD_CTRL_SOFT_RESET] = "SFT-RST",
+ [14] = "RSVD-C14",
+ [15] = "RSVD-C15",
};
-static const char * const data_msg_name[] = {
- [0] = "RSVD-D0",
- [PD_DATA_SOURCE_CAP] = "SRCCAP",
- [PD_DATA_REQUEST] = "REQUEST",
- [PD_DATA_BIST] = "BIST",
- [PD_DATA_SINK_CAP] = "SNKCAP",
+static const char *const data_msg_name[] = {
+ [0] = "RSVD-D0",
+ [PD_DATA_SOURCE_CAP] = "SRCCAP",
+ [PD_DATA_REQUEST] = "REQUEST",
+ [PD_DATA_BIST] = "BIST",
+ [PD_DATA_SINK_CAP] = "SNKCAP",
/* 5-14 Reserved */
- [PD_DATA_VENDOR_DEF] = "VDM",
+ [PD_DATA_VENDOR_DEF] = "VDM",
};
-static const char * const svdm_cmd_name[] = {
- [CMD_DISCOVER_IDENT] = "DISCID",
- [CMD_DISCOVER_SVID] = "DISCSVID",
- [CMD_DISCOVER_MODES] = "DISCMODE",
- [CMD_ENTER_MODE] = "ENTER",
- [CMD_EXIT_MODE] = "EXIT",
- [CMD_ATTENTION] = "ATTN",
- [CMD_DP_STATUS] = "DPSTAT",
- [CMD_DP_CONFIG] = "DPCFG",
+static const char *const svdm_cmd_name[] = {
+ [CMD_DISCOVER_IDENT] = "DISCID", [CMD_DISCOVER_SVID] = "DISCSVID",
+ [CMD_DISCOVER_MODES] = "DISCMODE", [CMD_ENTER_MODE] = "ENTER",
+ [CMD_EXIT_MODE] = "EXIT", [CMD_ATTENTION] = "ATTN",
+ [CMD_DP_STATUS] = "DPSTAT", [CMD_DP_CONFIG] = "DPCFG",
};
-static const char * const svdm_cmdt_name[] = {
- [CMDT_INIT] = "INI",
- [CMDT_RSP_ACK] = "ACK",
- [CMDT_RSP_NAK] = "NAK",
+static const char *const svdm_cmdt_name[] = {
+ [CMDT_INIT] = "INI",
+ [CMDT_RSP_ACK] = "ACK",
+ [CMDT_RSP_NAK] = "NAK",
[CMDT_RSP_BUSY] = "BSY",
};
static void print_pdo(uint32_t word)
{
if ((word & PDO_TYPE_MASK) == PDO_TYPE_BATTERY)
- ccprintf(" %dmV/%dmW", ((word>>10)&0x3ff)*50,
- (word&0x3ff)*250);
+ ccprintf(" %dmV/%dmW", ((word >> 10) & 0x3ff) * 50,
+ (word & 0x3ff) * 250);
else
- ccprintf(" %dmV/%dmA", ((word>>10)&0x3ff)*50,
- (word&0x3ff)*10);
+ ccprintf(" %dmV/%dmA", ((word >> 10) & 0x3ff) * 50,
+ (word & 0x3ff) * 10);
}
static void print_rdo(uint32_t word)
@@ -109,9 +106,11 @@ static void print_packet(int head, uint32_t *payload)
int id = PD_HEADER_ID(head);
const char *name;
const char *prole;
+ char ts_str[PRINTF_TIMESTAMP_BUF_SIZE];
if (trace_mode == TRACE_MODE_RAW) {
- ccprintf("%pT[%04x]", PRINTF_TIMESTAMP_NOW, head);
+ snprintf_timestamp_now(ts_str, sizeof(ts_str));
+ ccprintf("%s[%04x]", ts_str, head);
for (i = 0; i < cnt; i++)
ccprintf(" %08x", payload[i]);
ccputs("\n");
@@ -119,8 +118,8 @@ static void print_packet(int head, uint32_t *payload)
}
name = cnt ? data_msg_name[typ] : ctrl_msg_name[typ];
prole = head & (PD_ROLE_SOURCE << 8) ? "SRC" : "SNK";
- ccprintf("%pT %s/%d [%04x]%s",
- PRINTF_TIMESTAMP_NOW, prole, id, head, name);
+ snprintf_timestamp_now(ts_str, sizeof(ts_str));
+ ccprintf("%s %s/%d [%04x]%s", ts_str, prole, id, head, name);
if (!cnt) { /* Control message : we are done */
ccputs("\n");
return;
@@ -144,18 +143,22 @@ static void print_packet(int head, uint32_t *payload)
break;
default:
ccprintf(" %08x", payload[i]);
- }
+ }
ccputs("\n");
}
static void print_error(enum pd_rx_errors err)
{
+ char ts_str[PRINTF_TIMESTAMP_BUF_SIZE];
+
+ snprintf_timestamp_now(ts_str, sizeof(ts_str));
+
if (err == PD_RX_ERR_INVAL)
- ccprintf("%pT TMOUT\n", PRINTF_TIMESTAMP_NOW);
+ ccprintf("%s TMOUT\n", ts_str);
else if (err == PD_RX_ERR_HARD_RESET)
- ccprintf("%pT HARD-RST\n", PRINTF_TIMESTAMP_NOW);
+ ccprintf("%s HARD-RST\n", ts_str);
else if (err == PD_RX_ERR_UNSUPPORTED_SOP)
- ccprintf("%pT SOP*\n", PRINTF_TIMESTAMP_NOW);
+ ccprintf("%s SOP*\n", ts_str);
else
ccprintf("ERR %d\n", err);
}
@@ -176,19 +179,20 @@ static void rx_event(void)
if (pending & (1 << (21 + i))) {
rx_edge_ts[i][rx_edge_ts_idx[i]].val = get_time().val;
next_idx = (rx_edge_ts_idx[i] ==
- PD_RX_TRANSITION_COUNT - 1) ?
- 0 : rx_edge_ts_idx[i] + 1;
+ PD_RX_TRANSITION_COUNT - 1) ?
+ 0 :
+ rx_edge_ts_idx[i] + 1;
/*
* If we have seen enough edges in a certain amount of
* time, then trigger RX start.
*/
if ((rx_edge_ts[i][rx_edge_ts_idx[i]].val -
- rx_edge_ts[i][next_idx].val)
- < PD_RX_TRANSITION_WINDOW) {
+ rx_edge_ts[i][next_idx].val) <
+ PD_RX_TRANSITION_WINDOW) {
/* acquire the message only on the active CC */
- STM32_COMP_CSR &= ~(i ? STM32_COMP_CMP1EN
- : STM32_COMP_CMP2EN);
+ STM32_COMP_CSR &= ~(i ? STM32_COMP_CMP1EN :
+ STM32_COMP_CMP2EN);
/* start sampling */
pd_rx_start(0);
/*
diff --git a/board/twinkie/sniffer.c b/board/twinkie/sniffer.c
index 7d2d8d439f..ff7ad02f87 100644
--- a/board/twinkie/sniffer.c
+++ b/board/twinkie/sniffer.c
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -105,8 +105,8 @@ static void ep_tx(void)
btable_ep[USB_EP_SNIFFER].tx_addr = usb_sram_addr(ep_buf[b]);
}
/* re-enable data transmission if we have available data */
- btable_ep[USB_EP_SNIFFER].tx_count = (free_usb & (1<<b)) ? 0
- : EP_BUF_SIZE;
+ btable_ep[USB_EP_SNIFFER].tx_count =
+ (free_usb & (1 << b)) ? 0 : EP_BUF_SIZE;
STM32_TOGGLE_EP(USB_EP_SNIFFER, EP_TX_MASK, EP_TX_VALID, 0);
/* wake up the processing */
task_set_event(TASK_ID_SNIFFER, USB_EVENT);
@@ -127,7 +127,6 @@ static void ep_event(enum usb_ep_event evt)
}
USB_DECLARE_EP(USB_EP_SNIFFER, ep_tx, ep_tx, ep_event);
-
/* --- RX operation using comparator linked to timer --- */
/* RX on CC1 is using COMP1 triggering TIM1 CH1 */
#define TIM_RX1 1
@@ -144,13 +143,13 @@ USB_DECLARE_EP(USB_EP_SNIFFER, ep_tx, ep_tx, ep_event);
static const struct dma_option dma_tim_cc1 = {
DMAC_TIM_RX1, (void *)&STM32_TIM_CCRx(TIM_RX1, TIM_RX1_CCR_IDX),
STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |
- STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
+ STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
};
static const struct dma_option dma_tim_cc2 = {
DMAC_TIM_RX2, (void *)&STM32_TIM_CCRx(TIM_RX2, TIM_RX2_CCR_IDX),
STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |
- STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
+ STM32_DMA_CCR_CIRC | STM32_DMA_CCR_TCIE | STM32_DMA_CCR_HTIE
};
/* sequence number for sample buffers */
@@ -161,7 +160,7 @@ static uint32_t oflow;
#define SNIFFER_CHANNEL_CC1 0
#define SNIFFER_CHANNEL_CC2 1
-#define get_channel(b) (((b) >> 12) & 0x1)
+#define get_channel(b) (((b) >> 12) & 0x1)
void tim_rx1_handler(uint32_t stat)
{
@@ -171,8 +170,7 @@ void tim_rx1_handler(uint32_t stat)
uint32_t next = idx ? 0x0001 : 0x0100;
sample_tstamp[idx] = __hw_clock_source_read();
- sample_seq[idx] = ((seq++ << 3) & 0x0ff8) |
- (SNIFFER_CHANNEL_CC1<<12);
+ sample_seq[idx] = ((seq++ << 3) & 0x0ff8) | (SNIFFER_CHANNEL_CC1 << 12);
if (filled_dma & next) {
oflow++;
sample_seq[idx] |= 0x8000;
@@ -193,8 +191,7 @@ void tim_rx2_handler(uint32_t stat)
idx += 2;
sample_tstamp[idx] = __hw_clock_source_read();
- sample_seq[idx] = ((seq++ << 3) & 0x0ff8) |
- (SNIFFER_CHANNEL_CC2<<12);
+ sample_seq[idx] = ((seq++ << 3) & 0x0ff8) | (SNIFFER_CHANNEL_CC2 << 12);
if (filled_dma & next) {
oflow++;
sample_seq[idx] |= 0x8000;
@@ -209,10 +206,10 @@ void tim_rx2_handler(uint32_t stat)
static void tim_dma_handler(void)
{
stm32_dma_regs_t *dma = STM32_DMA1_REGS;
- uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1)
- | STM32_DMA_ISR_TCIF(DMAC_TIM_RX1)
- | STM32_DMA_ISR_HTIF(DMAC_TIM_RX2)
- | STM32_DMA_ISR_TCIF(DMAC_TIM_RX2));
+ uint32_t stat = dma->isr & (STM32_DMA_ISR_HTIF(DMAC_TIM_RX1) |
+ STM32_DMA_ISR_TCIF(DMAC_TIM_RX1) |
+ STM32_DMA_ISR_HTIF(DMAC_TIM_RX2) |
+ STM32_DMA_ISR_TCIF(DMAC_TIM_RX2));
if (stat & STM32_DMA_ISR_ALL(DMAC_TIM_RX2))
tim_rx2_handler(stat);
else
@@ -251,30 +248,26 @@ static void rx_timer_init(int tim_id, timer_ctlr_t *tim, int ch_idx, int up_idx)
tim->sr = 0;
}
-
-
void sniffer_init(void)
{
/* remap TIM1 CH1/2/3 to DMA channel 6 */
STM32_SYSCFG_CFGR1 |= BIT(28);
/* TIM1 CH1 for CC1 RX */
- rx_timer_init(TIM_RX1, (void *)STM32_TIM_BASE(TIM_RX1),
- TIM_RX1_CCR_IDX, 2);
+ rx_timer_init(TIM_RX1, (void *)STM32_TIM_BASE(TIM_RX1), TIM_RX1_CCR_IDX,
+ 2);
/* TIM3 CH4 for CC2 RX */
- rx_timer_init(TIM_RX2, (void *)STM32_TIM_BASE(TIM_RX2),
- TIM_RX2_CCR_IDX, 2);
+ rx_timer_init(TIM_RX2, (void *)STM32_TIM_BASE(TIM_RX2), TIM_RX2_CCR_IDX,
+ 2);
/* turn on COMP/SYSCFG */
STM32_RCC_APB2ENR |= BIT(0);
- STM32_COMP_CSR = STM32_COMP_CMP1EN | STM32_COMP_CMP1MODE_HSPEED |
- STM32_COMP_CMP1INSEL_VREF12 |
- STM32_COMP_CMP1OUTSEL_TIM1_IC1 |
- STM32_COMP_CMP1HYST_HI |
- STM32_COMP_CMP2EN | STM32_COMP_CMP2MODE_HSPEED |
- STM32_COMP_CMP2INSEL_VREF12 |
- STM32_COMP_CMP2OUTSEL_TIM2_IC4 |
- STM32_COMP_CMP2HYST_HI;
+ STM32_COMP_CSR =
+ STM32_COMP_CMP1EN | STM32_COMP_CMP1MODE_HSPEED |
+ STM32_COMP_CMP1INSEL_VREF12 | STM32_COMP_CMP1OUTSEL_TIM1_IC1 |
+ STM32_COMP_CMP1HYST_HI | STM32_COMP_CMP2EN |
+ STM32_COMP_CMP2MODE_HSPEED | STM32_COMP_CMP2INSEL_VREF12 |
+ STM32_COMP_CMP2OUTSEL_TIM2_IC4 | STM32_COMP_CMP2HYST_HI;
/* start sampling the edges on the CC lines using the RX timers */
dma_start_rx(&dma_tim_cc1, RX_COUNT, samples[0]);
@@ -311,11 +304,11 @@ void sniffer_task(void)
ep_buf[u][0] = sample_seq[d >> 3] | (d & 7);
ep_buf[u][1] = sample_tstamp[d >> 3];
- memcpy_to_usbram(
- ((void *)usb_sram_addr(ep_buf[u]
- + (EP_PACKET_HEADER_SIZE>>1))),
- samples[d >> 4]+off,
- EP_PAYLOAD_SIZE);
+ memcpy_to_usbram(((void *)usb_sram_addr(
+ ep_buf[u] +
+ (EP_PACKET_HEADER_SIZE >> 1))),
+ samples[d >> 4] + off,
+ EP_PAYLOAD_SIZE);
atomic_clear_bits((atomic_t *)&free_usb, 1 << u);
u = !u;
atomic_clear_bits((atomic_t *)&filled_dma, 1 << d);
@@ -332,8 +325,8 @@ void sniffer_task(void)
int wait_packet(int pol, uint32_t min_edges, uint32_t timeout_us)
{
- stm32_dma_chan_t *chan = dma_get_channel(pol ? DMAC_TIM_RX2
- : DMAC_TIM_RX1);
+ stm32_dma_chan_t *chan =
+ dma_get_channel(pol ? DMAC_TIM_RX2 : DMAC_TIM_RX1);
uint32_t t0 = __hw_clock_source_read();
uint32_t c0 = chan->cndtr;
uint32_t t_gap = t0;
@@ -355,7 +348,7 @@ int wait_packet(int pol, uint32_t min_edges, uint32_t timeout_us)
total_edges += nb;
} else {
if ((t - t_gap) > 20 &&
- (total_edges - (t - t0)/256) >= min_edges)
+ (total_edges - (t - t0) / 256) >= min_edges)
/* real gap after the packet */
break;
}
@@ -392,11 +385,10 @@ static void sniffer_sysjump(void)
}
DECLARE_HOOK(HOOK_SYSJUMP, sniffer_sysjump, HOOK_PRIO_DEFAULT);
-static int command_sniffer(int argc, char **argv)
+static int command_sniffer(int argc, const char **argv)
{
ccprintf("Seq number:%d Overflows: %d\n", seq, oflow);
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(sniffer, command_sniffer,
- "[]", "Buffering status");
+DECLARE_CONSOLE_COMMAND(sniffer, command_sniffer, "[]", "Buffering status");
diff --git a/board/twinkie/usb_pd_config.h b/board/twinkie/usb_pd_config.h
index 1c20a9df77..062c174d8a 100644
--- a/board/twinkie/usb_pd_config.h
+++ b/board/twinkie/usb_pd_config.h
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -50,7 +50,7 @@ static inline void spi_enable_clock(int port)
#define DMAC_TIM_RX(p) STM32_DMAC_CH2
#define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0
#define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0
-#define TIM_CCR_CS 1
+#define TIM_CCR_CS 1
#define EXTI_COMP_MASK(p) (BIT(21) | BIT(22))
#define IRQ_COMP STM32_IRQ_COMP
/* triggers packet detection on comparator falling edge */
@@ -102,11 +102,11 @@ static inline void pd_tx_enable(int port, int polarity)
static inline void pd_tx_disable(int port, int polarity)
{
/* TX_DATA on PB4 is an output low GPIO to disable the FET */
- STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2*4)))
- | (1 << (2*4));
+ STM32_GPIO_MODER(GPIO_B) =
+ (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2 * 4))) | (1 << (2 * 4));
/* TX_DATA on PA6 is an output low GPIO to disable the FET */
- STM32_GPIO_MODER(GPIO_A) = (STM32_GPIO_MODER(GPIO_A) & ~(3 << (2*6)))
- | (1 << (2*6));
+ STM32_GPIO_MODER(GPIO_A) =
+ (STM32_GPIO_MODER(GPIO_A) & ~(3 << (2 * 6))) | (1 << (2 * 6));
/*
* Tri-state the low side after the high side
* to ensure we are not going above Vnc
@@ -119,11 +119,12 @@ static inline void pd_tx_disable(int port, int polarity)
static inline void pd_select_polarity(int port, int polarity)
{
/* use the right comparator */
- STM32_COMP_CSR = (STM32_COMP_CSR
- & ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK
- |STM32_COMP_CMP1EN | STM32_COMP_CMP2EN))
- | STM32_COMP_CMP1INSEL_INM4 | STM32_COMP_CMP2INSEL_INM4
- | (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN);
+ STM32_COMP_CSR =
+ (STM32_COMP_CSR &
+ ~(STM32_COMP_CMP1INSEL_MASK | STM32_COMP_CMP2INSEL_MASK |
+ STM32_COMP_CMP1EN | STM32_COMP_CMP2EN)) |
+ STM32_COMP_CMP1INSEL_INM4 | STM32_COMP_CMP2INSEL_INM4 |
+ (polarity ? STM32_COMP_CMP2EN : STM32_COMP_CMP1EN);
}
/* Initialize pins used for clocking */
diff --git a/board/twinkie/usb_pd_pdo.c b/board/twinkie/usb_pd_pdo.c
index 120c13125b..fbc0624f80 100644
--- a/board/twinkie/usb_pd_pdo.c
+++ b/board/twinkie/usb_pd_pdo.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -10,15 +10,15 @@
#define PDO_FIXED_FLAGS (PDO_FIXED_UNCONSTRAINED | PDO_FIXED_DATA_SWAP)
const uint32_t pd_src_pdo[] = {
- PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
- PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS),
- PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS),
+ PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
+ PDO_FIXED(12000, 3000, PDO_FIXED_FLAGS),
+ PDO_FIXED(20000, 3000, PDO_FIXED_FLAGS),
};
const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
const uint32_t pd_snk_pdo[] = {
- PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
- PDO_BATT(4750, 21000, 15000),
- PDO_VAR(4750, 21000, 3000),
+ PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+ PDO_BATT(4750, 21000, 15000),
+ PDO_VAR(4750, 21000, 3000),
};
const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
diff --git a/board/twinkie/usb_pd_pdo.h b/board/twinkie/usb_pd_pdo.h
index 377ccce1b5..0badd0f7bf 100644
--- a/board/twinkie/usb_pd_pdo.h
+++ b/board/twinkie/usb_pd_pdo.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/board/twinkie/usb_pd_policy.c b/board/twinkie/usb_pd_policy.c
index a8f76b40e5..c99dfb5750 100644
--- a/board/twinkie/usb_pd_policy.c
+++ b/board/twinkie/usb_pd_policy.c
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -15,8 +15,8 @@
#include "usb_pd.h"
#include "usb_pd_pdo.h"
-#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
-#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args)
void pd_set_input_current_limit(int port, uint32_t max_ma,
uint32_t supply_voltage)
@@ -50,27 +50,23 @@ __override int pd_check_power_swap(int port)
return 0;
}
-__override int pd_check_data_swap(int port,
- enum pd_data_role data_role)
+__override int pd_check_data_swap(int port, enum pd_data_role data_role)
{
/* Always allow data swap */
return 1;
}
-__override void pd_check_pr_role(int port,
- enum pd_power_role pr_role,
+__override void pd_check_pr_role(int port, enum pd_power_role pr_role,
int flags)
{
}
-__override void pd_check_dr_role(int port,
- enum pd_data_role dr_role,
- int flags)
+__override void pd_check_dr_role(int port, enum pd_data_role dr_role, int flags)
{
}
__override int pd_custom_vdm(int port, int cnt, uint32_t *payload,
- uint32_t **rpayload)
+ uint32_t **rpayload)
{
return 0;
}
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