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path: root/chip/ish/gpio.c
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Diffstat (limited to 'chip/ish/gpio.c')
-rw-r--r--chip/ish/gpio.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/chip/ish/gpio.c b/chip/ish/gpio.c
index 6c7a27e1e7..287e7a375b 100644
--- a/chip/ish/gpio.c
+++ b/chip/ish/gpio.c
@@ -1,4 +1,4 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
+/* Copyright 2016 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -24,7 +24,7 @@ test_mockable int gpio_get_level(enum gpio_signal signal)
if (g->port == UNIMPLEMENTED_GPIO_BANK)
return 0;
- return !!(ISH_GPIO_GPLR & g->mask);
+ return !!(ISH_GPIO_GPLR & g->mask);
}
void gpio_set_level(enum gpio_signal signal, int value)
@@ -55,8 +55,8 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
}
/* ISH 3 can't support both rising and falling edge */
- if (IS_ENABLED(CHIP_FAMILY_ISH3) &&
- (flags & GPIO_INT_F_RISING) && (flags & GPIO_INT_F_FALLING)) {
+ if (IS_ENABLED(CHIP_FAMILY_ISH3) && (flags & GPIO_INT_F_RISING) &&
+ (flags & GPIO_INT_F_FALLING)) {
ccprintf("\n\nISH 2/3 does not support both rising & falling "
"edge for %d 0x%02x\n\n",
port, mask);
@@ -65,7 +65,7 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
/* GPSR/GPCR Output high/low */
if (flags & GPIO_HIGH) /* Output high */
ISH_GPIO_GPSR |= mask;
- else if (flags & GPIO_LOW) /* output low */
+ else if (flags & GPIO_LOW) /* output low */
ISH_GPIO_GPCR |= mask;
/* GPDR pin direction 1 = output, 0 = input*/
@@ -123,7 +123,6 @@ void gpio_pre_init(void)
const struct gpio_info *g = gpio_list;
for (i = 0; i < GPIO_COUNT; i++, g++) {
-
flags = g->flags;
if (flags & GPIO_DEFAULT)