diff options
Diffstat (limited to 'chip/it83xx/config_chip_it8xxx2.h')
| -rw-r--r-- | chip/it83xx/config_chip_it8xxx2.h | 52 |
1 files changed, 27 insertions, 25 deletions
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h index 0bbfe89b59..cbbbd0bd55 100644 --- a/chip/it83xx/config_chip_it8xxx2.h +++ b/chip/it83xx/config_chip_it8xxx2.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -15,7 +15,7 @@ #define CHIP_CORE_RISCV #define CHIP_ILM_DLM_ORDER /* The base address of EC interrupt controller registers. */ -#define CHIP_EC_INTC_BASE 0x00F03F00 +#define CHIP_EC_INTC_BASE 0x00F03F00 #define CONFIG_IT83XX_FLASH_CLOCK_48MHZ /* * ILM/DLM size register. @@ -27,11 +27,11 @@ /****************************************************************************/ /* Memory mapping */ -#define CHIP_ILM_BASE 0x80000000 -#define CHIP_EXTRA_STACK_SPACE 128 +#define CHIP_ILM_BASE 0x80000000 +#define CHIP_EXTRA_STACK_SPACE 128 /* We reserve 12KB space for ramcode, h2ram, and immu sections. */ -#define CHIP_RAM_SPACE_RESERVED 0x3000 -#define CONFIG_PROGRAM_MEMORY_BASE (CHIP_ILM_BASE) +#define CHIP_RAM_SPACE_RESERVED 0x3000 +#define CONFIG_PROGRAM_MEMORY_BASE (CHIP_ILM_BASE) /****************************************************************************/ /* Chip IT83202 is used with IT8XXX2 TCPM driver */ @@ -39,9 +39,9 @@ #if defined(CHIP_VARIANT_IT83202BX) /* TODO(b/133460224): enable properly chip config option. */ -#define CONFIG_FLASH_SIZE_BYTES 0x00080000 -#define CONFIG_RAM_BASE 0x80080000 -#define CONFIG_RAM_SIZE 0x00010000 +#define CONFIG_FLASH_SIZE_BYTES 0x00080000 +#define CONFIG_RAM_BASE 0x80080000 +#define CONFIG_RAM_SIZE 0x00010000 /* Embedded flash is KGD */ #define IT83XX_CHIP_FLASH_IS_KGD @@ -80,12 +80,12 @@ /* Enable detect type-c plug in and out interrupt. */ #define IT83XX_INTC_PLUG_IN_OUT_SUPPORT /* Chip IT83202BX actually has TCPC physical port count. */ -#define IT83XX_USBPD_PHY_PORT_COUNT 3 -#elif defined(CHIP_VARIANT_IT81302AX_1024) \ -|| defined(CHIP_VARIANT_IT81202AX_1024) \ -|| defined(CHIP_VARIANT_IT81302BX_1024) \ -|| defined(CHIP_VARIANT_IT81302BX_512) \ -|| defined(CHIP_VARIANT_IT81202BX_1024) +#define IT83XX_USBPD_PHY_PORT_COUNT 3 +#elif defined(CHIP_VARIANT_IT81302AX_1024) || \ + defined(CHIP_VARIANT_IT81202AX_1024) || \ + defined(CHIP_VARIANT_IT81302BX_1024) || \ + defined(CHIP_VARIANT_IT81302BX_512) || \ + defined(CHIP_VARIANT_IT81202BX_1024) /* * Workaround mul instruction bug, see: @@ -95,16 +95,16 @@ #define CONFIG_IT8XXX2_MUL_WORKAROUND #if defined(CHIP_VARIANT_IT81302BX_512) -#define CONFIG_FLASH_SIZE_BYTES 0x00080000 -#define CONFIG_RAM_BASE 0x80080000 +#define CONFIG_FLASH_SIZE_BYTES 0x00080000 +#define CONFIG_RAM_BASE 0x80080000 #else -#define CONFIG_FLASH_SIZE_BYTES 0x00100000 -#define CONFIG_RAM_BASE 0x80100000 +#define CONFIG_FLASH_SIZE_BYTES 0x00100000 +#define CONFIG_RAM_BASE 0x80100000 /* Set ILM (instruction local memory) size up to 1M bytes */ #define IT83XX_CHIP_FLASH_SIZE_1MB #endif -#define CONFIG_RAM_SIZE 0x0000f000 +#define CONFIG_RAM_SIZE 0x0000f000 /* Embedded flash is KGD */ #define IT83XX_CHIP_FLASH_IS_KGD @@ -151,14 +151,16 @@ /* Individual setting CC1 and CC2 resistance. */ #define IT83XX_USBPD_CC1_CC2_RESISTANCE_SEPARATE /* Chip actually has TCPC physical port count. */ -#define IT83XX_USBPD_PHY_PORT_COUNT 2 +#define IT83XX_USBPD_PHY_PORT_COUNT 2 #else #error "Unsupported chip variant!" #endif -#define CHIP_RAMCODE_ILM0 (CONFIG_RAM_BASE + 0) /* base+0000h~base+0FFF */ -#define CHIP_H2RAM_BASE (CONFIG_RAM_BASE + 0x1000) /* base+1000h~base+1FFF */ -#define CHIP_RAMCODE_BASE (CONFIG_RAM_BASE + 0x2000) /* base+2000h~base+2FFF */ +#define CHIP_RAMCODE_ILM0 (CONFIG_RAM_BASE + 0) /* base+0000h~base+0FFF */ +#define CHIP_H2RAM_BASE (CONFIG_RAM_BASE + 0x1000) /* base+1000h~base+1FFF */ +#define CHIP_RAMCODE_BASE \ + (CONFIG_RAM_BASE + 0x2000) /* base+2000h~base+2FFF \ + */ #ifdef BASEBOARD_KUKUI /* @@ -173,4 +175,4 @@ #define CONFIG_FLASH_SIZE_BYTES CHIP_FLASH_PRESERVE_LOGS_BASE #endif -#endif /* __CROS_EC_CONFIG_CHIP_IT8XXX2_H */ +#endif /* __CROS_EC_CONFIG_CHIP_IT8XXX2_H */ |