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Diffstat (limited to 'chip/it83xx/i2c_peripheral.c')
-rw-r--r--chip/it83xx/i2c_peripheral.c85
1 files changed, 48 insertions, 37 deletions
diff --git a/chip/it83xx/i2c_peripheral.c b/chip/it83xx/i2c_peripheral.c
index 1590c39bca..80fea907fd 100644
--- a/chip/it83xx/i2c_peripheral.c
+++ b/chip/it83xx/i2c_peripheral.c
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -10,13 +10,14 @@
#include "gpio.h"
#include "hooks.h"
#include "i2c_peripheral.h"
+#include "printf.h"
#include "registers.h"
#include <stddef.h>
#include <string.h>
#include "task.h"
/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ##args)
/* The size must be a power of 2 */
#define I2C_MAX_BUFFER_SIZE 0x100
@@ -27,10 +28,10 @@
/* Store controller to peripheral data of channel D, E, F by DMA */
static uint8_t in_data[I2C_ENHANCED_PORT_COUNT][I2C_MAX_BUFFER_SIZE]
- __attribute__((section(".h2ram.pool.i2cslv")));
+ __attribute__((section(".h2ram.pool.i2cslv")));
/* Store peripheral to controller data of channel D, E, F by DMA */
static uint8_t out_data[I2C_ENHANCED_PORT_COUNT][I2C_MAX_BUFFER_SIZE]
- __attribute__((section(".h2ram.pool.i2cslv")));
+ __attribute__((section(".h2ram.pool.i2cslv")));
/* Store read and write data of channel A by FIFO mode */
static uint8_t pbuffer[I2C_MAX_BUFFER_SIZE];
@@ -48,7 +49,7 @@ void buffer_index_reset(void)
/* Data structure to define I2C peripheral control configuration. */
struct i2c_periph_ctrl_t {
- int irq; /* peripheral irq */
+ int irq; /* peripheral irq */
/* offset from base 0x00F03500 register; -1 means unused. */
int offset;
enum clock_gate_offsets clock_gate;
@@ -57,14 +58,22 @@ struct i2c_periph_ctrl_t {
/* I2C peripheral control */
const struct i2c_periph_ctrl_t i2c_periph_ctrl[] = {
- [IT83XX_I2C_CH_A] = {.irq = IT83XX_IRQ_SMB_A, .offset = -1,
- .clock_gate = CGC_OFFSET_SMBA, .dma_index = -1},
- [IT83XX_I2C_CH_D] = {.irq = IT83XX_IRQ_SMB_D, .offset = 0x180,
- .clock_gate = CGC_OFFSET_SMBD, .dma_index = 0},
- [IT83XX_I2C_CH_E] = {.irq = IT83XX_IRQ_SMB_E, .offset = 0x0,
- .clock_gate = CGC_OFFSET_SMBE, .dma_index = 1},
- [IT83XX_I2C_CH_F] = {.irq = IT83XX_IRQ_SMB_F, .offset = 0x80,
- .clock_gate = CGC_OFFSET_SMBF, .dma_index = 2},
+ [IT83XX_I2C_CH_A] = { .irq = IT83XX_IRQ_SMB_A,
+ .offset = -1,
+ .clock_gate = CGC_OFFSET_SMBA,
+ .dma_index = -1 },
+ [IT83XX_I2C_CH_D] = { .irq = IT83XX_IRQ_SMB_D,
+ .offset = 0x180,
+ .clock_gate = CGC_OFFSET_SMBD,
+ .dma_index = 0 },
+ [IT83XX_I2C_CH_E] = { .irq = IT83XX_IRQ_SMB_E,
+ .offset = 0x0,
+ .clock_gate = CGC_OFFSET_SMBE,
+ .dma_index = 1 },
+ [IT83XX_I2C_CH_F] = { .irq = IT83XX_IRQ_SMB_F,
+ .offset = 0x80,
+ .clock_gate = CGC_OFFSET_SMBF,
+ .dma_index = 2 },
};
void i2c_peripheral_read_write_data(int port)
@@ -87,7 +96,8 @@ void i2c_peripheral_read_write_data(int port)
for (i = 0; i < I2C_READ_MAXFIFO_DATA; i++)
/* Return buffer data to controller */
IT83XX_SMB_SLDA =
- pbuffer[(i + r_index) & I2C_SIZE_MASK];
+ pbuffer[(i + r_index) &
+ I2C_SIZE_MASK];
/* Index to next 16 bytes of read buffer */
r_index += I2C_READ_MAXFIFO_DATA;
@@ -97,9 +107,11 @@ void i2c_peripheral_read_write_data(int port)
/* FIFO Full */
if (IT83XX_SMB_SFFSTA & IT83XX_SMB_SFFFULL) {
for (i = 0; i < count; i++)
- /* Get data from controller to buffer */
+ /* Get data from controller to
+ * buffer */
pbuffer[(w_index + i) &
- I2C_SIZE_MASK] = IT83XX_SMB_SLDA;
+ I2C_SIZE_MASK] =
+ IT83XX_SMB_SLDA;
}
/* Index to next byte of write buffer */
@@ -120,8 +132,8 @@ void i2c_peripheral_read_write_data(int port)
else {
for (i = 0; i < count; i++)
/* Get data from controller to buffer */
- pbuffer[(i + w_index) &
- I2C_SIZE_MASK] = IT83XX_SMB_SLDA;
+ pbuffer[(i + w_index) & I2C_SIZE_MASK] =
+ IT83XX_SMB_SLDA;
}
/* Reset read and write buffer index */
@@ -147,16 +159,15 @@ void i2c_peripheral_read_write_data(int port)
/* Interrupt pending */
if (IT83XX_I2C_STR(ch) & IT83XX_I2C_INTPEND) {
-
periph_status = IT83XX_I2C_IRQ_ST(ch);
/* Controller to read data */
if (periph_status & IT83XX_I2C_IDR_CLR) {
- /*
- * TODO(b:129360157): Return buffer data by
- * "out_data" array.
- * Ex: Write data to buffer from 0x00 to 0xFF
- */
+ /*
+ * TODO(b:129360157): Return buffer data by
+ * "out_data" array.
+ * Ex: Write data to buffer from 0x00 to 0xFF
+ */
for (i = 0; i < I2C_MAX_BUFFER_SIZE; i++)
out_data[idx][i] = i;
}
@@ -168,13 +179,17 @@ void i2c_peripheral_read_write_data(int port)
/* Peripheral finish */
if (periph_status & IT83XX_I2C_P_CLR) {
if (wr_done[idx]) {
- /*
- * TODO(b:129360157): Handle controller write
- * data by "in_data" array.
- */
- CPRINTS("WData: %ph",
+ char str_buf[hex_str_buf_size(
+ I2C_MAX_BUFFER_SIZE)];
+ /*
+ * TODO(b:129360157): Handle controller
+ * write data by "in_data" array.
+ */
+ snprintf_hex_buffer(
+ str_buf, sizeof(str_buf),
HEX_BUF(in_data[idx],
I2C_MAX_BUFFER_SIZE));
+ CPRINTS("WData: %s", str_buf);
wr_done[idx] = 0;
}
}
@@ -199,12 +214,10 @@ void i2c_periph_interrupt(int port)
void i2c_peripheral_enable(int port, uint8_t periph_addr)
{
-
clock_enable_peripheral(i2c_periph_ctrl[port].clock_gate, 0, 0);
/* I2C peripheral channel A FIFO mode */
if (port < I2C_STANDARD_PORT_COUNT) {
-
/* This field defines the SMCLK0/1/2 clock/data low timeout. */
IT83XX_SMB_25MS = I2C_CLK_LOW_TIMEOUT;
@@ -266,8 +279,8 @@ void i2c_peripheral_enable(int port, uint8_t periph_addr)
IT83XX_I2C_IDR(ch) = periph_addr << 1;
/* I2C interrupt enable and set acknowledge */
- IT83XX_I2C_CTR(ch) = IT83XX_I2C_HALT |
- IT83XX_I2C_INTEN | IT83XX_I2C_ACK;
+ IT83XX_I2C_CTR(ch) = IT83XX_I2C_HALT | IT83XX_I2C_INTEN |
+ IT83XX_I2C_ACK;
/*
* bit3 : Peripheral ID write flag
@@ -313,21 +326,19 @@ void i2c_peripheral_enable(int port, uint8_t periph_addr)
}
/* I2C module enable and command queue mode */
- IT83XX_I2C_CTR1(ch) = IT83XX_I2C_COMQ_EN |
- IT83XX_I2C_MDL_EN;
+ IT83XX_I2C_CTR1(ch) = IT83XX_I2C_COMQ_EN | IT83XX_I2C_MDL_EN;
}
}
static void i2c_peripheral_init(void)
{
- int i, p;
+ int i, p;
/* DLM 52k~56k size select enable */
IT83XX_GCTRL_MCCR2 |= (1 << 4);
/* Enable I2C Peripheral function */
for (i = 0; i < i2c_periphs_used; i++) {
-
/* I2c peripheral port mapping. */
p = i2c_periph_ports[i].port;
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