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Diffstat (limited to 'chip/mchp/espi.c')
-rw-r--r--chip/mchp/espi.c267
1 files changed, 110 insertions, 157 deletions
diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c
index 763b82ece2..371cf09c5e 100644
--- a/chip/mchp/espi.c
+++ b/chip/mchp/espi.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -36,7 +36,7 @@
#define CPRINTS(...)
#else
#define CPUTS(outstr) cputs(CC_LPC, outstr)
-#define CPRINTS(format, args...) cprints(CC_LPC, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_LPC, format, ##args)
#endif
#else
#define CPUTS(...)
@@ -44,28 +44,28 @@
#endif
/* Default config to use maximum frequency */
-#ifndef CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ
+#ifndef CONFIG_HOST_INTERFACE_ESPI_EC_MAX_FREQ
#if defined(CHIP_FAMILY_MEC172X)
-#define CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_66M
+#define CONFIG_HOST_INTERFACE_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_66M
#else
-#define CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_50M
+#define CONFIG_HOST_INTERFACE_ESPI_EC_MAX_FREQ MCHP_ESPI_CAP1_MAX_FREQ_50M
#endif
#endif
/* Default config to support all modes */
-#ifndef CONFIG_HOSTCMD_ESPI_EC_MODE
-#define CONFIG_HOSTCMD_ESPI_EC_MODE MCHP_ESPI_CAP1_ALL_MODE
+#ifndef CONFIG_HOST_INTERFACE_ESPI_EC_MODE
+#define CONFIG_HOST_INTERFACE_ESPI_EC_MODE MCHP_ESPI_CAP1_ALL_MODE
#endif
/* Default config to support all channels */
-#ifndef CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP
-#define CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP MCHP_ESPI_CAP0_ALL_CHAN_SUPP
+#ifndef CONFIG_HOST_INTERFACE_ESPI_EC_CHAN_BITMAP
+#define CONFIG_HOST_INTERFACE_ESPI_EC_CHAN_BITMAP MCHP_ESPI_CAP0_ALL_CHAN_SUPP
#endif
/*
* eSPI slave to master virtual wire pulse timeout.
*/
-#define ESPI_S2M_VW_PULSE_LOOP_CNT 50
-#define ESPI_S2M_VW_PULSE_LOOP_DLY_US 10
+#define ESPI_S2M_VW_PULSE_LOOP_CNT 50
+#define ESPI_S2M_VW_PULSE_LOOP_DLY_US 10
/*
* eSPI master enable virtual wire channel timeout.
@@ -104,16 +104,15 @@ static uint32_t espi_channels_ready;
*
*/
struct vw_info_t {
- uint16_t name; /* signal name */
- uint8_t host_idx; /* Host VWire index of signal */
- uint8_t reset_val; /* reset value of VWire */
- uint8_t flags; /* b[0]=0(MSVW), =1(SMVW) */
- uint8_t reg_idx; /* MSVW or SMVW index */
- uint8_t src_num; /* SRC number */
- uint8_t rsvd;
+ uint16_t name; /* signal name */
+ uint8_t host_idx; /* Host VWire index of signal */
+ uint8_t reset_val; /* reset value of VWire */
+ uint8_t flags; /* b[0]=0(MSVW), =1(SMVW) */
+ uint8_t reg_idx; /* MSVW or SMVW index */
+ uint8_t src_num; /* SRC number */
+ uint8_t rsvd;
};
-
/* VW signals used in eSPI */
/*
* MEC1701H VWire mapping based on eSPI Spec 1.0,
@@ -193,41 +192,40 @@ static const struct vw_info_t vw_info_tbl[] = {
* index value flags index num rsvd
*/
/* MSVW00 Host index 02h (In) */
- {VW_SLP_S3_L, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00},
- {VW_SLP_S4_L, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00},
- {VW_SLP_S5_L, 0x02, 0x00, 0x10, 0x00, 0x02, 0x00},
+ { VW_SLP_S3_L, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00 },
+ { VW_SLP_S4_L, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00 },
+ { VW_SLP_S5_L, 0x02, 0x00, 0x10, 0x00, 0x02, 0x00 },
/* MSVW01 Host index 03h (In) */
- {VW_SUS_STAT_L, 0x03, 0x00, 0x10, 0x01, 0x00, 0x00},
- {VW_PLTRST_L, 0x03, 0x00, 0x10, 0x01, 0x01, 0x00},
- {VW_OOB_RST_WARN, 0x03, 0x00, 0x10, 0x01, 0x02, 0x00},
+ { VW_SUS_STAT_L, 0x03, 0x00, 0x10, 0x01, 0x00, 0x00 },
+ { VW_PLTRST_L, 0x03, 0x00, 0x10, 0x01, 0x01, 0x00 },
+ { VW_OOB_RST_WARN, 0x03, 0x00, 0x10, 0x01, 0x02, 0x00 },
/* SMVW00 Host Index 04h (Out) */
- {VW_OOB_RST_ACK, 0x04, 0x00, 0x01, 0x00, 0x00, 0x00},
- {VW_WAKE_L, 0x04, 0x01, 0x01, 0x00, 0x02, 0x00},
- {VW_PME_L, 0x04, 0x01, 0x01, 0x00, 0x03, 0x00},
+ { VW_OOB_RST_ACK, 0x04, 0x00, 0x01, 0x00, 0x00, 0x00 },
+ { VW_WAKE_L, 0x04, 0x01, 0x01, 0x00, 0x02, 0x00 },
+ { VW_PME_L, 0x04, 0x01, 0x01, 0x00, 0x03, 0x00 },
/* SMVW01 Host index 05h (Out) */
- {VW_ERROR_FATAL, 0x05, 0x00, 0x01, 0x01, 0x01, 0x00},
- {VW_ERROR_NON_FATAL, 0x05, 0x00, 0x01, 0x01, 0x02, 0x00},
- {VW_PERIPHERAL_BTLD_STATUS_DONE, 0x05, 0x00, 0x01, 0x01, 0x30, 0x00},
+ { VW_ERROR_FATAL, 0x05, 0x00, 0x01, 0x01, 0x01, 0x00 },
+ { VW_ERROR_NON_FATAL, 0x05, 0x00, 0x01, 0x01, 0x02, 0x00 },
+ { VW_PERIPHERAL_BTLD_STATUS_DONE, 0x05, 0x00, 0x01, 0x01, 0x30, 0x00 },
/* SMVW02 Host index 06h (Out) */
- {VW_SCI_L, 0x06, 0x01, 0x01, 0x02, 0x00, 0x00},
- {VW_SMI_L, 0x06, 0x01, 0x01, 0x02, 0x01, 0x00},
- {VW_RCIN_L, 0x06, 0x01, 0x01, 0x02, 0x02, 0x00},
- {VW_HOST_RST_ACK, 0x06, 0x00, 0x01, 0x02, 0x03, 0x00},
+ { VW_SCI_L, 0x06, 0x01, 0x01, 0x02, 0x00, 0x00 },
+ { VW_SMI_L, 0x06, 0x01, 0x01, 0x02, 0x01, 0x00 },
+ { VW_RCIN_L, 0x06, 0x01, 0x01, 0x02, 0x02, 0x00 },
+ { VW_HOST_RST_ACK, 0x06, 0x00, 0x01, 0x02, 0x03, 0x00 },
/* MSVW02 Host index 07h (In) */
- {VW_HOST_RST_WARN, 0x07, 0x00, 0x10, 0x02, 0x00, 0x00},
+ { VW_HOST_RST_WARN, 0x07, 0x00, 0x10, 0x02, 0x00, 0x00 },
/* SMVW03 Host Index 40h (Out) */
- {VW_SUS_ACK, 0x40, 0x00, 0x01, 0x03, 0x00, 0x00},
+ { VW_SUS_ACK, 0x40, 0x00, 0x01, 0x03, 0x00, 0x00 },
/* MSVW03 Host Index 41h (In) */
- {VW_SUS_WARN_L, 0x41, 0x00, 0x10, 0x03, 0x00, 0x00},
- {VW_SUS_PWRDN_ACK_L, 0x41, 0x00, 0x10, 0x03, 0x01, 0x00},
- {VW_SLP_A_L, 0x41, 0x00, 0x10, 0x03, 0x03, 0x00},
+ { VW_SUS_WARN_L, 0x41, 0x00, 0x10, 0x03, 0x00, 0x00 },
+ { VW_SUS_PWRDN_ACK_L, 0x41, 0x00, 0x10, 0x03, 0x01, 0x00 },
+ { VW_SLP_A_L, 0x41, 0x00, 0x10, 0x03, 0x03, 0x00 },
/* MSVW04 Host index 42h (In) */
- {VW_SLP_LAN, 0x42, 0x00, 0x10, 0x04, 0x00, 0x00},
- {VW_SLP_WLAN, 0x42, 0x00, 0x10, 0x04, 0x01, 0x00}
+ { VW_SLP_LAN, 0x42, 0x00, 0x10, 0x04, 0x00, 0x00 },
+ { VW_SLP_WLAN, 0x42, 0x00, 0x10, 0x04, 0x01, 0x00 }
};
BUILD_ASSERT(ARRAY_SIZE(vw_info_tbl) == VW_SIGNAL_COUNT);
-
/************************************************************************/
/* eSPI internal utilities */
@@ -244,14 +242,12 @@ static int espi_vw_get_signal_index(enum espi_vw_signal event)
return -1;
}
-
/*
* Initialize eSPI hardware upon ESPI_RESET# de-assertion
*/
#ifdef CONFIG_MCHP_ESPI_RESET_DEASSERT_INIT
static void espi_reset_deassert_init(void)
{
-
}
#endif
@@ -341,7 +337,6 @@ static void espi_vw_restore(void)
r = MCHP_VBAT_RAM(MCHP_VBAT_VWIRE_BACKUP);
MCHP_VBAT_RAM(MCHP_VBAT_VWIRE_BACKUP) = r & 0xFFFFFF00;
-
}
#endif
@@ -362,8 +357,8 @@ static uint8_t __attribute__((unused)) espi_msvw_srcs_get(uint8_t msvw_id)
return msvw;
}
-static void __attribute__((unused)) espi_msvw_srcs_set(uint8_t msvw_id,
- uint8_t src_bitmap)
+static void __attribute__((unused))
+espi_msvw_srcs_set(uint8_t msvw_id, uint8_t src_bitmap)
{
if (msvw_id < MSVW_MAX) {
uint32_t r = (src_bitmap & 0x08) << 21;
@@ -392,8 +387,8 @@ static uint8_t __attribute__((unused)) espi_smvw_srcs_get(uint8_t smvw_id)
return smvw;
}
-static void __attribute__((unused)) espi_smvw_srcs_set(uint8_t smvw_id,
- uint8_t src_bitmap)
+static void __attribute__((unused))
+espi_smvw_srcs_set(uint8_t smvw_id, uint8_t src_bitmap)
{
if (smvw_id < SMVW_MAX) {
uint32_t r = (src_bitmap & 0x08) << 21;
@@ -405,7 +400,6 @@ static void __attribute__((unused)) espi_smvw_srcs_set(uint8_t smvw_id,
}
}
-
/*
* Called before releasing RSMRST#
* ESPI_RESET# is asserted
@@ -466,7 +460,6 @@ static void espi_vw_pre_init(void)
CPRINTS("eSPI VW Pre-Init Done");
}
-
/*
* If VWire, Flash, and OOB channels have been enabled
* then set VWires SLAVE_BOOT_LOAD_STATUS = SLAVE_BOOT_LOAD_DONE = 1
@@ -488,7 +481,6 @@ static void espi_send_boot_load_done(void)
CPRINTS("eSPI Send SLAVE_BOOT_LOAD_STATUS/DONE = 1");
}
-
/*
* Called when eSPI PLTRST# VWire de-asserts
* Re-initialize any hardware that was reset while PLTRST# was
@@ -541,7 +533,6 @@ static void espi_host_init(void)
/* PC enable & Mastering enable changes */
MCHP_ESPI_PC_IEN = (1ul << 25) + (1ul << 28);
-
/* Sufficiently initialized */
lpc_set_init_done(1);
@@ -561,7 +552,6 @@ static void espi_host_init(void)
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, espi_host_init, HOOK_PRIO_FIRST);
-
/*
* Called in response to VWire OOB_RST_WARN==1 from
* espi_vw_evt_oob_rst_warn.
@@ -573,7 +563,6 @@ static void espi_oob_flush(void)
{
}
-
/*
* Called in response to VWire HOST_RST_WARN==1 from
* espi_vw_evt_host_rst_warn.
@@ -589,13 +578,12 @@ static void espi_pc_flush(void)
void espi_vw_power_signal_interrupt(enum espi_vw_signal signal)
{
CPRINTS("eSPI power signal interrupt for VW %d", signal);
- power_signal_interrupt((enum gpio_signal) signal);
+ power_signal_interrupt((enum gpio_signal)signal);
}
/************************************************************************/
/* IC specific low-level driver */
-
/**
* Set eSPI Virtual-Wire signal to Host
*
@@ -632,8 +620,8 @@ int espi_vw_set_wire(enum espi_vw_signal signal, uint8_t level)
}
#ifdef CONFIG_MCHP_ESPI_DEBUG
- CPRINTS("eSPI VW Set Wire %s = %d",
- espi_vw_get_wire_name(signal), level);
+ CPRINTS("eSPI VW Set Wire %s = %d", espi_vw_get_wire_name(signal),
+ level);
#endif
return EC_SUCCESS;
@@ -649,16 +637,14 @@ int espi_vw_set_wire(enum espi_vw_signal signal, uint8_t level)
* happen quickly is bus is idle. Poll for hardware clearing change bit
* until timeout.
*/
-static int espi_vw_s2m_set_w4m(uint32_t ridx, uint32_t src_num,
- uint8_t level)
+static int espi_vw_s2m_set_w4m(uint32_t ridx, uint32_t src_num, uint8_t level)
{
uint32_t i;
MCHP_ESPI_VW_S2M_SRC(ridx, src_num) = level & 0x01;
for (i = 0; i < ESPI_S2M_VW_PULSE_LOOP_CNT; i++) {
- if ((MCHP_ESPI_VW_S2M_CHANGE(ridx) &
- (1u << src_num)) == 0)
+ if ((MCHP_ESPI_VW_S2M_CHANGE(ridx) & (1u << src_num)) == 0)
return EC_SUCCESS;
udelay(ESPI_S2M_VW_PULSE_LOOP_DLY_US);
}
@@ -699,8 +685,8 @@ int espi_vw_pulse_wire(enum espi_vw_signal signal, int pulse_level)
level = 1;
#ifdef CONFIG_MCHP_ESPI_DEBUG
- CPRINTS("eSPI VW Pulse Wire %s to %d",
- espi_vw_get_wire_name(signal), level);
+ CPRINTS("eSPI VW Pulse Wire %s to %d", espi_vw_get_wire_name(signal),
+ level);
#endif
/* set requested inactive state */
@@ -709,7 +695,7 @@ int espi_vw_pulse_wire(enum espi_vw_signal signal, int pulse_level)
return rc;
/* Ensure a minimum pulse width is met. */
- udelay(CONFIG_ESPI_DEFAULT_VW_WIDTH_US);
+ udelay(CONFIG_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US);
/* drive to requested active state */
rc = espi_vw_s2m_set_w4m(ridx, src_num, level);
@@ -741,8 +727,8 @@ int espi_vw_get_wire(enum espi_vw_signal signal)
src_num = vw_info_tbl[tidx].src_num;
vw = MCHP_ESPI_VW_M2S_SRC(ridx, src_num) & 0x01;
#ifdef CONFIG_MCHP_ESPI_DEBUG
- CPRINTS("VW GetWire %s = %d",
- espi_vw_get_wire_name(signal), vw);
+ CPRINTS("VW GetWire %s = %d", espi_vw_get_wire_name(signal),
+ vw);
#endif
}
@@ -769,8 +755,7 @@ int espi_vw_enable_wire_int(enum espi_vw_signal signal)
return EC_ERROR_PARAM1; /* signal is Slave-to-Master */
#ifdef CONFIG_MCHP_ESPI_DEBUG
- CPRINTS("VW IntrEn for VW[%s]",
- espi_vw_get_wire_name(signal));
+ CPRINTS("VW IntrEn for VW[%s]", espi_vw_get_wire_name(signal));
#endif
ridx = vw_info_tbl[tidx].reg_idx;
@@ -783,7 +768,7 @@ int espi_vw_enable_wire_int(enum espi_vw_signal signal)
* GIRQ25 MSVW07[0:3] through MSVW10[0:3] (bits[0:25])
*/
MCHP_ESPI_VW_M2S_IRQSEL(ridx, src_num) =
- MCHP_ESPI_MSVW_IRQSEL_BOTH_EDGES;
+ MCHP_ESPI_MSVW_IRQSEL_BOTH_EDGES;
girq_num = 24;
if (ridx > 6) {
@@ -818,8 +803,7 @@ int espi_vw_disable_wire_int(enum espi_vw_signal signal)
return EC_ERROR_PARAM1; /* signal is Slave-to-Master */
#ifdef CONFIG_MCHP_ESPI_DEBUG
- CPRINTS("VW IntrDis for VW[%s]",
- espi_vw_get_wire_name(signal));
+ CPRINTS("VW IntrDis for VW[%s]", espi_vw_get_wire_name(signal));
#endif
ridx = vw_info_tbl[tidx].reg_idx;
@@ -831,8 +815,7 @@ int espi_vw_disable_wire_int(enum espi_vw_signal signal)
* GIRQ24 MSVW00[0:3] through MSVW06[0:3] (bits[0:27])
* GIRQ25 MSVW07[0:3] through MSVW10[0:3] (bits[0:25])
*/
- MCHP_ESPI_VW_M2S_IRQSEL(ridx, src_num) =
- MCHP_ESPI_MSVW_IRQSEL_DISABLED;
+ MCHP_ESPI_VW_M2S_IRQSEL(ridx, src_num) = MCHP_ESPI_MSVW_IRQSEL_DISABLED;
if (ridx < 7) {
bpos = (ridx << 2) + src_num;
@@ -857,7 +840,6 @@ static void espi_chipset_reset(void)
DECLARE_DEFERRED(espi_chipset_reset);
#endif
-
/* SLP_Sx event handler */
void espi_vw_evt_slp_s3_n(uint32_t wire_state, uint32_t bpos)
{
@@ -894,7 +876,6 @@ void espi_vw_evt_pltrst_n(uint32_t wire_state, uint32_t bpos)
#ifdef CONFIG_CHIPSET_RESET_HOOK
hook_call_deferred(&espi_chipset_reset_data, MSEC);
#endif
-
}
/* OOB Reset Warn event handler */
@@ -966,7 +947,6 @@ void espi_vw_evt_slp_lan_n(uint32_t wire_state, uint32_t bpos)
void espi_vw_evt_slp_wlan_n(uint32_t wire_state, uint32_t bpos)
{
CPRINTS("VW SLP_WLAN: %d", wire_state);
-
}
void espi_vw_evt_host_c10(uint32_t wire_state, uint32_t bpos)
@@ -1024,13 +1004,13 @@ void espi_vw_evt2_dflt(uint32_t wire_state, uint32_t bpos)
typedef void (*FPVW)(uint32_t, uint32_t);
-#define MCHP_GIRQ24_NUM_M2S (7 * 4)
+#define MCHP_GIRQ24_NUM_M2S (7 * 4)
const FPVW girq24_vw_handlers[MCHP_GIRQ24_NUM_M2S] = {
- espi_vw_evt_slp_s3_n, /* MSVW00, Host M2S 02h */
+ espi_vw_evt_slp_s3_n, /* MSVW00, Host M2S 02h */
espi_vw_evt_slp_s4_n,
espi_vw_evt_slp_s5_n,
espi_vw_evt1_dflt,
- espi_vw_evt_sus_stat_n, /* MSVW01, Host M2S 03h */
+ espi_vw_evt_sus_stat_n, /* MSVW01, Host M2S 03h */
espi_vw_evt_pltrst_n,
espi_vw_evt_oob_rst_warn,
espi_vw_evt1_dflt,
@@ -1038,42 +1018,34 @@ const FPVW girq24_vw_handlers[MCHP_GIRQ24_NUM_M2S] = {
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
- espi_vw_evt_sus_warn_n, /* MSVW03, Host M2S 41h */
+ espi_vw_evt_sus_warn_n, /* MSVW03, Host M2S 41h */
espi_vw_evt_sus_pwrdn_ack,
espi_vw_evt1_dflt,
espi_vw_evt_slp_a_n,
- espi_vw_evt_slp_lan_n, /* MSVW04, Host M2S 42h */
+ espi_vw_evt_slp_lan_n, /* MSVW04, Host M2S 42h */
espi_vw_evt_slp_wlan_n,
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
- espi_vw_evt1_dflt, /* MSVW05, Host M2S 43h */
+ espi_vw_evt1_dflt, /* MSVW05, Host M2S 43h */
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
- espi_vw_evt1_dflt, /* MSVW06, Host M2S 44h */
+ espi_vw_evt1_dflt, /* MSVW06, Host M2S 44h */
espi_vw_evt1_dflt,
espi_vw_evt1_dflt,
espi_vw_evt1_dflt
};
-#define MCHP_GIRQ25_NUM_M2S (4 * 4)
+#define MCHP_GIRQ25_NUM_M2S (4 * 4)
const FPVW girq25_vw_handlers[MCHP_GIRQ25_NUM_M2S] = {
- espi_vw_evt_host_c10, /* MSVW07, Host M2S 47h */
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt, /* MSVW08 unassigned */
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt, /* MSVW09 unassigned */
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt, /* MSVW10 unassigned */
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
- espi_vw_evt2_dflt,
+ espi_vw_evt_host_c10, /* MSVW07, Host M2S 47h */
+ espi_vw_evt2_dflt, espi_vw_evt2_dflt, espi_vw_evt2_dflt,
+ espi_vw_evt2_dflt, /* MSVW08 unassigned */
+ espi_vw_evt2_dflt, espi_vw_evt2_dflt, espi_vw_evt2_dflt,
+ espi_vw_evt2_dflt, /* MSVW09 unassigned */
+ espi_vw_evt2_dflt, espi_vw_evt2_dflt, espi_vw_evt2_dflt,
+ espi_vw_evt2_dflt, /* MSVW10 unassigned */
+ espi_vw_evt2_dflt, espi_vw_evt2_dflt, espi_vw_evt2_dflt,
};
/* Interrupt handler for eSPI virtual wires in MSVW00 - MSVW01 */
@@ -1087,8 +1059,9 @@ static void espi_mswv1_interrupt(void)
bpos = __builtin_ctz(girq24_result); /* rbit, clz sequence */
while (bpos != 32) {
- d = *(uint8_t *)(MCHP_ESPI_MSVW_BASE + 8 +
- (12 * (bpos >> 2)) + (bpos & 0x03)) & 0x01;
+ d = *(uint8_t *)(MCHP_ESPI_MSVW_BASE + 8 + (12 * (bpos >> 2)) +
+ (bpos & 0x03)) &
+ 0x01;
(girq24_vw_handlers[bpos])(d, bpos);
girq24_result &= ~(1ul << bpos);
bpos = __builtin_ctz(girq24_result);
@@ -1096,7 +1069,6 @@ static void espi_mswv1_interrupt(void)
}
DECLARE_IRQ(MCHP_IRQ_GIRQ24, espi_mswv1_interrupt, 2);
-
/* Interrupt handler for eSPI virtual wires in MSVW07 - MSVW10 */
static void espi_msvw2_interrupt(void)
{
@@ -1109,7 +1081,8 @@ static void espi_msvw2_interrupt(void)
bpos = __builtin_ctz(girq25_result); /* rbit, clz sequence */
while (bpos != 32) {
d = *(uint8_t *)(MCHP_ESPI_MSVW_BASE + (12 * 7) + 8 +
- (12 * (bpos >> 2)) + (bpos & 0x03)) & 0x01;
+ (12 * (bpos >> 2)) + (bpos & 0x03)) &
+ 0x01;
(girq25_vw_handlers[bpos])(d, bpos);
girq25_result &= ~(1ul << bpos);
bpos = __builtin_ctz(girq25_result);
@@ -1117,8 +1090,6 @@ static void espi_msvw2_interrupt(void)
}
DECLARE_IRQ(MCHP_IRQ_GIRQ25, espi_msvw2_interrupt, 2);
-
-
/*
* NOTES:
* While ESPI_RESET# is asserted, all eSPI blocks are held in reset and
@@ -1167,27 +1138,21 @@ static void espi_reset_isr(void)
MCHP_ESPI_IO_RESET_STATUS = erst;
MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) = MCHP_ESPI_RESET_GIRQ_BIT;
if (erst & (1ul << 1)) { /* rising edge - reset de-asserted */
- MCHP_INT_ENABLE(MCHP_ESPI_GIRQ) = (
- MCHP_ESPI_PC_GIRQ_BIT +
- MCHP_ESPI_OOB_TX_GIRQ_BIT +
- MCHP_ESPI_FC_GIRQ_BIT +
- MCHP_ESPI_VW_EN_GIRQ_BIT);
+ MCHP_INT_ENABLE(MCHP_ESPI_GIRQ) =
+ (MCHP_ESPI_PC_GIRQ_BIT + MCHP_ESPI_OOB_TX_GIRQ_BIT +
+ MCHP_ESPI_FC_GIRQ_BIT + MCHP_ESPI_VW_EN_GIRQ_BIT);
MCHP_ESPI_OOB_TX_IEN = (1ul << 1);
MCHP_ESPI_FC_IEN = (1ul << 1);
MCHP_ESPI_PC_IEN = (1ul << 25);
CPRINTS("eSPI Reset de-assert");
} else { /* falling edge - reset asserted */
- MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) = (
- MCHP_ESPI_PC_GIRQ_BIT +
- MCHP_ESPI_OOB_TX_GIRQ_BIT +
- MCHP_ESPI_FC_GIRQ_BIT +
- MCHP_ESPI_VW_EN_GIRQ_BIT);
- MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) = (
- MCHP_ESPI_PC_GIRQ_BIT +
- MCHP_ESPI_OOB_TX_GIRQ_BIT +
- MCHP_ESPI_FC_GIRQ_BIT +
- MCHP_ESPI_VW_EN_GIRQ_BIT);
+ MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) =
+ (MCHP_ESPI_PC_GIRQ_BIT + MCHP_ESPI_OOB_TX_GIRQ_BIT +
+ MCHP_ESPI_FC_GIRQ_BIT + MCHP_ESPI_VW_EN_GIRQ_BIT);
+ MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) =
+ (MCHP_ESPI_PC_GIRQ_BIT + MCHP_ESPI_OOB_TX_GIRQ_BIT +
+ MCHP_ESPI_FC_GIRQ_BIT + MCHP_ESPI_VW_EN_GIRQ_BIT);
espi_channels_ready = 0;
chipset_handle_espi_reset_assert();
@@ -1217,7 +1182,6 @@ static void espi_vw_en_isr(void)
}
DECLARE_IRQ(MCHP_IRQ_ESPI_VW_EN, espi_vw_en_isr, 2);
-
/*
* eSPI OOB TX and OOB channel enable change interrupt handler
*/
@@ -1246,7 +1210,6 @@ static void espi_oob_tx_isr(void)
}
DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_UP, espi_oob_tx_isr, 2);
-
/* eSPI OOB RX interrupt handler */
static void espi_oob_rx_isr(void)
{
@@ -1260,7 +1223,6 @@ static void espi_oob_rx_isr(void)
}
DECLARE_IRQ(MCHP_IRQ_ESPI_OOB_DN, espi_oob_rx_isr, 2);
-
/*
* eSPI Flash Channel enable change and data transfer
* interrupt handler
@@ -1291,7 +1253,6 @@ static void espi_fc_isr(void)
}
DECLARE_IRQ(MCHP_IRQ_ESPI_FC, espi_fc_isr, 2);
-
/* eSPI Peripheral Channel interrupt handler */
static void espi_pc_isr(void)
{
@@ -1317,7 +1278,6 @@ static void espi_pc_isr(void)
}
DECLARE_IRQ(MCHP_IRQ_ESPI_PC, espi_pc_isr, 2);
-
/************************************************************************/
/*
@@ -1328,25 +1288,21 @@ static void espi_reset_ictrl(int enable, int clr_status)
{
if (enable) {
if (clr_status) {
- MCHP_ESPI_IO_RESET_STATUS =
- MCHP_ESPI_RST_CHG_STS;
+ MCHP_ESPI_IO_RESET_STATUS = MCHP_ESPI_RST_CHG_STS;
MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) =
- MCHP_ESPI_RESET_GIRQ_BIT;
+ MCHP_ESPI_RESET_GIRQ_BIT;
}
MCHP_ESPI_IO_RESET_IEN |= MCHP_ESPI_RST_IEN;
- MCHP_INT_ENABLE(MCHP_ESPI_GIRQ) =
- MCHP_ESPI_RESET_GIRQ_BIT;
+ MCHP_INT_ENABLE(MCHP_ESPI_GIRQ) = MCHP_ESPI_RESET_GIRQ_BIT;
task_enable_irq(MCHP_IRQ_ESPI_RESET);
} else {
task_disable_irq(MCHP_IRQ_ESPI_RESET);
- MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) =
- MCHP_ESPI_RESET_GIRQ_BIT;
+ MCHP_INT_DISABLE(MCHP_ESPI_GIRQ) = MCHP_ESPI_RESET_GIRQ_BIT;
MCHP_ESPI_IO_RESET_IEN &= ~(MCHP_ESPI_RST_IEN);
if (clr_status) {
- MCHP_ESPI_IO_RESET_STATUS =
- MCHP_ESPI_RST_CHG_STS;
+ MCHP_ESPI_IO_RESET_STATUS = MCHP_ESPI_RST_CHG_STS;
MCHP_INT_SOURCE(MCHP_ESPI_GIRQ) =
- MCHP_ESPI_RESET_GIRQ_BIT;
+ MCHP_ESPI_RESET_GIRQ_BIT;
}
}
}
@@ -1379,15 +1335,15 @@ void espi_init(void)
gpio_config_module(MODULE_LPC, 1);
/* Set channel */
- MCHP_ESPI_IO_CAP0 = CONFIG_HOSTCMD_ESPI_EC_CHAN_BITMAP;
+ MCHP_ESPI_IO_CAP0 = CONFIG_HOST_INTERFACE_ESPI_EC_CHAN_BITMAP;
/* Set eSPI frequency & mode */
- MCHP_ESPI_IO_CAP1 = (MCHP_ESPI_IO_CAP1 &
- (~(MCHP_ESPI_CAP1_MAX_FREQ_MASK |
- MCHP_ESPI_CAP1_IO_MASK))) |
- CONFIG_HOSTCMD_ESPI_EC_MAX_FREQ |
- (CONFIG_HOSTCMD_ESPI_EC_MODE
- << MCHP_ESPI_CAP1_IO_BITPOS);
+ MCHP_ESPI_IO_CAP1 =
+ (MCHP_ESPI_IO_CAP1 &
+ (~(MCHP_ESPI_CAP1_MAX_FREQ_MASK | MCHP_ESPI_CAP1_IO_MASK))) |
+ CONFIG_HOST_INTERFACE_ESPI_EC_MAX_FREQ |
+ (CONFIG_HOST_INTERFACE_ESPI_EC_MODE
+ << MCHP_ESPI_CAP1_IO_BITPOS);
#ifdef CONFIG_HOST_INTERFACE_ESPI
MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_VW;
@@ -1395,8 +1351,7 @@ void espi_init(void)
MCHP_ESPI_IO_PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_PIN;
#endif
- MCHP_PCR_PWR_RST_CTL &=
- ~(1ul << MCHP_PCR_PWR_HOST_RST_SEL_BITPOS);
+ MCHP_PCR_PWR_RST_CTL &= ~(1ul << MCHP_PCR_PWR_HOST_RST_SEL_BITPOS);
MCHP_ESPI_ACTIVATE = 1;
@@ -1443,16 +1398,15 @@ void espi_init(void)
CPRINTS("eSPI - espi_init - done");
}
-
#ifdef CONFIG_MCHP_ESPI_EC_CMD
-static int command_espi(int argc, char **argv)
+static int command_espi(int argc, const char **argv)
{
uint32_t chan, w0, w1, w2;
char *e;
if (argc == 1) {
return EC_ERROR_INVAL;
- /* Get value of eSPI registers */
+ /* Get value of eSPI registers */
} else if (argc == 2) {
int i;
@@ -1470,8 +1424,8 @@ static int command_espi(int argc, char **argv)
w0 = MSVW(i, 0);
w1 = MSVW(i, 1);
w2 = MSVW(i, 2);
- ccprintf("MSVW%d: 0x%08x:%08x:%08x\n", i,
- w2, w1, w0);
+ ccprintf("MSVW%d: 0x%08x:%08x:%08x\n", i, w2,
+ w1, w0);
}
} else if (strcasecmp(argv[1], "vms") == 0) {
for (i = 0; i < SMVW_MAX; i++) {
@@ -1480,9 +1434,9 @@ static int command_espi(int argc, char **argv)
ccprintf("SMVW%d: 0x%08x:%08x\n", i, w1, w0);
}
}
- /* Enable/Disable the channels of eSPI */
+ /* Enable/Disable the channels of eSPI */
} else if (argc == 3) {
- uint32_t m = (uint32_t) strtoi(argv[2], &e, 0);
+ uint32_t m = (uint32_t)strtoi(argv[2], &e, 0);
if (*e)
return EC_ERROR_PARAM2;
@@ -1502,7 +1456,6 @@ static int command_espi(int argc, char **argv)
}
return EC_SUCCESS;
}
-DECLARE_CONSOLE_COMMAND(espi, command_espi,
- "cfg/vms/vsm/en/dis [channel]",
+DECLARE_CONSOLE_COMMAND(espi, command_espi, "cfg/vms/vsm/en/dis [channel]",
"eSPI configurations");
#endif