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Diffstat (limited to 'chip/mchp/gpio.c')
-rw-r--r--chip/mchp/gpio.c69
1 files changed, 31 insertions, 38 deletions
diff --git a/chip/mchp/gpio.c b/chip/mchp/gpio.c
index 5794229b34..a3cab86fcc 100644
--- a/chip/mchp/gpio.c
+++ b/chip/mchp/gpio.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -18,8 +18,7 @@
/* Console output macros */
#define CPUTS(outstr) cputs(CC_LPC, outstr)
-#define CPRINTS(format, args...) cprints(CC_LPC, format, ## args)
-
+#define CPRINTS(format, args...) cprints(CC_LPC, format, ##args)
struct gpio_int_mapping {
int8_t girq_id;
@@ -38,10 +37,9 @@ struct gpio_int_mapping {
* 4 0200 - 0235 12
* 5 0240 - 0276 26
*/
-static const struct gpio_int_mapping int_map[] = {
- { 11, 0 }, { 10, 1 }, { 9, 2 },
- { 8, 3 }, { 12, 4 }, { 26, 5 }
-};
+static const struct gpio_int_mapping int_map[] = { { 11, 0 }, { 10, 1 },
+ { 9, 2 }, { 8, 3 },
+ { 12, 4 }, { 26, 5 } };
BUILD_ASSERT(ARRAY_SIZE(int_map) == MCHP_GPIO_MAX_PORT);
/*
@@ -98,7 +96,7 @@ static void disable_bgpo(uint32_t port, uint32_t mask)
* 1-bit of val or if val == 0 returns 0
*/
void gpio_set_alternate_function(uint32_t port, uint32_t mask,
- enum gpio_alternate_func func)
+ enum gpio_alternate_func func)
{
int i;
uint32_t val;
@@ -171,16 +169,16 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
#ifdef CONFIG_GPIO_POWER_DOWN
if (flags & GPIO_POWER_DOWN) {
- val = (MCHP_GPIO_CTRL_PWR_OFF
- | MCHP_GPIO_INTDET_DISABLED
- | MCHP_GPIO_CTRL_DIS_INPUT_BIT);
+ val = (MCHP_GPIO_CTRL_PWR_OFF |
+ MCHP_GPIO_INTDET_DISABLED |
+ MCHP_GPIO_CTRL_DIS_INPUT_BIT);
MCHP_GPIO_CTL(port, i) = val;
continue;
}
#endif
- val &= ~(MCHP_GPIO_CTRL_PWR_MASK
- | MCHP_GPIO_CTRL_DIS_INPUT_BIT);
+ val &= ~(MCHP_GPIO_CTRL_PWR_MASK |
+ MCHP_GPIO_CTRL_DIS_INPUT_BIT);
val |= MCHP_GPIO_CTRL_PWR_VTR;
/*
@@ -253,9 +251,9 @@ void gpio_power_off_by_mask(uint32_t port, uint32_t mask)
while (mask) {
i = GPIO_MASK_TO_NUM(mask);
mask &= ~BIT(i);
- MCHP_GPIO_CTL(port, i) = (MCHP_GPIO_CTRL_PWR_OFF
- | MCHP_GPIO_INTDET_DISABLED
- | MCHP_GPIO_CTRL_DIS_INPUT_BIT);
+ MCHP_GPIO_CTL(port, i) =
+ (MCHP_GPIO_CTRL_PWR_OFF | MCHP_GPIO_INTDET_DISABLED |
+ MCHP_GPIO_CTRL_DIS_INPUT_BIT);
}
}
@@ -268,9 +266,9 @@ int gpio_power_off(enum gpio_signal signal)
i = GPIO_MASK_TO_NUM(gpio_list[signal].mask);
port = gpio_list[signal].port;
- MCHP_GPIO_CTL(port, i) = (MCHP_GPIO_CTRL_PWR_OFF
- | MCHP_GPIO_INTDET_DISABLED
- | MCHP_GPIO_CTRL_DIS_INPUT_BIT);
+ MCHP_GPIO_CTL(port, i) =
+ (MCHP_GPIO_CTRL_PWR_OFF | MCHP_GPIO_INTDET_DISABLED |
+ MCHP_GPIO_CTRL_DIS_INPUT_BIT);
return EC_SUCCESS;
}
@@ -313,7 +311,6 @@ int gpio_disable_interrupt(enum gpio_signal signal)
port = gpio_list[signal].port;
girq_id = int_map[port].girq_id;
-
MCHP_INT_DISABLE(girq_id) = BIT(i);
return EC_SUCCESS;
@@ -369,7 +366,6 @@ void gpio_pre_init(void)
int is_warm = system_is_reboot_warm();
const struct gpio_info *g = gpio_list;
-
for (i = 0; i < GPIO_COUNT; i++, g++) {
flags = g->flags;
@@ -389,7 +385,7 @@ void gpio_pre_init(void)
/* Use as GPIO, not alternate function */
gpio_set_alternate_function(g->port, g->mask,
- GPIO_ALT_FUNC_NONE);
+ GPIO_ALT_FUNC_NONE);
}
}
@@ -405,14 +401,13 @@ void gpio_pre_init(void)
* assumption for the GPIO's that have been enabled.
* 2. Clear NVIC pending to prevent ISR firing on false edge.
*/
-#define ENABLE_GPIO_GIRQ(x) \
- do { \
- MCHP_INT_SOURCE(x) = 0xfffffffful; \
- task_clear_pending_irq(MCHP_IRQ_GIRQ ## x); \
- task_enable_irq(MCHP_IRQ_GIRQ ## x); \
+#define ENABLE_GPIO_GIRQ(x) \
+ do { \
+ MCHP_INT_SOURCE(x) = 0xfffffffful; \
+ task_clear_pending_irq(MCHP_IRQ_GIRQ##x); \
+ task_enable_irq(MCHP_IRQ_GIRQ##x); \
} while (0)
-
static void gpio_init(void)
{
ENABLE_GPIO_GIRQ(8);
@@ -427,7 +422,6 @@ DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT);
/************************************************************************/
/* Interrupt handlers */
-
/**
* Handler for each GIRQ interrupt. This reads and clears the interrupt
* bits for the GIRQ interrupt, then finds and calls the corresponding
@@ -448,8 +442,8 @@ static void gpio_interrupt(int girq, int port)
MCHP_INT_SOURCE(girq) = sts;
trace12(0, GPIO, 0, "GPIO GIRQ %d result = 0x%08x", girq, sts);
- trace12(0, GPIO, 0, "GPIO ParIn[%d] = 0x%08x",
- port, MCHP_GPIO_PARIN(port));
+ trace12(0, GPIO, 0, "GPIO ParIn[%d] = 0x%08x", port,
+ MCHP_GPIO_PARIN(port));
for (i = 0; (i < GPIO_IH_COUNT) && sts; ++i, ++g) {
if (g->port != port)
@@ -459,9 +453,8 @@ static void gpio_interrupt(int girq, int port)
if (bit) {
bit--;
if (sts & BIT(bit)) {
- trace12(0, GPIO, 0,
- "Bit[%d]: handler @ 0x%08x", bit,
- (uint32_t)gpio_irq_handlers[i]);
+ trace12(0, GPIO, 0, "Bit[%d]: handler @ 0x%08x",
+ bit, (uint32_t)gpio_irq_handlers[i]);
gpio_irq_handlers[i](i);
}
sts &= ~BIT(bit);
@@ -469,10 +462,10 @@ static void gpio_interrupt(int girq, int port)
}
}
-#define GPIO_IRQ_FUNC(irqfunc, girq, port)\
- static void irqfunc(void) \
- { \
- gpio_interrupt(girq, port);\
+#define GPIO_IRQ_FUNC(irqfunc, girq, port) \
+ static void irqfunc(void) \
+ { \
+ gpio_interrupt(girq, port); \
}
GPIO_IRQ_FUNC(__girq_8_interrupt, 8, 3);