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Diffstat (limited to 'chip/mt_scp/mt818x/uart.c')
-rw-r--r--chip/mt_scp/mt818x/uart.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/chip/mt_scp/mt818x/uart.c b/chip/mt_scp/mt818x/uart.c
index 109f8b595b..6bcfa89d9b 100644
--- a/chip/mt_scp/mt818x/uart.c
+++ b/chip/mt_scp/mt818x/uart.c
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -16,7 +16,7 @@
#include "util.h"
/* Console UART index */
-#define UARTN CONFIG_UART_CONSOLE
+#define UARTN CONFIG_UART_CONSOLE
#define UART_IDLE_WAIT_US 500
static uint8_t uart_done, tx_started;
@@ -155,9 +155,8 @@ void uart_init(void)
#endif
/* Init and clear FIFO */
- UART_FCR(UARTN) = UART_FCR_ENABLE_FIFO
- | UART_FCR_CLEAR_RCVR
- | UART_FCR_CLEAR_XMIT;
+ UART_FCR(UARTN) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
+ UART_FCR_CLEAR_XMIT;
/* Line control: parity none, 8 bit, 1 stop bit */
UART_LCR(UARTN) = UART_LCR_WLEN8;
/* For baud rate <= 115200 */
@@ -175,6 +174,5 @@ void uart_init(void)
/* UART RX IRQ needs an extra enable */
SCP_INTC_UART_RX_IRQ |= 1 << UARTN;
#endif
- gpio_config_module(MODULE_UART, 1);
uart_done = 1;
}