diff options
Diffstat (limited to 'chip/mt_scp/rv32i_common/cache.h')
-rw-r--r-- | chip/mt_scp/rv32i_common/cache.h | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/chip/mt_scp/rv32i_common/cache.h b/chip/mt_scp/rv32i_common/cache.h index 13e5ad1a42..15572962ac 100644 --- a/chip/mt_scp/rv32i_common/cache.h +++ b/chip/mt_scp/rv32i_common/cache.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -14,23 +14,23 @@ /* rs1 0~31 register X0~X31 */ #define COP(rs1) (((rs1) << 15) | 0x400f) -#define COP_OP_BARRIER_ICACHE 0x0 -#define COP_OP_INVALIDATE_ICACHE 0x8 -#define COP_OP_INVALIDATE_ICACHE_ADDR 0x9 +#define COP_OP_BARRIER_ICACHE 0x0 +#define COP_OP_INVALIDATE_ICACHE 0x8 +#define COP_OP_INVALIDATE_ICACHE_ADDR 0x9 -#define COP_OP_BARRIER_DCACHE 0x10 -#define COP_OP_WRITEBACK_DCACHE 0x14 -#define COP_OP_WRITEBACK_DCACHE_ADDR 0x15 -#define COP_OP_INVALIDATE_DCACHE 0x18 -#define COP_OP_INVALIDATE_DCACHE_ADDR 0x19 +#define COP_OP_BARRIER_DCACHE 0x10 +#define COP_OP_WRITEBACK_DCACHE 0x14 +#define COP_OP_WRITEBACK_DCACHE_ADDR 0x15 +#define COP_OP_INVALIDATE_DCACHE 0x18 +#define COP_OP_INVALIDATE_DCACHE_ADDR 0x19 /* FLUSH = WRITEBACK + INVALIDATE */ -#define COP_OP_FLUSH_DCACHE 0x1C -#define COP_OP_FLUSH_DCACHE_ADDR 0x1D +#define COP_OP_FLUSH_DCACHE 0x1C +#define COP_OP_FLUSH_DCACHE_ADDR 0x1D static inline void cache_op_all(uint32_t op) { register int t0 asm("t0") = op; - asm volatile (".word "STRINGIFY(COP(5)) :: "r"(t0)); + asm volatile(".word " STRINGIFY(COP(5))::"r"(t0)); } static inline int cache_op_addr(uintptr_t addr, uint32_t length, uint32_t op) @@ -44,7 +44,7 @@ static inline int cache_op_addr(uintptr_t addr, uint32_t length, uint32_t op) for (offset = 0; offset < length; offset += 4) { t0 = addr + offset + op; - asm volatile (".word "STRINGIFY(COP(5)) :: "r"(t0)); + asm volatile(".word " STRINGIFY(COP(5))::"r"(t0)); } return EC_SUCCESS; @@ -132,9 +132,9 @@ struct mpu_entry { void cache_init(void); #ifdef DEBUG -int command_enable_pmu(int argc, char **argv); -int command_disable_pmu(int argc, char **argv); -int command_show_pmu(int argc, char **argv); +int command_enable_pmu(int argc, const char **argv); +int command_disable_pmu(int argc, const char **argv); +int command_show_pmu(int argc, const char **argv); #endif #endif /* #ifndef __CROS_EC_CACHE_H */ |