diff options
Diffstat (limited to 'chip/mt_scp/rv32i_common/uart.c')
| -rw-r--r-- | chip/mt_scp/rv32i_common/uart.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/chip/mt_scp/rv32i_common/uart.c b/chip/mt_scp/rv32i_common/uart.c index 35b4003c9f..a67a0bb276 100644 --- a/chip/mt_scp/rv32i_common/uart.c +++ b/chip/mt_scp/rv32i_common/uart.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -31,9 +31,8 @@ void uart_init(void) uart_init_pinmux(); /* Clear FIFO */ - UART_FCR(UARTN) = UART_FCR_ENABLE_FIFO - | UART_FCR_CLEAR_RCVR - | UART_FCR_CLEAR_XMIT; + UART_FCR(UARTN) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | + UART_FCR_CLEAR_XMIT; /* Line control: parity none, 8 bit, 1 stop bit */ UART_LCR(UARTN) = UART_LCR_WLEN8; /* For baud rate <= 115200 */ @@ -137,7 +136,7 @@ static void uart_irq_handler(void) case UART_RX_IRQ(UARTN): uart_process(); SCP_CORE0_INTC_UART_RX_IRQ(UARTN) = BIT(0); - asm volatile ("fence.i" ::: "memory"); + asm volatile("fence.i" ::: "memory"); task_clear_pending_irq(ec_int); break; } |