diff options
Diffstat (limited to 'chip/npcx/gpio_chip.h')
| -rw-r--r-- | chip/npcx/gpio_chip.h | 51 |
1 files changed, 27 insertions, 24 deletions
diff --git a/chip/npcx/gpio_chip.h b/chip/npcx/gpio_chip.h index 2d0b2b4e9b..5f60cdfb40 100644 --- a/chip/npcx/gpio_chip.h +++ b/chip/npcx/gpio_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -9,37 +9,40 @@ struct npcx_wui { uint8_t table : 2; uint8_t group : 3; - uint8_t bit : 3; + uint8_t bit : 3; }; /* Macros to initialize the MIWU mapping table. */ #define NPCX_WUI_GPIO_PIN(port, index) NPCX_WUI_GPIO_##port##_##index -#define WUI(tbl, grp, idx) ((struct npcx_wui) { .table = tbl, .group = grp, \ - .bit = idx }) -#define WUI_INT(tbl, grp) WUI(tbl, grp, 0) -#define WUI_NONE ((struct npcx_wui) { .table = MIWU_TABLE_COUNT, .group = 0, \ - .bit = 0 }) +#define WUI(tbl, grp, idx) \ + ((struct npcx_wui){ .table = tbl, .group = grp, .bit = idx }) +#define WUI_INT(tbl, grp) WUI(tbl, grp, 0) +#define WUI_NONE \ + ((struct npcx_wui){ .table = MIWU_TABLE_COUNT, .group = 0, .bit = 0 }) /* Macros to initialize the alternative and low voltage mapping table. */ -#define NPCX_GPIO_NONE ((struct npcx_gpio) {.port = 0, .bit = 0, .valid = 0}) -#define NPCX_GPIO(grp, pin) ((struct npcx_gpio) {.port = GPIO_PORT_##grp, \ - .bit = pin, .valid = 1}) +#define NPCX_GPIO_NONE ((struct npcx_gpio){ .port = 0, .bit = 0, .valid = 0 }) +#define NPCX_GPIO(grp, pin) \ + ((struct npcx_gpio){ .port = GPIO_PORT_##grp, .bit = pin, .valid = 1 }) -#define NPCX_ALT(grp, pin) ((struct npcx_alt) {.group = ALT_GROUP_##grp, \ - .bit = NPCX_DEVALT##grp##_##pin, .inverted = 0 }) -#define NPCX_ALT_INV(grp, pin) ((struct npcx_alt) {.group = ALT_GROUP_##grp, \ - .bit = NPCX_DEVALT##grp##_##pin, .inverted = 1 }) -#define ALT(port, index, _alt) { .gpio = NPCX_GPIO(port, index), \ - .alt = (_alt) }, +#define NPCX_ALT(grp, pin) \ + ((struct npcx_alt){ .group = ALT_GROUP_##grp, \ + .bit = NPCX_DEVALT##grp##_##pin, \ + .inverted = 0 }) +#define NPCX_ALT_INV(grp, pin) \ + ((struct npcx_alt){ .group = ALT_GROUP_##grp, \ + .bit = NPCX_DEVALT##grp##_##pin, \ + .inverted = 1 }) +#define ALT(port, index, _alt) \ + { .gpio = NPCX_GPIO(port, index), .alt = (_alt) }, -#define NPCX_LVOL_CTRL_ITEMS(ctrl) { NPCX_LVOL_CTRL_##ctrl##_0, \ - NPCX_LVOL_CTRL_##ctrl##_1, \ - NPCX_LVOL_CTRL_##ctrl##_2, \ - NPCX_LVOL_CTRL_##ctrl##_3, \ - NPCX_LVOL_CTRL_##ctrl##_4, \ - NPCX_LVOL_CTRL_##ctrl##_5, \ - NPCX_LVOL_CTRL_##ctrl##_6, \ - NPCX_LVOL_CTRL_##ctrl##_7, } +#define NPCX_LVOL_CTRL_ITEMS(ctrl) \ + { \ + NPCX_LVOL_CTRL_##ctrl##_0, NPCX_LVOL_CTRL_##ctrl##_1, \ + NPCX_LVOL_CTRL_##ctrl##_2, NPCX_LVOL_CTRL_##ctrl##_3, \ + NPCX_LVOL_CTRL_##ctrl##_4, NPCX_LVOL_CTRL_##ctrl##_5, \ + NPCX_LVOL_CTRL_##ctrl##_6, NPCX_LVOL_CTRL_##ctrl##_7, \ + } /** * Switch NPCX UART pins back to normal GPIOs. |