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Diffstat (limited to 'chip/stm32/config-stm32f76x.h')
-rw-r--r--chip/stm32/config-stm32f76x.h40
1 files changed, 20 insertions, 20 deletions
diff --git a/chip/stm32/config-stm32f76x.h b/chip/stm32/config-stm32f76x.h
index aa7f7ac5c0..e7380118f0 100644
--- a/chip/stm32/config-stm32f76x.h
+++ b/chip/stm32/config-stm32f76x.h
@@ -1,10 +1,10 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Memory mapping */
-#define CONFIG_FLASH_SIZE_BYTES (2048 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES (2048 * 1024)
/* 3 regions type: 32K, 128K and 256K */
#define SIZE_32KB (32 * 1024)
@@ -29,35 +29,35 @@
/* DTCM-RAM: 128kB 0x20000000 - 0x2001FFFF*/
/* SRAM1: 368kB 0x20020000 - 0x2007BFFF */
/* SRAM2: 16kB 0x2007C000 - 0x2007FFFF */
-#define CONFIG_RAM_BASE 0x20000000
-#define CONFIG_RAM_SIZE 0x00080000
+#define CONFIG_RAM_BASE 0x20000000
+#define CONFIG_RAM_SIZE 0x00080000
-#define CONFIG_RO_MEM_OFF 0
-#define CONFIG_RO_SIZE (1024 * 1024)
-#define CONFIG_RW_MEM_OFF (1024 * 1024)
-#define CONFIG_RW_SIZE (1024 * 1024)
+#define CONFIG_RO_MEM_OFF 0
+#define CONFIG_RO_SIZE (1024 * 1024)
+#define CONFIG_RW_MEM_OFF (1024 * 1024)
+#define CONFIG_RW_SIZE (1024 * 1024)
-#define CONFIG_RO_STORAGE_OFF 0
-#define CONFIG_RW_STORAGE_OFF 0
+#define CONFIG_RO_STORAGE_OFF 0
+#define CONFIG_RW_STORAGE_OFF 0
-#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
-#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
-#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
-#define CONFIG_EC_WRITABLE_STORAGE_SIZE \
- (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
+#define CONFIG_EC_PROTECTED_STORAGE_OFF 0
+#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
+#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE \
+ (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
-#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
-#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
+#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF
+#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE
#undef I2C_PORT_COUNT
-#define I2C_PORT_COUNT 4
+#define I2C_PORT_COUNT 4
/* Use PSTATE embedded in the RO image, not in its own erase block */
#define CONFIG_FLASH_PSTATE
#undef CONFIG_FLASH_PSTATE_BANK
/* Number of IRQ vectors on the NVIC */
-#define CONFIG_IRQ_COUNT 109
+#define CONFIG_IRQ_COUNT 109
/* DFU Address */
-#define STM32_DFU_BASE 0x1ff00000
+#define STM32_DFU_BASE 0x1ff00000