diff options
Diffstat (limited to 'chip/stm32/config-stm32g473xc.h')
| -rw-r--r-- | chip/stm32/config-stm32g473xc.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/chip/stm32/config-stm32g473xc.h b/chip/stm32/config-stm32g473xc.h index 0317b69491..63f4c73ea0 100644 --- a/chip/stm32/config-stm32g473xc.h +++ b/chip/stm32/config-stm32g473xc.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -42,11 +42,11 @@ * • 32 Kbytes mapped at address 0x1000 0000 (CCM SRAM). It is also aliased * at 0x2001 8000 address to be accessed by all bus controllers. */ -#define CONFIG_RAM_BASE 0x20000000 -#define CONFIG_RAM_SIZE 0x00020000 +#define CONFIG_RAM_BASE 0x20000000 +#define CONFIG_RAM_SIZE 0x00020000 #undef I2C_PORT_COUNT -#define I2C_PORT_COUNT 4 +#define I2C_PORT_COUNT 4 /* Number of DMA channels supported (6 channels each for DMA1 and DMA2) */ #define DMAC_COUNT 12 @@ -56,13 +56,13 @@ #undef CONFIG_FLASH_PSTATE_BANK /* Number of IRQ vectors on the NVIC */ -#define CONFIG_IRQ_COUNT 101 +#define CONFIG_IRQ_COUNT 101 /* USB packet ram config */ -#define CONFIG_USB_RAM_BASE 0x40006000 -#define CONFIG_USB_RAM_SIZE 1024 +#define CONFIG_USB_RAM_BASE 0x40006000 +#define CONFIG_USB_RAM_SIZE 1024 #define CONFIG_USB_RAM_ACCESS_TYPE uint16_t #define CONFIG_USB_RAM_ACCESS_SIZE 2 /* DFU Address */ -#define STM32_DFU_BASE 0x1fff0000 +#define STM32_DFU_BASE 0x1fff0000 |