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Diffstat (limited to 'chip/stm32/otp-stm32f4.c')
-rw-r--r--chip/stm32/otp-stm32f4.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/chip/stm32/otp-stm32f4.c b/chip/stm32/otp-stm32f4.c
index 45ce38d159..ff6280ed20 100644
--- a/chip/stm32/otp-stm32f4.c
+++ b/chip/stm32/otp-stm32f4.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -18,8 +18,7 @@
#ifdef CONFIG_SERIALNO_LEN
/* Which block to use */
#define OTP_SERIAL_BLOCK 0
-#define OTP_SERIAL_ADDR \
- REG32_ADDR(STM32_OTP_BLOCK_DATA(OTP_SERIAL_BLOCK, 0))
+#define OTP_SERIAL_ADDR REG32_ADDR(STM32_OTP_BLOCK_DATA(OTP_SERIAL_BLOCK, 0))
/* Number of word used in the block */
#define OTP_SERIAL_BLOCK_SIZE (CONFIG_SERIALNO_LEN / sizeof(uint32_t))
@@ -40,7 +39,7 @@ static int otp_write(uint8_t block, int size, const char *data)
if (size >= STM32_OTP_BLOCK_SIZE)
return EC_ERROR_PARAM2;
return crec_flash_physical_write(STM32_OTP_BLOCK_DATA(block, 0) -
- CONFIG_PROGRAM_MEMORY_BASE,
+ CONFIG_PROGRAM_MEMORY_BASE,
size * sizeof(uint32_t), data);
}
@@ -74,7 +73,7 @@ static int otp_set_protect(uint8_t block)
lock = REG32(STM32_OTP_LOCK(block));
lock &= ~STM32_OPT_LOCK_MASK(block);
rv = crec_flash_physical_write(STM32_OTP_LOCK(block) -
- CONFIG_PROGRAM_MEMORY_BASE,
+ CONFIG_PROGRAM_MEMORY_BASE,
sizeof(uint32_t), (char *)&lock);
if (rv)
return rv;