diff options
Diffstat (limited to 'chip/stm32')
54 files changed, 577 insertions, 96 deletions
diff --git a/chip/stm32/adc-stm32l.c b/chip/stm32/adc-stm32l.c index 06b16224f7..636710f071 100644 --- a/chip/stm32/adc-stm32l.c +++ b/chip/stm32/adc-stm32l.c @@ -4,9 +4,9 @@ */ #include "adc.h" -#include "clock.h" #include "common.h" #include "console.h" +#include "clock.h" #include "dma.h" #include "hooks.h" #include "registers.h" diff --git a/chip/stm32/bkpdata.c b/chip/stm32/bkpdata.c index ef5729d118..bde026facd 100644 --- a/chip/stm32/bkpdata.c +++ b/chip/stm32/bkpdata.c @@ -3,13 +3,13 @@ * found in the LICENSE file. */ +#include <assert.h> + #include "bkpdata.h" #include "registers.h" #include "system.h" /* enum system_bbram_idx */ #include "task.h" -#include <assert.h> - uint16_t bkpdata_read(enum bkpdata_index index) { if (index < 0 || index >= STM32_BKP_ENTRIES) diff --git a/chip/stm32/build.mk b/chip/stm32/build.mk index 72984eec5f..1fc14a15fa 100644 --- a/chip/stm32/build.mk +++ b/chip/stm32/build.mk @@ -33,6 +33,8 @@ CORE:=cortex-m CFLAGS_CPU+=-mcpu=cortex-m3 endif +# Select between 16-bit and 32-bit timer for clock source +TIMER_TYPE=$(if $(CONFIG_STM_HWTIMER32),32,) DMA_TYPE=$(if $(CHIP_FAMILY_STM32F4)$(CHIP_FAMILY_STM32H7),-stm32f4,) SPI_TYPE=$(if $(CHIP_FAMILY_STM32H7),-stm32h7,) @@ -46,7 +48,7 @@ chip-$(CONFIG_FPU)+=fpu.o chip-$(CONFIG_SPI)+=spi.o chip-$(CONFIG_SPI_CONTROLLER)+=spi_controller$(SPI_TYPE).o chip-$(CONFIG_COMMON_GPIO)+=gpio.o gpio-$(CHIP_FAMILY).o -chip-$(CONFIG_COMMON_TIMER)+=hwtimer32.o +chip-$(CONFIG_COMMON_TIMER)+=hwtimer$(TIMER_TYPE).o chip-$(CONFIG_I2C)+=i2c-$(CHIP_FAMILY).o chip-$(CONFIG_ITE_FLASH_SUPPORT)+=i2c_ite_flash_support.o chip-$(CONFIG_STREAM_USART)+=usart.o usart-$(CHIP_FAMILY).o diff --git a/chip/stm32/clock-f.c b/chip/stm32/clock-f.c index 0aad58ab00..d181397d86 100644 --- a/chip/stm32/clock-f.c +++ b/chip/stm32/clock-f.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c index 18c089b036..3b56382fdb 100644 --- a/chip/stm32/clock-stm32f0.c +++ b/chip/stm32/clock-stm32f0.c @@ -6,8 +6,8 @@ /* Clocks and power management settings */ #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f3.c b/chip/stm32/clock-stm32f3.c index 5b17fe56eb..7d2b3de7f2 100644 --- a/chip/stm32/clock-stm32f3.c +++ b/chip/stm32/clock-stm32f3.c @@ -6,8 +6,8 @@ /* Clocks and power management settings */ #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32f4.c b/chip/stm32/clock-stm32f4.c index 15cf8a45e2..479faac7da 100644 --- a/chip/stm32/clock-stm32f4.c +++ b/chip/stm32/clock-stm32f4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32g4.c b/chip/stm32/clock-stm32g4.c index 962fdc37f2..dbb8fd88cb 100644 --- a/chip/stm32/clock-stm32g4.c +++ b/chip/stm32/clock-stm32g4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c index 3e6ba679cb..67e17f4174 100644 --- a/chip/stm32/clock-stm32h7.c +++ b/chip/stm32/clock-stm32h7.c @@ -13,6 +13,8 @@ * but at least yields predictable behavior. */ +#include <stdbool.h> + #include "builtin/assert.h" #include "chipset.h" #include "clock.h" @@ -27,8 +29,6 @@ #include "uart.h" #include "util.h" -#include <stdbool.h> - /* Check chip family and variant for compatibility */ #ifndef CHIP_FAMILY_STM32H7 #error Source clock-stm32h7.c does not support this chip family. diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c index 412771163c..77e807c1ad 100644 --- a/chip/stm32/clock-stm32l4.c +++ b/chip/stm32/clock-stm32l4.c @@ -7,8 +7,8 @@ #include "builtin/assert.h" #include "chipset.h" -#include "clock-l4.h" #include "clock.h" +#include "clock-l4.h" #include "common.h" #include "console.h" #include "cpu.h" diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h index d35b3ccbcf..ae069ed005 100644 --- a/chip/stm32/config-stm32l15x.h +++ b/chip/stm32/config-stm32l15x.h @@ -24,19 +24,8 @@ #define CONFIG_RAM_BASE 0x20000000 #define CONFIG_RAM_SIZE 0x00004000 -/* Number of IRQ vectors on the NVIC - * - * Section 10.1 "Nested vectored interrupt controller (NVIC)" states: - * 45 maskable interrupt channels in Cat.1 and Cat.2 devices (see Table 49) - * 54 maskable interrupt channels in Cat.3 devices (see Table 50) and 57 - * channels in Cat.4, Cat.5 and Cat.6 devices (see Table 51). - * - * The only STM32L15 that we support is the "discovery" board is a "Category - * 3" device. See Section 1.5 "Product Category definition". - * - * https://www.st.com/resource/en/reference_manual/cd00240193-stm32l100xx-stm32l151xx-stm32l152xx-and-stm32l162xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf - */ -#define CONFIG_IRQ_COUNT 54 +/* Number of IRQ vectors on the NVIC */ +#define CONFIG_IRQ_COUNT 45 /* Lots of RAM, so use bigger UART buffer */ #undef CONFIG_UART_TX_BUF_SIZE diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c index 2673201472..9bfdb1b6b7 100644 --- a/chip/stm32/flash-f.c +++ b/chip/stm32/flash-f.c @@ -5,23 +5,22 @@ /* Common flash memory module for STM32F and STM32F0 */ +#include <stdbool.h> #include "battery.h" #include "builtin/assert.h" -#include "clock.h" #include "console.h" -#include "flash-f.h" +#include "clock.h" #include "flash.h" +#include "flash-f.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" #include "util.h" #include "watchdog.h" -#include <stdbool.h> - #define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ##args) #define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args) diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c index c41f9c526d..8705e4d657 100644 --- a/chip/stm32/flash-stm32f3.c +++ b/chip/stm32/flash-stm32f3.c @@ -5,16 +5,15 @@ /* Flash memory module for stm32f3 and stm32f4 */ +#include <stdbool.h> #include "common.h" +#include "flash.h" #include "flash-f.h" #include "flash-regs.h" -#include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" #include "system.h" - -#include <stdbool.h> +#include "panic.h" /*****************************************************************************/ /* Physical layer APIs */ diff --git a/chip/stm32/flash-stm32f4.c b/chip/stm32/flash-stm32f4.c index c41f9c526d..8705e4d657 100644 --- a/chip/stm32/flash-stm32f4.c +++ b/chip/stm32/flash-stm32f4.c @@ -5,16 +5,15 @@ /* Flash memory module for stm32f3 and stm32f4 */ +#include <stdbool.h> #include "common.h" +#include "flash.h" #include "flash-f.h" #include "flash-regs.h" -#include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" #include "system.h" - -#include <stdbool.h> +#include "panic.h" /*****************************************************************************/ /* Physical layer APIs */ diff --git a/chip/stm32/flash-stm32g4-l4.c b/chip/stm32/flash-stm32g4-l4.c index ad08047c23..31dba5c887 100644 --- a/chip/stm32/flash-stm32g4-l4.c +++ b/chip/stm32/flash-stm32g4-l4.c @@ -4,12 +4,12 @@ */ /* Flash memory module for STM32L4 family */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "flash.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c index 2b9b594938..445b354e57 100644 --- a/chip/stm32/flash-stm32h7.c +++ b/chip/stm32/flash-stm32h7.c @@ -4,14 +4,14 @@ */ /* Flash memory module for STM32H7 family */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "cpu.h" -#include "flash-regs.h" #include "flash.h" +#include "flash-regs.h" #include "hooks.h" -#include "panic.h" #include "registers.h" +#include "panic.h" #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c new file mode 100644 index 0000000000..3521347f3f --- /dev/null +++ b/chip/stm32/hwtimer.c @@ -0,0 +1,481 @@ +/* Copyright 2012 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Hardware timers driver */ + +#include "builtin/assert.h" +#include "clock.h" +#include "clock-f.h" +#include "common.h" +#include "hooks.h" +#include "hwtimer.h" +#include "panic.h" +#include "registers.h" +#include "task.h" +#include "timer.h" +#include "watchdog.h" + +/* + * Trigger select mapping for secondary timer from primary timer. This is + * unfortunately not very straightforward; there's no tidy way to do this + * algorithmically. To avoid burning memory for a lookup table, use macros to + * compute the offset. This also has the benefit that compilation will fail if + * an unsupported primary/secondary pairing is used. + */ +#ifdef CHIP_FAMILY_STM32F0 +/* + * Secondary Primary + * 1 15 2 3 17 + * 2 1 15 3 14 + * 3 1 2 15 14 + * 15 2 3 16 17 + * -------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_15 0 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_17 3 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_1 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_15 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_1 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_15 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_16 2 +#define STM32_TIM_TS_SECONDARY_15_PRIMARY_17 3 +#elif defined(CHIP_FAMILY_STM32F3) +/* + * Secondary Primary + * 2 19 15 3 14 + * 3 19 2 5 14 + * 4 19 2 3 15 + * 5 2 3 4 15 + * 12 4 5 13 14 + * 19 2 3 15 16 + * --------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_15 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_5 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_19 0 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_15 3 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_4 2 +#define STM32_TIM_TS_SECONDARY_5_PRIMARY_15 3 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_4 0 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_5 1 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_13 2 +#define STM32_TIM_TS_SECONDARY_12_PRIMARY_14 3 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_15 2 +#define STM32_TIM_TS_SECONDARY_19_PRIMARY_16 3 +#else /* !CHIP_FAMILY_STM32F0 && !CHIP_FAMILY_STM32F3 */ +/* + * Secondary Primary + * 1 15 2 3 4 (STM32F100 only) + * 2 9 10 3 4 + * 3 9 2 11 4 + * 4 10 2 3 9 + * 9 2 3 10 11 (STM32L15x only) + * -------------------- + * ts = 0 1 2 3 + */ +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_15 0 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_1_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_9 0 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_10 1 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_2_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_9 0 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_11 2 +#define STM32_TIM_TS_SECONDARY_3_PRIMARY_4 3 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_10 0 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_2 1 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_3 2 +#define STM32_TIM_TS_SECONDARY_4_PRIMARY_9 3 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_2 0 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_3 1 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_10 2 +#define STM32_TIM_TS_SECONDARY_9_PRIMARY_11 3 +#endif /* !CHIP_FAMILY_STM32F0 */ +#define TSMAP(secondary, primary) \ + CONCAT4(STM32_TIM_TS_SECONDARY_, secondary, _PRIMARY_, primary) + +/* + * Timers are defined per board. This gives us flexibility to work around + * timers which are dedicated to board-specific PWM sources. + */ +#define IRQ_MSB IRQ_TIM(TIM_CLOCK_MSB) +#define IRQ_LSB IRQ_TIM(TIM_CLOCK_LSB) +#define IRQ_WD IRQ_TIM(TIM_WATCHDOG) + +/* TIM1 has fancy names for its IRQs; remap count-up IRQ for the macro above */ +#if defined TIM_WATCHDOG && (TIM_WATCHDOG == 1) +#define STM32_IRQ_TIM1 STM32_IRQ_TIM1_BRK_UP_TRG +#else /* !(TIM_WATCHDOG == 1) */ +#define STM32_IRQ_TIM1 STM32_IRQ_TIM1_CC +#endif /* !(TIM_WATCHDOG == 1) */ + +#define TIM_BASE(n) CONCAT3(STM32_TIM, n, _BASE) +#define TIM_WD_BASE TIM_BASE(TIM_WATCHDOG) + +static uint32_t last_deadline; + +void __hw_clock_event_set(uint32_t deadline) +{ + last_deadline = deadline; + + if ((deadline >> 16) > STM32_TIM_CNT(TIM_CLOCK_MSB)) { + /* first set a match on the MSB */ + STM32_TIM_CCR1(TIM_CLOCK_MSB) = deadline >> 16; + /* disable LSB match */ + STM32_TIM_DIER(TIM_CLOCK_LSB) &= ~2; + /* Clear the match flags */ + STM32_TIM_SR(TIM_CLOCK_MSB) = ~2; + STM32_TIM_SR(TIM_CLOCK_LSB) = ~2; + /* Set the match interrupt */ + STM32_TIM_DIER(TIM_CLOCK_MSB) |= 2; + } + /* + * In the unlikely case where the MSB has increased and matched + * the deadline MSB before we set the match interrupt, as the STM + * hardware timer won't trigger an interrupt, we fall back to the + * following LSB event code to set another interrupt. + */ + if ((deadline >> 16) == STM32_TIM_CNT(TIM_CLOCK_MSB)) { + /* we can set a match on the LSB only */ + STM32_TIM_CCR1(TIM_CLOCK_LSB) = deadline & 0xffff; + /* disable MSB match */ + STM32_TIM_DIER(TIM_CLOCK_MSB) &= ~2; + /* Clear the match flags */ + STM32_TIM_SR(TIM_CLOCK_MSB) = ~2; + STM32_TIM_SR(TIM_CLOCK_LSB) = ~2; + /* Set the match interrupt */ + STM32_TIM_DIER(TIM_CLOCK_LSB) |= 2; + } + /* + * If the LSB deadline is already in the past and won't trigger an + * interrupt, the common code in process_timers will deal with the + * expired timer and automatically set the next deadline, we don't need + * to do anything here. + */ +} + +uint32_t __hw_clock_event_get(void) +{ + return last_deadline; +} + +void __hw_clock_event_clear(void) +{ + /* Disable the match interrupts */ + STM32_TIM_DIER(TIM_CLOCK_LSB) &= ~2; + STM32_TIM_DIER(TIM_CLOCK_MSB) &= ~2; +} + +uint32_t __hw_clock_source_read(void) +{ + uint32_t hi; + uint32_t lo; + + /* Ensure the two half-words are coherent */ + do { + hi = STM32_TIM_CNT(TIM_CLOCK_MSB); + lo = STM32_TIM_CNT(TIM_CLOCK_LSB); + } while (hi != STM32_TIM_CNT(TIM_CLOCK_MSB)); + + return (hi << 16) | lo; +} + +void __hw_clock_source_set(uint32_t ts) +{ + ASSERT(!is_interrupt_enabled()); + + /* Stop counting (LSB first, then MSB) */ + STM32_TIM_CR1(TIM_CLOCK_LSB) &= ~1; + STM32_TIM_CR1(TIM_CLOCK_MSB) &= ~1; + + /* Set new value to counters */ + STM32_TIM_CNT(TIM_CLOCK_MSB) = ts >> 16; + STM32_TIM_CNT(TIM_CLOCK_LSB) = ts & 0xffff; + + /* + * Clear status. We may clear information other than timer overflow + * (eg. event timestamp was matched) but: + * - Bits other than overflow are unused (see __hw_clock_source_irq()) + * - After setting timestamp software will trigger timer interrupt using + * task_trigger_irq() (see force_time() in common/timer.c). + * process_timers() is called from timer interrupt, so if "match" bit + * was present in status (think: some task timers are expired) + * process_timers() will handle that correctly. + */ + STM32_TIM_SR(TIM_CLOCK_MSB) = 0; + STM32_TIM_SR(TIM_CLOCK_LSB) = 0; + + /* Start counting (MSB first, then LSB) */ + STM32_TIM_CR1(TIM_CLOCK_MSB) |= 1; + STM32_TIM_CR1(TIM_CLOCK_LSB) |= 1; +} + +static void __hw_clock_source_irq(void) +{ + uint32_t stat_tim_msb = STM32_TIM_SR(TIM_CLOCK_MSB); + + /* Clear status */ + STM32_TIM_SR(TIM_CLOCK_LSB) = 0; + STM32_TIM_SR(TIM_CLOCK_MSB) = 0; + + /* + * Find expired timers and set the new timer deadline + * signal overflow if the 16-bit MSB counter has overflowed. + */ + process_timers(stat_tim_msb & 0x01); +} +DECLARE_IRQ(IRQ_MSB, __hw_clock_source_irq, 1); +DECLARE_IRQ(IRQ_LSB, __hw_clock_source_irq, 1); + +void __hw_timer_enable_clock(int n, int enable) +{ + volatile uint32_t *reg; + uint32_t mask = 0; + + /* + * Mapping of timers to reg/mask is split into a few different ranges, + * some specific to individual chips. + */ +#if defined(CHIP_FAMILY_STM32F0) + if (n == 1) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM1; + } +#elif defined(CHIP_FAMILY_STM32L) || defined(CHIP_FAMILY_STM32F4) + if (n >= 9 && n <= 11) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM9 << (n - 9); + } +#endif + +#if defined(CHIP_FAMILY_STM32F0) + if (n >= 15 && n <= 17) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM15 << (n - 15); + } +#endif + +#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) + if (n == 14) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM14; + } +#endif + +#if defined(CHIP_FAMILY_STM32F3) + if (n == 12 || n == 13) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM12 << (n - 12); + } + if (n == 18) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM18; + } + if (n == 19) { + reg = &STM32_RCC_APB2ENR; + mask = STM32_RCC_PB2_TIM19; + } +#endif + + if (n >= 2 && n <= 7) { + reg = &STM32_RCC_APB1ENR; + mask = STM32_RCC_PB1_TIM2 << (n - 2); + } + + if (!mask) + return; + + if (enable) + *reg |= mask; + else + *reg &= ~mask; +} + +static void update_prescaler(void) +{ + /* + * Pre-scaler value : + * TIM_CLOCK_LSB is counting microseconds; + * TIM_CLOCK_MSB is counting every TIM_CLOCK_LSB overflow. + * + * This will take effect at the next update event (when the current + * prescaler counter ticks down, or if forced via EGR). + */ + STM32_TIM_PSC(TIM_CLOCK_MSB) = 0; + STM32_TIM_PSC(TIM_CLOCK_LSB) = (clock_get_timer_freq() / SECOND) - 1; +} +DECLARE_HOOK(HOOK_FREQ_CHANGE, update_prescaler, HOOK_PRIO_DEFAULT); + +int __hw_clock_source_init(uint32_t start_t) +{ + /* + * we use 2 chained 16-bit counters to emulate a 32-bit one : + * TIM_CLOCK_MSB is the MSB (Secondary) + * TIM_CLOCK_LSB is the LSB (Primary) + */ + + /* Enable TIM_CLOCK_MSB and TIM_CLOCK_LSB clocks */ + __hw_timer_enable_clock(TIM_CLOCK_MSB, 1); + __hw_timer_enable_clock(TIM_CLOCK_LSB, 1); + + /* Delay 1 APB clock cycle after the clock is enabled */ + clock_wait_bus_cycles(BUS_APB, 1); + + /* + * Timer configuration : Upcounter, counter disabled, update event only + * on overflow. + */ + STM32_TIM_CR1(TIM_CLOCK_MSB) = 0x0004; + STM32_TIM_CR1(TIM_CLOCK_LSB) = 0x0004; + /* + * TIM_CLOCK_LSB (primary mode) generates a periodic trigger signal on + * each UEV + */ + STM32_TIM_CR2(TIM_CLOCK_MSB) = 0x0000; + STM32_TIM_CR2(TIM_CLOCK_LSB) = 0x0020; + + STM32_TIM_SMCR(TIM_CLOCK_MSB) = + 0x0007 | (TSMAP(TIM_CLOCK_MSB, TIM_CLOCK_LSB) << 4); + STM32_TIM_SMCR(TIM_CLOCK_LSB) = 0x0000; + + /* Auto-reload value : 16-bit free-running counters */ + STM32_TIM_ARR(TIM_CLOCK_MSB) = 0xffff; + STM32_TIM_ARR(TIM_CLOCK_LSB) = 0xffff; + + /* Update prescaler */ + update_prescaler(); + + /* Reload the pre-scaler */ + STM32_TIM_EGR(TIM_CLOCK_MSB) = 0x0001; + STM32_TIM_EGR(TIM_CLOCK_LSB) = 0x0001; + + /* Set up the overflow interrupt on TIM_CLOCK_MSB */ + STM32_TIM_DIER(TIM_CLOCK_MSB) = 0x0001; + STM32_TIM_DIER(TIM_CLOCK_LSB) = 0x0000; + + /* Override the count with the start value */ + STM32_TIM_CNT(TIM_CLOCK_MSB) = start_t >> 16; + STM32_TIM_CNT(TIM_CLOCK_LSB) = start_t & 0xffff; + + /* Start counting */ + STM32_TIM_CR1(TIM_CLOCK_MSB) |= 1; + STM32_TIM_CR1(TIM_CLOCK_LSB) |= 1; + + /* Enable timer interrupts */ + task_enable_irq(IRQ_MSB); + task_enable_irq(IRQ_LSB); + + return IRQ_LSB; +} + +#ifdef CONFIG_WATCHDOG_HELP + +void __keep watchdog_check(uint32_t excep_lr, uint32_t excep_sp) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + /* clear status */ + timer->sr = 0; + + watchdog_trace(excep_lr, excep_sp); +} + +void IRQ_HANDLER(IRQ_WD)(void) __attribute__((naked)); +void IRQ_HANDLER(IRQ_WD)(void) +{ + /* Naked call so we can extract raw LR and SP */ + asm volatile("mov r0, lr\n" + "mov r1, sp\n" + /* Must push registers in pairs to keep 64-bit aligned + * stack for ARM EABI. */ + "push {r0, lr}\n" + "bl watchdog_check\n" + "pop {r0,pc}\n"); +} +const struct irq_priority __keep IRQ_PRIORITY(IRQ_WD) + __attribute__((section(".rodata.irqprio"))) = { + IRQ_WD, 0 + }; /* put the watchdog + at the highest + priority + */ + +void hwtimer_setup_watchdog(void) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + /* Enable clock */ + __hw_timer_enable_clock(TIM_WATCHDOG, 1); + + /* Delay 1 APB clock cycle after the clock is enabled */ + clock_wait_bus_cycles(BUS_APB, 1); + + /* + * Timer configuration : Down counter, counter disabled, update + * event only on overflow. + */ + timer->cr1 = 0x0014 | BIT(7); + + /* TIM (secondary mode) uses TIM_CLOCK_LSB as internal trigger */ + timer->smcr = 0x0007 | (TSMAP(TIM_WATCHDOG, TIM_CLOCK_LSB) << 4); + + /* + * The auto-reload value is based on the period between rollovers for + * TIM_CLOCK_LSB. Since TIM_CLOCK_LSB runs at 1MHz, it will overflow + * in 65.536ms. We divide our required watchdog period by this amount + * to obtain the number of times TIM_CLOCK_LSB can overflow before we + * generate an interrupt. + */ + timer->arr = timer->cnt = CONFIG_AUX_TIMER_PERIOD_MS * MSEC / BIT(16); + + /* count on every TIM_CLOCK_LSB overflow */ + timer->psc = 0; + + /* Reload the pre-scaler from arr when it goes below zero */ + timer->egr = 0x0000; + + /* setup the overflow interrupt */ + timer->dier = 0x0001; + + /* Start counting */ + timer->cr1 |= 1; + + /* Enable timer interrupts */ + task_enable_irq(IRQ_WD); +} + +void hwtimer_reset_watchdog(void) +{ + struct timer_ctlr *timer = (struct timer_ctlr *)TIM_WD_BASE; + + timer->cnt = timer->arr; +} + +#endif /* defined(CONFIG_WATCHDOG_HELP) */ diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c index ebe46d8316..0448d34e4b 100644 --- a/chip/stm32/hwtimer32.c +++ b/chip/stm32/hwtimer32.c @@ -6,8 +6,8 @@ /* Hardware 32-bit timer driver */ #include "builtin/assert.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "common.h" #include "hooks.h" #include "hwtimer.h" diff --git a/chip/stm32/i2c-stm32l4.c b/chip/stm32/i2c-stm32l4.c index bb24a8a50f..eeb87ec4e0 100644 --- a/chip/stm32/i2c-stm32l4.c +++ b/chip/stm32/i2c-stm32l4.c @@ -4,6 +4,7 @@ */ #include "builtin/assert.h" +#include "printf.h" #include "chipset.h" #include "clock.h" #include "common.h" @@ -12,8 +13,8 @@ #include "hooks.h" #include "hwtimer.h" #include "i2c.h" -#include "printf.h" #include "registers.h" + #include "system.h" #include "task.h" #include "timer.h" diff --git a/chip/stm32/i2c_ite_flash_support.c b/chip/stm32/i2c_ite_flash_support.c index 335064572b..8482065086 100644 --- a/chip/stm32/i2c_ite_flash_support.c +++ b/chip/stm32/i2c_ite_flash_support.c @@ -4,8 +4,8 @@ */ /* STM implementation for flashing ITE-based ECs over i2c */ -#include "i2c.h" #include "i2c_ite_flash_support.h" +#include "i2c.h" #include "registers.h" #include "time.h" diff --git a/chip/stm32/pwm.c b/chip/stm32/pwm.c index a9f266cbe0..0f2e50c999 100644 --- a/chip/stm32/pwm.c +++ b/chip/stm32/pwm.c @@ -6,8 +6,8 @@ /* PWM control module for STM32 */ #include "builtin/assert.h" -#include "clock-f.h" #include "clock.h" +#include "clock-f.h" #include "gpio.h" #include "hooks.h" #include "hwtimer.h" diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 916cb2257a..1bb961a935 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -5,17 +5,17 @@ /* USART driver for Chrome EC */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "dma.h" #include "gpio.h" #include "hooks.h" #include "registers.h" -#include "stm32-dma.h" #include "system.h" #include "task.h" #include "uart.h" #include "util.h" +#include "stm32-dma.h" /* Console USART index */ #define UARTN CONFIG_UART_CONSOLE diff --git a/chip/stm32/ucpd-stm32gx.c b/chip/stm32/ucpd-stm32gx.c index 424792c5d0..3fec860200 100644 --- a/chip/stm32/ucpd-stm32gx.c +++ b/chip/stm32/ucpd-stm32gx.c @@ -6,8 +6,8 @@ /* STM32GX UCPD module for Chrome EC */ #include "clock.h" -#include "common.h" #include "console.h" +#include "common.h" #include "driver/tcpm/tcpm.h" #include "gpio.h" #include "hooks.h" diff --git a/chip/stm32/usart-stm32f0.c b/chip/stm32/usart-stm32f0.c index debb062473..56325cdc74 100644 --- a/chip/stm32/usart-stm32f0.c +++ b/chip/stm32/usart-stm32f0.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32f0.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f0.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32f3.c b/chip/stm32/usart-stm32f3.c index b46ac2ed8f..f5a138643c 100644 --- a/chip/stm32/usart-stm32f3.c +++ b/chip/stm32/usart-stm32f3.c @@ -2,12 +2,13 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32f3.h" + #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f3.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32f4.c b/chip/stm32/usart-stm32f4.c index 0806cab062..a710760e3a 100644 --- a/chip/stm32/usart-stm32f4.c +++ b/chip/stm32/usart-stm32f4.c @@ -3,13 +3,14 @@ * found in the LICENSE file. */ +#include "usart-stm32f4.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32f4.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32l.c b/chip/stm32/usart-stm32l.c index b6c9e21595..dc300d598a 100644 --- a/chip/stm32/usart-stm32l.c +++ b/chip/stm32/usart-stm32l.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32l.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32l.h" #include "util.h" /* diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c index 5f34c37bc4..30e0f009ff 100644 --- a/chip/stm32/usart-stm32l5.c +++ b/chip/stm32/usart-stm32l5.c @@ -2,13 +2,14 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart-stm32l.h" + #include "clock.h" #include "common.h" #include "compile_time_macros.h" #include "hooks.h" #include "registers.h" #include "task.h" -#include "usart-stm32l.h" #include "util.h" /* diff --git a/chip/stm32/usart_host_command.c b/chip/stm32/usart_host_command.c index 817343df98..437975e609 100644 --- a/chip/stm32/usart_host_command.c +++ b/chip/stm32/usart_host_command.c @@ -3,8 +3,8 @@ * found in the LICENSE file. */ -#include "clock.h" #include "common.h" +#include "clock.h" #include "dma.h" #include "gpio.h" #include "hooks.h" @@ -13,9 +13,9 @@ #include "registers.h" #include "system.h" #include "task.h" -#include "usart-stm32f4.h" -#include "usart_host_command.h" #include "usart_rx_dma.h" +#include "usart_host_command.h" +#include "usart-stm32f4.h" #include "util.h" /* Console output macros */ diff --git a/chip/stm32/usart_host_command.h b/chip/stm32/usart_host_command.h index ddbd5c5c99..ee4bdd88dc 100644 --- a/chip/stm32/usart_host_command.h +++ b/chip/stm32/usart_host_command.h @@ -6,13 +6,12 @@ #ifndef __CROS_EC_USART_HOST_COMMAND_H #define __CROS_EC_USART_HOST_COMMAND_H +#include <stdarg.h> /* For va_list */ #include "common.h" #include "gpio.h" #include "host_command.h" #include "usart.h" -#include <stdarg.h> /* For va_list */ - /* * Add data to host command layer buffer. */ diff --git a/chip/stm32/usart_rx_dma.c b/chip/stm32/usart_rx_dma.c index 8997617ff3..21c8313c73 100644 --- a/chip/stm32/usart_rx_dma.c +++ b/chip/stm32/usart_rx_dma.c @@ -3,13 +3,14 @@ * found in the LICENSE file. */ +#include "usart_rx_dma.h" + #include "atomic.h" #include "common.h" #include "console.h" #include "registers.h" #include "system.h" #include "usart_host_command.h" -#include "usart_rx_dma.h" #include "util.h" typedef size_t (*add_data_t)(struct usart_config const *config, diff --git a/chip/stm32/usart_rx_dma.h b/chip/stm32/usart_rx_dma.h index 191ccc8c7f..6d273d18b9 100644 --- a/chip/stm32/usart_rx_dma.h +++ b/chip/stm32/usart_rx_dma.h @@ -7,8 +7,8 @@ #ifndef __CROS_EC_USART_RX_DMA_H #define __CROS_EC_USART_RX_DMA_H -#include "dma.h" #include "producer.h" +#include "dma.h" #include "queue.h" #include "usart.h" diff --git a/chip/stm32/usart_rx_interrupt-stm32f0.c b/chip/stm32/usart_rx_interrupt-stm32f0.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f0.c +++ b/chip/stm32/usart_rx_interrupt-stm32f0.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32f3.c b/chip/stm32/usart_rx_interrupt-stm32f3.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f3.c +++ b/chip/stm32/usart_rx_interrupt-stm32f3.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32f4.c b/chip/stm32/usart_rx_interrupt-stm32f4.c index 80ba37e88f..1d86c7d5b6 100644 --- a/chip/stm32/usart_rx_interrupt-stm32f4.c +++ b/chip/stm32/usart_rx_interrupt-stm32f4.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F4 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt-stm32l.c b/chip/stm32/usart_rx_interrupt-stm32l.c index 2c74d7dbd1..750809307b 100644 --- a/chip/stm32/usart_rx_interrupt-stm32l.c +++ b/chip/stm32/usart_rx_interrupt-stm32l.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32L */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_rx_interrupt.c b/chip/stm32/usart_rx_interrupt.c index a142bcd436..dfbe6ec3ff 100644 --- a/chip/stm32/usart_rx_interrupt.c +++ b/chip/stm32/usart_rx_interrupt.c @@ -5,11 +5,12 @@ /* Interrupt based USART RX driver for STM32F0 and STM32F3 */ +#include "usart.h" + #include "atomic.h" #include "common.h" #include "queue.h" #include "registers.h" -#include "usart.h" static void usart_rx_init(struct usart_config const *config) { diff --git a/chip/stm32/usart_tx_dma.c b/chip/stm32/usart_tx_dma.c index d6469aa9e6..8128231ff7 100644 --- a/chip/stm32/usart_tx_dma.c +++ b/chip/stm32/usart_tx_dma.c @@ -2,12 +2,13 @@ * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ +#include "usart_tx_dma.h" + +#include "usart.h" #include "common.h" #include "registers.h" #include "system.h" #include "task.h" -#include "usart.h" -#include "usart_tx_dma.h" #include "util.h" void usart_tx_dma_written(struct consumer const *consumer, size_t count) diff --git a/chip/stm32/usart_tx_interrupt.c b/chip/stm32/usart_tx_interrupt.c index 7c99840e26..80d1d4df0f 100644 --- a/chip/stm32/usart_tx_interrupt.c +++ b/chip/stm32/usart_tx_interrupt.c @@ -5,11 +5,12 @@ /* Interrupt based USART TX driver for STM32 */ +#include "usart.h" + #include "common.h" #include "registers.h" #include "system.h" #include "task.h" -#include "usart.h" #include "usart_host_command.h" #include "util.h" diff --git a/chip/stm32/usb-stm32f3.c b/chip/stm32/usb-stm32f3.c index bef15db566..eb48129e09 100644 --- a/chip/stm32/usb-stm32f3.c +++ b/chip/stm32/usb-stm32f3.c @@ -5,8 +5,9 @@ * STM32F3 Family specific USB functionality */ -#include "system.h" #include "usb-stm32f3.h" + +#include "system.h" #include "usb_api.h" void usb_connect(void) diff --git a/chip/stm32/usb-stream.c b/chip/stm32/usb-stream.c index f9cd2687bf..76f7fbd340 100644 --- a/chip/stm32/usb-stream.c +++ b/chip/stm32/usb-stream.c @@ -11,10 +11,10 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usart.h" -#include "usb-stream.h" #include "usb_hw.h" -#include "util.h" +#include "usb-stream.h" static size_t rx_read(struct usb_stream_config const *config) { diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c index dba9ebaba1..1c621a32b3 100644 --- a/chip/stm32/usb.c +++ b/chip/stm32/usb.c @@ -15,10 +15,10 @@ #include "system.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_console.c b/chip/stm32/usb_console.c index 062ce2f484..fdadc243c1 100644 --- a/chip/stm32/usb_console.c +++ b/chip/stm32/usb_console.c @@ -12,10 +12,10 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_dwc.c b/chip/stm32/usb_dwc.c index 15ce4bff7f..67f89a5222 100644 --- a/chip/stm32/usb_dwc.c +++ b/chip/stm32/usb_dwc.c @@ -13,12 +13,12 @@ #include "hooks.h" #include "link_defs.h" #include "registers.h" +#include "usb_hw.h" #include "system.h" #include "task.h" #include "timer.h" -#include "usb_descriptor.h" -#include "usb_hw.h" #include "util.h" +#include "usb_descriptor.h" #include "watchdog.h" /****************************************************************************/ diff --git a/chip/stm32/usb_dwc_console.c b/chip/stm32/usb_dwc_console.c index ff3c0817b6..fd66db7380 100644 --- a/chip/stm32/usb_dwc_console.c +++ b/chip/stm32/usb_dwc_console.c @@ -12,9 +12,9 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_descriptor.h" #include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_dwc_stream.c b/chip/stm32/usb_dwc_stream.c index 78e0a4b484..670c93b437 100644 --- a/chip/stm32/usb_dwc_stream.c +++ b/chip/stm32/usb_dwc_stream.c @@ -3,11 +3,12 @@ * found in the LICENSE file. */ -#include "console.h" #include "registers.h" #include "timer.h" #include "usb_dwc_stream.h" #include "util.h" + +#include "console.h" #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) /* diff --git a/chip/stm32/usb_dwc_stream.h b/chip/stm32/usb_dwc_stream.h index bd512f5e9a..7e5e938053 100644 --- a/chip/stm32/usb_dwc_stream.h +++ b/chip/stm32/usb_dwc_stream.h @@ -10,9 +10,9 @@ #include "compile_time_macros.h" #include "consumer.h" #include "hooks.h" +#include "registers.h" #include "producer.h" #include "queue.h" -#include "registers.h" #include "usb_descriptor.h" #include "usb_hw.h" diff --git a/chip/stm32/usb_endpoints.c b/chip/stm32/usb_endpoints.c index 57ebc86eb2..cf8cb17869 100644 --- a/chip/stm32/usb_endpoints.c +++ b/chip/stm32/usb_endpoints.c @@ -5,14 +5,13 @@ * USB endpoints/interfaces callbacks declaration */ -#include "common.h" +#include <stdint.h> +#include <stddef.h> #include "compiler.h" #include "config.h" +#include "common.h" #include "usb_hw.h" -#include <stddef.h> -#include <stdint.h> - typedef void (*xfer_func)(void); typedef void (*evt_func)(enum usb_ep_event evt); diff --git a/chip/stm32/usb_hid.c b/chip/stm32/usb_hid.c index 321248c702..e9426b690d 100644 --- a/chip/stm32/usb_hid.c +++ b/chip/stm32/usb_hid.c @@ -13,11 +13,11 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_hid_hw.h b/chip/stm32/usb_hid_hw.h index 5e28a801c1..54bfca0808 100644 --- a/chip/stm32/usb_hid_hw.h +++ b/chip/stm32/usb_hid_hw.h @@ -8,8 +8,6 @@ #ifndef __CROS_EC_USB_HID_HW_H #define __CROS_EC_USB_HID_HW_H -#include "chip/stm32/usb_hw.h" - #include <common.h> struct usb_hid_config_t { diff --git a/chip/stm32/usb_hid_keyboard.c b/chip/stm32/usb_hid_keyboard.c index 7b40f31309..7f3caac960 100644 --- a/chip/stm32/usb_hid_keyboard.c +++ b/chip/stm32/usb_hid_keyboard.c @@ -20,12 +20,12 @@ #include "tablet_mode.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_hid_touchpad.c b/chip/stm32/usb_hid_touchpad.c index 8eb5ee95dc..15dd38756f 100644 --- a/chip/stm32/usb_hid_touchpad.c +++ b/chip/stm32/usb_hid_touchpad.c @@ -15,13 +15,13 @@ #include "registers.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_api.h" #include "usb_descriptor.h" +#include "usb_hw.h" #include "usb_hid.h" #include "usb_hid_hw.h" #include "usb_hid_touchpad.h" -#include "usb_hw.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_isochronous.c b/chip/stm32/usb_isochronous.c index d2225991c0..ad20b6d1ca 100644 --- a/chip/stm32/usb_isochronous.c +++ b/chip/stm32/usb_isochronous.c @@ -3,15 +3,15 @@ * found in the LICENSE file. */ +#include "stddef.h" #include "common.h" #include "config.h" #include "link_defs.h" #include "registers.h" -#include "stddef.h" +#include "util.h" #include "usb_api.h" #include "usb_hw.h" #include "usb_isochronous.h" -#include "util.h" /* Console output macro */ #define CPRINTF(format, args...) cprintf(CC_USB, format, ##args) diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 2d090293f9..9536301863 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -11,15 +11,15 @@ #include "crc.h" #include "dma.h" #include "gpio.h" -#include "hooks.h" #include "hwtimer.h" +#include "hooks.h" #include "registers.h" #include "system.h" #include "task.h" #include "timer.h" +#include "util.h" #include "usb_pd.h" #include "usb_pd_config.h" -#include "util.h" #ifdef CONFIG_COMMON_RUNTIME #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) |