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-rw-r--r--core/cortex-m/cpu.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/core/cortex-m/cpu.h b/core/cortex-m/cpu.h
index 0b03302bfc..dbad99650c 100644
--- a/core/cortex-m/cpu.h
+++ b/core/cortex-m/cpu.h
@@ -70,6 +70,26 @@ enum {
#define CPU_SCB_DCISW CPUREG(0xe000ef60)
#define CPU_SCB_DCCISW CPUREG(0xe000ef74)
+/* Bitfield values for EXC_RETURN. */
+#define EXC_RETURN_ES_MASK BIT(0)
+#define EXC_RETURN_ES_NON_SECURE 0
+#define EXC_RETURN_ES_SECURE BIT(0)
+#define EXC_RETURN_SPSEL_MASK BIT(2)
+#define EXC_RETURN_SPSEL_MSP 0
+#define EXC_RETURN_SPSEL_PSP BIT(2)
+#define EXC_RETURN_MODE_MASK BIT(3)
+#define EXC_RETURN_MODE_HANDLER 0
+#define EXC_RETURN_MODE_THREAD BIT(3)
+#define EXC_RETURN_FTYPE_MASK BIT(4)
+#define EXC_RETURN_FTYPE_ON 0
+#define EXC_RETURN_FTYPE_OFF BIT(4)
+#define EXC_RETURN_DCRS_MASK BIT(5)
+#define EXC_RETURN_DCRS_OFF 0
+#define EXC_RETURN_DCRS_ON BIT(5)
+#define EXC_RETURN_S_MASK BIT(6)
+#define EXC_RETURN_S_NON_SECURE 0
+#define EXC_RETURN_S_SECURE BIT(6)
+
/* Set up the cpu to detect faults */
void cpu_init(void);
/* Enable the CPU I-cache and D-cache if they are not already enabled */