summaryrefslogtreecommitdiff
path: root/core/cortex-m0/panic.c
diff options
context:
space:
mode:
Diffstat (limited to 'core/cortex-m0/panic.c')
-rw-r--r--core/cortex-m0/panic.c39
1 files changed, 22 insertions, 17 deletions
diff --git a/core/cortex-m0/panic.c b/core/cortex-m0/panic.c
index 34519c73d4..f1ee816c60 100644
--- a/core/cortex-m0/panic.c
+++ b/core/cortex-m0/panic.c
@@ -81,8 +81,8 @@ void panic_data_print(const struct panic_data *pdata)
{
const uint32_t *lregs = pdata->cm.regs;
const uint32_t *sregs = NULL;
- const int32_t in_handler =
- is_frame_in_handler_stack(pdata->cm.regs[11]);
+ const int32_t in_handler = is_frame_in_handler_stack(
+ pdata->cm.regs[CORTEX_PANIC_REGISTER_LR]);
int i;
if (pdata->flags & PANIC_DATA_FLAG_FRAME_VALID)
@@ -90,17 +90,20 @@ void panic_data_print(const struct panic_data *pdata)
panic_printf("\n=== %s EXCEPTION: %02x ====== xPSR: %08x ===\n",
in_handler ? "HANDLER" : "PROCESS",
- lregs[1] & 0xff, sregs ? sregs[7] : -1);
+ lregs[CORTEX_PANIC_REGISTER_IPSR] & 0xff,
+ sregs ? sregs[CORTEX_PANIC_FRAME_REGISTER_PSR] : -1);
for (i = 0; i < 4; i++)
print_reg(i, sregs, i);
for (i = 4; i < 10; i++)
print_reg(i, lregs, i - 1);
- print_reg(10, lregs, 9);
- print_reg(11, lregs, 10);
- print_reg(12, sregs, 4);
- print_reg(13, lregs, in_handler ? 2 : 0);
- print_reg(14, sregs, 5);
- print_reg(15, sregs, 6);
+ print_reg(10, lregs, CORTEX_PANIC_REGISTER_R10);
+ print_reg(11, lregs, CORTEX_PANIC_REGISTER_R11);
+ print_reg(12, sregs, CORTEX_PANIC_FRAME_REGISTER_R12);
+ print_reg(13, lregs,
+ in_handler ? CORTEX_PANIC_REGISTER_MSP :
+ CORTEX_PANIC_REGISTER_PSP);
+ print_reg(14, sregs, CORTEX_PANIC_FRAME_REGISTER_LR);
+ print_reg(15, sregs, CORTEX_PANIC_FRAME_REGISTER_PC);
}
void __keep report_panic(void)
@@ -120,8 +123,10 @@ void __keep report_panic(void)
pdata->reserved = 0;
/* Choose the right sp (psp or msp) based on EXC_RETURN value */
- sp = is_frame_in_handler_stack(pdata->cm.regs[11])
- ? pdata->cm.regs[2] : pdata->cm.regs[0];
+ sp = is_frame_in_handler_stack(
+ pdata->cm.regs[CORTEX_PANIC_REGISTER_LR]) ?
+ pdata->cm.regs[CORTEX_PANIC_REGISTER_MSP] :
+ pdata->cm.regs[CORTEX_PANIC_REGISTER_PSP];
/* If stack is valid, copy exception frame to pdata */
if ((sp & 3) == 0 &&
sp >= CONFIG_RAM_BASE &&
@@ -201,9 +206,9 @@ void panic_set_reason(uint32_t reason, uint32_t info, uint8_t exception)
pdata->arch = PANIC_ARCH_CORTEX_M;
/* Log panic cause */
- lregs[1] = exception;
- lregs[3] = reason;
- lregs[4] = info;
+ lregs[CORTEX_PANIC_REGISTER_IPSR] = exception;
+ lregs[CORTEX_PANIC_REGISTER_R4] = reason;
+ lregs[CORTEX_PANIC_REGISTER_R5] = info;
}
void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception)
@@ -213,9 +218,9 @@ void panic_get_reason(uint32_t *reason, uint32_t *info, uint8_t *exception)
if (pdata && pdata->struct_version == 2) {
lregs = pdata->cm.regs;
- *exception = lregs[1];
- *reason = lregs[3];
- *info = lregs[4];
+ *exception = lregs[CORTEX_PANIC_REGISTER_IPSR];
+ *reason = lregs[CORTEX_PANIC_REGISTER_R4];
+ *info = lregs[CORTEX_PANIC_REGISTER_R5];
} else {
*exception = *reason = *info = 0;
}