diff options
Diffstat (limited to 'core/nds32/task.c')
| -rw-r--r-- | core/nds32/task.c | 130 |
1 files changed, 60 insertions, 70 deletions
diff --git a/core/nds32/task.c b/core/nds32/task.c index 5fc86d6050..d9ea6f191f 100644 --- a/core/nds32/task.c +++ b/core/nds32/task.c @@ -1,4 +1,4 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. +/* Copyright 2013 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,6 +6,7 @@ /* Task scheduling / events module for Chrome EC operating system */ #include "atomic.h" +#include "builtin/assert.h" #include "common.h" #include "console.h" #include "cpu.h" @@ -13,6 +14,7 @@ #include "intc.h" #include "irq_chip.h" #include "link_defs.h" +#include "panic.h" #include "registers.h" #include "task.h" #include "timer.h" @@ -24,10 +26,10 @@ typedef union { * Note that sp must be the first element in the task struct * for __switchto() to work. */ - uint32_t sp; /* Saved stack pointer for context switch */ - atomic_t events; /* Bitmaps of received events */ - uint64_t runtime; /* Time spent in task */ - uint32_t *stack; /* Start of stack */ + uint32_t sp; /* Saved stack pointer for context switch */ + atomic_t events; /* Bitmaps of received events */ + uint64_t runtime; /* Time spent in task */ + uint32_t *stack; /* Start of stack */ }; } task_; @@ -42,11 +44,9 @@ CONFIG_TEST_TASK_LIST #undef TASK /* Task names for easier debugging */ -#define TASK(n, r, d, s) #n, -static const char * const task_names[] = { - "<< idle >>", - CONFIG_TASK_LIST - CONFIG_TEST_TASK_LIST +#define TASK(n, r, d, s) #n, +static const char *const task_names[] = { + "<< idle >>", CONFIG_TASK_LIST CONFIG_TEST_TASK_LIST }; #undef TASK @@ -54,12 +54,12 @@ static const char * const task_names[] = { static int task_will_switch; static uint32_t exc_sub_time; static uint64_t task_start_time; /* Time task scheduling started */ -static uint32_t exc_start_time; /* Time of task->exception transition */ -static uint32_t exc_end_time; /* Time of exception->task transition */ -static uint64_t exc_total_time; /* Total time in exceptions */ -static uint32_t svc_calls; /* Number of service calls */ -static uint32_t task_switches; /* Number of times active task changed */ -static uint32_t irq_dist[CONFIG_IRQ_COUNT]; /* Distribution of IRQ calls */ +static uint32_t exc_start_time; /* Time of task->exception transition */ +static uint32_t exc_end_time; /* Time of exception->task transition */ +static uint64_t exc_total_time; /* Total time in exceptions */ +static uint32_t svc_calls; /* Number of service calls */ +static uint32_t task_switches; /* Number of times active task changed */ +static uint32_t irq_dist[CONFIG_IRQ_COUNT]; /* Distribution of IRQ calls */ #endif extern int __task_start(void); @@ -80,7 +80,7 @@ void __idle(void) /* doze mode */ IT83XX_ECPM_PLLCTRL = EC_PLL_DOZE; #endif - asm volatile ("dsb"); + asm volatile("dsb"); /* * Wait for the next irq event. This stops the CPU clock * (sleep / deep sleep, depending on chip config). @@ -100,20 +100,18 @@ static void task_exit_trap(void) } /* Startup parameters for all tasks. */ -#define TASK(n, r, d, s) { \ - .r0 = (uint32_t)d, \ - .pc = (uint32_t)r, \ - .stack_size = s, \ -}, +#define TASK(n, r, d, s) \ + { \ + .r0 = (uint32_t)d, \ + .pc = (uint32_t)r, \ + .stack_size = s, \ + }, static const struct { uint32_t r0; uint32_t pc; uint16_t stack_size; -} tasks_init[] = { - TASK(IDLE, __idle, 0, IDLE_TASK_STACK_SIZE) - CONFIG_TASK_LIST - CONFIG_TEST_TASK_LIST -}; +} tasks_init[] = { TASK(IDLE, __idle, 0, IDLE_TASK_STACK_SIZE) + CONFIG_TASK_LIST CONFIG_TEST_TASK_LIST }; #undef TASK /* Contexts for all tasks */ @@ -122,20 +120,16 @@ static task_ tasks[TASK_ID_COUNT]; BUILD_ASSERT(TASK_ID_COUNT <= sizeof(unsigned) * 8); BUILD_ASSERT(TASK_ID_COUNT < (1 << (sizeof(task_id_t) * 8))); - /* Stacks for all tasks */ -#define TASK(n, r, d, s) + s -uint8_t task_stacks[0 - TASK(IDLE, __idle, 0, IDLE_TASK_STACK_SIZE) - CONFIG_TASK_LIST - CONFIG_TEST_TASK_LIST -] __aligned(8); +#define TASK(n, r, d, s) +s +uint8_t task_stacks[0 TASK(IDLE, __idle, 0, IDLE_TASK_STACK_SIZE) + CONFIG_TASK_LIST CONFIG_TEST_TASK_LIST] __aligned(8); #undef TASK /* Reserve space to discard context on first context switch. */ -uint32_t scratchpad[TASK_SCRATCHPAD_SIZE] __attribute__ - ((section(".bss.task_scratchpad"))); +uint32_t scratchpad[TASK_SCRATCHPAD_SIZE] + __attribute__((section(".bss.task_scratchpad"))); task_ *current_task = (task_ *)scratchpad; @@ -167,7 +161,7 @@ static atomic_t tasks_ready = BIT(TASK_ID_HOOKS); */ static atomic_t tasks_enabled = BIT(TASK_ID_HOOKS) | BIT(TASK_ID_IDLE); -int start_called; /* Has task swapping started */ +int start_called; /* Has task swapping started */ /* interrupt number of sw interrupt */ static int sw_int_num; @@ -213,22 +207,22 @@ void __ram_code interrupt_disable(void) { /* Mask all interrupts, only keep division by zero exception */ uint32_t val = BIT(30); - asm volatile ("mtsr %0, $INT_MASK" : : "r"(val)); - asm volatile ("dsb"); + asm volatile("mtsr %0, $INT_MASK" : : "r"(val)); + asm volatile("dsb"); } void __ram_code interrupt_enable(void) { /* Enable HW2 ~ HW15 and division by zero exception interrupts */ uint32_t val = (BIT(30) | 0xFFFC); - asm volatile ("mtsr %0, $INT_MASK" : : "r"(val)); + asm volatile("mtsr %0, $INT_MASK" : : "r"(val)); } inline bool is_interrupt_enabled(void) { uint32_t val = 0; - asm volatile ("mfsr %0, $INT_MASK" : "=r"(val)); + asm volatile("mfsr %0, $INT_MASK" : "=r"(val)); /* Interrupts are enabled if any of HW2 ~ HW15 is enabled */ return val & 0xFFFC; @@ -267,7 +261,7 @@ int task_start_called(void) * Also includes emulation of software triggering interrupt vector */ void __ram_code __keep syscall_handler(int desched, task_id_t resched, - int swirq) + int swirq) { /* are we emulating an interrupt ? */ if (swirq) { @@ -307,7 +301,7 @@ task_ *next_sched_task(void) #ifdef CONFIG_TASK_PROFILING if (current_task != new_task) { current_task->runtime += - (exc_start_time - exc_end_time - exc_sub_time); + (exc_start_time - exc_end_time - exc_sub_time); task_will_switch = 1; } #endif @@ -348,7 +342,7 @@ volatile int ec_int; void __ram_code start_irq_handler(void) { /* save r0, r1, and r2 for syscall */ - asm volatile ("smw.adm $r0, [$sp], $r2, 0"); + asm volatile("smw.adm $r0, [$sp], $r2, 0"); /* If this is a SW interrupt */ if (get_itype() & 8) ec_int = sw_int_num; @@ -369,7 +363,7 @@ void __ram_code start_irq_handler(void) irq_dist[ec_int]++; #endif /* restore r0, r1, and r2 */ - asm volatile ("lmw.bim $r0, [$sp], $r2, 0"); + asm volatile("lmw.bim $r0, [$sp], $r2, 0"); } void end_irq_handler(void) @@ -380,7 +374,7 @@ void end_irq_handler(void) * save r0 and fp (fp for restore r0-r5, r15, fp, lp and sp * while interrupt exit. */ - asm volatile ("smw.adm $r0, [$sp], $r0, 8"); + asm volatile("smw.adm $r0, [$sp], $r0, 8"); t = get_time().le.lo; p = t - exc_start_time; @@ -395,7 +389,7 @@ void end_irq_handler(void) } /* restore r0 and fp */ - asm volatile ("lmw.bim $r0, [$sp], $r0, 8"); + asm volatile("lmw.bim $r0, [$sp], $r0, 8"); #endif } @@ -483,37 +477,36 @@ uint32_t __ram_code read_clear_int_mask(void) { uint32_t int_mask, int_dis = BIT(30); - asm volatile( - "mfsr %0, $INT_MASK\n\t" - "mtsr %1, $INT_MASK\n\t" - "dsb\n\t" - : "=&r"(int_mask) - : "r"(int_dis)); + asm volatile("mfsr %0, $INT_MASK\n\t" + "mtsr %1, $INT_MASK\n\t" + "dsb\n\t" + : "=&r"(int_mask) + : "r"(int_dis)); return int_mask; } void __ram_code set_int_mask(uint32_t val) { - asm volatile ("mtsr %0, $INT_MASK" : : "r"(val)); + asm volatile("mtsr %0, $INT_MASK" : : "r"(val)); } static void set_int_priority(uint32_t val) { - asm volatile ("mtsr %0, $INT_PRI" : : "r"(val)); + asm volatile("mtsr %0, $INT_PRI" : : "r"(val)); } uint32_t get_int_ctrl(void) { uint32_t ret; - asm volatile ("mfsr %0, $INT_CTRL" : "=r"(ret)); + asm volatile("mfsr %0, $INT_CTRL" : "=r"(ret)); return ret; } void set_int_ctrl(uint32_t val) { - asm volatile ("mtsr %0, $INT_CTRL" : : "r"(val)); + asm volatile("mtsr %0, $INT_CTRL" : : "r"(val)); } void task_enable_all_tasks(void) @@ -599,7 +592,7 @@ static void ivic_init_irqs(void) for (i = 0; i < exc_calls; i++) { uint8_t irq = __irqprio[i].irq; uint8_t prio = __irqprio[i].priority; - all_priorities |= (prio & 0x3) << (irq * 2); + all_priorities |= (prio & 0x3) << (irq * 2); } set_int_priority(all_priorities); } @@ -685,7 +678,7 @@ void task_print_list(void) } } -static int command_task_info(int argc, char **argv) +static int command_task_info(int argc, const char **argv) { #ifdef CONFIG_TASK_PROFILING int total = 0; @@ -715,11 +708,9 @@ static int command_task_info(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(taskinfo, command_task_info, - NULL, - "Print task info"); +DECLARE_CONSOLE_COMMAND(taskinfo, command_task_info, NULL, "Print task info"); -static int command_task_ready(int argc, char **argv) +static int command_task_ready(int argc, const char **argv) { if (argc < 2) { ccprintf("tasks_ready: 0x%08x\n", (int)tasks_ready); @@ -731,8 +722,7 @@ static int command_task_ready(int argc, char **argv) return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(taskready, command_task_ready, - "[setmask]", +DECLARE_CONSOLE_COMMAND(taskready, command_task_ready, "[setmask]", "Print/set ready tasks"); void task_pre_init(void) @@ -755,11 +745,11 @@ void task_pre_init(void) tasks[i].sp = (uint32_t)sp; /* Initial context on stack (see __switchto()) */ - sp[7] = tasks_init[i].r0; /* r0 */ - sp[15] = (uint32_t)task_exit_trap; /* lr */ - sp[1] = tasks_init[i].pc; /* pc */ - sp[0] = 0x70009; /* psw */ - sp[16] = (uint32_t)(sp + 17); /* sp */ + sp[7] = tasks_init[i].r0; /* r0 */ + sp[15] = (uint32_t)task_exit_trap; /* lr */ + sp[1] = tasks_init[i].pc; /* pc */ + sp[0] = 0x70009; /* psw */ + sp[16] = (uint32_t)(sp + 17); /* sp */ /* Fill unused stack; also used to detect stack overflow. */ for (sp = stack_next; sp < (uint32_t *)tasks[i].sp; sp++) |