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Diffstat (limited to 'core/riscv-rv32i/cpu.h')
-rw-r--r--core/riscv-rv32i/cpu.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/core/riscv-rv32i/cpu.h b/core/riscv-rv32i/cpu.h
index e46b893ad6..39ee3fe126 100644
--- a/core/riscv-rv32i/cpu.h
+++ b/core/riscv-rv32i/cpu.h
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -25,7 +25,7 @@
/* write Exception Program Counter register */
static inline void set_mepc(uint32_t val)
{
- asm volatile ("csrw mepc, %0" : : "r"(val));
+ asm volatile("csrw mepc, %0" : : "r"(val));
}
/* read Exception Program Counter register */
@@ -33,7 +33,7 @@ static inline uint32_t get_mepc(void)
{
uint32_t ret;
- asm volatile ("csrr %0, mepc" : "=r"(ret));
+ asm volatile("csrr %0, mepc" : "=r"(ret));
return ret;
}
@@ -42,7 +42,7 @@ static inline uint32_t get_mcause(void)
{
uint32_t ret;
- asm volatile ("csrr %0, mcause" : "=r"(ret));
+ asm volatile("csrr %0, mcause" : "=r"(ret));
return ret;
}