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diff --git a/docs/ap-ec-comm.md b/docs/ap-ec-comm.md deleted file mode 100644 index 5cd6fd82d9..0000000000 --- a/docs/ap-ec-comm.md +++ /dev/null @@ -1,152 +0,0 @@ -# Application Processor to EC communication - -[TOC] - -## Overview - -The Application Processor (sometimes called the host) communicates with the EC -by issuing *host commands*, which are identified by a command ID and version -number, and then reading a response. When a host command is issued through -`ectool`, two or three software components are involved: - -* `ectool`, the user-space binary, -* normally the `cros-ec` Kernel driver, and -* the code on the EC itself. This can be thought of as two parts: - * a chip-specific driver for the appropriate transport, and - * the generic host command handling code (mostly in the - [host command task]). - -We'll go into detail of each of these, as well as the traffic on the wire, in -the following sections. - -### `ectool` - -`ectool` contains wrapper functions for the host commands exposed by the EC, -providing a CLI. They call one of the transport-specific `ec_command` -implementations in the `util/comm-*.c` files to send and receive from the EC. - -### EC kernel driver - -In most cases, `ectool` communicates via the [`cros-ec` Kernel driver], rather -than directly from userspace. It sends raw commands to the Kernel driver, which -sends them on to the EC, bypassing a lot of the other Kernel driver -functionality. - -There are other CrOS EC-related Kernel drivers, which use host commands to act -as adapters to existing Linux APIs. For example, sensors from the EC are mapped -to the Linux [Industrial I/O] system. - -### On the wire - -Now we come to the protocol itself. All transactions take this general form: - -* Host writes the request packet, consisting of: - * a transport-specific header; - * a `struct ec_host_request` containing the command ID, data length, and a - checksum; and - * zero or more bytes of parameters for the command, the format of which - depends on the command. -* Host reads the response to its request, consisting of: - * a transport-specific header; - * a `struct ec_host_response` containing the result code, data length, and - a checksum; and - * zero or more bytes of response from the command, again with a - command-specific format. - -### On the EC - -The host packet is received on the EC by some chip-specific code which checks -its transport-specific header, then passes it on to the common host command -code, starting at `host_packet_receive`. The common code validates the packet -and then sends it on to the handler function (annotated with the -`DECLARE_HOST_COMMAND` macro), which runs in the `HOSTCMD` task. The handler can -set a response by modifying its arguments struct, which is sent back to the host -via the chip-specific code. - -While this is happening, the EC needs to indicate to the host that it is busy -processing and not yet ready to give a response. How it does this depends on the -transport method used (see [Transport-specific details] below). - -## Versions - -There are two different concepts of "version" involved in host commands: version -of the overarching protocol, and versions of individual commands. - -### Protocol versions - -There have been three protocol versions so far, and this document describes -version 3. Version 1 was superseded by 2 before it shipped, so no devices use it -anymore. Version 2 is generally deprecated, but you might still encounter it -occasionally. - -Which version is in use can be determined using the `EC_CMD_GET_PROTOCOL_INFO` -command. This was only introduced in version 3, however, so if errors, -`EC_CMD_HELLO` should be sent in version 2. If the hello command succeeds, the -EC speaks version 2. - -### Command versions - -Individual commands also have versions, independent of the protocol version -they're being called with. Different versions of a command may have different -parameter or response formats. `EC_CMD_GET_CMD_VERSIONS` returns the versions of -the given command supported by the EC. These version numbers start at 0. - -## Transport-specific details - -Although the command and response formats are the same across all transports, -some details of how they are transmitted differ, which may be of interest when -implementing the EC side of the protocol on a new chip. - -### I<sup>2</sup>C - -I<sup>2</sup>C is very flexible with its timing, so when the EC receives a -packet from the host, it should stretch the clock, holding it low until it is -ready for the host to read the response. - -If the host tries to read more bytes than were in the response, the EC should -respond with an obvious filler byte (such as 0xEC). For example, if a command -that normally returns 50 bytes errors, its response will only be 8 bytes (the -size of the response struct). The host will probably try to read 50 bytes -anyway, so the EC should send the 8 bytes of the struct followed by 42 copies of -the filler byte. - -### SPI - -The SPI bus is similar to I<sup>2</sup>C, but with two major exceptions. First, -there's a minimum speed on the SPI bus. If slave devices don't respond quickly -enough, the master will assume they're broken and give up. Second, every -transaction is bidirectional. When bits are being clocked from master to slave -on the MOSI line, the master will simultaneously read bits in the other -direction on the MISO line. - -Hardware devices can usually handle this, and often some hardware-based flow -control used to "stretch" the transaction by a bit or byte if the slave device -needs a little extra time to respond to the master's demands. - -When exchanging messages with the EC on the SPI bus, the EC's host commands are -communicated using our own software flow-control scheme, because most of the -embedded controllers either aren't fast enough or don't have any support for -hardware flow-control. - -It works like this: When the AP sends a byte to the EC, if the EC doesn't have a -response queued up in advance, a default byte is returned. The EC preconfigures -that default response byte to indicate its status (ready, busy, waiting for more -input, etc.). Once the AP has sent a complete command message, it continues -clocking bytes to the EC (which the EC ignores) and just looks at the response -byte that comes back. Once the EC has parsed the AP's command and is ready to -reply, it sends a "start of frame" byte, followed by the actual response. The AP -continues to read and ignore bytes from the EC until it sees the start of frame -byte, and then it knows that the EC's response is starting with the next byte. - -Once the response packet has been read, any additional reads should return -`EC_SPI_PAST_END`. - -### LPC or eSPI - -The EC should set `EC_LPC_STATUS_PROCESSING` in its command status register -after receiving a host packet and before it has a response ready. - -[`cros-ec` Kernel driver]: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/refs/heads/chromeos-4.19/drivers/mfd/cros_ec_dev.c -[Industrial I/O]: https://www.kernel.org/doc/html/v4.14/driver-api/iio/index.html -[host command task]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/host_command.c -[Transport-specific details]: #Transport_specific-details diff --git a/docs/case_closed_debugging.md b/docs/case_closed_debugging.md deleted file mode 100644 index 8310970652..0000000000 --- a/docs/case_closed_debugging.md +++ /dev/null @@ -1,2 +0,0 @@ -The has been moved into a -[different branch](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging.md) diff --git a/docs/case_closed_debugging_cr50.md b/docs/case_closed_debugging_cr50.md deleted file mode 100644 index ac518c0153..0000000000 --- a/docs/case_closed_debugging_cr50.md +++ /dev/null @@ -1,2 +0,0 @@ -The has been moved into a -[different branch](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md) diff --git a/docs/ccd_howtos.md b/docs/ccd_howtos.md deleted file mode 100644 index 44deecd16d..0000000000 --- a/docs/ccd_howtos.md +++ /dev/null @@ -1,2 +0,0 @@ -The has been moved into a -[different branch](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/ccd_howtos.md) diff --git a/docs/code_coverage.md b/docs/code_coverage.md deleted file mode 100644 index ec8053ca93..0000000000 --- a/docs/code_coverage.md +++ /dev/null @@ -1,50 +0,0 @@ -# Code Coverage - -Provides an overview of how to use code coverage tools when running the unit -tests in the EC codebase. - -[TOC] - -## Availability - -Code coverage is only available for host-based unit tests, as opposed to manual -tests that run on target hardware. - -## Building for code coverage - -To build host-based unit tests for code coverage, invoke `make` with the -`coverage` target, as follows: - -`make coverage -j` - -This target will compile and link the unit tests with `--coverage` flag (which -pulls in the `gcov` libraries), run the tests, and then process the profiling -data into a code coverage report using the `lcov` and `genhtml` tools. - -The coverage report top-level page is `build/coverage/coverage_rpt/index.html`. - -### Noise in the build output - -When building for code coverage, you may see multiple warnings of the form -`geninfo: WARNING: no data found for -/mnt/host/source/src/platform/ec/core/host/cpu.h` and `genhtml: WARNING: -function data mismatch at -/mnt/host/source/src/platform/ec/common/math_util.c:134` - -These warnings can be ignored. (FYI, the "function data mismatch" warnings -appear to be caused in part by using relative paths instead of absolute paths.) - -## Zephyr ztest code coverage - -To build the Zephyr unit tests for code coverage run: - -`zmake coverage build/ztest-coverage` - -This target will compile, without linking, all zephyr projects with -`CONFIG_COVERAGE` Kconfig option enabled, run the tests, and then process the -profiling data into a code coverage report using the `lcov` and `genhtml` -tools. This requires the `HAS_COVERAGE_SUPPORT` option, which can only be -selected in `Kconfig.board`. - -The coverage report top-level page is -`build/ztest-coverage/coverage_rpt/index.html`. diff --git a/docs/code_reviews.md b/docs/code_reviews.md deleted file mode 100644 index a8e77c3fd8..0000000000 --- a/docs/code_reviews.md +++ /dev/null @@ -1,54 +0,0 @@ -# Code Reviews - -The `platform/ec` repository makes use of a code review system that tries to -evenly distribute code reviews among available reviewers. - -[TOC] - -## How to request a review - -Add `cros-ec-reviewers@google.com` to the reviewer line in Gerrit. A background -job will come around and replace the `cros-ec-reviewers@google.com` address with -the next available reviewer in the EC reviewer rotation. This typically takes on -the order of minutes. - -Optionally, you can click the [FIND OWNERS] button in the UI, and select -`cros-ec-reviewers@google.com`. - -## When to use review system - -If you are modifying code in `common/`, `chip/`, or `core/`, feel free to use -the `cros-ec-reviewers@google.com` system. It is **never** a requirement to use -`cros-ec-reviewers@google.com`. You can always request a review from a specific -person. - -## Responsibilities of reviewers - -If the selected reviewer is unfamiliar with code in a CL, then that reviewer -should at least ensure that EC style and paradigms are being followed. Once EC -styles and paradigms are being followed, then the reviewer can give a +1 and add -the appropriate domain expert for that section of code. - -Reviewers should try to give an initial response within 1 business day of -receiving a review request. Thereafter, they should try to respond to new -comments by the author within 1 business day. - -## Review guidelines - -Authors and reviewers should follow the Chrome OS firmware review -[guidelines][2] while publishing and reviewing code. - -## How can I join the rotation? - -Add your name to the [list of reviewers][1]. - -## Reference - -* [Chrome OS firmware review guidelines][2] -* [Coreboot Gerrit Guidelines][3] -* [Google small CL guidelines][5] - -[1]: http://google3/chrome/crosinfra/gwsq/ec_reviewers -[2]: http://chromium.googlesource.com/chromiumos/docs/+/HEAD/firmware_code_reviews.md -[3]: https://doc.coreboot.org/getting_started/gerrit_guidelines.html -[5]: https://google.github.io/eng-practices/review/developer/small-cls.html diff --git a/docs/configuration/ap_power_sequencing.md b/docs/configuration/ap_power_sequencing.md deleted file mode 100644 index c5073d5809..0000000000 --- a/docs/configuration/ap_power_sequencing.md +++ /dev/null @@ -1,253 +0,0 @@ -# Configure AP Power Sequencing - -This section details the configuration related to managing the system power -states (G3, S5, S3, S0, S0iX, etc). This includes the following tasks: - -- Selecting the AP chipset type. -- Configure output GPIOs that enable voltage rails. -- Configure input GPIOs that monitor the voltage rail status (power good - signals). -- Configure input GPIOs that monitor the AP sleep states. -- Pass through power sequencing signals from the board to the AP, often with - delays or other sequencing control. - -## Config options - -The AP chipset options are grouped together in [config.h]. Select exactly one of -the available AP chipset options (e.g. `CONFIG_CHIPSET_APOLLOLAKE`, -`CONFIG_CHIPSET_BRASWELL`, etc). If the AP chipset support is not available, -select `CONFIG_CHIPSET_ECDRIVEN` to enable basic support for handling S3 and S0 -power states. - -After selecting the chipset, search for additional options that start with -`CONFIG_CHIPSET*` and evaluate whether each option is appropriate to add to -`baseboard.h` or `board.h`. - -Finally, evaluate the `CONFIG_POWER_` options for use on your board. In -particular, the `CONFIG_POWER_BUTTON`, and `CONFIG_POWER_COMMON` should be -defined. - -The `CONFIG_BRINGUP` option is especially useful option during the initial power -up of a new board. This option is discussed in more detail in the -[Testing and Debugging](#Testing-and-Debugging) section. - -## Feature Parameters - -None needed in this section. - -## GPIOs and Alternate Pins - -### EC Outputs to the board - -The board should connect the enable signal of one or more voltage rails to the -EC. These enable signals will vary based on the AP type, but are typically -active high signals. For Intel Ice Lake chipsets, this includes enable signals -for the primary 3.3V and primary 5V rails. - -```c -GPIO(EN_PP3300_A, PIN(A, 3), GPIO_OUT_LOW) -GPIO(EN_PP5000, PIN(A, 4), GPIO_OUT_LOW) -``` - -### EC Outputs to AP - -For boards with an x86 AP, the following signals can be connected between the EC -and AP/PCH. Create `GPIO()` entries for any signals used on your board. - -- `GPIO_PCH_PWRBTN_L` - Output from the EC that proxies the status of the EC - input `GPIO_POWER_BUTTON_L` (driven by the H1). Only used when - `CONFIG_POWER_BUTTON_X86` is defined. -- `GPIO_PCH_RSMRST_L` - Output from the EC that proxies the status of the EC - input `GPIO_RSMRST_L_PGOOD` (driven by the PMIC or voltage regulators on the - board). -- `GPIO_PCH_SYS_PWROK` - Output from the EC that indicates when the system - power is good and the AP can power up. -- `GPIO_PCH_WAKE_L` - Output from the EC, driven low when there is a wake - event. - -### Power Signal Interrupts - -For each power signal defined in the `power_signal_list[]` array, define a -`GPIO_INT()` entry that connects to the `power_signal_interrupt`. The interrupts -are configured to trigger on both rising edge and falling edge. - -The example below shows the power signals used with Ice Lake processors. - -```c -GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -``` - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Data structures - -- `const struct power_signal_info power_signal_list[]` - This array defines - the signals from the AP and from the power subsystem on the board that - control the power state. For some Intel chipsets, including Apollo Lake and - Ice Lake, this power signal list is already defined by the corresponding - chipset file under the `./power` directory. - -## Tasks - -The `CHIPSET` task monitors and handles the power state changes. This task -should always be enabled with a priority higher than the `CHARGER` task, but -lower than the `HOSTCMD` and `CONSOLE` tasks. - -```c - TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ -``` - -The `POWERBTN` and task should be enabled when using x86 based AP chipsets. The -typical priority is higher than the `CONSOLE` task, but lower than the `KEYSCAN` -task. - -```c - TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE) \ -``` - -## Testing and Debugging - -During the first power on of prototype devices, it is recommended to enable -`CONFIG_BRINGUP`. This option prevents the EC from automatically powering on the -AP. You can use the EC console commands `gpioget` and `gpioset` to manually -check power good signals and enable power rails in a controlled manner. This -option also enables extra debug to log all power signal transitions to the EC -console. With `CONFIG_BRINGUP` enabled, you can trigger the automatic power -sequencing by running the `powerbtn` from the EC console. - -The EC console displays the following text when `CONFIG_BRINGUP` is enabled: - -``` -WARNING: BRINGUP BUILD -``` - -Once you manually press the power button, or execute the `powerbtn` command, the -EC console displays both the power state changes and the detected transitions of -all power signals. An example is shown below. - -``` -> powerbtn -Simulating 200 ms power button press. -[6.790816 power button pressed] -[6.791133 PB pressed] -[6.791410 PB task 1 = pressed] -[6.791755 PB PCH pwrbtn=LOW] -[6.792049 PB task 10 = was-off, wait 199362] -RTC: 0x000067bc (26556.00 s) -[6.792786 power state 5 = G3->S5, in 0x0000] -[6.793190 Set EN_PP3300_A: 1] -[6.793905 SW 0x03] -[6.817627 Set PCH_DSW_PWROK: 1] -[6.818007 Pass thru GPIO_DSW_PWROK: 1] -[6.818351 Set EN_PP5000_A: 1] -RTC: 0x000067bc (26556.00 s) -[6.903830 power state 1 = S5, in 0x0029] -[6.918735 Pass through GPIO_RSMRST_L_PGOOD: 1] -i2c 7 recovery! error code is 13, current state is 0 -Simulating power button release. -> [6.991576 power button released] -[6.992009 PB task 10 = was-off] -[6.992376 PB released] -[6.992635 PB task 6 = released] -[6.992958 PB PCH pwrbtn=HIGH] -[6.993256 PB task 0 = idle, wait -1] -[6.993806 PB released] -[6.994149 PB task 6 = released] -[6.994512 PB PCH pwrbtn=HIGH] -[6.994812 PB task 0 = idle, wait -1] -[6.995768 SW 0x01] -3 signal changes: - 6.807298 +0.000000 DSW_PWROK => 1 - 6.903417 +0.096119 SLP_SUS_L => 1 - 6.908471 +0.005054 PG_EC_RSMRST_ODL => 1 -1 signal changes: - 7.909941 +0.000000 SLP_S0_L => 1 -[9.026429 Fan 0 stalled!] -RTC: 0x000067bf (26559.00 s) -[9.124643 power state 6 = S5->S3, in 0x003f] -i2c 3 recovery! error code is 13, current state is 0 -[9.126543 mux config:2, port:1, res:1] -[9.127109 PD:S5->S3] -RTC: 0x000067bf (26559.00 s) -[9.127985 power state 2 = S3, in 0x003f] -RTC: 0x000067bf (26559.00 s) -[9.128640 power state 7 = S3->S0, in 0x003f] -``` - -This example shows successful power on of the AP as the AP transitions from the -G3 state all the way to the S0 state. - -The console messages shown in brackets `[]` include a timestamp. This timestamp -records when the corresponding console message was printed. - -The power signal changes are preceded by the message `<N> signal changes:`. -Power signal changes are recorded at interrupt priority into a special buffer -and are not displayed in real time. Instead, printing of the buffer is deferred -until the EC is no longer executing at interrupt priority. This causes the power -signal changes shown on the console to be out of order with respect to the other -EC messages. - -The power signal changes include a timestamp to help you correlate when the -actual power signal changed compared to other messages. From the example above, -the first power signal change recorded is the `DSW_PWROK` signal transitioning -from 0 to 1, and this is recorded at timestamp `6.807298`. Using the regular EC -console timestamp, you can reconstruct the real power sequence to look like the -following: - -``` -> powerb -Simulating 200 ms power button press. -[6.790816 power button pressed] -[6.791133 PB pressed] -[6.791410 PB task 1 = pressed] -[6.791755 PB PCH pwrbtn=LOW] -[6.792049 PB task 10 = was-off, wait 199362] -RTC: 0x000067bc (26556.00 s) -[6.792786 power state 5 = G3->S5, in 0x0000] -[6.793190 Set EN_PP3300_A: 1] -[6.793905 SW 0x03] - 6.807298 +0.000000 DSW_PWROK => 1 // Manually re-ordered entry -[6.817627 Set PCH_DSW_PWROK: 1] -[6.818007 Pass thru GPIO_DSW_PWROK: 1] -[6.818351 Set EN_PP5000_A: 1] -RTC: 0x000067bc (26556.00 s) - 6.903417 +0.096119 SLP_SUS_L => 1 // Manually re-ordered entry -[6.903830 power state 1 = S5, in 0x0029] - 6.908471 +0.005054 PG_EC_RSMRST_ODL => 1 // Manually re-ordered entry -[6.918735 Pass through GPIO_RSMRST_L_PGOOD: 1] -i2c 7 recovery! error code is 13, current state is 0 -Simulating power button release. -> [6.991576 power button released] -[6.992009 PB task 10 = was-off] -[6.992376 PB released] -[6.992635 PB task 6 = released] -[6.992958 PB PCH pwrbtn=HIGH] -[6.993256 PB task 0 = idle, wait -1] -[6.993806 PB released] -[6.994149 PB task 6 = released] -[6.994512 PB PCH pwrbtn=HIGH] -[6.994812 PB task 0 = idle, wait -1] -[6.995768 SW 0x01] -1 signal changes: - 7.909941 +0.000000 SLP_S0_L => 1 -[9.026429 Fan 0 stalled!] -RTC: 0x000067bf (26559.00 s) -[9.124643 power state 6 = S5->S3, in 0x003f] -i2c 3 recovery! error code is 13, current state is 0 -[9.126543 mux config:2, port:1, res:1] -[9.127109 PD:S5->S3] -RTC: 0x000067bf (26559.00 s) -[9.127985 power state 2 = S3, in 0x003f] -RTC: 0x000067bf (26559.00 s) -[9.128640 power state 7 = S3->S0, in 0x003f] -``` - -*TODO ([b/147808790](http://issuetracker.google.com/147808790)) Add -documentation specific to each x86 processor type.* - -[config.h]: ../new_board_checklist.md#config_h diff --git a/docs/configuration/cbi.md b/docs/configuration/cbi.md deleted file mode 100644 index f89ee78454..0000000000 --- a/docs/configuration/cbi.md +++ /dev/null @@ -1,39 +0,0 @@ -# Configure CrOS Board Information (CBI) - -If your board includes an EEPROM to store [CBI], then this feature must be -enabled and configured. Note that the [I2C buses] must be configured and working -before enabling CBI. - -## Config options - -Add the following config options to `baseboard.h` or `board.h`. - -- `CONFIG_BOARD_VERSION_CBI` -- `CONFIG_CBI_EEPROM` - -## Feature Parameters - -- `I2C_ADDR_EEPROM_FLAGS <7-bit addr>` - Defines the 7-bit slave address for - the EEPROM containing CBI. - -## GPIOs and Alternate Pins - -None needed - the I2C pins should be configured automatically when initializing -the I2C buses. - -## Data Structures - -None required by this feature. - -## Tasks - -None required by this feature. - -## Testing and Debugging - -Refer to the [I2C debugging information] to verify communication with the CBI -EEPROM. - -[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md -[I2C buses]: ./i2c.md -[I2C debugging information]: ./i2c.md# diff --git a/docs/configuration/config_ap_to_ec_comm.md b/docs/configuration/config_ap_to_ec_comm.md deleted file mode 100644 index 24b309feb7..0000000000 --- a/docs/configuration/config_ap_to_ec_comm.md +++ /dev/null @@ -1,73 +0,0 @@ -# Configure AP to EC Communication - -This document provides details on how to configure the AP to EC communication -channel used on your board. The [AP to EC Communication] document provides -details a system level of the operation of this feature. - -## Config options - -Configure the AP to EC communication channel, picking exactly one of the -following options. - -- `CONFIG_HOSTCMD_SHI` - [SPI Host Interface](../ec_terms.md#shi) (SHI) -- `CONFIG_HOSTCMD_HECI` - HECI interface -- `CONFIG_HOSTCMD_LPC` - [LPC](../ec_terms.md#lpc) bus -- `CONFIG_HOSTCMD_ESPI` - [eSPI](../ec_terms.md#espi) bus - -In [config.h], search for options that start with the same name as your selected -communication interface. Override defaults as needed. - -## Feature Parameters - -None needed in this section. - -## GPIOs and Alternate Pins - -The EC code requires the following signals between the AP and the EC to be -defined by each board variant. - -- `GPIO_ENTERING_RW` - Output from the EC, active high signal indicates when - the EC code transitions from RO to RW code. - - ```c - GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) - ``` - -- `GPIO_SYS_RESET_L` - Output from the EC, active low signal used to put the - AP into reset. - - ```c - GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) - ``` - -Create `ALTERNATE()` entries for all EC signals used for AP communication. This -step can be skipped for any pins that default to communication channel -functionality. - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Data structures - -None needed in this section. - -## Tasks - -The `HOSTCMD` task is responsible for processing commands sent by the AP and is -always required. The typical priority is higher than the `CHIPSET` task, but -lower than the `CONSOLE` task. - -```c - TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE, 0) \ -``` - -## Testing and Debugging - -For Nuvoton EC chipsets, the file [./chip/npcx/registers.h] provides a -collection of `DEBUG_*` macros that can be used to enable extra console messages -related to a specific interface. For AP to EC communication, the `DEBUG_LPC` and -`DEBUG_ESPI` macros can help troubleshoot communication issues. - -[./chip/npcx/registers.h]: ../../chip/npcx/registers.h -[AP to EC Communication]: ../ap-ec-comm.md -[config.h]: ../new_board_checklist.md#config_h diff --git a/docs/configuration/ec_chipset.md b/docs/configuration/ec_chipset.md deleted file mode 100644 index defc27eec8..0000000000 --- a/docs/configuration/ec_chipset.md +++ /dev/null @@ -1,116 +0,0 @@ -# Configure EC Chipset - -## Config options - -The EC chipset is selected using board specific make file [build.mk]. The -following configuration options specify the type and size of flash memory used -by the EC. - -- `CONFIG_SPI_FLASH_REGS` - Should always be defined when using internal or - external SPI flash. -- `CONFIG_SPI_FLASH` - Define only if your board uses an external flash. -- `CONFIG_SPI_FLASH_<device_type>` - Select exactly one the supported flash - devices to compile in the required driver. This is needed even when using - the internal SPI flash of the EC chipset. -- Additional EC Chipset options are prefixed with `CONFIG_HIBERNATE*` and - should be evaluated for relevance on your board. - -## Feature Parameters - -- `CONFIG_FLASH_SIZE_BYTES <bytes>` - Set to the size of the internal flash of - the EC. Must be defined to link the final image. -- `CONFIG_SPI_FLASH_PORT <port>` - Only used if your board as an external - flash. - -## GPIOs and Alternate Pins - -Configure the signals which will wakeup the EC from hibernate or deep sleep. -Typical wakeup sources include: - -- `GPIO_LID_OPEN` - An active high signal that indicates the lid has been - opened. The source of the signal is typically from a - [GMR](../ec_terms.md#gmr) or Hall-Effect sensor. The `GPIO_INT()` entry for - this signal should be connected to the `lid_interrupt()` routine. -- `GPIO_AC_PRESENT` - A signal from the battery charger that indicates the - device is connected to AC power. This signal is connected to the - `power_interrupt()` routine. -- `GPIO_POWER_BUTTON_L` - An active low signal from the power switch. This - signal is connected to the `power_button_interrupt()` routine. -- `GPIO_EC_RST_ODL` - On some Nuvoton EC chipsets, the reset signal is - dual-routed to both a dedicated reset pin and a GPIO. In this case, no - interrupt handler needs to be registered to the GPIO signal, but the GPIO - pin must still be configured to wake on both edge types. The GPIO pin should - also be locked prevent the pin configuration from changing after the EC - read-only code runs. - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Data structures - -- `const enum gpio_signal hibernate_wake_pins[]` - add all GPIO signals that - should trigger a wakeup of the EC. -- `const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);` - - configures the number of wake signals used on the board. - -All ChromeOS wake sources are documented on the ChromeOS partner site in the -[Wake Sources and Battery Life] section. The EC specific wake sources are found -under the Deep Sleep and Shipping states and include: - -- Power button -- AC insert -- Lid open - -## Tasks - -None required by this feature. - -## Testing and Debugging - -## Example - -For the Volteer reference board, the following wake sources are defined in -[gpio.inc]. Note that configuration of `GPIO(EC_RST_ODL)` is located after all -`GPIO_INT()` entries required by the board. - -```c -/* Wake Source interrupts */ -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -GPIO_INT(EC_WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) -GPIO_INT(H1_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) -GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) - -/* EC_RST_ODL - PSL input but must be locked */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH | GPIO_LOCKED) -``` - -For the NPCx7 chipset, the alternate function must also be configured to connect -the wakeup pins to the PSL (power switch logic). - -```c -/* GPIOD2 = EC_LID_OPEN */ -ALTERNATE(PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) -/* GPIO00 = ACOK_OD, - GPIO01 = H1_EC_PWR_BTN_ODL - GPIO02 = EC_RST_ODL */ -ALTERNATE(PIN_MASK(0, BIT(0) | BIT(1) | BIT(2)), 0, MODULE_PMU, 0) -``` - -The final step is to add the hibernate signals array to Volteer [baseboard.c] -file: - -```c -/* Wake up pins */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_LID_OPEN, - GPIO_ACOK_OD, - GPIO_POWER_BUTTON_L, - GPIO_EC_RST_ODL, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); -``` - -[gpio.inc]: ../../board/volteer/gpio.inc -[baseboard.c]: ../../baseboard/volteer/baseboard.c -[build.mk]: ../new_board_checklist.md#board_build_mk -[Wake Sources and Battery Life]: https://chromeos.google.com/partner/dlm/docs/latest-requirements/chromebook.html#wake-sources-and-battery-life diff --git a/docs/configuration/gpio.md b/docs/configuration/gpio.md deleted file mode 100644 index f4a5c4719a..0000000000 --- a/docs/configuration/gpio.md +++ /dev/null @@ -1,160 +0,0 @@ -# GPIO Configuration - -GPIO setup is done for every board variant, but never for the baseboard, by -configuring the file `./board/<board>/gpio.inc`. This file configures all the -the pins on the EC chipset through the following macros. - -- `GPIO(<name>, ...)` - Configures simple GPIO input and outputs -- `GPIO_INT(<name>, ...)` - Configures GPIO inputs that connect to an - interrupt service routine. Historically these entries are defined first, but - this no longer required. -- `ALTERNATE(...)` - Configures a pin for an alternate function (e.g I2C, ADC, - SPI, etc) -- `UNIMPLEMENTED(<name>, ...)` - Creates a fake GPIO entry - -The `GPIO()`, `GPIO_INT()`, and `UNIMPLEMENTED()` macros create a C enumeration -of the form `GPIO_<name>` that can be used in the code. As noted in -[GPIO Naming](../new_board_checklist.md#GPIO-Naming), the `<name>` parameter -should always match the schematic net name. - -## `GPIO()` macro - -### Prototype - -`GPIO(name, pin, flags)` - -- `name` - Defines the schematic net name, which is expanded to the - enumeration `GPIO_name` by the macro. -- `pin` - Use the `PIN(group,pin)` macro to define the GPIO group and pin - number. Note that on a few EC chipsets, the PIN macro is just `PIN(pin)`. -- `flags` - Define attributes of the pin (direction, pullup/pulldown, open - drain, voltage level, etc). All supported flags are found following the - `GPIO_FLAG_NONE` definition in [./include/gpio.h](../../include/gpio.h). - -### Example - -![GPIO Example] - -```c -GPIO(EC_ENTERING_RW, PIN(E, 3), GPIO_OUT_LOW) -``` - -The EC common code requires the enum `GPIO_ENTERING_RW` to be defined, so you -should also map the net name to the EC name in the `board.h` file. - -```c -#define GPIO_ENTERING_RW GPIO_EC_ENTERING_RW -``` - -## `GPIO_INT()` macro - -### Prototype - -`GPIO_INT(name, pin, flags, signal)` - -- `name` - Defines the schematic net name, which is expanded to the - enumeration `GPIO_name` by the macro. -- `pin` - Same definition as `GPIO()` macro. -- `flags` - Same definition as `GPIO()` macro. Should always have one of the - `GPIO_INT_*` flags set. -- `signal` - Interrupt service routine called when the pin asserts according - to the flags set. - -### Example - -![GPIO_INT Example] - -```c -GPIO_INT(EC_LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) -``` - -The EC common code requires the enum `GPIO_LID_OPEN` to be defined, so you als -need to map the net name to the EC name in the `board.h` file. - -```c -#define GPIO_LID_OPEN GPIO_EC_LID_OPEN -``` - -## `ALTERNATE()` macro - -### Prototype - -`ALTERNATE(pinmask, function, module, flags)` - -- `pinmask` - Defines a set of pins in the same GPIO group to assign to a - different function. -- `function` - A chip-specific function number. Only used if the EC chipset - provides multiple alternate functions in addition to GPIO (e.g. pin can be - UART, I2C, SPI, or GPIO). The permitted values for this parameter vary based - on the EC chipset type. - - STM32 - 0 to 7 - - Maxim - 1 to 3 - - Microchip - 0 to 3 - - MediaTek - 0 to 7 - - All others (Nuvton, ITE, TI Stellaris, ) only support one alternate - function per pin, so this parameter should be set to 0. -- `module` - One of the enum module_id values defined in - [./include/module_id.h](../../include/module_id.h). -- `flags` - Same definition as `GPIO()` macro. - -### Notes - -At runtime there are two mechanisms for switching a pin between GPIO mode and -alternate function mode. - -- `gpio_config_module(enum module_id id, int enable)` - Configures all pins - matching the module enumeration `id`. -- `gpio_config_pin(enum module_id id, enum gpio_signal signal, int enable)` - - Configures a single pin matching the GPIO enumeration `signal`. - -For both routines, if `enable` is 1, then the corresponding pins are configured -for alternate mode operation. If `enable` is 0, then the corresponding pins are -configure for GPIO mode. - -`gpio_config_module()` is automatically called at runtime for all enabled -interfaces (I2C, SPI, UART, etc). You can use `gpio_config_pin()` to temporarily -configure a pin for GPIO operation, and to restore the original alternate -function. The I2C bus error recovery employs this mechanism to temporarily -driver the I2C SCL and SDA signals to known states, without interference by the -I2C controller in the EC chipset. - -The general recipe for overriding alternate functions is shown below. - -```c - /* Disconnect I2C1_SDA pin from I2C controller */ - gpio_config_pin(MODULE_I2C, GPIO_I2C1_SDA, 0); - - /* Setup I2C1_SDA as an GPIO open drain output and drive initial state low */ - gpio_set_flags(GPIO_I2C1_SDA, GPIO_ODR_LOW); - - /* Set GPIO high (or low) as required */ - gpio_set_level (GPIO_I2C1_SDA, 1); - - /* Restore I2C1_SDA pin to I2C function */' - gpio_config_pin(MODULE_I2C, GPIO_I2C1_SDA, 1); -``` - -### Example - -![ALTERNATE Example] - -```c -ALTERNATE(PIN_MASK(B, BIT(4) | BIT(5)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) -``` - -<!-- Images --> - -<!-- If you make changes to the docs below make sure to regenerate the PNGs by - appending "export/png" to the Google Drive link. --> - -<!-- https://docs.google.com/drawings/d/18cWTYQRRCpypYDOLlvKQJTObwcj6wOjUga02B0oZXBg --> - -[GPIO Example]: ../images/gpio_example.png - -<!-- https://docs.google.com/drawings/d/1X6p5XfB6BBmUUKCrwOg56Bz6LZj9P_WPQXsOdk-OIiI --> - -[GPIO_INT Example]: ../images/gpio_int_example.png - -<!-- https://docs.google.com/drawings/d/1-kroVezQuA_KdQLzqYPs8u94EBg37z3k6lKzkSLRv-0 --> - -[ALTERNATE Example]: ../images/alternate_example.png diff --git a/docs/configuration/i2c.md b/docs/configuration/i2c.md deleted file mode 100644 index 36464bb371..0000000000 --- a/docs/configuration/i2c.md +++ /dev/null @@ -1,203 +0,0 @@ -# Configure I2C Buses - -## Config options - -The I2C options are prefixed with `CONFIG_I2C*`. Evaluate whether each option is -appropriate to add to your board. - -A typical EC and board should at a minimum set `CONFIG_I2C` and -`CONFIG_I2C_CONTROLLER`. - -## Feature Parameters - -The following parameters control the behavior of the I2C library. [config.h] -defines a reasonable default value, but you may need to change the default value -for your board. - -- `CONFIG_I2C_CHIP_MAX_TRANSFER_SIZE <bytes>` -- `CONFIG_I2C_NACK_RETRY_COUNT <count>` -- `CONFIG_I2C_EXTRA_PACKET_SIZE <bytes>` - Only used on STM32 EC's if - `CONFIG_HOSTCMD_I2C_ADDR_FLAGS` is defined. - -## GPIOs and Alternate Pins - -In the gpio.inc file, you need to define a GPIO for the clock (SCL) and data -(SDA) pin used on each active I2C bus. The corresponding GPIOs are then included -in the `i2c_ports[]` array. This permits the I2C library to perform common bus -recovery actions using bit-banging without involvement by the EC-specific I2C -device driver. - -You also need to define the alternate function assignment for all I2C pins using -the `ALTERNATE()` macro. This step can be skipped for any pins that default to -I2C functionality. - -Note that many I2C buses only support 1.8V operation. This is determined by I2C -devices connected to the bus. In this case you need to include `GPIO_SEL_1P8V` -as part of the `flags` field in both the `GPIO()` and `ALTERNATE()` macros. I2C -bus 0 in the example below demonstrates configuring the SCL and SDA pins for -1.8V operation. - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Data Structures - -- `const struct i2c_port_t i2c_ports[]` - This array should be defined in your - baseboard.c or board.c file. This array defines the mapping of internal I2C - port numbers used by the I2C library to the physical I2C ports connected to - the EC. -- `const unsigned int i2c_port_used = ARRAY_SIZE(i2c_ports)` - Defines the - number of internal I2C ports accessible by the I2C library. - -## Tasks - -None required by this feature. - -## Testing and Debugging - -### Console Commands - -- `i2cscan` - Provides a quick look of all I2C devices found on all configured - buses. -- `i2cxfer` - Allows you to read and write individual registers on an I2C - device. - -For runtime troubleshooting of an I2C device, enable and the -[I2C tracing](../i2c-debugging.md) module to log all I2C transactions initiated -by the EC code. - -## Example - -The image below shows the I2C bus assignment for the Volteer reference board. - -![I2C Example] - -The `gpio.inc` file for Volteer defines both `GPIO()` and `ALTERNATE()` entries -for all I2C buses used in the design. - -```c -/* I2C pins - Alternate function below configures I2C module on these pins */ -GPIO(EC_I2C0_SENSOR_SCL, PIN(B, 5), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C0_SENSOR_SDA, PIN(B, 4), GPIO_INPUT | GPIO_SEL_1P8V) -GPIO(EC_I2C1_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) -GPIO(EC_I2C1_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C2_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SCL, PIN(D, 1), GPIO_INPUT) -GPIO(EC_I2C3_USB_1_MIX_SDA, PIN(D, 0), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SCL, PIN(3, 3), GPIO_INPUT) -GPIO(EC_I2C5_POWER_SDA, PIN(3, 6), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SCL, PIN(B, 3), GPIO_INPUT) -GPIO(EC_I2C7_EEPROM_SDA, PIN(B, 2), GPIO_INPUT) - -/* Alternate functions GPIO definitions */ -ALTERNATE(PIN_MASK(B, BIT(5) | BIT(4)), 0, MODULE_I2C, (GPIO_INPUT | GPIO_SEL_1P8V)) /* I2C0 */ -ALTERNATE(PIN_MASK(9, BIT(0) | BIT(2) | BIT(1)), 0, MODULE_I2C, 0) /* I2C1 SCL / I2C2 */ -ALTERNATE(PIN_MASK(8, BIT(7)), 0, MODULE_I2C, 0) /* I2C1 SDA */ -ALTERNATE(PIN_MASK(D, BIT(1) | BIT(0)), 0, MODULE_I2C, 0) /* I2C3 */ -ALTERNATE(PIN_MASK(3, BIT(3) | BIT(6)), 0, MODULE_I2C, 0) /* I2C5 */ -ALTERNATE(PIN_MASK(B, BIT(3) | BIT(2)), 0, MODULE_I2C, 0) /* I2C7 */ -``` - -The `i2c_ports[]` array requires the `.port` field to be assigned to an EC -chipset specific enumeration. For the NPCx7 I2C bus names are defined in -[./chip/npcx/registers.h]. The Volteer `baseboard.h` file creates a mapping from -the schematic net name to the NPCx7 I2C bus enumeration. - -```c -#define CONFIG_I2C -#define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 -#define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 -#define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 -#define I2C_PORT_POWER NPCX_I2C_PORT5_0 -#define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 -``` - -The last piece for I2C configuration is to create the `i2c_ports[]` array using -the macros and enumerations added to `baseboard.h` and `gpio.inc`. - -```c -/* I2C port map configuration */ -const struct i2c_port_t i2c_ports[] = { - { - .name = "sensor", - .port = I2C_PORT_SENSOR, - .kbps = 400, - .scl = GPIO_EC_I2C0_SENSOR_SCL, - .sda = GPIO_EC_I2C0_SENSOR_SDA, - .flags = 0, - }, - { - .name = "usb_c0", - .port = I2C_PORT_USB_C0, - /* - * I2C buses used for PD communication must be set for 400 kbps - * or greater. Set to the maximum speed supported by all devices. - */ - .kbps = 1000, - .scl = GPIO_EC_I2C1_USB_C0_SCL, - .sda = GPIO_EC_I2C1_USB_C0_SDA, - }, - { - .name = "usb_c1", - .port = I2C_PORT_USB_C1, - /* - * I2C buses used for PD communication must be set for 400 kbps - * or greater. Set to the maximum speed supported by all devices. - */ - .scl = GPIO_EC_I2C2_USB_C1_SCL, - .sda = GPIO_EC_I2C2_USB_C1_SDA, - }, - { - .name = "usb_1_mix", - .port = I2C_PORT_USB_1_MIX, - .kbps = 100, - .scl = GPIO_EC_I2C3_USB_1_MIX_SCL, - .sda = GPIO_EC_I2C3_USB_1_MIX_SDA, - }, - { - .name = "power", - .port = I2C_PORT_POWER, - .kbps = 100, - .scl = GPIO_EC_I2C5_POWER_SCL, - .sda = GPIO_EC_I2C5_POWER_SDA, - }, - { - .name = "eeprom", - .port = I2C_PORT_EEPROM, - .kbps = 400, - .scl = GPIO_EC_I2C7_EEPROM_SCL, - .sda = GPIO_EC_I2C7_EEPROM_SDA, - }, -}; -const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); -``` - -The `.flags` field is optional when using the default I2C bus setup. See -[./include/i2c.h] for the full list of supported flags. - -The flag `I2C_PORT_FLAG_DYNAMIC_SPEED` allows the I2C bus frequency to be -changed at runtime. The typical use case is to set the I2C bus frequency to -different speeds based on the BOARD_VERSION in [CBI]. For example board version -1 supports 100 kbps operation but board version 2 and greater supports 400 kbps -operation. `I2C_PORT_FLAG_DYNAMIC_SPEED` is not used to change the I2C bus -frequency on the fly depending on the addressed slave device. - -An example of changing the I2C bus frequency from the -[Kodama board](../../board/kodama/board.c) is shown below. - -```c -static void board_i2c_init(void) -{ - if (board_get_version() < 2) - i2c_set_freq(1, I2C_FREQ_100KHZ); -} -DECLARE_HOOK(HOOK_INIT, board_i2c_init, HOOK_PRIO_INIT_I2C); -``` - -[config.h]: ../new_board_checklist.md#config_h -[./chip/npcx/registers.h]: ../../chip/npcx/registers.h -[./include/i2c.h]: ../../include/i2c.h -[I2C Example]: ../images/i2c_example.png -[CBI]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md diff --git a/docs/configuration/keyboard.md b/docs/configuration/keyboard.md deleted file mode 100644 index 8398fefbde..0000000000 --- a/docs/configuration/keyboard.md +++ /dev/null @@ -1,87 +0,0 @@ -## Configure Keyboard - -## Config options - -Keyboard options start with `CONFIG_KEYBOARD*`. Evaluate whether each option is -appropriate to add to `baseboard.h` or `board.h`. - -Your board should select only one of these options to configure the protocol -used to send keyboard events to the AP. - -- `CONFIG_KEYBOARD_PROTOCOL_8042` - Systems with an x86 AP use the 8042 - protocol. -- `CONFIG_KEYBOARD_PROTOCOL_MKBP` - Systems without an x86 AP (e.g. ARM) - typically use the MKBP protocol. - -## Feature Parameters - -- `CONFIG_KEYBOARD_KSO_BASE <pin>` - Evaluate whether this parameter is - required by your board. - -## GPIOs and Alternate Pins - -Define `ALTERNATE()` pin entries for all keyboard matrix signals, to connect the -signals to the keyboard controller of the EC chipset. - -Note that KSO_02 is purposely not configured for for alternate mode. See the -[H1 Special Requirements](#H1-Special-Requirements) below for details. - -```c -/* Example Keyboard pin setup */ -#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) -ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_00-01 */ -ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI_02-07 */ -ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_00-01 */ -ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_03-09 */ -ALTERNATE(PIN_MASK(0, 0xF0), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_10-13 */ -ALTERNATE(PIN_MASK(8, 0x04), 0, MODULE_KEYBOARD_SCAN, GPIO_ODR_HIGH) /* KSO_14 */ -``` - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Data structures - -- `struct keyboard_scan_config keyscan_config` - This can be used to customize - the keyboard scanner (e.g. scan frequency, debounce duration, etc.). - -## Tasks - -The `KEYSCAN` task monitors the keyboard matrix for new key presses and is -required by this feature. The priority is set as one of the highest priority -tasks in the system, typically only below the `PD_Cn` and `PD_INT_Cn` tasks. - -```c - TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ -``` - -The `KEYPROTO` task handles sending and receiving 8042 protocol messages from -the AP and is required when `CONFIG_KEYBOARD_PROTOCOL_8042` is used. The typical -priority is lower than the `HOSTCMD` task. - -```c - TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ -``` - -## Additional Notes - -- If you're including keyboard support, you should also define - `CONFIG_CMD_KEYBOARD` to enable keyboard debug commands from the EC console. -- `CONFIG_KEYBOARD_PROTOCOL_MKBP` automatically enables `CONFIG_MKBP_EVENT`. -- Boards that enable `CONFIG_KEYBOARD_PROTOCOL_8042` will often also define - `CONFIG_MKBP_EVENT` for sensor events. In this case only motion sensor data - is reported using the MKBP protocol, keyboard events are provided using the - 8042 protocol. Refer to [Configuring Sensors](./motion_sensors.md) for more - information. - -### H1 Special Requirements - -On Boards that use the H1 secure microcontroller, one KSI (keyboard scan input) -signal and one KSO (keyboard scan output) signal are routed through the H1 -microcontroller. There are additional GPIO and configuration options that must -be enabled in this case. - The KSO_02/COL2 signal is always inverted. Explicitly -configure the GPIO to default low. `c GPIO(KBD_KSO2, PIN(1, 7), GPIO_OUT_LOW) /* -KSO_02 inverted */` - Add the define `CONFIG_KEYBOARD_COL2_INVERTED` to -`baseboard.h` or `board.h`. - If required by the board, define one of the -following options to configure the KSI pin routed to the H1 microcontroller. - -`CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI2` - `CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3` diff --git a/docs/configuration/leds.md b/docs/configuration/leds.md deleted file mode 100644 index c4fe7894af..0000000000 --- a/docs/configuration/leds.md +++ /dev/null @@ -1,88 +0,0 @@ -# Configure LEDs - -LEDs provide status about the following: - -- Dedicated battery state/charging state -- Chromebook power -- Adapter power -- Left side USB-C port (battery state/charging state) -- Right side USB-C port (battery state/charging state) -- Recovery mode -- Debug mode - -LEDs can be configured as simple GPIOs, with on/off control only, or as PWM with -adjustment brightness and color. - -## Config options - -In [config.h], search for options that start with `CONFIG_LED*` and evaluate -whether each option is appropriate to add to `baseboard.h` or `board.h`. - -- `CONFIG_LED_COMMON` - Should be defined for both GPIO and PWM style LEDs. -- `CONFIG_LED_ONOFF_STATES` - used for GPIO controlled LEDs -- `CONFIG_LED_PWM` - used for PWM controlled LEDs. You must also define - `CONFIG_PWM` when using PWM controlled LEDs. - -## Feature Parameters - -- `CONFIG_LED_PWM_COUNT <count>` - Must be defined when using PWM LEDs - -Override the following parameters when using PWM LEDs if you don't want to use -the recommended LED color settings. - `CONFIG_LED_PWM_CHARGE_COLOR -<ec_led_color>` - `CONFIG_LED_PWM_NEAR_FULL_COLOR <ec_led_color>` - -`CONFIG_LED_PWM_CHARGE_ERROR_COLOR <ec_led_color>` - -`CONFIG_LED_PWM_SOC_ON_COLOR <ec_led_color>` - `CONFIG_LED_PWM_SOC_SUSPEND_COLOR -<ec_led_color>` - `CONFIG_LED_PWM_LOW_BATT_COLOR <ec_led_color>` - -## GPIOs and Alternate Pins - -For GPIO based LEDs, create `GPIO()` entries for all signals that connect to -platform LEDs. The default state of the pins should be set so that the LED is -off (typically high output). - -For PWM LEDs, configure the `ALTERNATE()` macro, setting the module type to -`MODULE_PWM`. - -## Data structures - -For GPIO based LEDs: - `struct led_descriptor -led_bat_state_table[LED_NUM_STATES][LED_NUM_PHASES]` - Must be defined when -`CONFIG_LED_ONOFF_STATES` is used. Defines the LED states for the platform for -various charging states. - -For PWM based LEDs: - `const enum ec_led_id supported_led_ids[]` - Defines the -LED type for all PWM LEDs in the system. See [./include/ec_commands.h] for a -description of the supported LED types. - `struct pwm_led led_color_map[]` - -Defines the PWM intensity of the individual LEDs to generate the corresponding -color. This table allows for custom tuning of the LED brightness and color. - -`const struct pwm_channels[]` - Configures the PWM module, refer to the -[Configuring PWM](./pwm.md) section for details. - -See the [GPIO](./gpio.md) documentation for additional details on the GPIO -macros. - -## Tasks - -None required by this feature. - -## Testing and Debugging - -### Console Commands - -- `pwmduty` - *TODO* add description. -- `gpioset` - For GPIO based LEDs, this command lets you directly change the - state of the LED. -- `gpioget` - For GPIO based LEDs, this reads current state of the pin. If the - current state does not track changes made with `gpioset`, check your board - for stuck at high or stuck at low condition. - -If you're having problems with a PWM LED, try reconfiguring the pin as a GPIO to -verify the board operation independent of the PWM module. - -## LED Driver Chips - -LED driver chips are used to control the LCD panel backlight. The backlight -control is separate from the platform LEDs. - -[config.h]: ../new_board_checklist.md#config_h -[./include/ec_commands.h]: ../../include/ec_commands.h diff --git a/docs/configuration/motion_sensors.md b/docs/configuration/motion_sensors.md deleted file mode 100644 index 6e84fc3307..0000000000 --- a/docs/configuration/motion_sensors.md +++ /dev/null @@ -1,50 +0,0 @@ -# Configure Motion Sensors - -EC sensors are used for the following capabilities: - -- Accelerometers in base and lid measure lid angle to toggle between laptop - and tablet modes. -- Ambient light sensors control display backlight level. -- All sensor types, including gyroscope, e-compass, and pressure, are used by - Android apps. -- Special sync sensor type, synchronizes sensor events with AP. - -*TODO* - there is good content available in the most recent [Chrome EC] overview -presentation that can be added here. - -## Config options - -*TODO* - -## Feature Parameters - -*TODO* - -## GPIOs and Alternate Pins - -*TODO* - -- `GPIO_EC_INT_L` - Output from the EC, driven low to indicate an event on the - EC is ready for servicing by the AP. - -## Data Structures - -*TODO* - -## Tasks - -*TODO* - -## Testing and Debugging - -*TODO* - -### Console Commands - -*TODO* - -## Example - -*TODO* - -[Chrome EC]: https://docs.google.com/presentation/d/1Y3PwNSnCQoCqDfL5rYqfaBP_ZqbMOTw_x83_ry4cro8/view#slide=id.g63bdbcea4b_0_27 diff --git a/docs/configuration/template.md b/docs/configuration/template.md deleted file mode 100644 index be4d2378a5..0000000000 --- a/docs/configuration/template.md +++ /dev/null @@ -1,51 +0,0 @@ -# EC Feature Configuration Template - -*Short description of the EC feature and the capabilities provided* - -## Config options - -In [config.h], search for options that start with `CONFIG_<feature>*` and -evaluate whether each option is appropriate to add to `baseboard.h` or -`board.h`. - -*Note - Avoid documenting `CONFIG_` options in the markdown as `config.h` -contains the authoritative definition.* - -## Feature Parameters - -*Detail `CONFIG_*` options that must be assigned to a value for this EC feature -to compile and operate.* - -## GPIOs and Alternate Pins - -*Document any hard-coded GPIO enumeration names required by the EC feature.* - -*For pins that require an alternate function, note the module required by the EC -feature.* - -## Data Structures - -*Document any data structures that must be defined in the board.c or baseboard.c -files in order for the EC feature to compile and operate.* - -*Document any functions that must be implemented in the board.c and baseboard.c -files.* - -## Tasks - -*Document any EC tasks that must be enabled by the feature.* - -## Testing and Debugging - -*Provide any tips for testing and debugging the EC feature.* - -### Console Commands - -*Document an EC console commands related to the feature.* - -## Example - -*Optional - provide code snippets from a working board to walk the user through -all code that must be created to enable this feature.* - -[config.h]: ../new_board_checklist.md#config_h diff --git a/docs/core_runtime.md b/docs/core_runtime.md deleted file mode 100644 index 4a45136234..0000000000 --- a/docs/core_runtime.md +++ /dev/null @@ -1,329 +0,0 @@ -# Chromium OS Embedded Controller Runtime - -## Design Principles - -1. Never do at runtime what you can do at compile time The goal is saving flash - space and computations. Compile-time configuration until you really need to - switch at runtime. - -2. Real-time: guarantee low latency (eg < 20 us) no interrupt disabling ... - bounded code in interrupt handlers. - -3. Keep it simple: design for the subset of microcontroller we use targeted at - 32-bit single core CPU for small systems : 4kB to 64kB data RAM, possibly - execute-in-place from flash. - -## Execution Contexts - -This is a pre-emptible runtime with static tasks. It has only 2 possible -execution contexts: - -- the regular [tasks](#tasks) -- the [interrupt handlers](#interrupts) - -The initial startup is an exception as described in the -[dedicated paragraph](#startup). - -### Tasks - -The tasks are statically defined at compile-time. They are described for each -*board* in the [board/$board/ec.tasklist](../board/host/ec.tasklist) file. - -They also have a static fixed priority implicitly defined at compile-time by -their order in the [ec.tasklist](../board/host/ec.tasklist) file (the top-most -one being the lowest priority aka *task* *1*). As a consequence, two different -tasks cannot have the same priority. - -In order to store its context, each task has its own stack whose (*small*) size -is defined at compile-time in the [ec.tasklist](../board/host/ec.tasklist) file. - -A task can normally be preempted at any time by either interrupts or higher -priority tasks, see the [preemption section](#scheduling-and-preemption) for -details and the [locking section](#locking-and-atomicity) for the few cases -where you need to avoid it. - -### Interrupts - -The hardware interrupt requests are connected to the interruption handling *C* -routines declared by the `DECLARE_IRQ` macros, through some chip/core specific -mechanisms (e.g. depending on whether we have a vectored interrupt controller, -slave interrupt controllers...) - -The interrupts can be nested (ie interrupted by a higher priority interrupt). -All the interrupt vectors are assigned a priority as defined in their -`DECLARE_IRQ` macro. The number of available priority level is -architecture-specific (e.g. 4 on Cortex-M0, 8 on Cortex-M3/M4) and several -interrupt handlers can have the same priority. An interrupt handler can only be -interrupted by a handler having a priority **strictly** **greater** than its -own. - -In most cases, the exceptions (e.g data/prefetch aborts, software interrupt) can -be seen as interrupts with a priority strictly greater than all IRQ vectors. So -they can interrupt any IRQ handler using the same nesting mechanism. All fatal -exceptions should ultimately lead to a reboot. - -### Events - -Each task has a *pending* events bitmap[1] implemented as a 32-bit word. Several -events are pre-defined for all tasks, the most significant bits on the 32-bit -bitmap are reserved for them : the timer pending event on bit 31 -([see the corresponding section](#time)), the requested task wake (bit 29), the -event to kick the waiters on a mutex (bit 30), along with a few hardware -specific events. The 19 least significant bits are available for task-specific -meanings. - -Those event bits are used in inter-task communication and scheduling mechanism, -other tasks **and** interrupt handlers can atomically set them to request -specific actions from the task. Therefore, the presence of pending events in a -task bitmap has an impact on its scheduling as described in the -[scheduling section](#scheduling-and-preemption). These requests are done using -the `task_set_event()` and `task_wake()` primitives. - -The two typical use-cases are: - -- a task sends a message to another task (simply use some common memory - structures [see explanation](#single-address-space) and want it to process - it now. -- a hardware IRQ occurred, and we need to do some long processing to respond - to it (e.g. an I2C transaction). The associated interrupt handler cannot do - it (for latency reason), so it will raise an event to ask a task to do it. - -The task code chooses to consume them (or a subset of them) when it's running -through the `task_wait_event()` and `task_wait_event_mask()` primitives. - -### Scheduling and Preemption - -The system has a global bitmap[1] called `tasks_ready` containing one bit per -task and indicating whether it is *ready* *to* *run* (ie want/need to be -scheduled). The task ready bit can only be cleared when it's calling itself one -of the functions explicitly triggering a re-scheduling (e.g. `task_wait_event()` -or `task_set_event()`) **and** it has no pending event. The task ready bit is -set by any task or interrupt handler setting an event bit for the task (ie -`task_set_event()`). - -The scheduling is based on (and *only* on) the `tasks_ready` bitmap (which is -derived from all the events bitmap of the tasks as explained above). - -Then, the scheduling policy to find which task should run is just finding the -most significant bit set in the tasks_ready bitmap and schedule the -corresponding task. - -Important note: the re-scheduling happens **only** when we are exiting the -interrupt context. It is done in a non-preemptible context (likely with the -highest priority). Indeed, a re-scheduling is actually needed only when the -highest priority task ready has changed. There are 3 distinct cases where this -can happen: - -- an interrupt handler sets a new event for a task. In this case, - `task_set_event` will detect that it is executed in interrupt context and - record in the `need_resched_or_profiling` variable that it might need to - re-schedule at interrupt return. When the current interrupt is going to - return, it will see this bit and decide to take the slow path making a new - scheduling decision and eventually a context switch instead of the fast path - returning to the interrupt task. -- a task sets an event on another task. The runtime will trigger a software - interrupt to force a re-scheduling at its exit. -- the running task voluntarily relinquish its current execution rights by - calling `task_wait_event()` or a similar function. This will call the - software interrupt similarly to the previous case. - -On the re-scheduling path, if the highest-priority ready task is not matching -the currently running one, it will perform a context-switch by saving all the -processor registers on the current task stack, switch the stack pointer to the -newly scheduled task, and restore the registers from the previously saved -context from there. - -### Hooks and Deferred Functions - -The lowest priority task (ie Task 1, aka TASK_ID_HOOKS) is reserved to execute -repetitive actions and future actions deferred in time without blocking the -current task or creating a dedicated task (whose stack memory allocation would -be wasting precious RAM). - -The HOOKS task has a list of deferred functions and their next deadline. Every -time it is waken up, it runs through the list and calls the ones whose deadline -is expired. Before going back to sleep, it arms a timer to the closest deadline. -The deferred functions can be created using the `DECLARED_DEFERRED()` macro. -Similarly, the HOOK_SECOND and HOOK_TICK hooks are called periodically by the -HOOKS task loop (the *tick* duration is platform-defined and shorter than the -second). - -Note: be specially careful about priority inversions when accessing resources -protected by a mutex (e.g. a shared I2C controller) in a deferred function. -Indeed being the lowest priority task, it might be de-scheduled for long time -and starve higher priority tasks trying to access the resource given there is no -priority boosting implemented for this case. Also, be careful about long delays -(> x 100us) in hook or deferred function handlers, since those will starve other -hooks of execution time. It is better to implement a state machine where you set -up a subsequent call to a deferred function than have a long delay in your -handler. - -### Watchdog - -The system is always protected against misbehaving tasks and interrupt handlers -by a hardware watchdog rebooting the CPU when it is not attended. - -The watchdog is petted in the HOOKS task, typically by declaring a HOOK_TICK -doing it as regular intervals. Given this is the lowest priority task, this -guarantees that all tasks are getting some run time during the watchdog period. - -Note: that's also why one should not sprinkle its code with `watchdog_reload()` -to paper over long-running routine issues. - -To help debug bad sequences triggering watchdog reboots, most platforms -implement a warning mechanism defined under `CONFIG_WATCHDOG_HELP`. It's a timer -firing at the middle of the watchdog period if it hasn't been petted by then, -and dumping on the console the current state of the execution mainly to help -find a stuck task or handler. The normal execution is resumed though after this -alert. - -### Startup - -The startup sequence goes through the following steps: - -- the assembly entry routine clears the .bss (uninitialized data), copies the - initialized data (and optionally the code if we are not executing from - flash), sets a stack pointer. -- we can jump to the `main()` C routine at this point. -- then we go through the hardware pre-init (before we have all the clocks to - run the peripherals normal) and init routines, in this rough order: memory - protection if any, gpios in their default state, prepare the interrupt - controller, set the clocks, then timers, enable interrupts, init the debug - UART and the watchdog. -- finally, start tasks. - -For the tasks startup, initially only the HOOKS task is marked as ready, so it -is the first to start and can call all the HOOK_INIT handlers performing -initializations before actually executing any real task code. Then all tasks are -marked as ready, and the highest priority one is given the control. - -During all the startup sequence until the control is given the first task, we -are using a special stack called 'system stack' which will be later re-used as -the interrupts and exception stack. - -To prepare the first context switch, the code in `task_pre_init()` is stuffing -all the tasks stacks with a *fake* saved context whose program counter contains -the task start address, and the stack pointer is pointing to its reserved stack -space. - -### Locking and Atomicity - -The two main concurrency primitives are lightweight atomic variables and heavier -mutexes. - -The atomic variables are 32-bit integers (which can usually be loaded/stored -atomically on the architecture we are supporting). The `atomic.h` headers -include primitives to do atomically various bit and arithmetic operations using -either load-linked/load-exclusive, store-conditional/store-exclusive or simple -depending on what is available. - -The mutexes are actually statically allocated binary semaphores. In case of -contention, they will make the waiting task sleep (removing its ready bit) and -use the [event mechanism](#events) to wake-up the other waiters on unlocking. - -Note: the mutexes are NOT triggering any priority boosting to avoid the priority -inversion phenomenon. - -Given the runtime is running on single core CPU, spinlocks would be equivalent -to masking interrupts with `interrupt_disable()` spinlocks, but it's strongly -discouraged to avoid harming the real-time characteristics of the runtime. - -## Time - -### Time Keeping - -In the runtime, the time is accounted everywhere using a **64-bit** -**microsecond** count since the microcontroller **cold** **boot**. - -Note: The runtime has no notion of wall-time/date, even though a few platforms -have an RTC inside the microcontroller. - -These microsecond timestamps are implemented in the code using the `timestamp_t` -type, and the current timestamp is returned by the `get_time()` function. - -The time-keeping is preferably implemented using a 32-bit hardware free running -counter at 1Mhz plus a 32-bit word in memory keeping track of the high word of -the 64-bit absolute time. This word is incremented by the 32-bit timer rollback -interrupt. - -Note: as a consequence of this implementation, when the 64-bit timestamp is read -in interrupt context in a handler having a higher priority than the timer IRQ -(which is somewhat rare), the high 32-bit word might be incoherent (off by one). - -### Timer Event - -The runtime offers *one* (and only one) timer per task. All the task timers are -multiplexed on a single hardware timer. (can be just a *match* *interrupt* on -the free running counter mentioned in the [previous paragraph](#time-keeping)) -Every time a timer is armed or expired, the runtime finds the task timer having -the closest deadline and programs it in the hardware to get an interrupt. At the -same time, it sets the TASK_EVENT_TIMER event in all tasks whose timer deadline -has expired. The next deadline is computed in interrupt context. - -Note: given each task has a **single** timer which is also used to wake-up the -task when `task_wait_event()` is called with a timeout, one needs to be careful -when using directly the `timer_arm()` function because there is an eventuality -that this timer is still running on the next `task_wait_event()` call, the call -will fail due to the lack of available timer. - -## Memory - -### Single Address Space - -There is no memory isolation between tasks (ie they all live in the same address -space). Some architectures implement memory protection mechanism albeit only to -differentiate executable area (eg `.code`) from writable area (eg `.bss` or -`.data`) as there is a **single** **privilege** level for all execution -contexts. - -As all the memory is implicitly shared between the task, the inter-task -communication can be done by simply writing the data structures in memory and -using events to wake the other task (given we properly thought the concurrent -accesses on those structures). - -### Heap - -The data structure should be statically allocated at compile time. - -Note: there is no dynamic allocator available (e.g. `malloc()`), not due to -impossibility to create one but to avoid the negative side effects of having -one: ie poor/unpredictable real-time behavior and possible leaks leading to a -long-tail of failures. - -- TODO: talk about shared memory -- TODO: where/how we store *panic* *memory* and *sysjump* *parameters*. - -### Stacks - -Each task has its own stack, in addition there is a system stack used for -startup and interrupts/exceptions. - -Note 1: Each task stack is relatively small (e.g. 512 bytes), so one needs to be -careful about stack usage when implementing features. - -Note 2: At the same time, the total size of RAM used by stacks is a big chunk of -the total RAM consumption, so their sizes need to be carefully tuned. (please -refer to the [debugging paragraph](#debugging) for additional input on this -topic. - -## Firmware Code Organization and Multiple Copies - -- TODO: Details the classical RO / RW partitions and how we sysjump. - -## Power Management - -- TODO: talk about the idle task + WFI (note: interrupts are disabled!) -- TODO: more about low power idle and the sleep-disable bitmap -- TODO: adjusting the microsecond timer at wake-up - -## Debugging - -- TODO: our main tool: serial console ... (but non-blocking / discard - overflow, cflush DO/DONT) -- TODO: else JTAG stop and go: careful with watchdog and timer -- TODO: panics and software panics -- TODO: stack size tuning and canarying - -- TODO: Address the rest of the comments from https://crrev.com/c/445941 - -\[1]: bitmap: array of bits. diff --git a/docs/detachable_base_verified_boot.md b/docs/detachable_base_verified_boot.md deleted file mode 100644 index c1eec3fc0b..0000000000 --- a/docs/detachable_base_verified_boot.md +++ /dev/null @@ -1,432 +0,0 @@ -# Detachable Base Verified Boot - -Authors: rspangler@google.com, drinkcat@google.com - -Last Updated: 2016-11-16 - -Original: http://go/detachable-base-vboot - -[TOC] - -## Introduction - -### What's a Base? - -Detachable Chromebooks such as `Poppy` have a tablet-like `Lid` and a detachable -keyboard `Base`. Effectively, the `Base` is a USB keyboard+trackpad which plugs -into the `Lid`. - -The `Lid` contains most of the components, including: - -* AP -* ECDisplay -* Storage -* Battery - -The `Base` connects to the `Lid` via USB pogo pins, and contains: - -* EC ([STM32F072]). To minimize confusion with the main EC in the `Lid`, this - will always be called the `BaseEC`. -* Matrixed keyboard -* Touchpad - -The `Base` always gets its power from the `Lid` USB port. This means that -attaching the base always triggers a power-on reset. - -### Verified Boot Requirements - -The `BaseEC` will be responsible for handling user input from the keyboard and -touchpad. This means that a compromised `BaseEC` could implement a keylogger. To -prevent this, we will use verified boot to protect the `BaseEC` firmware. - -We need a way to securely update the `BaseEC` firmware from the AP. We cannot -use EC Software Sync as implemented on existing Chromebooks (and as still used -in the `Lid`) because the `Base` cannot trust that it is talking to an official -`Lid` firmware/OS. All the Base knows is that _something_ on the other end of -USB is trying to send it an update. So the BaseEC will need to do its own public -key verification of the firmware update. This includes rollback protection. - -Updating the `BaseEC` firmware should not require rebooting the lid. This means -the update will take place after the OS has already booted on the lid. Ideally, -it should also not require the user to detach/reattach the base during the -update process. If the update takes longer than a few seconds, we should tell -the user, because the keyboard and trackpad will be unavailable during the -update. - -The solution should also have low (or no) BOM cost, and minimal flash size -requirement. - -## Proposal - -`BaseEC` RO region includes a public key, whose private counterpart is kept -safely on our signers. On boot, RO checks RW signature (RW image is signed by -our signers), and will only jump to RW if the signature is valid. - -We also include a rollback region (RB) to implement rollback protection (and -prevent rollback to a correctly signed, but compromised, RW). This region can -only be updated by RO. - -We also devise a scheme to update RW firmware (the details are documented in -[EC Update over USB]). - -Note: This proposal is very specific to the STM32 flash architecture. Other ECs -(particularly ones with external SPI flash) may need additional external logic -and/or a I2C EEPROM to hold the rollback info block. - -### Flash - -STM32F072 has 128KB flash, with 2KB erase sectors and 4KB protection blocks. - -We will divide flash into three sections: - -* `BaseEC`-RO firmware. - * Not updatable in production. - * Only capable of USB update, not keyboard/trackpad. - * Contains public key to verify RW image (RSA-3072). -* `BaseEC`-RW firmware. - * Fully functional. - * Updatable from AP. - * Signature (SHA-256 + RSA-3072). -* `BaseEC`-RB: Rollback info block (4KB). - * Contains minimum RW version that RO will accept to jump to. - * Updatable from RO. - -Each of those sections can be locked independently: In production, RO is always -locked, and only RO can write to RB (RO will always make sure to lock RB before -jumping to RW). - -Flash protection is a little entertaining on STM32: - -* The flash protection bits for the \*next\* boot are stored in a non-volatile - `WRPx` register (in EC code, this is abstracted as - `EC_FLASH_PROTECT_[REGION]_AT_BOOT` flags).. -* On chip reset, `WRPx` is copied into a read-only `FLASH_WRPR` register; that - controls which blocks are protected for this boot. This is abstracted as - `EC_FLASH_PROTECT_[REGION]_NOW` in the EC code. - -### Rollback Info Block - -The Rollback Info Block (aka "RB") is a 4KB block of flash. - -It has two 2KB erase sectors. We will ping-pong writes to those sectors, so that -interrupting power during an erase-write cannot cause data loss. If both sectors -are valid, the stricter (i.e. the highest value) of the 2 sectors is used. - -We will use the RB to hold the following: - -* Minimum **RW rollback firmware** version: a 32-bit integer. Used for - rollback protection. This number is independent of the actual EC version, - and is stored a 32-bit integer as part of the `BaseEC`-RW region (see - [CL:452815] for a possible implementation) -* A magic signature that indicates that the RB section is valid. - -### RO Verified Boot Flow - -#### Write-Protect RO think test before this handles corrupt RW. - -Write protect of RO firmware works the same way it does now: - -* Early RO code looks at a write protect (WP) GPIO and a global PSTATE - variable (part of the RO image itself). When we switch to RO that contains - the MP key, we set the PSTATE to locked. -* If both of those are set: - * RO code sets `EC_FLASH_PROTECT_RO_AT_BOOT` to protect itself. This - ensures RO code is never writable past this point. - * If `_AT_BOOT` flags protects more than the current write protect range - (`_NOW` flags), RO reboots so that changes take effect. -* Otherwise, someone has physically disconnected WP. Set `WRPx=0` to unprotect - all flash and reboot. - -#### Check if AP Wants To Update RW - -Next, RO needs to find out if the AP wants to update RW. RO initializes USB and -starts a 1 second timer to give the AP an opportunity to send a command before -RO jumps to RW. This delay gives us a way to regain control of the base, if the -previous RW firmware is properly signed but bad/nonfunctional. - -That command can be: - -* `STOP_IN_RO`: Yes, I might want to update you. Stick around. - * `UNLOCK_RW`: Tells EC to unlock RW region, if it is currently locked, so - that it can be reprogrammed. This also locks RB region. EC reboots if - needed. -* `JUMP_TO_RW`: No, I don't want to update you. Go ahead and jump to your RW - code if it verifies. - -RO will start verifying RW while it waits for the AP to send it a command or for -the timeout. If a command is received, RO will stop the 1-second timer, and wait -for more commands from the AP. This allows the AP to update RW. - -Verifying RW will take ~200 ms, and the AP should be able to send a command to -the base within ~100 ms of it appearing on USB, so this check should not cause -any delay to the base's boot process. - -#### Verify RW - -RO calculates the hash of RW. - -* Use the public key stored in RO to check if the hash matches the RSA-signed - RW signature. On failure, go back to waiting for an update from the AP. -* Check the RW rollback version against the stored minimum version in RB. If - the RW version is too low, fail. Go back to waiting for an update from the - AP. -* If RO is protected, then also set `EC_FLASH_PROTECT_RW_AT_BOOT` so that RW - will be protected on the next boot, the reboot. - -#### Roll Forward - -If `EC_FLASH_PROTECT_ROLLBACK_NOW` is set (RB is protected), do not attempt to -roll forward. We know RW firmware is properly signed, but not if it's -functional. - -If `EC_FLASH_PROTECT_ROLLBACK_NOW` is not set (RB is unprotected), \_and\_ the -RW signature is correct, then update RB: - -* Erase/write the older sector of RB. -* Set the stored minimum version to the RW rollback version. -* If RO is protected, then also set `EC_FLASH_PROTECT_ROLLBACK_NOW` so that RB - will be protected on the next boot. - -#### Jump to RW - -If the 1-second timer for the AP to send a command to RO has not expired, RO -waits for it to expire or the AP to send a command, whichever happens first. - -If RB or RW is unprotected (`EC_FLASH_PROTECT_RW/ROLLBACK_NOW` are not set), -protect it and reboot (we never want RW to be able to update RB on its own). - -Otherwise, jump to RW firmware. - -### RW Verified Boot Flow - -RW firmware provides the keyboard and trackpad functionality. - -#### AP Wants To Update RW - -At some point the AP may want to update RW. To do so, it sends `UNLOCK_RW` -command, to ask RW to unlock itself and reboot, then follow the update steps -above. - -#### AP Wants to Roll Forward RW - -After the update, the base boots to the new RW firmware. At that point, the AP -knows the new RW firmware is good enough to talk to, so it tells RW to prepare -for roll forward. - -* `UNLOCK_ROLLBACK` command: RW unprotects RB. -* On next boot (not necessarily urgent, but can be forced), RO will update RB - according to the steps above. - -### Write Protect GPIO - -The `BaseEC` needs a write protect (WP) GPIO signal to decide whether to keep RO -firmware protected or not. This is the same requirement as on existing ECs. - -In an assembled base, the WP signal will be physically asserted. De-asserting -the signal requires disassembling the base and disconnecting something. - -Typically, the `BaseEC` will apply a weak pull-up to the WP GPIO; the presence -of the WP screw/flex will short the pin to ground. - -#### RO Updates During Development - -If RO is unprotected (i.e. during development), RW can also update it. - -If the key is \_not\_ the same (dev->premp, premp->mp updates) we can't update -RW first (it won't verify). These steps should work though, if current RW is -recent enough and stable enough to update RO: - -* Make sure RW is active -* Update RO, reboot -* Update RW from RO - -If the key is the same, we can update RW first. - -### Signer, image format, and verification process - -Memory map: - -RO | RB | RW -------------------------------------------------- | --- | --- -`...` \| `Public key` \| `...` \| `FMAP` \| `...` | | `EC code and data` \| `Blank (0xff)` \| `Signature` - -* RO contains an embedded RSA public key (`vb21_packed_key` format), at a - variable location. -* RW contains a signature (`vb21_signature`), packed at the end of the RW - region. - * The signature also contains the actual length of the EC code and image - (ignoring 0xff padding) - * RO validates signature against the provided length, then checks that the - rest of the RW region (up to the signature itself) is filled with ones - (padding). - * This speeds up verification significantly, as SHA-256 is an - expensive process. -* RO contains an FMAP that allows futility to find the RO key, RW region, and - RW signature location. - -For re-signing, `futility` (rwsig type) does this: - -* Look for FMAP to find RO public key RW region, and RW signature locations. -* Resign RW region, using the length provided in existing RW signature. -* Replace RO public key with the one used for signing. - -`vb21_packed_key` (public key) has a field for key version, that we can use to -increment from dev keys, to premp, and final mp keys. BaseEC will need to report -the key version, to avoid incorrect updates. - -## Example Boot / Update Flows - -The base starts in the following state: - -* Powered off -* WP GPIO is asserted -* PSTATE is set to protect RO firmware -* RW firmware is valid, and currently version M -* `EC_FLASH_PROTECT_[REGION]_AT_BOOT/_NOW` protects RO+RW+RB (that is, - everything) - -All AP operations are done from the `Lid` OS. - -Base updates will interrupt keyboard/trackpad functionality, so the user should -be informed when an update is taking place. - -Reboots of the `Base` do not cause or require reboots of the `Lid`, do not -require action on the part of the user, and will not be visible to the user -(other than the previously noted lack of functionality). - -### Power On, No Update - -Step | RW | RB contents | `_AT_BOOT` | `_NOW` ---------------------------------------------------------------------------------------------- | --- | ----------- | ---------- | ------ -(initial state) | M | 1/blank | RO/RW/RB | RO/RW/RB -1. RO waits 1 second for an update request from AP | | | | -2. RO verifies RW signature => RW is good | | | | -3. RO notes that `_AT_BOOT` and `_NOW` already protect everything, so no reboot is necessary. | | | | -4. RO jumps to RW | | | | - -### Updating RW - -Assume AP now has a new `BaseEC`-RW, version N>M. The base is already running RW -version M. In this card, the rollback version in both version is identical -("1"), so RB does not require an update. - -Step | RW | RB contents | `_AT_BOOT` | `_NOW` -------------------------------------------------------- | --- | ----------- | -------------- | ------ -RW is running | M | 1/blank | RO/RW/RB | RO/RW/RB -AP tells RW to prepare for an update (UNLOCK_RW) | | | | -RW unsets `EC_FLASH_PROTECT_RW_AT_BOOT` to unprotect RW | | | **RO/\_\_/RB** | -RW reboots to update `EC_FLASH_PROTECT_RW_NOW` | | | | **RO/\_\_/RB** - -The next base boot is where the update takes place: - -Step | RW | RB contents | `_AT_BOOT` | `_NOW` ----------------------------------------------------------------------------------------------------------------------------------------------------------------- | ----- | ----------- | ------------ | ------ -RO waits 2 seconds for an update request from the AP | M | 1/blank | RO/\_\_/RB | RO/\_\_/RB -AP tells RO an update is coming (`STOP_IN_RO`) | | | | -AP tells the user that a base update is taking place. UI should say: "Please don't be surprised that your keyboard and trackpad won't work for a few seconds..." | | | | -AP writes RW version N | **N** | | | -AP tells RO to reboot (`IMMEDIATE_RESET`) | | | | -RO reboots, verifies RW signature => RW is good | | | | -RO checks RW rollback version N (1) and sees it's greater or equal than RB rollback version 1. So, RW is good. | | | | -RO sets `RW_AT_BOOT` to protect RW on the next boot. | | | **RO/RW/RB** | -RO reboots | | | | **RO/RW/RB** - -The next base boot is where we first run the new RW firmware. - -### Roll forward - -Now let's assume we followed the steps above, and we now have a RW version O -that has rollback version 2. - -Step | RW | RB contents | `_AT_BOOT` | `_NOW` --------------------------------------------------------------------------------------------------------------- | ----- | ----------- | -------------- | ------ -RO verifies RW signature => RW is good | **O** | 1/blank | RO/RW/RB | RO/RW/RB -RO checks RW rollback version O (2) and sees it's greater or equal than RB rollback version 1. So, RW is good. | | | | -RO jumps to RW | | | | -AP is satisfied that the base works, so it tells RW to prepare for a | | | | -roll-forward (`UNLOCK_ROLLBACK`) | | | | -RW unsets `ROLLBACK_AT_BOOT` | | | **RO/RW/\_\_** | -RW may reboot (or just wait for next reattach) | | | | **RO/RW/\_\_** - -On next boot, RB will be updated: - -Step | RW | RB contents | `_AT_BOOT` | `_NOW` ------------------------------------------------------------------------------------------------------------------------------------------ | --- | ----------- | ------------ | ------ -RO verifies RW signature => RW is good | O | 1/blank | RO/RW/\_\_ | RO/RW/\_\_ -RO sees that RB is unprotected, and sees RW rollback version O (2) and sees is greater than RB rollback version 1. So RB needs an update. | | | | -RO updates RB's second block | O | **1/2** | | -RO sets `ROLLBACK_AT_BOOT` to protect RB on the next boot. | | | **RO/RW/RB** | -RO reboots. | | | | **RO/RW/RB** - -## Details - -### STM32 Flash Protection - -At a high level, flash protection works on the STM32F072 chip works in the -following manner: - -* 128KB flash total flash, organized as 32 independently protectable 4KB - blocks. Each block has 2 independently erasable 2KB sectors. -* `FLASH_WRPR` is the register controlling flash write protect of these - blocks. It is not directly writable. In EC common code, these bits are - abstracted as `EC_FLASH_PROTECT_[REGION]_NOW`. -* Instead, there is a non-volatile register called `WRPx`, which is stored in - a separate information block of flash. This is always writable. In EC common - code, these bits are abstracted as `EC_FLASH_PROTECT_[REGION]_AT_BOOT`. On - chip reset, `WRPx` is copied to the `FLASH_WRPR` register. - -Here's the interesting part. The only way to change read-only firmware is to -change `WRPx` and then reset the chip, so that `WRPx` is copied into -`FLASH_WRPR`. At that point, read-only firmware could be writable. But that same -reset also transfers control back to the read-only firmware. If the read-only -firmware doesn't want to be writable, all it has to do is change `WRPx` back to -protect itself, and then reboot again. We do that already on all devices which -use the STM32 chips. - -Flash protection works similarly on other STM32F chips, if we need to move to a -larger or more capable EC for the base to support a more complex base. - -### Flash Contents - -The 128KB `BaseEC` flash will be divided into three parts. - -* Read-only firmware (`Base`-EC-RO, or just "RO" in this document) - * ~40KB - * Minimal functionality, so it can be small. - * Verifies the rewritable firmware. - * Updates the rewritable firmware over USB. - * Does NOT have keyboard or trackpad support. - * Includes the `Base-EC` root key. -* Rewritable firmware (`Base-EC`-RW, or just "RW" in this document) - * ~84KB - * Supports keyboard and trackpad. - * Trackpad drivers may be non-trivial in size. - * Future bases may include type-C ports, sensors, or batteries, all of - which will increase RW size. - * As with the main EC, it is unlikely we will have space for multiple - copies of RW (so, no RW-A and RW-B). - * Updates the read-only firmware over USB (pre-production devices only). -* Rollback block (`Base-EC`-RB, or just "RB" in this document) - * 4KB (one protection block) - * Contains rollback version information for RW - * Only writable by RO. - * Updates alternate between the 2 2KB erase sectors. We only erase one of - them at a time, so an interrupted erase/write will not cause data loss. - -Adding the RB will decrease the total amount of flash available for RO and RW, -but doesn't require any additional external components. This is acceptable -because RO will be smaller (since it only has update/verify functionality). - -### Verification Speed - -On a STM32F072 chip running at 48 MHz, - -* SHA-256 of a 64KB RW image takes 200 ms (~3 ms/KB) - * Reducing RW image size reduces verification time almost proportionally - (even if we need to check that the rest of the image is erased). -* RSA-2048 (exponent 3) signature verification takes ~50 ms -* RSA-3072 (exponent 3) signature verification takes ~100 ms - -[STM32F072]: http://www.st.com/content/ccc/resource/technical/document/reference_manual/c2/f8/8a/f2/18/e6/43/96/DM00031936.pdf/files/DM00031936.pdf -[EC Update over USB]: ./usb_updater.md -[CL:452815]: https://chromium-review.googlesource.com/c/452815/2 diff --git a/docs/ec-3po-design.md b/docs/ec-3po-design.md deleted file mode 100644 index 79ec3ecf0f..0000000000 --- a/docs/ec-3po-design.md +++ /dev/null @@ -1,326 +0,0 @@ -# EC-3PO: The EC console interpreter - -[TOC] - -## Introduction - -Today, the Chromium OS Embedded Controller (EC) has a very rich debug console -that is very helpful and has features including command history, editing, -timestamps, channels and much more. However, all of these features currently use -up valuable flash space that a number of our boards desperately need. We -constantly run into this problem where boards are running out of space and -people have to hack out a lot of code just so the image will fit. It's been -occurring with more frequency lately and I imagine it will continue to occur as -we add more features to our EC code base. What we could do instead is move all -of that console functionality out to a separate utility and turn the EC console -into a binary mode which would only speak in host command packets and debug -output packets. EC-3PO would serve as the interpreter translating from the -traditional EC console that we all know and love to host command packets sent -down to the EC and vice versa. - -## Benefits - -The benefits to be gained are numerous and can all occur without changing -people's existing workflow. The only slight impact might be that we instruct -people to `emerge hdctools` every so often. All people would notice would be -that the EC images would be getting smaller and/or more console features. - -### Testing & FAFT - -Currently, [FAFT](https://www.chromium.org/for-testers/faft) runs its tests -while trying to parse strings from the EC console. This method can be fairly -fragile as debug output can be interleaved with the console input. A lot of -items could be improved by switching to this host command packet interface. - -* Communicating in packets makes testing easier and more robust. - * When FAFT is running, the EC could be in a binary mode where it only - communicates in host command packets. These packets are easier to parse, - create, and filter on. - * With filtering, you get the added bonus of not having unwanted debug - output. - * It allows us to really test the host command interface which is how the - EC talks to the AP anyways. -* Better testing of existing host command handlers. - * By speaking in host command packets, we can reuse the existing host - command handlers which is nice since we'll be using the same handlers - that are used to respond to the AP. -* FAFT would no longer have to worry about the console dropping characters. - * We can add error checking to the interpreter which would automatically - retry errors. This alleviates FAFT from trying to check if the EC had - properly received a line of input. (Ctrl+L) - -With better and more reliable tests, we can improve the quality of our EC -codebase. - -### Space Savings - -By moving the console functionality off of the EC, we would be able to shave off -a considerable amount of bytes from the EC images. People wouldn't have to worry -as much about creating a debug console print with the fear of bloating up the -image size. Smaller stack requirements by changing `printf` formatting to only -count bytes while moving common strings off the EC. Additionally, most of these -savings will come for free as it will apply to every EC with a console. We won't -be restricted by the type of chip. - -### A richer EC console - -* We could do things like on-the-fly console channel filtering. -* Coloring specific channels such as "mark all USB PD messages in green". -* Adding colors in general. -* Adding temporary console commands. -* Longer command history which survives EC reboot -* Searching command history -* Redirecting debug output to log files (which causes no interleaving of - command and debug output) -* Bang commands (`!foo`) - -### Better debuggability - -Sometimes, there will be an issue with the EC (or believed to be an EC issue) -such as the keyboard locking up on certain keys or rows. At times like that, it -would be nice to have an EC console to see what's going on. Other times maybe -having a servo connected might make the issue not present itself. - -* We could do cool things like having an EC console without having to hook up - servo. -* Run `ectool` from the chroot using a PTY interface. - -## Deployment Strategy - -There are many facets to this feature, but here's a deployment strategy which -will gradually take us from the current EC console today, to a future where the -console is completely removed from the EC. The goal will be to make this change -as transparent as possible to developers. - -### Phase 1: Insertion - -_[[Merged to ToT](https://crrev.com/c/320629) on 2016-02-07]_ - -Phase 1 will most likely consist of getting EC-3PO in place in between servo and -the EC while not modifying the behavior of the console too much. In this phase, -we can replicate the console interface and achieve the following things. - -* Replicate command editing. -* Save command history. -* Add error checking to the console commands. - -### Phase 2: Assimilation - -Phase 2 will start to introduce the host command packet communication. - -* Printing will be done via packets and assembled in EC-3PO. -* Console commands now are sent using the host command packets. - * This will be incremental as console commands are converted. -* Add debug output filtering and redirection/logging. - -### Phase 3: Expansion - -Phase 3 will expand the feature set of EC-3PO. - -* Add PTY interface to `ectool`. -* Add on-device console without `servod`. -* Colored output. -* Command history search. -* Bang commands (`!foo`) - -## High Level Design & Highlights - - - -### EC Interface - -Each host command is a 16-bit command value. Commands which take parameters or -return response data specify `struct`s for that data. See -[`include/ec_commands.h`](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/include/ec_commands.h) -for the current format of request and replies. Currently, there are no changes -made to the format of the host request and response structures. - -On the EC, we essentially need to create a UART host command handler. This -handler will be watching the console input for a byte sequence to switch into -this host command mode. The starting sequence for an incoming host command -packet will be `0xDA`, a byte signifying `EC_COMMAND_PROTOCOL_3`. Once this byte -is seen, the EC will transition to its "host command processing mode" and -receive the host command. It will then process the host command, send the binary -host response, and then transition back into normal mode. Ideally, there should -be some locking of the UART to prevent other writes while this is taking place. - -By the end of the assimilation (Phase 2), there would be no "normal mode" and -everything would be in the binary host command mode. - -### Host Interface - -The host interface is where the bulk of the work will be. This will be -converting from the received host commands to console prints as well as -converting the console inputs to host commands. It will also be responsible for -replicating the console. This includes things like moving back and forth for -command editing. - -The interpreter should also open a PTY and `dut-control` should return this PTY -as the `ec_uart_pty`. This is to ensure that the change is as transparent as -possible to developers. - -### Features - -The following are an explanation of a few of the planned features. - -#### Command Error Checking - -EC-3PO and the EC can perform error checking when sending the commands to the -EC. This feature would be implemented prior to switching to the binary format. -The interpreter can package the command in the following manner. - -* 2 Ampersands -* 2 hex digits representing the length of the command -* 2 hex digits representing the CRC-8 of the command -* 1 Ampersand -* The command itself -* 2 newline characters. - -This is robust because no commands currently start with `&`. If the EC does not -see ‘`&&`', then one of the ampersands has been dropped. If the EC doesn't see -an ampersand after 4 hex digits, it either dropped a hex digit or the ampersand. -Two newlines, so dropping one of those is alright. Once the EC gets the command -and newline, it can verify the command string hasn't been corrupted. - -In the event that the command string was corrupted, the EC can return an error -string back of `&&EE`. If the translator reads a line with at least one -ampersand followed by one "E", then an error had occurred and the translator can -simply retry the console command. This creates a reliable input to the console, -a great win for FAFT. - -#### PTY interface to `ectool` - -Once the UART host command handler is functional, we could add the UART as one -of the interfaces to `ectool`. This would allow `ectool` to be run from the -chroot simply by having `ectool` communicate over the PTY. Since `ectool` -communicates using host commands anyways, everything should just work™. The -benefits of this include faster development of `ectool` and host commands as -well as a more robust interface for FAFT. - -#### On-device EC console without Servo - -Once the transition is complete and the console speaks entirely in host -commands, it's no longer necessary to have the console talk solely over the -UART. EC-3PO, or a variant, could exist as a standalone application that could -be bundled in the system image, just like `ectool`. It would then send and -receive host commands using the same interface that `ectool` uses whether it be -LPC or I2C. This would essentially give us a console without having to hook up -servo. - -Note for security reasons, this must be locked down to only allow a subset of -commands and debug output when the system is ready to ship. - -#### Replacing `cprintf()` - -All prints will need to become packets. In these packets will contain the format -string, but all `cprintf()` has to do is parse to format string to determine how -many bytes the parameters take up. Then, `cprintf()` will send the format string -and the parameters to EC-3PO which will create the proper string using that -information. That makes `cprintf()` on the EC smaller and use less stack space -than it would have used for formatting. - -We could also have a table of common format strings which the EC could just -provide an index and the parameters. - -## Internal Design - -EC-3PO is a Python package which aims to migrate the rich debug console from the -EC itself to the host. It is composed of two modules: console and interpreter. - - - -### Console module - -The console module provides the interactive console interface between the user -and the interpreter. It handles the presentation of the EC console including -editing methods as well as session-persistent command history. - -The console runs in an infinite loop listening for activity on three things -using the `select()` system call: the PTY served to the user, the command pipe, -and the debug pipe. The debug pipe is a unidirectional pipe from the interpreter -to the console. From this pipe are debug prints that originate from the attached -EC and the console currently writes these strings as is to the user PTY. The -command pipe is bidirectional and is used between the console and the -interpreter for command traffic. An example transaction would be a host command -request and response. - -#### Enhanced EC image negotiation - -When the user transmits a character on the PTY, the console begins to scan every -byte and perform the appropriate actions. Since not every EC image will support -these enhanced features, the console must perform an interrogation to determine -what behaviour to take. If the interrogation mode is set to auto, this -negotiation takes place every time the enter key is pressed. The interrogation -is very simple 2 way handshake. The console sends down a byte, `EC_SYN` and -waits a timeout period to receive a byte, `EC_ACK`. This timeout period is 300ms -for non-enhanced EC images and 1 second for enhanced EC images. Enhanced EC -images will try to immediately respond to an `EC_SYN` with an `EC_ACK` to -indicate to EC-3PO that the current EC images is enhanced. The non-enhanced EC -image timeout period is intended to be short because non-enhanced EC images will -never reply to the `EC_SYN`. By keeping this timeout short, we are essentially -inserting a slight pause after each command. However, this timeout is long -enough for an enhanced EC image to send its reply of `EC_ACK`. Once the `EC_ACK` -is received by the console, the console increases the timeout to 1 second for -stability purposes just in case the enhanced EC image takes a bit longer to send -its reply for some reason. This negotiation allows EC-3PO to behave correctly -for both enhanced and non-enhanced EC images. - -If a user knows that they are not using an enhanced EC image, they can disable -the interrogation by issuing a OOBM command. This will cause the console to -never initiate a negotiation, eliminating the delay. See the "interrogate" -command in the Out of Band Management section for usage. - -#### Enhanced vs. Non-Enhanced EC images - -All EC images which don't explicitly enable the new features (or were built -before the features were implemented in the code base) are non-enhanced images. -Non-enhanced EC images will be handling the presentation of the console -including editing methods (and history if enabled). Therefore, the EC-3PO -console and interpreter behave as a simple pipe for this case forwarding -everything straight to the EC to handle. For the enhanced EC images, all console -presentation (including editing methods) is handled locally by the EC-3PO -console. Enhanced EC images will also support all of the other features -discussed in this document. - -#### Out of Band Management - -The interactive console also has an Out of Band Management (OOBM) interface. -This allows commands to be entered that can alter the behavior of the console -and interpreter during runtime. From the console, one can bring up the OOBM -prompt by pressing ‘%' . These were originally added for debug purposes. - -##### Supported Commands - -* `loglevel <integer>` - * Allows setting the effective loglevel of the console and interpreter. -* `interrogate <never | always | auto> [enhanced]` - * Allows control of when and how often interrogation occurs. - -### Interpreter module - -The interpreter provides the interpretation layer between the EC UART and the -user. Similar to the console module, the interpreter starts an infinite loop of -servicing the user and the EC by means of a `select()` system call. It receives -commands through its command pipe, formats the commands for the EC, and sends -the command to the EC. It also presents data from the EC to either be displayed -via the interactive console module or some other consumer. - -The interpreter also keeps track of whether the EC image it's communicating with -is enhanced or not. This is required so that the interpreter can communicate -correctly with the EC. For enhanced EC images, the interpreter will pack -incoming commands in a particular format. This could be the "packed plaintext" -form or the binary host command format. With the packed plaintext form, the -interpreter also supports command retrying by monitoring the response of the EC -and automatically retrying the command with no input from the user. - -### Other users - -Since the interpreter communicates using pipes, it's not necessary that the user -use the console module. For example, FAFT could directly connect to the -interpreter and send down commands and receive command responses instead of -having to deal with the PTY and instead just deal with python objects. diff --git a/docs/ec-3po.md b/docs/ec-3po.md deleted file mode 100644 index dae7b9babb..0000000000 --- a/docs/ec-3po.md +++ /dev/null @@ -1,82 +0,0 @@ -# EC-3PO - -[TOC] - -## What is EC-3PO? - -EC-3PO is the console interpreter that will one day replace the EC console that -we have today. EC-3PO aims to migrate our rich debug console from the EC itself -to the host. This allows us to maintain our rich debug console without impacting -our EC image sizes while also allowing us to add new features. - -For more information, see [the design doc](./ec-3po-design.md). - -## How do I use EC-3PO? - -If you're using `servod` to connect to your EC, chances are you're already using -it. EC-3PO was grafted into `servod` on Feb 7th 2016. If you're not running -`servod`, you can run EC-3PO manually by running `console.py` in the -`util/ec3po` directory from the EC checkout. You will need to provide the PTY -that you get from elsewhere though. - -To obtain the EC console PTY, inside the chroot run: - -```shell -$ dut-control ec_uart_pty -``` - -**NOTE: It's important to use `dut-control` to query the PTY instead of just -eyeballing the `servod` output.** The former PTY (now known as -`raw_ec_uart_pty`) will be sending raw binary data. Trying to use that console -with an enhanced EC image will definitely fail and you won't be able to -send/receive any commands. - -Then use your favorite serial terminal program to connect to the PTY. Since -`servod` is run as root, you'll need to run your serial terminal program as root -as well using `sudo`. This is because the permissions have changed from 666 to -660. - -EC-3PO has been tested with `minicom`, `screen`, `socat`, and `cu`. However, if -you're using `cu` you'll have to do the following to get it to work because -apparently, `cu` wants group write permissions. On Ubuntu at least, the PTY is -created with the `tty` group. If on your machine it's not, then just replace -`tty` with whatever group it's created with. - -1. Create a `tty` group if you don't have one already. -1. Add root to the `tty` group. -1. Rerun `cu` with `sudo` and it should work now. - -## Why does the console seem "laggier" than before? - -This is because there's a ~300ms delay after entering each console command. This -is due to the interrogation that the console interpreter performs to determine -if the EC image it's currently talking to is enhanced or not. Debug prints -coming from the EC should be the same speed. Since most people aren't currently -using the enhanced EC images, you can go ahead and run this command if the 300ms -delay is unbearable. - -To disable the delay: - -1. Open the EC console. -1. Press `%` -1. Enter `interrogate never` -1. Then press enter. - -\**For `socat` users, due to the line buffered nature, you'll have to just enter -`%interrogate never`. Notice the lack of the space character between `%` and the -command.* - -The interrogation delay should now be gone and you can have your 300ms/cmd back. - -## How do I try out this "enhanced" EC image you speak of? - -You simply add this to your board.h file. - -```c -#define CONFIG_EXPERIMENTAL_CONSOLE -``` - -## I can't open the EC console - -Make sure you try with `sudo`. If you're using `cu`, make sure root is a member -of the group of the created PTY. diff --git a/docs/ec_terms.md b/docs/ec_terms.md deleted file mode 100644 index 3b9f88416e..0000000000 --- a/docs/ec_terms.md +++ /dev/null @@ -1,248 +0,0 @@ -# EC Acronyms and Technologies - -## Glossary - -* **8042 Interface** {#8042} - - Interface for sending keyboard events to the [AP](#ap) and for receiving - commands from the AP. Only supported by x86 based APs. - -* **ACCEL - Accelerometer** {#accel} - - A sensor that measures acceleration, typically over 3-axis. Nominally - provides information about the orientation of a device. On Chromebook 2-in-1 - devices, there is an accelerometer in the base and one in the lid. Combining - the measurements from both accelerometers allows for a precise calculation - of the lid angle, used to switch between tablet and laptop mode. - -* **ACCELGYRO - Accelerometer/Gyroscope** {#accelgyro} - - A combination [accelerometer](#accel) and [gyroscope](#gyro) sensor that - provides more precise orientation information by measuring both linear and - rotational motion. - -* **ADC - Analog to Digital Converter** {#adc} - - A sensor that converts an analog voltage to a digital reading. - -* **ALS - Ambient Light Sensor** {#als} - - A sensor that measures the ambient light present. Used to automatically - control the screen and keyboard backlight level. - -* **AP - Application Processor** {#ap} - - The processor on the board that boots and runs ChromeOS. - -* **BAR - Barometer** {#bar} - - A sensor that measures atmospheric pressure. - -* **BC12 - Battery Charging** {#bc12} - - A device that implements the USB Battery Charging specification, version - 1.2. The complete [BC 1.2 Specification] is available from the USB - Implementers Forum. - -* **CBI - CROS Board Information** {#cbi} - - A collection of properties describing the board. This includes board - version, SKU, model name, and other fields. More details are found in the - [CrOS Board Info] documentation. - -* **CEC - Consumer Electronics Control** {#cec} - - A one-wire bidirectional bus. More details are on the [CEC Wikipedia page]. - -* **DPTF - Dynamic Power and Thermal Framework (Intel)** {#dptf} - - Intel's platform based power and thermal management. See the [DPTF Readme] - for details on the implementation used in ChromeOS. - -* **EC - Embedded Controller** {#ec} - - The [MCU](#mcu) used to control the keyboard, battery charging, USB port - switching, sensor management, and other functions, offloading these tasks - from the [AP](#ap). - -* **EC-3PO** {#ec-3po} - - A replacement of the current UART-based console which moves much of the code - off the EC into a host tool, reducing the amount of flash space required. - -* **E-Mark - Electronically Marked Cable** {#emark} - - See the [USB-C documentation](./usb-c.md#emark) for more details. - -* **eSPI - Enhanced Serial Peripheral Interface (Intel)** {#espi} - - Intel's synchronous communication interface between the [AP](#ap) and the - [EC](#ec). Supports quad I/O mode and clock speeds up to 66 Mhz, providing - bandwidth up to 264 Mbps. The full [eSPI Specification] is available from - Intel. - -* **FAFT - Fully Automated Firmware Tests** {#faft} - - A collection of tests and related infrastructure that exercise and verify - capabilities of Chrome OS. See the [FAFT design doc] and - [chromium.org documentation](https://www.chromium.org/for-testers/faft) for - more details. Replaced [SAFT](#saft). - -* **GMR - Giant Magnetoresistance Sensor** {#gmr} - - A sensor device that detects a magnetic field. These sensors differ from - [MAG](#mag) sensors, in that they only detect magnetic fields in close - proximity to the sensor. On Chromebooks, GMR sensors are used to detect when - the lid is opened. On convertible Chromebooks, the GMR sensor also detects - tablet mode when lid the is opened a full 360 degrees. - -* **GPIO - General Purpose Input/Output** {#gpio} - - An individual signal that can independently controlled and read. GPIOs are - used to enable/disable power rails, drive reset signals, and receive - interrupts from devices connected to the EC. GPIOs may also be connected to - [I/O expanders](#ioexpander). - -* **GYRO - Gyroscope** {#gyro} - - A sensor that measures angular momentum, providing information about - rotational motion of the device. - -* **I/O Expander** {#ioexpander} - - An [I2C](#i2c) peripheral device that provides additional GPIO signals - (anywhere from 8 - 32 signals). GPIOs behind an I/O expander are written and - read using I2C register accesses from the I2C controller in the EC. - -* **I2C - Inter-Integrated Circuit** {#i2c} - - A 2-wire synchronous communication bus, consisting of a clock signal and a - bidirectional data signal. An I2C bus typically contains one controller - device and one or more peripheral devices. The I2C standard defines - supported clock speeds of 100 KHz and 400 KHz. The full [I2C Specification] - is available from NXP (formerly Phillips). - -* **LED - Light Emitting Diode** {#led} - - A Light Emitting Diode is a semiconductor that emits light when current - flows through it. - -* **LPC - [Low Pin Count bus]** {#lpc} - - Legacy communication bus between the [AP](#ap) and [EC](#ec). Runs at 33 - MHz, providing a 133 Mbps bandwidth connection. Replaced by the - [eSPI](#espi) interface. - -* **MAG - Magnetometer** {#mag} - - A digital compass sensor, providing orientation for navigation. - -* **MCU - Microcontroller Unit** {#mcu} - - A small integrated chip containing a CPU core, on-chip ROM, on-chip RAM. - Also contains multiple peripheral interfaces, including GPIO, I2C buses, SPI - buses, ADC, PWM, etc. - -* **MKBP - Matrix Keyboard Protocol** {#mkbp} - - Message based protocol for communicating asynchronous events from the - [EC](#ec) to the [AP](#ap). Events are not limited to keyboard events with - the sensor subsystem as one of the main users. An EC board implementation - can be configured to send keyboard events through MKBP or using the - [8042 interface](#8042). This is the [EC MKBP driver] implementation. - -* **MST - Multi Stream Transport** {#mst} - - Part of the Display Port 1.2 standard, used to drive multiple independent - video streams from a single display port. The EC code is typically - responsible for enabling and disabling the MST hub chipset. - -* **OOBM - Out of Band Management** {#oobm} - - A command in the [EC-3PO protocol](#ec-3po) that allows commands to be - entered to alter the behaviour of the console and interpreter during - runtime. - -* **PD - USB Power Delivery** {#pd} - - See the [USB-C documentation](./usb-c.md#pd) for more details. - -* **PMIC - Power Management IC** {#pmic} - - An integrated circuit used to turn power rails on and off. - -* **PPC - USB Power Path Controller** {#ppc} - - See the [USB-C documentation](./usb-c.md#ppc) for more details. - -* **PWM - Pulse Width Modulation** {#pwm} - - Method of varying the duty cycle of a signal to control another device. A - typical application is to control fan speeds or the brightness of a - backlight. - -* **SAFT - Semi-Automated Firmware Tests** {#saft} - - A suite of tests for firmware, succeeded by [FAFT](#faft). See the - [chromium.org documentation](https://www.chromium.org/for-testers/saft) for - more details. - -* **SHI - SPI Host Interface** {#shi} - - [SPI](#spi) host interface used for communication between the AP and the EC. - In this configuration, the AP provides the SPI controller and the EC - provides the SPI peripheral. This interface is only used for non-x86 base - APs. - - x86-based APs use either the [eSPI](#espi) or [LPC](#lpc) interface. - -* **SPI - Serial Peripheral Interconnect** {#spi} - - A 4-wire synchronous communication bus consisting of the signals CLK - (clock), SDO (Serial Data Out), SDI (Serial Data In), and CS (chip-select, - one per SPI peripheral). The SDO and SDI pins are defined from the - perspective of the device: the SPI controller's SDO pin connects to the SPI - peripheral's SDI pin and vice-versa. Clock speeds over 100 MHz are - supported. SPI communication involves the following sequence: - - * SPI controller asserts CS. - * SPI controller transmits one or bytes on its SDO signal, received by the - SPI peripheral on its SDI signal. - * SPI peripheral transmits zero or more bytes on its SDO signal, received - by the SPI controller on its SDI signal. - * SPI controller de-asserts CS. - - The specific contents of a SPI frame varies based on the SPI peripheral - type. - -* **SVDM - Structured Vendor Defined Messages** {#svdm} - - See the [USB-C documentation](./usb-c.md#svdm) for more details. - -* **TCPC - USB Type-C Port Controller** {#tcpc} - - See the [USB-C documentation](./usb-c.md#tcpc) for more details. - -* **UART - Universal Asynchronous Receiver Transceiver** {#uart} - - Also known as a serial port. An asynchronous communication channel between - two devices with a dedicated receive pin, transmit pin, and ground. Optional - hardware flow control signals require additional connections between the - devices. Standard transmission rates are slow (up to 115200 bits per - second). Typical use is to provide a debug console to the EC. [RS-232] is - the protocol standard used by UARTs. - -* **VCONN - Connector Voltage** {#vconn} - - See the [USB-C documentation](./usb-c.md#vconn) for more details. - -[BC 1.2 Specification]: <https://www.usb.org/document-library/battery-charging-v12-spec-and-adopters-agreement> -[CrOS Board Info]: <https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md> -[CEC Wikipedia page]: <https://en.wikipedia.org/wiki/Consumer_Electronics_Control> -[DPTF Readme]: <https://github.com/intel/dptf/blob/master/README.txt> -[eSPI Specification]: <https://www.intel.com/content/dam/support/us/en/documents/software/chipset-software/327432-004_espi_base_specification_rev1.0.pdf> -[FAFT design doc]: <https://chromium.googlesource.com/chromiumos/third_party/autotest/+/HEAD/docs/faft-design-doc.md> -[I2C Specification]: <https://www.nxp.com/docs/en/user-guide/UM10204.pdf> -[RS-232]: <https://en.wikipedia.org/wiki/RS-232> -[EC MKBP driver]: <https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/keyboard_mkbp.c> -[Low Pin Count bus]: https://en.wikipedia.org/wiki/Low_Pin_Count diff --git a/docs/fingerprint/OWNERS b/docs/fingerprint/OWNERS deleted file mode 100644 index ba92c193e0..0000000000 --- a/docs/fingerprint/OWNERS +++ /dev/null @@ -1 +0,0 @@ -include ../../common/fpsensor/OWNERS diff --git a/docs/fingerprint/fingerprint-authentication-design-doc.md b/docs/fingerprint/fingerprint-authentication-design-doc.md deleted file mode 100644 index 7db552405a..0000000000 --- a/docs/fingerprint/fingerprint-authentication-design-doc.md +++ /dev/null @@ -1,772 +0,0 @@ -# Fingerprint Authentication on Chrome OS - -Authors: norvez@google.com, vpalatin@google.com - -Reviewers: kerrnel@google.com, mnissler@google.com - -Last Updated: 2019-01-14 - -[TOC] - -## Objective - -### Goals - -* Let users securely unlock their device with just their fingerprint -* Reuse the same architecture on all future platforms, don’t be tied to a - specific technology ([Arm TrustZone], [Intel SGX]). -* Support Android’s [fingerprint authentication framework] so users can for - example authorise payments in Android apps with their fingerprint. The - fingerprint implementation needs to comply with Android’s [CDD]. - -### Non-goals - -* Let users log in with their fingerprint - * Users will have to use other authentication methods (e.g. password or - PIN) to log into their account. - * Once logged in, users will be able to unlock the screen with their - fingerprint - -## Background - -To unlock their Chromebook users have to enter their password or a PIN. -[Windows] and [macOS] let the user authenticate with their fingerprint for -faster unlocking, we want to bring that capability to Chrome OS. - -### Fingerprint matching basics - -#### Fingerprint enrollment - -When a user wants to register their finger for fingerprint authentication, they -go through the _enrollment_ operation. They are asked to touch the sensor -multiple times with different parts of their fingerprint. The -[matching algorithm] uses the images captured during enrollment to build a model -of that fingerprint (known as a _template_). - -#### Fingerprint matching - -When the user puts their finger on the sensor, an image of the fingerprint is -captured and compared to the fingerprint templates of the enrolled fingerprints -to determine if the fingerprint matches one of the templates. - -#### Template update (TU) - -When the matching algorithm determines that a fingerprint matches a template -with a high level of certainty, it can (and normally will) use that fingerprint -image to update the template to improve the accuracy of future matching -operations. - -### Threat model - -There are two main objectives for potential attackers: - -* Large scale collection of biometric data from users by opportunistic - attackers - * This attack is only valuable remotely. In case an attacker has physical - access to the device they are already able to collect fingerprint data - left by the user on the device itself without having to attack the - software. -* Target a specific user, typically with physical access to the device in - order to either: - * Allow the attacker to enroll their own fingerprint to unlock the device - at will later on (the “abusive partner” model). - * Spoof positive fingerprint matches to let the rest of the system believe - that a user has successfully identified, for example to break [2FA] - \("spy" trying to gain access to an organisation’s resources via the - victim’s computer). - -### Privacy and security - -* Biometric data is particularly sensitive, so all operations on fingerprint - data must happen in a _Secure Biometric Processor_ (**SBP**). Attackers must - not gain access to the user’s fingerprints even if they have exploited the - software running on the AP. -* To protect the user’s privacy, fingerprint data must not be accessible - without the user’s consent, even by Google. Typically it will protected by - the user’s password. -* Fingerprint data must not leave the device. -* For added security, only the specific Chromebook used to enroll the - fingerprint can use it. Other Chromebooks, even of the same model, must not - be able to use the enrolled fingerprint. - -### Scalability - -For Eve, we [considered][Old Design Doc] using SGX as the SBP. However the -complexity of the solution makes that option unattractive, both because of the -amount of dev work required and because of the large resulting attack surface. -It’s also exclusive to Intel, we would have to develop a completely different -architecture for other platforms, which would add more dev work and increase the -attack surface again. - -## Overview {#overview} - -Devices have a dedicated microcontroller (MCU) running a firmware based on the -[Chromium OS EC] codebase that is used as the _Secure Biometric Processor_ -(**SBP**), where all enrollment and matching operations take place. Even if -attackers gained control of the AP, they still would not be able to access the -fingerprint (FP) data since it never leaves the SBP unencrypted. - -The SBP controls the sensor directly over a dedicated SPI bus. The SBP is -connected to the host with a different SPI bus, the host has no direct access to -the FP data coming from the sensor. - -Enrolled templates for a particular user are stored in the user’s [cryptohome] -but not synced/backed up to the cloud. They are thus encrypted with a key -(`User_Key`) derived from the user’s password, preventing 3rd parties (including -Google) from accessing the fingerprint templates if the user hasn’t entered -their password. - -On top of that, enrolled templates are also encrypted by a device-specific -`HW_Key`. `HW_Key` is derived from a secret that has been randomly generated by -the SBP, which prevents decrypting the templates on another device. - -### Architecture - -![Fingerprint Architecture] - -### Typical workflows - -#### FP enrollment - -1. User starts the enrollment flow from the Settings UI. -1. SBP starts the enrollment operation. -1. SBP captures a number of FP images (exact number depends on the sensor, - typically 3-4 to 10-12) and builds the template in the SBP’s volatile memory -1. SBP encrypts the template with `HW_Key` and sends the encrypted template to - the AP. -1. AP encrypts the template with `User_Key` and saves it to non-volatile - storage. -1. User goes back to step 1 to enroll another finger. A user can typically - enroll 3 to 5 fingers, depending on how many templates the SBP can hold in - its internal volatile storage at the same time. - -#### User login - -1. User logs in by typing their password. -1. FP templates of that user go through the first level of decryption, with - `User_Key`. -1. FP templates are uploaded to the SBP. -1. FP templates go through the second level of decryption in the SBP, with - `HW_Key`. -1. Deciphered FP templates are kept in the SBP’s volatile memory, ready to use - for matching operations. - -#### Screen unlocking operation - -1. User touches the sensor with their finger. -1. SBP verifies that the FP image matches one of the user’s templates. -1. SBP wakes up the AP and sends a “FP matched” message to the AP -1. The AP unlocks the screen. -1. Matcher updates the template in the SBP’s volatile memory. -1. SBP encrypts the updated template with `HW_Key` and sends the encrypted - template to the AP. -1. AP encrypts the template with `User_Key` and saves it to non-volatile - storage. - -## Detailed Design {#detailed-design} - -### FP template encryption {#template-encryption} - -FP templates are encrypted "twice". First, the templates are encrypted by the -SBP with a hardware-bound key that is unique to this SBP and that only the SBP -knows. On top of that, the AP also encrypts the FP templates with a key bound to -the user password. - -#### User-bound encryption - -The FP templates are stored in a "[cryptohome daemon store folder]" which is -encrypted by [cryptohome] with a key tied to the user password. We plan to -replace this post-launch with a mechanism similar to -[Authentication-Time User Secrets]. Separate design doc to come. - -#### Hardware-bound encryption - -FP templates are AES-encrypted with `HW_Key`. `HW_Key` is bound to this specific -SBP so encrypted templates can only be deciphered by this specific SBP. To -ensure that a powerwash/recovery/WP toggle/.../ makes the encryption key -impossible to recover, `HW_Key` also depends on a secret held by the TPM. - -We use an AEAD cipher (AES-GCM) to detect if the encrypted templates have been -tampered with by an attacker controlling the AP. - -##### SBP secret generation - -The SBP generates a new 128-bit random number `SBP_Src_Key` every time the user -goes through recovery or powerwashes the device. The [clobber-state] script -sends a command to the SBP to make it immediately regenerate a new `SBP_Src_Key` -immediately after requesting a TPM clear. - -`SBP_Src_Key` is stored by the SBP’s internal Flash and never shared with the -AP. - -##### TPM-held Secret - -To avoid potential bugs where `SBP_Src_Key` would not always be made -unrecoverable in some corner cases of recovery or powerwash, we make the -encryption key `HW_Key` depend on a secret that is held by the TPM and deleted -every time the TPM is cleared, for example if someone attempts to do a -"[ccd open]" to disable the hardware WP. - -The following is a summary of the mechanism, see the specific design doc -[TPM Seed for Fingerprint MCU] for details. - -The TPM already holds a "[system key]" `Cros_Sys_Key` in NVRAM space that is -used to derive the encryption key of the stateful partition. That "system key" -can only be read once per boot, typically by [mount_encrypted]. - -We modify mount_encrypted so that right after reading the seed, it derives a key -`TPM_Seed`: - -``` -TPM_Seed = HMAC-SHA256(Cros_Sys_Key, "biod") -``` - -`TPM_Seed` is then uploaded to the SBP where it will part of the -[Input Key Material (IKM)] and immediately cleared from the AP’s memory, while -the attack surface is very small (e.g. no network connections, stateful -partition not yet mounted) to prevent attackers from accessing it. - -##### `HW_Key` derivation {#hw-key-derivation} - -The `HW_Key` 128-bit AES key for every FP template on the device is derived from -the SBP’s secret and the TPM’s secret to ensure uniqueness. Therefore, even two -identical devices would have different encryption keys. The user ID is also used -as an input for key derivation, so 2 users on the same device won’t share -encryption keys either. Summing up, the key used to encrypt a template depends -on: - -* Device-bound `TPM_Seed`, randomly generated on recovery/powerwash -* SBP-specific `SBP_Src_Key`, randomly generated on recovery/powerwash -* User ID on the device -* Encryption salt, randomly generated before every encryption - -###### Salt for key derivation - -Every time we update a template, we generate a new random 128-bit salt. - -The salt is not required to be secret, so we store `User_Salt` in cleartext next -to the user’s encrypted FP templates on the disk. - -On user login, biod sends the salt and the encrypted FP templates to the SBP. -biod also sends the User ID to the SBP. The SBP derives the AES key using [HKDF] -with HMAC-SHA256: - -``` -HW_Key = HKDF(HMAC-SHA256, SBP_Src_Key, TPM_Seed, User_Salt, User_ID) -``` - -At that point, the SBP [authenticates and deciphers](#aead) the FP templates. -The SBP then generates a new 128-bit salt `User_Salt_New` randomly and derives a -new AES key: - -``` -HW_Key_New = HKDF(HMAC-SHA256, SBP_Src_Key, TPM_Seed, User_Salt_New, User_ID) -``` - -Updated FP templates are then encrypted with `HW_Key_New` before being stored on -the host, along with the new salt `User_Salt_New`. - -*Note*: The SBP has a unique serial number hwID that could also be used as an -additional input to the KDF (though it never changes). The entropy is pretty low -and though not easily accessible an attacker who had stolen the device could -gain access to it. After consulting with the security team, using the hwID was -deemed unnecessary since it wasn’t adding real entropy. - -##### AEAD (AES-GCM) Encryption {#aead} - -To encrypt the FP templates with `HW_Key` we use BoringSSL’s implementation of -AES-GCM128. - -###### Initialisation Vector - -The encryption operations are done by the R/W firmware that doesn’t have write -access to the Flash, so it can’t keep track of IVs that could have already been -used during previous boots since it has no way to persist state. Instead, the -SBP will generate a random 96-bit IV every time it needs to encrypt a template -with `HW_Key` before sending it back to the host for storage. This only happens -every time a user successfully matches their finger, which assuming 1 match -every second for 10 years would result in 3600\*24\*365\*10 < 350,000,000, so -the risk of reusing an IV is acceptable. To ensure that a compromised host could -not try to generate too many messages to find collisions, the SBP rate-limits -the number of encryption operations to 1 per second. - -The IV will be stored on the host with the salt, the encrypted templates and the -16-byte tag for authentication. - -###### Authentication Tag - -To authenticate the encrypted templates, we use a 128-bit tag that we store in -clear text with the encrypted template. - -Authentication of the encrypted templates prevents attackers from generating -random templates to try to attack directly the matching libraries rather than -the AES-GCM128 implementation. It also prevents attackers from trying to pass -their own template instead of the user’s FP template. - -###### Encryption Flowchart - -Encryption of the FP template in the SBP before the ciphered data is sent to the -AP for storage. - -![Encryption Flowchart] - -###### Decryption Flowchart - -Decryption of the ciphered FP template coming from the AP when the user logs in. - -![Decryption Flowchart] - -#### FP template disk format - -Encrypted templates are stored in a “[cryptohome daemon store folder]” that is -only mounted/decrypted when the user has logged in. The templates are stored as -JSON files with the following fields: - -```JSON -{ - "biomanager": “CrosFpBiometricsManager” string - "version": integer describing the version of the file format. Set to 1 at launch - "data": Base64-encoded string containing the `HW_Key`-encrypted template - "label": user-configurable human-readable string listed in the UI - "record_id": UUID of that template generated at enrollment time -} -``` - -##### `HW_Key`-encrypted template format - -The content of the "data" field is the encrypted template that can be deciphered -by the SBP. - -Field Name | Field description | Field size (bytes) | Field offset (bytes) ----------- | --------------------------------------------------------------------- | ------------------ | -------------------- -Version | Number describing the version of the file format. Set to 3 at launch. | 2 | 0 -Reserved | Reserved bytes, set to 0 | 2 | 2 -Nonce | Randomly-generated IV | 12 | 4 -Salt | Randomly-generated salt | 16 | 16 -Tag | AES-GCM Authentication Tag | 16 | 32 -Template | Encrypted template | 47552 | 48 - -When the user logs in, the cryptohome daemon store folder of that user is -mounted and the JSON files become available to biod. For every enrolled finger, -biod sends the `HW_Key`-encrypted template to the SBP. The SBP -[derives `HW_Key`](#hw-key-derivation) for that template and deciphers the -template. - -### Protection of the SBP - -To access the unencrypted data and/or `HW_Key`, attackers have 3 main options: - -* Temporarily gain read or even execution access in the SBP through a firmware - bug - * Would allow an attacker to gain access to the clear text FP data and/or - the encryption key - * Mitigation strategy in [Prevent RW exploits](#prevent-rw-exploits) -* Turn a temporary compromise of the SBP’s firmware into a permanent exploit - by replacing the SBP’s firmware with a firmware controlled by the attacker - * Would allow an attacker to gain access to the clear text FP data and/or - the encryption key - * Would allow an attacker to spoof positive FP matches, defeating 2FA - * Mitigation in [Verified firmware](#verified-firmware) -* Use physical access and control of WP to load a compromised firmware to the - SBP - * Mitigation in [Control WP/BOOT0](#control-wp-boot0) - -#### Verified firmware {#verified-firmware} - -To verify the integrity of the firmware we use a mechanism similar to the one -used to protect the EC in detachable keyboards as described in -[Detachable Base Verified Boot]. - -The SBP has a minimalistic RO firmware that contains the public part of an -RSA-3072 exponent 3 key pair. The corresponding private key is only accessible -by the Chrome OS signers and is used to sign SBP firmwares. On boot the RO -firmware verifies the signature of the RW firmware. If the RW signature is -valid, the RO firmware protects itself by setting the WP bit of the Flash then -jumps to RW. - -##### Anti-rollback - -On top of verifying the signature of the RW firmware, the RO firmware must -verify that the RW firmware is not an outdated version with known -vulnerabilities. This is required to prevent attackers from loading valid but -vulnerable RW firmwares. This is achieved with an anti-rollback mechanism as -described in -[Detachable Base Verified Boot][Detachable Base Verified Boot Anti-Rollback]. - -###### Nocturne-specific anti-rollback - -On nocturne, the SBP is an STM32H7 MCU, with 128K Flash blocks. We still need 2 -pingpong RB blocks to prevent data loss, so the Flash map looks like this: - -Name | Size -------------------- | ------- -RO firmware | 128 KB -Blank | 640 KB -RB1 + `SBP_Src_Key` | 128 KB -RB2 + `SBP_Src_Key` | 128 KB -RW firmware | 1024 KB - -The Nocturne SBP uses the same Flash block for the anti-rollback mechanism and -`SBP_Src_Key`. Most of the anti-rollback mechanism is identical to the one -described in -[Detachable Base Verified Boot][Detachable Base Verified Boot Anti-Rollback], -and the key is similar to the entropy/secret stored for -[Detachable Base Swap Detection]. - -The rollback minimum version is updated whenever RO has verified RW signature, -and the RW rollback version is larger than what is stored in the RB block. - -When re-keying is desired, `SBP_Src_Key` is updated by doing the following -operation: - -``` -SHA256(SBP_Src_Key || entropy) -``` - -where `entropy` is generated from STM32H7 True Random Number Generator (see -[RM0433] Chapter 33 for details). Since there are 2 rollback blocks, and we -ping-pong between them, re-keying should involve updating `SBP_Src_Key` twice, -so that both blocks are erased, and no remnant of the previous key is left over. - -#### Prevent RW exploits {#prevent-rw-exploits} - -Even non-persistent exploits in the RW firmware would be problematic if the -attacker was able to read the content of the memory or the Flash, e.g. via a -buffer overflow, since they could gain access to the clear text FP data and/or -the encryption key. If the attacker was also able to execute code in RW, they -would be able to spoof positive FP matches. - -##### Attack through host command interface {#attack-host-command} - -The AP can send a number of commands to the SBP, for example to wait for a match -or to update the RW firmware. In case of a vulnerability in the protocol an -attacker with (potentially remote) access to the AP<->SBP SPI bus could send bad -specially crafted commands to the SBP and potentially gain read, write or even -execute permissions in the SBP. - -###### Mitigation strategies - -* Limit the size of the API exposed by the SBP to the AP -* Fuzz the host command interface - -##### Attack through crafted templates uploaded to the SBP {#template-attack} - -The AP partially deciphers (with `User_Key`) the templates stored on the disk -then sends the `HW_Key`-encrypted templates to the SBP where they will be -deciphered and then passed to the matching algorithm. An attacker could submit a -carefully crafted template to the SBP that would exploit holes in the closed -source matching algorithm library. - -###### Mitigation strategies - -We use AEAD to decipher and authenticate the templates received from the AP, -they are not passed directly to the matching library. Bad templates will be -intercepted by the decryption code. - -##### RAM noexec - -Even if an attacker gained some level of access to the SBP, the RAM is not -executable so it would be hard for the attacker to execute compromised code, for -example to spoof successful authentication and break 2FA or to attempt to turn -into a persistent compromission of the SBP by writing a new compromised firmware -to Flash. - -#### Control WP/BOOT0 {#control-wp-boot0} - -The BOOT0 pin of the MCU is gated by the WP controlled by Haven. Since toggling -the WP bit from Haven requires physical access to the device, remote attackers -can’t toggle the BOOT0 pin to make the MCU start in bootloader mode and -read/write the Flash from the AP. - -However, with physical access (> 5 minutes) an attacker could disable the WP -signal from Haven and toggle the BOOT0 pin to start the MCU in bootloader mode. - -##### Flash protected with RDP Level 1 - -We will set the Flash in [Global Read-out Protection (RDP) mode Level 1]. This -means that attackers with physical access who would manage to start the MCU in -bootloader mode would not be able to read `SBP_Src_Key` from the Flash. -Attackers would still be able to read the content of the RAM and registers but -at that point the MCU would just have rebooted and the RAM would be empty. - -If the attacker attempted to write their own code to the Flash (for example to -replace RO), RDP Level 1 would only allow that after a complete erasure of the -Flash that would wipe `SBP_Src_Key`, preventing the user from decrypting FP -templates. - -*Note*: An attacker with that level of access could in theory replace the RO -firmware with their own firmware. This would however have wiped enrolled -fingers, giving the user an indication that their device might have been -tampered with. This wouldn’t give access to existing FP templates or images to -the attacker, only future enrollments. - -##### RMA - -To ensure that a device is clean after e.g. refurbishing, the RMA procedure -would require that the operator disabled the WP bit from Haven and toggled BOOT0 -to switch to bootloader mode. After that a known good RO and RW firmware can be -written to the Flash and the operator will reenable the WP bit from Haven. - -## Security Considerations - -### Security boundaries - -#### Chrome to system services - -Biod and Chrome communicate over D-Bus (defined [here][biod D-Bus API]). - -* Chrome lets biod know when the user has signed in, so biod can load the - templates to the [SBP](#overview). -* Biod lets Chrome know when the SBP has detected a positive or negative match - so Chrome can unlock the screen. -* Chrome tells biod to start/end enrolling a finger. -* Chrome tells biod to start/end authentication (matching) mode. - -#### Kernel to firmware - -The SBP uses the `cros_ec` interface, same as the EC. There are additional -SBP-specific host commands that the AP can send to the SBP, see -[Attack through host command interface](#attack-host-command). - -### Privileges - -#### Sandboxing - -Biod uses Minijail ([upstart script][biod upstart script]) for [sandboxing], and -has a [seccomp filter]. - -### Untrusted input - -Encrypted templates are read from the stateful partition where they could be -corrupted or tampered with. Biod itself doesn’t parse that input -it’s still -encrypted by the SBP- and merely marshalls the data around to and from the SBP. -To ensure the integrity of the input, we use [AEAD] with an -[implementation][AEAD implementation] based on BoringSSL. - -The encrypted templates are wrapped inside JSON files that could be corrupted or -tampered with. Biod does parse and interpret some fields of those JSON files. -That input is [fuzzed]. - -### Sensitive data - -The SBP handles biometric data, see the [Detailed Design](#detailed-design) -section that describes how we keep that data protected from attackers. - -### Attack surface - -#### Libraries - -* Biod uses libbrillo and libchrome -* The SBP firmware is based on the cros_ec code already used in the EC. Two - significant additions: - * Parts of BoringSSL (AES and AES-GCM) ported to cros_ec - * 3rd-party proprietary blob used for matching, see - [Closed source blobs in the SBP](#closed-source-blobs). - -#### Remote attacks - -Neither biod nor the SBP are exposed directly to remote attackers. Since biod -communicates with Chrome over D-Bus, and attacker who had compromised Chrome -could start sending D-Bus commands to biod. - -#### Closed source blobs in the SBP {#closed-source-blobs} - -The enrollment/matching and image capture libraries are provided by a 3rd-party -vendor in binary form. That proprietary blob went through a security audit by a -3rd party auditor (see the auditor’s [report][Security Audit Report]. - -On top of the security audit of the 3rd-party proprietary code, we limit the -attack surface of those libraries by not directly exposing them to user input. -Data (e.g. FP templates) that is fed to those libraries isn’t directly coming -from untrusted user input, it is sanitized by the opensource glue logic and -wrappers. For example, we use AEAD to ensure that the encrypted data that is -deciphered before being passed to the 3rd-party libraries has been generated by -the SBP itself. For more details, see section -[Attack through crafted templates uploaded to the SBP](#template-attack). - -### Implementation robustness - -#### biod (userspace daemon) - -##### Multi-threading/multi-process - -biod uses `base::MessageLoopForIO`, no custom multi-thread or multi-process -implementation. - -##### State machine implementation - -biod has 3 main states: - -* Idle -* Waiting for a match: controlled by the [AuthSession] object -* Enrolling a new fingerprint: controlled by the [EnrollSession] object. - -#### cros_fp (SBP firmware) - -##### Multi-threading/multi-process - -We use the [primitives][EC primitives] of the Chromium OS EC: tasks, hooks, and -deferred functions. - -##### Memory allocation - -Most buffers (e.g. for FP images and templates) are [statically allocated]. The -vendor libraries do require some dynamic memory allocation, we provide -[wrappers functions] that use the [malloc/free memory module for Chrome EC]. - -##### State machine implementation - -There is one main [state machine] that configures the matching/enrollment code -to be ready for a match or to enroll a finger. - -### Cryptography - -See detailed discussion in the ["FP template encryption"](#template-encryption) -section. - -### Metrics {#metrics} - -Metrics related to security that we’re collecting through UMA: - -* `Ash.Login.Lock.AuthMethod.Used.ClamShellMode` to know if FP is used to - authenticate -* `Ash.Login.Lock.AuthMethod.Used.TabletMode` to know if FP is used to - authenticate -* `Fingerprint.Unlock.AuthSuccessful` tracks whether FP authentication was - successful or not -* `Fingerprint.Unlock.AttemptsCountBeforeSuccess` tracks how many attempts it - takes for users to unlock with their fingerprint -* `Fingerprint.UnlockEnabled` tracks whether FP unlocking is enabled or not -* `Fingerprint.Unlock.EnrolledFingerCount` reports the number of fingers that - users have enrolled - -Complete list of metrics collected via UMA: -[New UKM collection review - CrOS FP Unlock] - -### Potential attacks - -#### Enroll a rogue fingerprint - -An attacker with physical access to the device could enroll their own -fingerprint under the victim’s account and use it to unlock the device at-will -in the future. - -* Enrollment UI requires the user password before telling biod to start an - enrollment session, so the attacker would need some form of exploit to - bypass Chrome and trigger the enrollment. We plan to replace this - post-launch with a mechanism similar to [Authentication-Time User Secrets]. - Separate design doc to come. -* Even if it’s not a persistent exploit, a rogue enrolled fingerprint would - persist. -* The victim’s fingerprint data would still be secure. -* The enrollment UI shows how many fingers are enrolled. - -## Privacy Considerations - -### Fingerprint data is kept locally on the device - -The raw fingerprint images themselves never leave the SBP. The fingerprint -templates are kept on the local storage (encrypted both with the `HW_Key` and -the `User_Key`) of the device and not synced to the cloud, encrypted or not. - -### Fingerprint data decryption requires the user password - -The fingerprint templates are stored in a "[cryptohome daemon store folder]" -which is only mounted when the user logs in. To do so, they must have entered -their password. - -### FP matching is not used for login, only unlocking - -Before using their fingerprint to unlock the device the user must have logged -in, typically with the Google Account password. - -### Lock screen will display a FP icon if enabled - -If a user has enabled FP unlocking, a FP icon will be associated to that user on -the lock screen. This potentially lets others know that a user has enabled FP -unlocking. This seems reasonable when the small resulting decrease in privacy is -weighed against the fact that adding an icon greatly improves UX. - -### Metrics collection - -We collect anonymous metrics through [UMA], see section [Metrics](#metrics) for -details. - -### Logs - -Biod, the SBP, and Chrome have logs related to the fingerprint process. -[Privacy fields for Fingerprints] lists the log entries and their privacy -implications. Full [PDD is here]. - -#### Biod - -The log files are in `/var/log/biod/`. - -#### SBP - -The log file is `/var/log/cros_fp.log`. - -<!-- Links --> - -[2FA]: https://en.wikipedia.org/wiki/Multi-factor_authentication -[AEAD implementation]: https://chromium.googlesource.com/chromiumos/platform/ec/+/aed008f87c3c880edecf7608ab24eaa4bee1bc46/common/fpsensor.c#574 -[AEAD]: https://en.wikipedia.org/wiki/Authenticated_encryption -[Arm TrustZone]: https://www.arm.com/products/security-on-arm/trustzone -[Authentication-Time User Secrets]: http://go/authentication-time-user-secrets -[AuthSession]: https://chromium.googlesource.com/chromiumos/platform2/+/eae39a9ad1239f8fbfa8164255578b306ff6ba5c/biod/biometrics_manager.h#96 -[biod D-Bus API]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/system_api/dbus/biod/ -[biod upstart script]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/biod/init/biod.conf -[ccd open]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md#Open-CCD -[CDD]: https://source.android.com/compatibility/android-cdd#7_3_10_fingerprint_sensor -[Chromium OS EC]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/README.md -[clobber-state]: https://chromium.googlesource.com/chromiumos/platform2/+/962ab1bc481db0cf504b5449eb3a3d5008ea7601/init/clobber_state.cc#475 -[cryptohome daemon store folder]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/sandboxing.md#securely-mounting-cryptohome-daemon-store-folders -[cryptohome]: https://www.chromium.org/chromium-os/chromiumos-design-docs/protecting-cached-user-data -[Detachable Base Swap Detection]: https://docs.google.com/document/d/1WYdkkSAL_RHVc5mUXnAvBBfAeM7Wj3ABa1dbeTdvm74/edit#heading=h.g74ijelumqop -[Detachable Base Verified Boot Anti-Rollback]: http://go/detachable-base-vboot#heading=h.fimcm174ok3 -[Detachable Base Verified Boot]: http://go/detachable-base-vboot#heading=h.dolfbdpggye6 -[EC primitives]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/README.md#Software-Features -[EnrollSession]: https://chromium.googlesource.com/chromiumos/platform2/+/eae39a9ad1239f8fbfa8164255578b306ff6ba5c/biod/biometrics_manager.h#92 -[fingerprint authentication framework]: https://developer.android.com/about/versions/marshmallow/android-6.0.html#fingerprint-authentication -[fuzzed]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/biod/biod_storage_fuzzer.cc -[Global Read-out Protection (RDP) mode Level 1]: https://www.st.com/content/ccc/resource/technical/document/application_note/b4/14/62/81/18/57/48/05/DM00075930.pdf/files/DM00075930.pdf/jcr:content/translations/en.DM00075930.pdf -[HKDF]: https://tools.ietf.org/html/rfc5869 -[Input Key Material (IKM)]: https://en.wikipedia.org/wiki/HKDF -[Intel SGX]: https://software.intel.com/en-us/sgx -[macOS]: https://support.apple.com/en-us/HT207054 -[malloc/free memory module for Chrome EC]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/shmalloc.c -[matching algorithm]: https://en.wikipedia.org/wiki/Fingerprint#Algorithms -[mount_encrypted]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/cryptohome/mount_encrypted -[New UKM collection review - CrOS FP Unlock]: https://docs.google.com/document/d/1qjDCMcBcrhSeg_uwyEIRsXHKmzUTJahcg6a4YVhkuLo -[Old Design Doc]: https://docs.google.com/document/d/1MdPRmCDkVg1HO9DdbvPT5fDZS2ICg5ys9_ok_K95EEU -[PDD is here]: http://go/cros-fingerprint-pdd -[Privacy fields for Fingerprints]: https://docs.google.com/spreadsheets/d/1jLfnuhfbrImpoxuj92OkAxS_GGrm7QkpQhsUQCkO9ec -[Privacy fields for Fingerprints]: https://docs.google.com/spreadsheets/d/1jLfnuhfbrImpoxuj92OkAxS_GGrm7QkpQhsUQCkO9ec/ -[RM0433]: https://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/c9/a3/76/fa/55/46/45/fa/DM00314099/files/DM00314099.pdf/jcr:content/translations/en.DM00314099.pdf -[sandboxing]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/sandboxing.md -[seccomp filter]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/biod/init/seccomp/biod-seccomp-amd64.policy -[Security Audit Report]: https://drive.google.com/a/google.com/file/d/0B1HHKpeDpzYnMDdocGxwWUhpckpWM0hMU0tPa2ZjdEFnLU53/ -[state machine]: https://chromium.googlesource.com/chromiumos/platform/ec/+/90d177e3f0ae729bea7e24934a3c6ef9f2520d45/common/fpsensor.c#252 -[statically allocated]: https://chromium.googlesource.com/chromiumos/platform/ec/+/90d177e3f0ae729bea7e24934a3c6ef9f2520d45/common/fpsensor.c#57 -[system key]: https://chromium.googlesource.com/chromiumos/platform2/+/23b79133514ac2cd986bce21c398fb6658bda248/cryptohome/mount_encrypted/encryption_key.h#125 -[UMA]: http://go/uma -[Windows]: https://www.microsoft.com/en-us/windows/windows-hello -[wrappers functions]: https://chrome-internal.googlesource.com/chromeos/platform/ec-private/+/9ebb3f10c611afff695f679aaeed1a35551a116b/fpc_sensor_pal.c#52 -[TPM Seed for Fingerprint MCU]: ../fingerprint/fingerprint-tpm-seed.md - -<!-- Images --> - -<!-- If you make changes to the docs below make sure to regenerate the PNGs by - appending "export/png" to the Google Drive link. --> - -<!-- https://docs.google.com/drawings/d/1-JUWTF7sUTND29BfhDvIudzX_S6g-iwoxG1InPedmVw --> - -[Decryption Flowchart]: ../images/cros_fingerprint_decryption_flowchart.png - -<!-- https://drive.google.com/open?id=1uUprgLsTUZZ2G2QWRYcRn6zBAh6ejvJagVRD7eZQv-k --> - -[Encryption Flowchart]: ../images/cros_fingerprint_encryption_flowchart.png - -<!-- https://docs.google.com/drawings/d/1DFEdxfDXEtYY3LNOOJFAxVw2A7rKouH98tnb1yiXLAA --> - -[Fingerprint Architecture]: ../images/cros_fingerprint_architecture_diagram.png diff --git a/docs/fingerprint/fingerprint-debugging.md b/docs/fingerprint/fingerprint-debugging.md deleted file mode 100644 index c77874e7bb..0000000000 --- a/docs/fingerprint/fingerprint-debugging.md +++ /dev/null @@ -1,254 +0,0 @@ -# Fingerprint Debugging - -This document describes how to attach a debugger with SWD in order to debug the -FPMCU with [`gdb`](#gdb) or to [flash the FPMCU](#flash). - -[TOC] - -## Overview - -### SWD - -`SWD` (Single Wire Debug) was introduced by ARM with the Cortex-M family to -reduce the pin count required by JTAG. JTAG requires 5 pins, but SWD can be done -with only 3 pins. Furthermore, one of the freed up pins can be repurposed for -tracing. - -See [CoreSight Connectors] for details on the three standard types of connectors -used for JTAG and SWD for ARM devices. - -## Hardware Required - -* JTAG/SWD Debugger Probe: Any debug probe that supports SWD will work, but - this document assumes that you're using a - [Segger J-Trace PRO for Cortex-M][J-Trace]. -* [Dragonclaw v0.2 Development board][FPMCU dev board] or - [Icetower v0.1 Development board][FPMCU dev board]. -* [Servo Micro]. - -## Software Required - -* [JLink Software] \(when using [J-Trace] or other Segger debug probes). This - is the only software required for flashing. -* In order to perform breakpoint debugging, you will need a tool that supports - connecting `gdbserver`. This document will assume [CLion] \(Googlers see - [CLion for Chrome OS]) and was tested with `JLink_Linux_V684a_x86_64`. - Alternatively, you can use [Ozone], a standalone debugger from Segger. - -## JLink Software {#software} - -Download the [JLink Software], choosing the `J-Link Software and Documentation -pack for Linux, TGZ archive, 64-bit` version. This version is recommended -because it's simple to extract the tarball into a directory that is accessible -to the Chrome OS chroot. The instructions in this document assume that you have -extracted the tarball in -`~/chromiumos/src/platform/ec/JLink_Linux_V684a_x86_64`. - -## Connecting SWD {#connect-swd} - -### Dragonclaw v0.2 - -The connector for SWD is `J4` on Dragonclaw v0.2. - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: Pay attention to the location of pin 1 (red wire) in the -photos below so that you connect with the correct orientation. - -`SW2` on the bottom of Dragonclaw must be set to `CORESIGHT`. - -If you want to connect a 20-Pin ARM Standard JTAG Connector (0.10" / 2.54 mm), -you can use the following [adapter][JTAG to SWD Adapter] and [cable][SWD Cable]. -*** -<!-- mdformat on --> - -Dragonclaw v0.2 with 20-pin SWD (0.05" / 1.27mm) on J4. Only half the pins are connected. | ------------------------------------------------------------------------------------------ | -![Dragonclaw with 20-pin SWD] | - -Dragonclaw v0.2 with 10-pin SWD (0.05" / 1.27mm) on J4. | -------------------------------------------------------- | -![Dragonclaw with 10-pin SWD] | - -### Icetower v0.1 - -The connector for SWD is `J4` on Icetower v0.1. - -`SW2` on Icetower must be set to `CORESIGHT` (not `SERVO`). - -Icetower v0.1 with 20-pin SWD (0.05" / 1.27mm) on J4. | ------------------------------------------------------ | -![Icetower with 20-pin SWD] | - -## Powering the Board {#power} - -[Servo Micro] can provide both the 3.3V for the MCU and 1.8V for the sensor. - -Run the following to start `servod`, which will enable power to these rails by -default: - -```bash -(chroot) $ sudo servod --board=<BOARD> -``` - -where `<BOARD>` is the board you are working with -([`dartmonkey` or `bloonchipper`][fingerprint hardware]). - -Theoretically, it's also possible to power through J-Trace, though the -[power pin] on J-Trace only outputs 5V, whereas the MCU runs at 3.3V and the -sensor runs at 1.8V. The pin is also not connected on the current designs. - -## Flashing the FPMCU with JLink {#flash} - -* Install the [JLink Software](#software). -* [Connect SWD](#connect-swd). -* [Power the board with servo](#power). -* Start the JLink server: - -```bash -(chroot) $ cd ~/trunk/src/platform/ec -``` - -```bash -# JLinkRemoteServerCLExe will listen on port 19020 (among others) by default. -# This can be overridden with the -Port argument. -(outside) $ ./JLink_Linux_V684a_x86_64/JLinkRemoteServerCLExe -select USB -``` - -You should see the following: - -```bash -SEGGER J-Link Remote Server V6.84a -Compiled Sep 7 2020 18:28:13 - -'q' to quit '?' for help - -Connected to J-Link with S/N 123456 - -Waiting for client connections... -``` - -* Build the FPMCU image: - -```bash -(chroot) $ cd ~/trunk/src/platform/ec -``` - -```bash -(chroot) $ make BOARD=<BOARD> -j -``` - -replacing `<BOARD>` with [`bloonchipper` or `dartmonkey`][fingerprint hardware]. - -* Run the [`flash_jlink.py`] script: - -```bash -(chroot) $ ~/trunk/src/platform/ec/util/flash_jlink.py --board <BOARD> --image ./build/<BOARD>/ec.bin -``` - -replacing `<BOARD>` with [`bloonchipper` or `dartmonkey`][fingerprint hardware]. - -## Using JLink gdbserver {#gdb} - -Start the JLink gdbserver for the appropriate MCU type: - -* Dragonclaw / [Nucleo STM32F412ZG]: `STM32F412CG` -* Icetower / [Nucleo STM32H743ZI]: `STM32H743ZI` - -```bash -(outside) $ ./JLink_Linux_V684a_x86_64/JLinkGDBServerCLExe -select USB -device STM32F412CG -endian little -if SWD -speed auto -noir -noLocalhostOnly -``` - -You should see the port that `gdbserver` is running on in the output: - -```bash -Connecting to J-Link... -J-Link is connected. -Firmware: J-Trace PRO V2 Cortex-M compiled Dec 13 2019 11:19:22 -Hardware: V2.00 -S/N: XXXXX -Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB -Checking target voltage... -Target voltage: 3.30 V -Listening on TCP/IP port 2331 <--- gdbserver port -Connecting to target... -Connected to target -Waiting for GDB connection... -``` - -Configure your editor to use this [`.gdbinit`], taking care to set the correct -environment variables for the `BOARD` and `GDBSERVER` being used. For CLion, if -you want to use a `.gdbinit` outside of your `HOME` directory, you'll need to -[configure `~/.gdbinit`]. - -In your editor, specify the IP address and port for `gdbserver`: - -``` -127.0.0.1:2331 -``` - -You will also want to provide the symbol files: - -* RW image: `build/<board>/RW/ec.RW.elf` -* RO image: `build/<board>/RO.ec.RO.elf` - -Also, since we're compiling the firmware in the chroot, but your editor is -running outside of the chroot, you'll want to remap the source code path to -account for this: - -* "Remote source" is the path inside the chroot: - `/home/<username>/trunk/src/platform/ec` -* "Local source" is the path outside the chroot: - `${HOME}/chromiumos/src/platform/ec` - -To debug with CLion, you will create a new [GDB Remote Debug Configuration] -called `EC Debug`, with: - -* `'target remote' args` (gdbserver IP and port from above): `127.0.0.1:2331` -* `Symbol file` (RW or RO ELF): `/path/to/build/<board>/RW/ec.RW.elf` -* `Path mapping`: Add remote to local source path mapping as described above. - -After configuring this if you select the `EC Debug` target in CLion and -[click the debug icon][CLion Start Remote Debug], CLion and JLink will handle -automatically flashing the ELF file and stepping through breakpoints in the -code. Even if not debugging, this may help with your iterative development flow -since the JLink tool can flash very quickly since it performs a differential -flash. Note that you still need to recompile after making changes to the source -code before launching the debugger. - -## Using Ozone - -Ozone is a free standalone debugger provided by Segger that works with the -[J-Trace]. You may want to use it if you need more powerful debug features than -gdbserver can provide. For example, Ozone has a register mapping for the MCUs we -use, so you can easily inspect CPU registers. It can also be automated with a -scripting language and show code coverage when used with a [J-Trace] that is -connected to the trace pins on a board. Note that the Dragonclaw v0.2 uses an -STM32F412 package that does not have the synchronous trace pins, but the -[Nucleo STM32F412ZG] does have the trace pins. - -[CoreSight Connectors]: http://www2.keil.com/coresight/coresight-connectors -[FPMCU dev board]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board -[J-Trace]: https://www.segger.com/products/debug-probes/j-trace/models/j-trace/ -[JLink Software]: https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack -[Servo Micro]: ./fingerprint-dev-for-partners.md#Servo-Micro -[JTAG to SWD Adapter]: https://www.adafruit.com/product/2094 -[SWD Cable]: https://www.adafruit.com/product/1675 -[Ozone]: https://www.segger.com/products/development-tools/ozone-j-link-debugger/ -[CLion]: https://www.jetbrains.com/clion/ -[CLion for Chrome OS]: http://go/clion-for-chromeos -[GDB Remote Debug Configuration]: https://www.jetbrains.com/help/clion/remote-debug.html#remote-config -[CLion Start Remote Debug]: https://www.jetbrains.com/help/clion/remote-debug.html#start-remote-debug -[Nucleo STM32F412ZG]: https://www.st.com/en/evaluation-tools/nucleo-f412zg.html -[Nucleo STM32H743ZI]: https://www.st.com/en/evaluation-tools/nucleo-h743zi.html -[`.gdbinit`]: /util/gdbinit -[configure `~/.gdbinit`]: https://www.jetbrains.com/help/clion/configuring-debugger-options.html#gdbinit-lldbinit -[power pin]: https://www.segger.com/products/debug-probes/j-link/technology/interface-description/ -[fingerprint hardware]: ./fingerprint.md#hardware -[`flash_jlink.py`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/util/flash_jlink.py - -<!-- Images --> - -[Dragonclaw with 20-pin SWD]: ../images/dragonclaw_with_20_pin_swd.jpg -[Dragonclaw with 10-pin SWD]: ../images/dragonclaw_with_10_pin_swd.jpg -[Icetower with 20-pin SWD]: ../images/icetower_with_20_pin_swd.jpg diff --git a/docs/fingerprint/fingerprint-dev-for-partners.md b/docs/fingerprint/fingerprint-dev-for-partners.md deleted file mode 100644 index 2d9332db5b..0000000000 --- a/docs/fingerprint/fingerprint-dev-for-partners.md +++ /dev/null @@ -1,657 +0,0 @@ -# FPMCU Development for Partners - -This document is intended to help partners (sensor vendors, MCU vendors, etc) -that are currently (or interested in) developing fingerprint solutions for -Chromebooks. The document assumes that you're using Linux to do the development; -preferably a recent version of Ubuntu or Debian. Some partners have had success -developing in a VM, but please note that we don't test that configuration. - -See the [FPMCU documentation] for additional development information. - -[TOC] - -## Hardware Required for Standalone Development (no Chromebook) - -The following hardware components can be used to set up a standalone development -environment for FPMCU development (i.e., it does not rely on a Chromebook). -Development for other [EC]s is often done in a similar manner, but some of them -have their own standalone development or evaluation kits that don't require the -use of [servo]. - -You will need an [FPMCU reference board](#fpmcu-dev-board) and a -[servo debugger](#servo). - -### FPMCU board {#fpmcu-dev-board} - -The Fingerprint MCU (FPMCU) board has the MCU that handles all -fingerprint-related functionality (matching, encryption, etc). The fingerprint -sensor itself connects to the FPMCU board. - -This FPMCU board is the Dragonclaw Rev 0.2. | -------------------------------------------- | -![Dragonclaw board] | - -Download the [Dragonclaw schematics, layout, and BOM][dragonclaw schematics]. - -<!-- mdformat off(b/139308852) --> -*** note -**Googlers**: You can pick up the Dragonclaw development board at Chromestop. -**Partners**: You can request a Dragonclaw development board from Google. -*** - -*** note -Dragonclaw Rev 0.2 needs a [rework](#dragonclaw-rev-0.2-rework) for the FPC -sensor to work while being powered through Servo. All of the boards at Chromestop -have already been reworked. -*** -<!-- mdformat on --> - -This FPMCU board is the Dartmonkey Rev 0.1. | -------------------------------------------- | -![Dartmonkey board] | - -### Servo - -Servo is a general purpose debug board that connects to a header on the FPMCU -board. Among other things, the servo supplies power to the FPMCU and can be used -to program the FPMCU, interact with the EC console, take power measurements, and -debug a running program. It supports SPI, UART, I2C, as well as JTAG/SWD. - -There are two different servo debugger setups supported, the -[Servo Micro](#servo-micro) and the [Servo V2 + Yoshi](#servo-v2-yoshi). The -servo micro is recommended for its simplicity. It lacks builtin JTAG/SWD support -for single step debugging, but Dragonclaw v0.2 has an -[SWD connector](#servo-micro-swd) that can be used. - -[Servo Micro](#servo-micro) | [ServoV2 + Yoshi](#servo-v2-yoshi) ---------------------------- | ---------------------------------- -![Servo Micro] | ServoV2 ![Servo v2] Yoshi Flex ![Standard Yoshi Flex] - -<!-- mdformat off(b/139308852) --> -*** note -For more information about both servos, see [servo]. -*** -<!-- mdformat on --> - -### Servo Micro - -Unlike the Servo V2, the newer servo micro does not require any adapters to -interface with the FPMCU board. - -As you can see below, one end connects to the FPMCU board and the other connect -to the developer's computer over micro USB. - -![Servo Micro with Dragonclaw] - -<!-- mdformat off(b/139308852) --> -*** note -For more information about Servo Micro, see [Servo Micro Info]. -*** -<!-- mdformat on --> - -#### Using SWD (Optional) {#servo-micro-swd} - -Instructions for setup are described in [Fingerprint Debugging]. - -### Servo V2 + Yoshi - -Servo V2 is the original full featured debugger. It requires a -[Yoshi Flex Cable](#yoshi-flex-cable) to interface with the FPMCU. - -![Servo v2] - -<!-- mdformat off(b/139308852) --> -*** note -NOTE: More information on servo can be found in the [servo] documentation. -*** -<!-- mdformat on --> - -#### Yoshi Flex Cable - -The Yoshi Flex cable is used to connect Servo v2 to the FPMCU board. The -standard cable does not work with SWD, but a simple rework can be performed to -support SWD. - -Standard Yoshi Flex | Yoshi Flex Reworked to Support SWD ----------------------- | ------------------------------------- -![Standard Yoshi Flex] | ![Yoshi Flex Reworked to Support SWD] - -Rework steps: - -* Remove R18 and R19 -* Wire from Pin 6 of U21 to right side of R18 -* Wire from Pin 6 of U21 to right side of R19 - -#### Micro USB Cable - -A micro USB cable is needed to connect the the servo v2 board to your host Linux -development machine. - -* [Micro USB Cable] - -#### Servo V2 Hardware Setup - -1. Connect the Yoshi Flex cable to servo, paying attention to the pin - numbering. - - ![Connect Yoshi Flex] ![Another Yoshi Flex image] - -2. Connect the other end of the Yoshi Flex cable to the servo header on the - FPMCU board. - - ![Connect Yoshi Flex to FPMCU board] ![Another image] - -3. Connect the fingerprint sensor to the header on the FPMCU board. - -4. Connect the micro USB cable to servo's `HOST_IN` port. The other end of the - USB cable should be plugged into your host development machine. - - ![Connect USB to Servo] - -5. Optional: Connect SWD Debugger - - If you want to use SWD for debugging, connect your debugger to the `JTAG` - header on servo v2. - - ![Connect SWD Debugger] - -## Software Setup - -### Get the Chromium OS source code - -* First, make sure you [have the prerequisites]. -* Then [get the source]. -* Create and [enter the `chroot`]. - * You can stop after the `enter the chroot` step. - -### Build the [EC]\ (embedded controller) codebase - -Open **two** terminals and enter the chroot in each: - -```bash -# from a terminal on your machine -(outside chroot) $ cd ~/chromiumos/src - -# enter the chroot (the flag is important) -(outside chroot) $ cros_sdk --no-ns-pid -``` - -<!-- mdformat off(b/139308852) --> -*** note -NOTE: More information on servo can be found in the [servo] documentation. -*** -<!-- mdformat on --> - -In one of the terminals, build and start `servod` - -Build and install `servod` in the chroot: - -```bash -(chroot) $ sudo emerge hdctools -``` - -<!-- mdformat off(b/139308852) --> -*** note -In all of the following commands, replace `<BOARD>` in the command with -`bloonchipper` or `dartmonkey` depending on the development board you are using. -*** -<!-- mdformat on --> - -Run `servod`: - -```bash -(chroot) $ sudo servod --board=<BOARD> -``` - -You should see something like this. Leave it running: - -```bash -2019-04-11 15:21:53,715 - servod - INFO - Start -2019-04-11 15:21:53,765 - servod - INFO - Found servo, vid: 0x18d1 pid: 0x5002 sid: 911416-00789 -2019-04-11 15:21:53,766 - servod - INFO - Found XML overlay for board zerblebarn -2019-04-11 15:21:53,766 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/servo_v2_r1.xml, None, 0) -2019-04-11 15:21:53,767 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/servo_v2_r0.xml, None, 0) -2019-04-11 15:21:53,771 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/common.xml, None, 0) -2019-04-11 15:21:53,772 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/power_tools.xml, None, 0) -2019-04-11 15:21:53,774 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/keyboard.xml, None, 0) -2019-04-11 15:21:53,775 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/uart_common.xml, None, 0) -2019-04-11 15:21:53,777 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/ftdii2c_cmd.xml, None, 0) -2019-04-11 15:21:53,777 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/usb_image_management.xml, None, 0) -2019-04-11 15:21:53,784 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/servo_zerblebarn_overlay.xml, None, 0) -2019-04-11 15:21:53,785 - SystemConfig - INFO - Loading XML config (/usr/lib64/python2.7/site-packages/servo/data/servoflex_v2_r0_p50.xml, None, 0) -2019-04-11 15:21:53,792 - Servod - INFO - Initializing interface 1 to ftdi_empty -2019-04-11 15:21:53,792 - Servod - INFO - Initializing interface 2 to ftdi_i2c -2019-04-11 15:21:53,795 - Servod - INFO - Initializing interface 3 to ftdi_uart -2019-04-11 15:21:53,799 - Servod - INFO - /dev/pts/8 -2019-04-11 15:21:53,799 - Servod - INFO - Initializing interface 4 to ftdi_uart -2019-04-11 15:21:53,802 - Servod - INFO - /dev/pts/9 -2019-04-11 15:21:53,802 - Servod - INFO - Use the next FTDI part @ pid = 0x5003 -2019-04-11 15:21:53,802 - Servod - INFO - Initializing interface 5 to ftdi_empty -2019-04-11 15:21:53,802 - Servod - INFO - Use the next FTDI part @ pid = 0x5003 -2019-04-11 15:21:53,802 - Servod - INFO - Initializing interface 6 to ftdi_empty -2019-04-11 15:21:53,802 - Servod - INFO - Use the next FTDI part @ pid = 0x5003 -2019-04-11 15:21:53,802 - Servod - INFO - Initializing interface 7 to ftdi_uart -2019-04-11 15:21:53,805 - Servod - INFO - /dev/pts/10 -2019-04-11 15:21:53,805 - Servod - INFO - Use the next FTDI part @ pid = 0x5003 -2019-04-11 15:21:53,805 - Servod - INFO - Initializing interface 8 to ftdi_uart -2019-04-11 15:21:53,808 - Servod - INFO - /dev/pts/11 -2019-04-11 15:21:53,808 - Servod - INFO - Initializing interface 9 to ec3po_uart -2019-04-11 15:21:53,811 - PD/Cr50 - EC3PO Interface - INFO - -------------------- PD/Cr50 console on: /dev/pts/12 -2019-04-11 15:21:53,811 - Servod - INFO - Initializing interface 10 to ec3po_uart -2019-04-11 15:21:53,812 - EC - EC3PO Interface - INFO - -------------------- EC console on: /dev/pts/14 -2019-04-11 15:21:54,316 - Servod - INFO - Initialized i2c_mux to rem -2019-04-11 15:21:54,317 - Servod - INFO - Initialized i2c_mux_en to on -2019-04-11 15:21:54,319 - Servod - INFO - Initialized pch_disable to off -2019-04-11 15:21:54,320 - Servod - INFO - Initialized jtag_buf_on_flex_en to off -2019-04-11 15:21:54,321 - Servod - INFO - Initialized cold_reset to off -2019-04-11 15:21:54,322 - Servod - INFO - Initialized warm_reset to off -2019-04-11 15:21:54,323 - Servod - INFO - Initialized spi1_buf_on_flex_en to off -2019-04-11 15:21:54,324 - Servod - INFO - Initialized spi_hold to off -2019-04-11 15:21:54,326 - Servod - INFO - Initialized pwr_button to release -2019-04-11 15:21:54,327 - Servod - INFO - Initialized lid_open to yes -2019-04-11 15:21:54,328 - Servod - INFO - Initialized spi2_buf_on_flex_en to off -2019-04-11 15:21:54,330 - Servod - INFO - Initialized rec_mode to off -2019-04-11 15:21:54,331 - Servod - INFO - Initialized fw_up to off -2019-04-11 15:21:54,332 - Servod - INFO - Initialized usb_mux_sel1 to dut_sees_usbkey -2019-04-11 15:21:54,333 - Servod - INFO - Initialized prtctl4_pwren to on -2019-04-11 15:21:54,334 - Servod - INFO - Initialized uart3_en to on -2019-04-11 15:21:54,334 - Servod - INFO - Initialized dut_hub_pwren to on -2019-04-11 15:21:54,335 - Servod - INFO - Initialized kbd_en to off -2019-04-11 15:21:54,337 - Servod - INFO - Initialized spi1_vref to pp3300 -2019-04-11 15:21:54,338 - Servod - INFO - Initialized spi2_vref to pp1800 -2019-04-11 15:21:54,339 - Servod - INFO - Initialized uart2_en to on -2019-04-11 15:21:54,340 - Servod - INFO - Initialized uart1_en to on -2019-04-11 15:21:54,341 - Servod - INFO - Initialized jtag_buf_en to off -2019-04-11 15:21:54,342 - Servod - INFO - Initialized fw_wp_en to off -2019-04-11 15:21:54,343 - Servod - INFO - Initialized sd_vref_sel to off -2019-04-11 15:21:54,343 - Servod - INFO - Initialized ec_ec3po_interp_connect to on -2019-04-11 15:21:54,344 - Servod - INFO - Initialized uart3_vref to off -2019-04-11 15:21:54,345 - Servod - INFO - Initialized jtag_vref_sel0 to pp3300 -2019-04-11 15:21:54,346 - Servod - INFO - Initialized jtag_vref_sel1 to pp3300 -2019-04-11 15:21:54,346 - Servod - INFO - Initialized fpmcu_ec3po_interp_connect to on -2019-04-11 15:21:54,349 - ServoDeviceWatchdog - INFO - Watchdog setup for devices: set([(6353, 20482, '911416-00789')]) -2019-04-11 15:21:54,351 - servod - INFO - Listening on localhost port 9999 -``` - -In the other terminal, build and flash the firmware: - -Navigate to the EC source: - -```bash -(chroot) $ cd ../platform/ec -``` - -Build the firmware: - -```bash -(chroot) $ make BOARD=<BOARD> -j -``` - -The resulting file will be in `build/<BOARD>/ec.bin` - -Flash the firmware file: - -```bash -(chroot) $ ./util/flash_ec --board=<BOARD> --image=./build/<BOARD>/ec.bin -``` - -Prepare a serial terminal in your chroot: - -```bash -(chroot) $ sudo emerge screen -``` - -Connect to the UART pty: - -```bash -(chroot) $ sudo screen $(dut-control raw_fpmcu_console_uart_pty | cut -d: -f2) -``` - -Press enter key several times (may need to wait up to 20 seconds). Then you will -see a prompt: - -``` -> -``` - -At this point you are connected to the MCU's serial (UART) console. You can list -all of the available console commands with "help": - -``` -> help -``` - -```bash -Known commands: - chan fpcapture hcdebugsherase fpenroll history spixfer waitms - flashinfo fpmatch hostevent sysinfo - flashread gettime md sysjump - flashwp gpioget panicinfo syslock - flashwrite gpioset reboot taskinfo -HELP LIST = more info; HELP CMD = help on CMD. -``` - -Start a fingerprint enrollment: - -``` -> fpenroll -``` - -### Measuring Power {#measure-power} - -The Dragonclaw reference board has an onboard INA that monitors the voltage and -power draw of the MCU and FP Sensor independently. - -Signal Name | Description ---------------- | ------------------------------------- -`pp3300_dx_mcu` | 3.3V supplying the MCU -`pp3300_dx_fp` | 3.3V supplying the fingerprint sensor -`pp1800_dx_fp` | 1.8V supplying the fingerprint sensor - -You can monitor all power and voltages by using the following command: - -```bash -(chroot) $ watch -n0.5 dut-control pp3300_dx_mcu_mv pp3300_dx_fp_mv pp1800_dx_fp_mv pp3300_dx_mcu_mw pp3300_dx_fp_mw pp1800_dx_fp_mw -``` - -You can get a summary of the power over `N` seconds with: - -```bash -(chroot) $ dut-control -t N pp3300_dx_mcu_mv pp3300_dx_fp_mv pp1800_dx_fp_mv pp3300_dx_mcu_mw pp3300_dx_fp_mw pp1800_dx_fp_mw -``` - -<!-- mdformat off(b/139308852) --> -*** note -The `_mv` suffix denotes millivolt and `_mw` suffix denotes milliwatt. -*** - -*** note -See [Power Measurement Documentation] for more information. -*** -<!-- mdformat on --> - -### Toggling Hardware Write Protect - -When using a fingerprint development board connected to servo, you can toggle -hardware write protect for testing. - -**NOTE**: `servod` must be running. - -Check the state of hardware write protect: - -```bash -(chroot) $ dut-control fw_wp_en -``` - -Enable hardware write protect: - -```bash -(chroot) $ dut-control fw_wp_en:on -``` - -Disable hardware write protect: - -```bash -(chroot) $ dut-control fw_wp_en:off -``` - -### Contributing Changes - -#### Using Gerrit and git - -If you’re not familiar with `git`, Gerrit (code review) and `repo`, here are -some docs to help you get started: - -* [Git and Gerrit Intro for Chromium OS]: Useful to get started as quickly as - possible, but does not explain how `git` works under the hood. -* [Set your editor]: Use your favorite editor when writing `git` commit - messages. -* [Chromium OS Contributing Guide]: Detailed overview of contributing changes - to Chromium OS and the workflow we use. -* [Git: Concepts and Workflow]: Good overview of how `git` actually works. -* [Gerrit: Concepts and Workflow]: Good overview of how Gerrit works; assumes - you understand `git` basics. -* [Life of a patch]: Android workflow, but similar to Chrome OS. - -The Gerrit dashboard that will show your pending reviews (and ones we have for -you): - -* [Public Gerrit] -* [Internal Gerrit] - -#### Registering for a chromium.org *Internal* Account - -If your partnership agreement requires non-public code sharing you will need to -register for an account on the [Internal Gerrit]. Refer to the -[Gerrit Credentials Setup] page for details. Once you register for an internal -account, your contact at Google can make sure you have the necessary permissions -to access the private repository. - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: In order to use a private repository you will have to manually add it -to the repo manifest file before running `repo sync`. Check with your contact -at Google for the exact values to use below: - -**`(outside) $ ~/chromiumos/.repo/manifests/default.xml`** - -```xml -<project remote="cros-internal" - path="CHECK WITH GOOGLE" - groups="firmware" - name="CHECK WITH GOOGLE" /> -``` - -**`(outside) $ ~/chromiumos/.repo/manifests/remote.xml`** - -```xml -<remote name="cros-internal" - fetch="https://chrome-internal.googlesource.com" - review="https://chrome-internal-review.googlesource.com" /> -``` -*** -<!-- mdformat on --> - -### Tracking Issues and Communication - -Development issue tracking and communication is done through the -[Partner Issue Tracker]. You will use your [Partner Domain] account to access -the [Partner Issue Tracker]. If you do not already have a [Partner Domain] -account, please request one from your Google contact. - -In order to make sure that you receive email notifications for issues, please -make sure that you [set up email forwarding] and set your -[notification settings] appropriately. Communication should primarily be done -through the [Partner Issue Tracker] and not email so that it can be more easily -tracked by multiple people and a record is preserved for posterity. - -[Partner Issue Tracker]: https://developers.google.com/issue-tracker/guides/partner-access -[Partner Domain]: https://developers.google.com/issue-tracker/guides/partner-domains -[set up email forwarding]: https://developers.google.com/issue-tracker/guides/partner-domains#email_forwarding -[notification settings]: https://developers.google.com/issue-tracker/guides/set-notification-preferences - -## Working with Chromebooks - -Chromebooks have an FPMCU (e.g., Dragonclaw) board attached to the motherboard. -You can use the device to run `ectool` commands and test the fingerprint sensor -from the UI. - -### Developer Mode and Write Protection - -Make sure that your fingerprint-equipped Chrome OS device is in [developer mode] -with a *test* image flashed and [hardware write protection] disabled. Using the -test image will allow you to SSH into the device and disabling hardware write -protection allows you to have full access to flashing the FPMCU firmware. - -See [Installing Chromium] for details on flashing test images and enabling -[developer mode]. - -### Connecting - -In general, most of our development is done by connecting to the DUT (device -under test) via SSH. We usually connect the DUT to ethernet (e.g., via USB-C to -Ethernet converter), but WiFi should also work (assuming corporate firewall -restrictions don’t block SSH port 22). To get the IP address, tap the -battery/time icon in the lower right corner. Then tap on “Ethernet” followed by -the gear icon in the upper right. - -```bash -(chroot) $ ssh root@<IP_ADDRESS> -Password: test0000 -``` - -Once you have SSH’ed into the DUT, you should be able to run `ectool` commands. - -**Example**: Capture a "test_reset" image from the sensor and write it to a -[PNM] file (viewable with the ImageMagick `display` command): - -```bash -(device) $ ectool --name=cros_fp fpmode capture test_reset; ectool --name=cros_fp waitevent 5 500; ectool --name=cros_fp fpframe > /tmp/test_reset.pnm -``` - -Alternatively, you can access a shell via the UI on device by pressing -`CTRL+ALT+F2` (third key on top row). Log in with `root` and `test0000`. - -### Flashing FPMCU from DUT - -Copy the firmware to the DUT: - -```bash -(chroot) $ scp ./build/bloonchipper/ec.bin <DUT_IP>:/tmp/ec.bin -``` - -From the DUT, flash the firmware you copied: - -```bash -(device) $ flash_fp_mcu /tmp/ec.bin -``` - -## Commit-queue Prototype Environment - -![CQ Prototype Environment] - -## Troubleshooting - -### Dragonclaw Rev 0.2 Rework {#dragonclaw-rev-0.2-rework} - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: All Dragonclaw v0.2 boards have been reworked, so it is not necessary -to perform the rework yourself. -*** -<!-- mdformat on --> - -Dragonclaw **Rev 0.2** has two load switches (`U4` and `U6`) that enable the -1.8V power rail from the servo connector or motherboard connector. However, this -switch is not compatible with 1.8V, so will always output 0V. - -The [rework document][Dragonclaw Rev 0.2 1.8V Rework] describes replacing these -two switches with ones compatible with 1.8V. - -### Dragonclaw Rev 0.1 Servo Fix - -Dragonclaw **Rev 0.1** has a known issue with UART and JTAG. Most notably, this -issue causes servo micro to fail to program the FPMCU over UART. - -This issue can be fixed with the following rework steps: - -* Connect servo header pin 13 to pin 18 -* Connect servo header pin 13 to pin 29 - -![Dragonclaw servo fix diagram] - -### Verify that servo and debugger are connected to USB {#servo-connected} - -Check whether servo is enumerating on USB. If you are using a debugger -(Lauterbach, J-Link, etc), also check to make sure it enumerates. Depending on -the debugger being used, it may need to be powered with an external power -supply. - -```bash -(chroot) $ lsusb - -Bus 002 Device 003: ID 0897:0004 Lauterbach # ← This is my Lauterbach (debugger) -Bus 001 Device 013: ID 18d1:5002 Google Inc. # ← This is servo -``` - -### "No servos found" when running servod - -If you get the following message, make sure that -[servo is connected to USB](#servo-connected). You may also want to try -restarting your machine (or VM). - -```bash -(chroot) $ sudo servod --board=bloonchipper -2019-04-12 14:53:42,236 - servod - INFO - Start -2019-04-12 14:53:42,270 - servod - ERROR - No servos found -``` - -### Losing characters in servo UART console - -Make sure that this interface is disabled: - -```bash -(chroot) $ dut-control usbpd_ec3po_interp_connect:off -``` - -### FPMCU console commands - -* Once the console is working you can use `help` to see the commands. -* There should be fingerprint commands that start with `fp` (see `fpsensor.c` - in the [EC] code). - -<!-- Links --> - -[EC]: https://chromium.googlesource.com/chromiumos/platform/ec -[ectool_servo_spi]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/util/comm-servo-spi.c#15 -[servo]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/README.md -[developer mode]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/debug_buttons.md#firmware-keyboard-interface -[hardware write protection]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/write_protection.md -[have the prerequisites]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#Prerequisites -[get the source]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#get-the-source -[enter the `chroot`]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#building-chromium-os -[Chromium OS Contributing Guide]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/contributing.md -[Servo Micro Info]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/docs/servo_micro.md -[Set your editor]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#Set-your-editor -[Life of a patch]: https://source.android.com/setup/contribute/life-of-a-patch -[Git: Concepts and Workflow]: https://docs.google.com/presentation/d/1IQCRPHEIX-qKo7QFxsD3V62yhyGA9_5YsYXFOiBpgkk/ -[Gerrit: Concepts and Workflow]: https://docs.google.com/presentation/d/1C73UgQdzZDw0gzpaEqIC6SPujZJhqamyqO1XOHjH-uk/ -[Public Gerrit]: https://chromium-review.googlesource.com -[Power Measurement Documentation]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/docs/power_measurement.md -[Internal Gerrit]: https://chrome-internal-review.googlesource.com -[Gerrit Credentials Setup]: https://www.chromium.org/chromium-os/developer-guide/gerrit-guide -[Micro USB Cable]: https://www.monoprice.com/product?p_id=9762 -[PNM]: https://en.wikipedia.org/wiki/Netpbm_format -[Git and Gerrit Intro for Chromium OS]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/git_and_gerrit_intro.md -[Installing Chromium]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#installing-chromium-os-on-your-device -[FPMCU documentation]: ./fingerprint.md -[Fingerprint Debugging]: ./fingerprint-debugging.md -[dragonclaw schematics]: ../schematics/dragonclaw - -<!-- Images --> - -[Servo Micro]: ../images/servo_micro.jpg -[Servo Micro with Dragonclaw]: ../images/servomicro_dragonclaw.jpg -[Servo v2]: ../images/servo_v2.jpg -[Standard Yoshi Flex]: ../images/yoshi_flex.jpg -[Yoshi Flex Reworked to Support SWD]: ../images/yoshi_flex_swd_rework.jpg -[Dragonclaw board]: ../images/dragonclaw_rev_0.2.jpg -[Dragonclaw servo fix diagram]: ../images/dragonclaw_servo_fix.jpg -[Connect USB to Servo]: ../images/servo_v2_with_micro_usb.jpg -[Connect Yoshi Flex]: ../images/servo_v2_with_yoshi_flex.jpg -[Another Yoshi Flex image]: ../images/servo_v2_with_yoshi_flex2.jpg -[Connect Yoshi Flex to FPMCU board]: ../images/dragonclaw_yoshi_flex_header.jpg -[Another image]: ../images/dragonclaw_yoshi_flex_header2.jpg -[Connect SWD Debugger]: ../images/servo_v2_jtag_header.jpg -[Dartmonkey board]: ../images/dartmonkey.jpg - -<!-- If you make changes to the docs below make sure to regenerate the JPEGs by - appending "export/pdf" to the Google Drive link. --> - -<!-- https://docs.google.com/drawings/d/1YhOUD-Qf69NUdugT6n0cX7o7CWvb5begcdmJwv7ch6I --> - -[Dragonclaw Rev 0.2 1.8V Rework]: https://github.com/coreboot/chrome-ec/blob/master/docs/images/dragonclaw_rev_0.2_1.8v_load_switch_rework.pdf - -<!-- https://docs.google.com/drawings/d/1w2qbb4AsSxY-KTK2vXZ6TKeWHveWvS3Dkgh61ocu0wc --> - -[CQ Prototype Environment]: ../images/CQ_Prototype_Environment.jpg diff --git a/docs/fingerprint/fingerprint-factory-quick-guide.md b/docs/fingerprint/fingerprint-factory-quick-guide.md deleted file mode 100644 index c9478bf99a..0000000000 --- a/docs/fingerprint/fingerprint-factory-quick-guide.md +++ /dev/null @@ -1,97 +0,0 @@ -# Chrome OS Fingerprint Sensor: Quick Factory Guide - -The goal of this document is to outline how ODM partners can make use of the -existing Chrome OS factory scripts to meet Chrome OS FPS factory requirements. - -[TOC] - -## Factory Requirements - -### Flash firmware for fingerprint sensor microcontroller (FPMCU) - -FPMCU firmware must be flashed before fingerprint functional test is run. ODM -partners may work with the module house to preflash FPMCU firmware before -factory SMT. However, this way ODM partners have to coordinate with the module -house to make sure the preflash FPMCU firmware blob is extracted from the FSI -release image (from /opt/google/biod/fw/). If the FPMCU firmware doesn’t match -the FPMCU firmware blob checked into the release image, the end users will see -the ‘critical update’ screen in their out-of-box experience, because -bio\_fw\_updater tries to update FPMCU firmware at boot time. This is a bad user -experience we want to avoid. Most importantly, in PVT/MP build, only the FPMCU -firmware in the release image would be signed by MP key. So you **MUST** ensure -FPMCU is flashed with the MP-signed firmware blob extracted from FSI, before -shipping the devices. - -As opposed to pre-flashing FPMCU in the module house, ODM partners are -encouraged to make use of -[update\_fpmcu\_firmware.py](https://chromium.googlesource.com/chromiumos/platform/factory/+/e5e903d0a0d8327dd8b9e47d2c808fd845ed73a4/py/test/pytests/update_fpmcu_firmware.py) -to update FPMCU firmware in the factory flow. This script can detect fingerprint -MCU board name, find the right FPMCU firmware blob for the DUT from the release -partition, and then flash FPMCU by flash\_fp\_mcu tool. Please note that this -script may take more than 30 secs to complete, which is slow. - -Since bio\_fw\_update has been disabled in factory test image via -[crrev/c/1913645](https://chromium-review.googlesource.com/c/chromiumos/platform2/+/1913645), -in the factory flow, the FPMCU firmware should not be overwritten by -boot-update-firmware service during reboot. - -### Run fingerprint sensor functional test - -Please add -[fingerprint\_mcu.py](https://chromium.git.corp.google.com/chromiumos/platform/factory/+/a283609cd8446ba4a4b75c2e1d84c9ba24ea8422/py/test/pytests/fingerprint_mcu.py) -to your device test list. A more detailed description about this test can be -found -[here](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/fingerprint/fingerprint-factory-requirements.md). - -### Initialize FPMCU entropy in factory finalization - -The support for FPMCU entropy initialization has been integrated into the -factory finalization script. So FPMCU entropy should be automatically -initialized in factory finalization, if a FPMCU is found on DUT. Note that FPMCU -entropy initialization would fail if rollback\_block\_id is not equal to zero, -which means the entropy has been initialized before. It is usually caused by -biod trying to initialize FPMCU entropy and increment rollback\_block\_id at -boot time. Since we have disabled biod and bio\_crypto\_init in factory test -image via -[crrev/c/1910290](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1910290), -we expect rollback\_block\_id would stay zero during the factory flow, and FPMCU -entropy initialization should succeed in factory finalization. So just run -factory finalization as any other CrOS boards. - -### Enable FPMCU software write protection (SWWP) in factory finalization in PVT/MP - -The support for FPMCU SWWP has been integrated into factory finalization script. -So FPMCU SWWP should be automatically enabled in factory finalization together -with AP/EC SWWP when write\_protection arg is set to true and a FPMCU is found -on DUT. Just run factory finalization as any other CrOS boards. - -### Reset entropy for factory re-finalization (in case of RMA or OQC) - -For the boards that have been finalized, FPMCU entropy has been initialized. So -running re-finalization for those boards are expected to fail at FPMCU entropy -initialization. Before running re-finalization for those boards, ODM partners -have to remove hardware write protection (HWWP) and then run -[update\_fpmcu\_firmware.py](https://chromium.googlesource.com/chromiumos/platform/factory/+/d399a0a1bdeb7249de2721b269e7365e4486e23c/py/test/pytests/update_fpmcu_firmware.py) -to reset rollback\_block\_id and entropy. So the follow-up re-finalization -(which re-initialize entropy) can succeed. - -## References - -* CrOS fingerprint factory requirements: - [doc link](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/fingerprint/fingerprint-factory-requirements.md) -* The summary of CLs: - * Add a factory script to update FPMCU firmware: - [crrev/c/1918679](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1918679), - [crrev/c/1913493](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1913493), - [crrev/c/1927149](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1927149), - [crrev/c/1984618](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1984618), - [crrev/c/2036574](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/2036574) - * Disable FPS-related services that will interfere with the factory flow: - [crrev/c/1913645](https://chromium-review.googlesource.com/c/chromiumos/platform2/+/1913645), - [crrev/c/1910290](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1910290) - * Support FPMCU in factory finalization: - [crrev/c/1868795](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1868795), - [crrev/c/1902267](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1902267), - [crrev/c/1900503](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1900503), - [crrev/c/1925927](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1925927), - [crrev/c/1948163](https://chromium-review.googlesource.com/c/chromiumos/platform/factory/+/1948163) diff --git a/docs/fingerprint/fingerprint-factory-requirements.md b/docs/fingerprint/fingerprint-factory-requirements.md deleted file mode 100644 index 0fc99e2740..0000000000 --- a/docs/fingerprint/fingerprint-factory-requirements.md +++ /dev/null @@ -1,502 +0,0 @@ -# Chrome OS Fingerprint Factory Requirements - -This document provides an overview of factory requirements and testing for the -fingerprint sensor. - -[TOC] - -## Contact - -For questions regarding this document, please contact the -[Chrome OS Fingerprint Team]. - -## Terminology - -* `AP`: Application Processor. -* `FPMCU`: Fingerprint Microcontroller. -* `FATP`: Final Assembly, Test, and Pack -* `FP sensor`: Fingerprint sensor. Directly connected to the FPMCU, not the - AP. -* `firmware`: Software that runs on the FPMCU. -* `finalization`: Process that is run in the factory before the device being - built leaves the factory. -* `entropy`: Cryptographically secure random bytes stored in FPMCU flash. Used - for encrypting/decrypting fingerprint templates. -* `software write protect`: Prevents the RO portion of the FPMCU’s flash from - being overwritten. Full details in [EC docs][Software Write Protect]. -* `ITS`: In-Device Test Specification. -* `MTS`: Module Test Specification. -* `MQT`: Module Quality Test. -* `MQT2`: Module Quality Test 2. - -## Documents - -* [FPC1025: Module Test Specification] -* [FPC1145: Module Test Specification] -* [FPC In-Device Test Specification] -* [Factory Fingerprint Sensor Testing for `nocturne` ] - -## FPMCU Firmware Location - -The binaries for the FPMCU firmware are located in `/opt/google/biod/fw`. Now -that Chrome OS supports unibuild, there may be multiple firmware binaries in the -directory since multiple sensors may be used across a single "board" (e.g., the -`hatch` board can use either `bloonchipper` or `dartmonkey`). - -The correct firmware type to use for a given board can be discovered with the -[Chrome OS Config] tool: - -```bash -(dut) $ cros_config /fingerprint board -dartmonkey -``` - -OR - -```bash -(chroot) $ cros_config_host -c /build/<BOARD>/usr/share/chromeos-config/yaml/config.yaml -m <MODEL> get /fingerprint board -dartmonkey -``` - -The corresponding firmware for the above command would be -`/opt/google/biod/fw/dartmonkey_*.bin`. - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: If you get an empty response when running the above commands, the -Chrome OS Config settings may not have been updated for the Chrome OS board. -See the instructions on [updating Chrome OS Config] for fingerprint. -*** -<!-- mdformat on --> - -Note that the fingerprint team continuously releases updates to the firmware, so -SIEs should watch for version changes in ToT if they are maintaining a separate -factory branch. - -## Flashing the FPMCU - -When the FPMCU is completely blank a low-level flashing tool must be used to -program an initial version of the FPMCU firmware. It’s possible to use the -[`flash_fp_mcu`] script as this low-level flashing tool, though since it -requires the AP and is not necessarily robust against failures, it is not -recommended for mass-production. More details about [`flash_fp_mcu`] are in the -[Fingerprint flashing documentation]. - -The initial version of the FPMCU firmware should be flashed either by the module -house or by the factory. Once an initial version of the FPMCU firmware has been -flashed (i.e., the FPMCU is not blank), the `bio_fw_updater` tool runs on -startup and handles updating the FPMCU firmware to match the version that is in -the rootfs. Note that this update process can take around 30 seconds; if that -length of time is an issue then the factory or module house should pre-flash the -latest firmware beforehand. - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: If the FPMCU is not flashed in the factory as part of development -builds (EVT, etc.), it's possible for developers (or Chromestop) to manually -run [`flash_fp_mcu`], as long as they can disable [hardware write protect]. -Obviously this only applies during development, not mass production. -*** -<!-- mdformat on --> - -## biod and timberslide - -Since `biod` communicates with the FPMCU, it’s best to disable it when running -the fingerprint factory tests. This can be done with upstart: - -```bash -(dut) $ stop biod -``` - -Once testing is complete `biod` should be restarted (or you can reboot the -device). - -`timberslide` is the daemon that periodically sends commands to the FPMCU to -read the latest FPMCU logs. It writes the results to `/var/log/cros_fp.log`. It -should be fine to leave running during tests, though it should be stopped before -running the [`flash_fp_mcu`] script, since that script erases the entire FPMCU: - -```bash -(dut) $ stop timberslide LOG_PATH=/sys/kernel/debug/cros_fp/console_log -``` - -## Factory Tests - -### Fingerprint Sensor (standalone module) - -When using an FPC sensor (e.g., FPC 1025, FPC 1145), the fingerprint sensor -itself must be tested by the module manufacturer with FPC’s tools. FPC provides -a Module Test Tool (MTT), which requires additional hardware (FPC Module Test -Card). FPC also provides design drawings for the rubber stamp. The stamp, -test-fixture and test station need to be implemented by the OEM/ODM/Module House -(often only module house). - -The `MTS` _must_ be followed by the module manufacturer, but Google does not -provide direct support for this testing. FPC is the main point of contact. - -The module testing procedure is documented in the following: - -[FPC1025: Module Test Specification] - -[FPC1145: Module Test Specification] - -### Fingerprint Sensor + FPMCU (in device) - -In-device tests are run during the `FATP` process once the device has been fully -assembled. Google provides source code for these tests in -[`fingerprint_mcu.py`]. - -Hardware Required: Chrome OS DUT before finalization. - -Documentation: [FPC In-Device Test Specification] - -#### Test Image Checkerboard and Inverted Checkerboard Test (CB/ICB) - -##### Purpose - -Capture a checkerboard (and inverted checkerboard) pattern and verify that the -values of the individual pixels do not deviate from the median. - -##### Implementation - -Use `ectool` to capture the first checkerboard pattern image: - -```bash -(dut) $ ectool --name=cros_fp fpmode capture pattern0; ectool --name=cros_fp waitevent 5 500 -FP mode: (0x20000008) capture -MKBP event 5 data: 00 00 00 80 -``` - -Copy the first checkerboard image to a file: - -```bash -(dut) $ ectool --name=cros_fp fpframe > /tmp/pattern0.pnm -``` - -Use `ectool` to capture the second checkerboard pattern image: - -```bash -(dut) $ ectool --name=cros_fp fpmode capture pattern1; ectool --name=cros_fp waitevent 5 500 -FP mode: (0x30000008) capture -MKBP event 5 data: 00 00 00 80 -``` - -Copy the second checkerboard image to a different file: - -```bash -(dut) $ ectool --name=cros_fp fpframe > /tmp/pattern1.pnm -``` - -Perform median analysis on the resulting image as described in the `MTS` -document. The factory toolkit does this in -[`fingerprint_mcu.py`][Checkerboard Test]. - -<!-- mdformat off(b/139308852) --> -*** note -**TIP**: You can view the `.pnm` files generated by the commands below on your -Linux desktop with ImageMagick: `display /path/to/file.pnm`. -*** -<!-- mdformat on --> - -##### Success/Failure - -The median pixel value (type 1 and type 2), pixel errors, finger detect zone -errors, and pixel error deviation limit must fall within the acceptance criteria -limits specified in "4.3.5 Acceptance Criteria Test Image CB / iCB" in the `MTS` -document for the sensor being tested. - -#### Hardware Reset Test (aka IRQ test) - -##### Purpose - -Perform a hardware reset of the sensor and test that the IRQ line is asserted -after 5 ms. See "Section 4.1 Reset test pattern procedure" and "2.8 HW Reset" in -the FPC `MTS` document for the sensor being tested. - -##### Implementation - -This is implemented by the FPMCU on every boot. The results can be checked with -the `ectool` command. The factory toolkit does this in -[`fpmcu_utils.py`][GetSensorIdErrors]. - -##### Success/Failure - -The `Error flags` line of the `fpinfo` `ectool` command must be empty. - -```bash -(dut) $ ectool --name=cros_fp fpinfo - -Fingerprint sensor: vendor 20435046 product 9 model 1401 version 1 -Image: size 56x192 8 bpp -Error flags: -Dead pixels: UNKNOWN -Templates: version 4 size 47616 count 0/5 dirty bitmap 0 -``` - -#### Hardware ID (HWID) check - -##### Purpose - -Ensure that communications between the sensor and the FPMCU are working and that -the correct sensor has been assembled. - -##### Implementation - -`ectool` can be used to request the hardware ID, which can be compared with the -expected hardware ID. The factory toolkit does this in -[`fpmcu_utils.py`][GetSensorId]. - -##### Success/Failure - -The `Fingerprint sensor` line of the `fpinfo` `ectool` command must show the -expected ID and the `Error flags` line must be empty: - -```bash -(dut) $ ectool --name=cros_fp fpinfo - -Fingerprint sensor: vendor 20435046 product 9 model 1401 version 1 # FPC 1145 -Image: size 56x192 8 bpp -Error flags: -Dead pixels: UNKNOWN -Templates: version 4 size 47616 count 0/5 dirty bitmap 0 -``` - -#### Reset Pixel (RP) - -##### Purpose - -Capture a white image, compare the individual pixel values and ensure that the -deviation to the median is within the specified range. - -##### Implementation - -Capture the test image with `ectool` and analyze the output. The factory toolkit -does this in [`fingerprint_mcu.py`][ProcessResetPixelImage]. - -Switch to correct capture mode and wait: - -```bash -(dut) $ ectool --name=cros_fp fpmode capture test_reset; ectool --name=cros_fp waitevent 5 500 -FP mode: (0x50000008) capture -MKBP event 5 data: 00 00 00 80 -``` - -Retrieve the test image: - -```bash -(dut) $ ectool --name=cros_fp fpframe > /tmp/test_reset.pnm -``` - -##### Success/Failure - -A pixel is considered to be a bad pixel ("reset pixel error") if the value read -out deviates more than a defined value from the median. The median value and the -max number of pixels that have "reset pixel error" are defined in section "Reset -Pixel" (4.4 or 4.5) of the MTS for the given sensor. - -#### Module Quality Test (or Module Quality Test 2) with Rubber Stamp Zebra (Optional) - -##### Purpose - -The Module Quality Test (`MQT`) uses a rubber stamp with a "zebra" pattern to -characterize module performance and image quality after the top layer (including -stack-up) is applied. Although this test is optional, OEMs are strongly -encouraged to perform it. - -##### Implementation - -Capture the image when the rubber stamp is applied: - -```bash -(dut) $ ectool --name=cros_fp fpmode capture qual -FP mode: (0x40000008) capture -``` - -Wait for the capture to be finished, timeout after 10s: - -```bash -(dut) $ ectool --name=cros_fp waitevent 5 10000 -MKBP event 5 data: 00 00 00 80 -``` - -Copy the raw captured from to the AP: - -```bash -(dut) $ ectool --name=cros_fp fpframe raw > /tmp/fp.raw -``` - -Run the analysis tool on the captured frame: - -```bash -(dut) $ /usr/local/opt/fpc/fputils.py --mqt /tmp/fp.raw -Error, MQT status : (5) -MQT failed (-1) -``` - -The factory toolkit does this in [`fingerprint_mcu.py`][rubber_finger_present]. - -##### Success/Failure - -See "Section 5.1.5" Acceptance Criteria for `MQT2` or "Section 5.2.5 Acceptance -Criteria" in the MTS for the given sensor. - -## Finalization - -The finalization process must perform two tasks: - -1. Initialize the FPMCU’s `entropy`. -1. When building for PVT or mass production, enable `software write protect`. - -### Initialize FPMCU Entropy - -The `bio_wash` tool is intended to support both the first time factory -initialization and RMA, depending on the flag. When run with the -`--factory_init` argument (`bio_wash --factory_init`), it will ensure that the -`entropy` is set. If the `entropy` has already been set it will do nothing. - -A side-effect of running `bio_wash` is that the `rollback_id` changes (`ectool ---name=cros_fp rollbackinfo`). Initially when the firmware is first flashed, the -`rollback_id` should be zero. After `entropy` is initialized the `rollback_id` -should be set to 1. - -Note that for new devices coming out of the factory we expect `rollback_id` to -be 1, which indicates that the entropy has been set exactly once. - -### Enable Software Write Protect - -`Software write protect` must be enabled for PVT and mass production devices. It -ensures that the RO portion of the FPMCU firmware cannot be overwritten, so it -is critical for FPMCU security. - -The following commands will enable software write protection: - -```bash -(dut) $ ectool --name=cros_fp flashprotect enable # enable -(dut) $ sleep 2 -(dut) $ ectool --name=cros_fp reboot_ec # reboot so it takes effect -(dut) $ sleep 2 -``` - -To validate that software write protection has taken effect, run the following: - -```bash -(dut) $ ectool --name=cros_fp flashprotect # get flashprotect state - -# output should match below -Flash protect flags: 0x0000000b wp_gpio_asserted ro_at_boot ro_now -Valid flags: 0x0000003f wp_gpio_asserted ro_at_boot ro_now all_now STUCK INCONSISTENT -Writable flags: 0x00000004 all_now -``` - -If software write protection is not enabled, you will see the following instead: - -```bash -(dut) $ ectool --name=cros_fp flashprotect # get flashprotect state - -# not protected -Flash protect flags: 0x00000000 -Valid flags: 0x0000003f wp_gpio_asserted ro_at_boot ro_now all_now STUCK INCONSISTENT -Writable flags: 0x00000001 ro_at_boot -``` - -Capturing a raw frame from the sensor will only work when software write -protection is not enabled, so the test should check the following command works -*before* write protection is enabled and then fails *after* write protection is -enabled: - -```bash -(dut) $ ectool --name=cros_fp fpframe raw - -# write protection disabled, exit code 0 and output will be raw bytes - -# write protection enabled, exit code 1 and output will be -EC result 4 (ACCESS_DENIED) -Failed to get FP sensor frame -``` - -## RMA Process - -As part of the RMA process, the `entropy` needs to be reset so that the new -device owner has a new unique encryption key. - -The `bio_wash` tool is intended to support both the first time factory -initialization and RMA, depending on the flag. When run without any arguments -(`bio_wash`), it will forcibly reset the entropy. - -The RMA process should either run `bio_wash` without any arguments or re-flash -the FPMCU firmware and then run `bio_wash --factory_init` to make sure that the -entropy has been reset. - -## Miscellaneous Commands for Test Implementations - -### FPMCU Image Version - -```bash -(dut) $ ectool --name=cros_fp version - -RO version: nocturne_fp_v2.2.64-58cf5974e -RW version: nocturne_fp_v2.2.110-b936c0a3c -Firmware copy: RW -Build info: nocturne_fp_v2.2.110-b936c0a3c 2018-11-02 14:16:46 @swarm-cros-461 -Tool version: v2.0.2144-1524c164f 2019-09-09 06:50:36 @chromeos-ci-legacy-us-central2-d-x32-7-3ay8 -``` - -### Capture Raw Images - -Put your finger on the sensor, then run: - -```bash -(dut) $ ectool --name=cros_fp fpmode capture vendor -``` - -Wait for the capture to be finished, timeout after 10s: - -```bash -(dut) $ ectool --name=cros_fp waitevent 5 10000 -MKBP event 5 data: 00 00 00 80 -``` - -Remove the finger from the sensor, then start the retrieval of the frame from -the MCU to the AP: - -```bash -(dut) $ ectool --name=cros_fp fpframe raw > /tmp/fp.raw -``` - -To convert the images from FPC’s proprietary format to PNG, you will need to -have `cros deploy`’d `libfputils-nocturne`, which will install the required -utilities in `/opt/fpc`. - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: As of 2019-05-21, the `libfputils` library only works for the FPC 1145 -sensor (in nocturne), not the FPC 1025 sensor (hatch). -*** -<!-- mdformat on --> - -Convert the buffer in proprietary format into png: - -```bash -(dut) $ /opt/fpc/fputils.py /tmp/fp.raw --png -Extraction found 2 images -Wrote /tmp/fp.0.png (14085 bytes) -Wrote /tmp/fp.1.png (14025 bytes) -``` - -[Software Write Protect]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/write_protection.md#Software-Write-Protect -[hardware write protect]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/docs/write_protection.md#hw_wp -[FPC1025: Module Test Specification]: http://go/cros-fingerprint-fpc1025-module-test-spec -[FPC1145: Module Test Specification]: http://go/cros-fingerprint-fpc1145-module-test-spec -[FPC In-Device Test Specification]: http://go/cros-fingerprint-fpc-indevice-test-spec -[`fingerprint_mcu.py`]: https://chromium.googlesource.com/chromiumos/platform/factory/+/HEAD/py/test/pytests/fingerprint_mcu.py -[Checkerboard Test]: https://chromium.googlesource.com/chromiumos/platform/factory/+/d23ebc7eeb074760e8a720e3acac4cfe4073b2ae/py/test/pytests/fingerprint_mcu.py#166 -[GetSensorIdErrors]: https://chromium.googlesource.com/chromiumos/platform/factory/+/d23ebc7eeb074760e8a720e3acac4cfe4073b2ae/py/test/utils/fpmcu_utils.py#73 -[GetSensorId]: https://chromium.googlesource.com/chromiumos/platform/factory/+/d23ebc7eeb074760e8a720e3acac4cfe4073b2ae/py/test/utils/fpmcu_utils.py#65 -[ProcessResetPixelImage]: https://chromium.googlesource.com/chromiumos/platform/factory/+/d23ebc7eeb074760e8a720e3acac4cfe4073b2ae/py/test/pytests/fingerprint_mcu.py#268 -[rubber_finger_present]: https://chromium.googlesource.com/chromiumos/platform/factory/+/d23ebc7eeb074760e8a720e3acac4cfe4073b2ae/py/test/pytests/fingerprint_mcu.py#330 -[Chrome OS Fingerprint Team]: http://go/cros-fingerprint-docs -[Factory Fingerprint Sensor Testing for `nocturne`]: http://go/fingerprint-factory-testing-nocturne -[`flash_fp_mcu`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/util/flash_fp_mcu -[Fingerprint flashing documentation]: ./fingerprint.md#factory-rma-dev-updates -[Chrome OS Config]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md -[updating Chrome OS Config]: ./fingerprint.md#update-chromeos-config diff --git a/docs/fingerprint/fingerprint-firmware-testing-for-partners.md b/docs/fingerprint/fingerprint-firmware-testing-for-partners.md deleted file mode 100644 index 3432bb0aac..0000000000 --- a/docs/fingerprint/fingerprint-firmware-testing-for-partners.md +++ /dev/null @@ -1,112 +0,0 @@ -# Fingerprint Firmware Testing Instructions for Partners - -This document is intended to help partners (sensor vendors, MCU vendors, etc) -run the Chrome OS fingerprint team's firmware tests, as part of the AVL process. -The document assumes that you‘re using Linux to do the development; preferably a -recent version of Ubuntu or Debian. It may be possible to use a virtual machine, -but that is not a configuration we test. - -[TOC] - -## Hardware Requirements - -You will need a Chromebook with the fingerprint sensor and fingerprint MCU -(FPMCU), and a [servo debugger]. - -### Chromebook with fingerprint sensor - -The Chromebook needs to be in [developer mode] and running a test image so that -the test can ssh into it. The fingerprint firmware tests will run a series of -bash commands, including flashing the FPMCU firmware and rebooting the -Chromebook. You do not need [CCD] because servo will handle the firmware write -protection for you. - -### Servo - -Servo is a general purpose debug board used in many automated tests in Chromium -OS. Among other things, servo enables the tests to toggle hardware write -protect. - -While there are multiple versions of servo, for firmware tests we strongly -recommend [Servo V4] as that's the simplest and most often used in autotests. -This document will assume you are using Servo V4. - -### Hardware Setup - -* Connect the "HOST" side of Servo V4 to your host machine (which should have - a Chromium OS chroot). -* Connect the other side of Servo V4 to a USB port on the Chromebook with - fingerprint sensor. -* Connect the "DUT POWER" side of Servo V4 to power supply. -* Make sure the USB cable from the host machine to Servo V4 is in data - transfer mode (i.e. if there's an LED, it should be yellow instead of - green). -* Make sure the you can ssh into the Chromebook from the chroot on the host - machine. - -## Software Setup - -### Get the Chromium OS source code. - -* First, make sure you [have the prerequisites]. -* Then [get the source]. - -### Build the autotest codebase - -```bash -# from a terminal on your machine -(outside chroot) $ cd ~/chromiumos/src - -# enter the chroot (the flag is important) -(outside chroot) $ cros_sdk --no-ns-pid - -# build autotest for the board to be tested -(chroot) $ emerge-<BOARD> autotest -``` - -### Start servod - -```bash -(chroot) $ sudo servod --board=<BOARD> -``` - -At this point the servod daemon should be running and listening to port 9999 by -default. If it isn't, check the hardware connection. - -## Run a Single Fingerprint Firmware Test - -Use another terminal and enter the chroot like before: - -```bash -(outside chroot) $ cd ~/chromiumos/src -(outside chroot) $ cros_sdk --no-ns-pid -``` - -To run a single test, use this command in your chroot: - -```bash -test_that --board=<BOARD> <IP> <test name> -``` - -For example: - -```bash -test_that --board=nocturne <IP> firmware_Fingerprint.ReadFlash -``` - -## Run the Entire Fingerprint Firmware Test Suite - -To run the entire suite, use this command in your chroot: - -```bash -test_that --board=<BOARD> <IP> suite:fingerprint -``` - -<!-- Links --> - -[servo debugger]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/docs/servo.md -[developer mode]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_mode.md -[CCD]: https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/cr50_stab/docs/case_closed_debugging.md -[Servo V4]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/docs/servo_v4.md -[have the prerequisites]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#Prerequisites -[get the source]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#get-the-source diff --git a/docs/fingerprint/fingerprint-tpm-seed.md b/docs/fingerprint/fingerprint-tpm-seed.md deleted file mode 100644 index 904fb7243a..0000000000 --- a/docs/fingerprint/fingerprint-tpm-seed.md +++ /dev/null @@ -1,324 +0,0 @@ -# TPM Seed for Fingerprint MCU - -Authors: pmalani@google.com, norvez@google.com - -Reviewers: semenzato@google.com, apronin@google.com, mnissler@google.com and -others - -Last Updated: 2018-11-01 - -[TOC] - -## Objective - -Increase security for Fingerprint (FP) templates by using a TPM-sourced seed in -addition to internal FPMCU entropy while encrypting FP templates. The -TPM-sourced seed will be derived from the system key which is loaded from the -TPM during boot in mount-encrypted. - -## Background - -Fingerprint authorization in Chrome OS, relies on encrypted FP templates which -are stored in each user’s mount directory. These templates are created and -encrypted by the FPMCU during FP enrollment, before being sent back to the AP -(Application Processor). When the user logs in, these templates are sent to the -FPMCU where they get decrypted and loaded. - -The encryption is performed in the FPMCU using entropy which is internal to the -MCU and never leaves the MCU. That way, even if the templates are somehow -obtained by and attacker from the user mount directory, they cannot be -decrypted, since the attacker will not have access to the MCU entropy. This -entropy gets reset on every powerwash/recovery. - -The complete design doc is [Fingerprint Authentication on Chrome OS]. - -## Requirements and Scale - -The solution proposed should exhibit the following attributes: - -* Strengthens security of FP templates. -* Does not compromise the security of other sub-systems. -* Works fast and doesn’t affect time to boot, or reduce boot-time stability. - -## Design Ideas - -In addition to FPMCU entropy, we include a TPM-sourced seed (derived from the -system key) while performing template encryption. The TPM system key gets -regenerated during powerwash/recovery, so in the event that the FP templates are -accessed due to a runtime exploit, a power-wash / recovery from the user will -ensure: - -* The raw templates cannot be decrypted, since the TPM-seed would have been - lost irrevocably. -* Since a new TPM-seed is generated (since a new system key is created), old - templates can’t be re-used, even if the attacker could somehow gain access - to the FP MCU entropy. - -The overall design consists of two components: - -* Generating a TPM-seed and sending it to the Biometric sensor managers. -* The Bio sensor managers sending the seed to the FPMCU and programming it - into the encryption / decryption operations of FP templates. - -### TPM seed generation {#seed-generation} - -![TPM Seed Diagram] - -The TPM seed generation would proceed as follows: - -1. During mount-encrypted execution, after the `System_key` is loaded, the - TPM-backed system key will be HMAC-ed with a simple salt (the string - `biod`): - - ``` - TPM_Seed = HMAC_SHA256(System_key, "biod") - ``` - -2. The resulting 256-bit seed (called `TPM_Seed`) will be maintained in a - `brillo::SecureBlob`. - -3. The `TPM_seed` will be saved into a tmpfs file - (`/run/biod_crypto_init/seed`) for consumption by `bio_crypto_init`. This - file's ownership will be set up such that only user/group `biod` can access - it. - -4. `bio_crypto_init` (the binary which sends the seed to the FPMCU) will be - spawned after mount-encrypted completes. This is ensured by setting the - `bio_crypto_init` upstart rules to depend on `starting boot-services` - -5. On the `bio_crypto_init` side, the `TPM_seed` will be retrieved from the - tmpfs file and forwarded to the FP MCU via the various BiometricManagers. - Immediately after reading from the tmpfs file, `bio_crypto_init` will nuke - (write all 0’s and then delete) the tmpfs file. - -6. The upstart rules of biod will be modified such that it will start after - `bio_crypto_init` stops (this modification can be made in the `.conf` file - of biod) - -#### IPC Mechanism {#ipc} - -(For a discussion of various alternatives, please see the -[Alternatives Considered] section) - -The IPC mechanism selected should have the following features: - -* Allow to quickly pass the `TPM_seed` between mount-encrypted and - `bio_crypto_init`. -* Minimize the presence of extra/asynchronously deleted copies of the - `TPM_seed` buffer in kernel and memory. This is crucial to minimize the risk - of access to this seed. - -The currently proposed method of passing the `TPM_seed` is to use a **file in -tmpfs**. The sequence would be as follows: - -* mount-encrypted will write the `TPM_Seed` to a file in `/run` - (`/run/bio_crypto_init/seed`). `/run` is a tmpfs created by the OS for use - by various system services. -* `bio_crypto_init` will read the `TPM_Seed` from the known tmpfs file. -* As soon as `bio_crypto_init` reads the `TPM_Seed`, it will first overwrite - (`/run/biod_crypto_init/seed`) with all 0s, and immediately after will - delete `/run/biod_crypto_init/seed`. -* `bio_crypto_init` can then instantiate its BiometricManager classes and send - the data to the FP MCU. This way, even if the sending of data fails, there - will not be any stray copy of the `TPM_seed` in a process’s memory, or in - tmpfs. - -##### Advantages - -* No/minimal buffering of copies of `TPM_Seed` in kernel. -* No need to create and pass FDs between mount-encrypted and - `bio_crypto_init`. - -##### Disadvantages - -* If `bio_crypto_init` crashes / fails to start, the tmpfs file remains in the - system, i.e cleanup of tmpfs is reliant on `bio_crypto_init`. - -### Programming TPM_Seed into MCU - -#### Entropy addition v/s programming TPM Seed - -When a device boots up for the first time after going through -recovery/powerwash, biod will force an "Add Entropy" step. This involves: - -* rebooting the FP MCU to RO -* Performing an entropy addition step -* Rebooting the FP MCU to RW -* Verifying that the entropy addition has taken place (by checking the block - ID of the rollback info on the MCU). - -Unfortunately, since the `TPM_Seed` will be stored in MCU RAM, the reboot of the -FPMCU will lead to the `TPM_Seed` being lost until the next boot. In the absence -of a `TPM_Seed`, all FPMCU operations will fail (until the next boot). There is -no opportunity to reprogram the `TPM_Seed`, because that must take place during -mount-encrypted, which must necessarily run before `biod` starts. - -There are two proposals to work around this issue. The one eventually selected -has been included here, and the other alternative has been placed in the -[Alternatives Considered] section. - -##### Make bio_crypto_init solely set the TPM_Seed (don't perform entropy_add) - -In this method, `bio_crypto_init` will not perform any reboot on the MCU, and -solely program the `TPM_Seed`. This would mean that if a device was to boot for -a first time without having done any previous powerwash/recovery, the first boot -would not have FP functionality. FP functionality would be regained on all -subsequent boot (since the entropy would have been added/initialized by then). - -The downside of this approach is a poor user experience. - -The benefit is a simple implementation of the `bio_crypto_init` tool, which will -consequently also take less time to execute (booting to RO/RW are time consuming -operations). - -In practice all devices leaving the factory floor would have `bio_wash ---factory_init` done on them during finalisation to initialise the entropy, and -so this shouldn't affect a large majority of end users. - -### Signaling biod to start - -In order to avoid races which might occur because both `bio_crypto_init` and -`biod` will try to access the `BiometricManagers`' hardware. We need to ensure -that `biod` only starts after `bio_crypto_init` ends. - -To accomplish this, `biod.conf` will be modified to include a dependency on -`bio_crypto_init` to start the daemon. So, the relevant portion of `biod.conf` -will now be: - -``` -start on started system-services and started uinput and stopped bio_crypto_init -``` - -### Formula to calculate IKM used for encryption in MCU - -In the FPMCU we will use the concatenation of `TPM_Seed` and [`SBP_Src_Key`] as -Input Key Material (IKM) to derive an encryption key. Combined with a random -salt, the pseudo random key (PRK) would be derived as: - -``` -PRK = HMAC_SHA256(Random_Salt, SBP_Src_Key || TPM_Seed) -``` - -## Alternatives Considered {#alt-considered} - -A few alternatives are being considered for the IPC Mechanism - -#### pipe/socketpair - -##### Disadvantages - -* The data written to pipes is buffered in internal kernel buffers till it is - read out from the other end of the pipe/socketpair. In the case of a - `bio_crypto_init` crashing, this will leave a copy in the internal kernel - buffers. Question: How long before those internal buffers get cleared in the - case of the pipe not being read from? - -#### Anonymous file (memfd_create) / Anonymous mmap - -##### Disadvantages - -* Question: When all references to the anonymous file are dropped, are the - contents of the anonymous file re-allocated, overwritten, or is the - corresponding inode simply destroyed (and the data blocks still stick around - and are reallocated lazily ?) - -There was also another alternative considered for the sequence of programming -the TPM seed and initializing the FPMCU: make `bio_crypto_init` add entropy and -then set TPM. - -## Security Considerations - -### Security boundaries - -* A new minijailed process (`bio_crypto_init`) is run when `starting - boot-services` is signaled. -* An IPC takes place between mount-encrypted and `bio_crypto_init` via a tmpfs - file. The reading and deletion of the tmpfs file is detailed in the - [IPC Mechanism] section. - -### Privileges - -* `bio_crypto_init` runs minijail-ed and runs with user/group `biod`. Only the - files required for its functioning (i.e., the tmpfs file `/run/`, the - devnode to access the FPMCU, log directory inside - `/var/log/bio_crypto_init`) are mounted and visible inside the sandbox. See - the [minijail0 arguments] for a full explanation. - -### Untrusted input - -* The only input is the `System_key` which is retrieved from the TPM anyway - during mount-encrypted execution. Thus, no additional or new input is being - fed to the feature. -* Additionally, the derived TPM-seed is saved in a tmpfs file which has a - user/group ownership as `biod` so only users `root` or `biod` can access the - file. Since `bio_crypto_init` runs only during `starting boot-services` and - the process along with the conf file ensures that the file is deleted after - execution, there is no additional threat of the `/tmp` file being corrupted. - -### Sensitive data - -* The feature involves the storage of a `TPM_Seed` derived from the - `System_key` from TPM, in a file on tmpfs (the file is zeroed and deleted - once read by `bio_crypto_init`). - -### Attack surface - -* In the event of the contents of the tmp file being read, the `TPM_Seed` - would not be of much use to the attacker, since the use of `HMAC_SHA256` - means the attacker would still not have access to the system key (brute - force trial of HMAC 256 would be required to guess the system salt required - to produce the TPM-seed). -* In the unlikely event of the contents of the tmp file being modified before - they are programmed into the FPMCU, FP unlock would fail (since the - encrypted templates would not longer be decrypted correctly, since the FPMCU - encryption key would have changed). The FP templates encryption key is a - combination of both the `TPM_seed` as well as the internal `SBP_Src_Key` - combined with a random salt, and since only the encrypted templates are - stored on the rootfs, the templates would simply be rendered useless. A - powerwash/recovery can help restore functionality of FP unlock, but new - templates would have to be registered. -* This code should not be accessible to remote attackers. - -### Implementation robustness - -* `bio_crypto_init` uses two processes. A child process is spawned by - `bio_crypto_init` and the FPMCU programming is done on the child process. - The parent process waits for the child process to complete, or kills the - process if it exceeds a timeout limit. This ensures that the process doesn't - hang indefinitely. -* The feature uses tmpfs (`/run/bio_crypto_init/seed`) as an IPC mechanism to - transfer the `TPM_Seed` between mount-encrypted and `bio_crypto_init`. - Please see the [Alternatives Considered] and [Design Ideas] section - regarding rationale behind choosing tmpfs vis a vis socketpair/pipe. - -### Cryptography - -* `HMAC_SHA256` is used to derived `TPM_Seed` from the `System_key` as - described in section [TPM seed generation]. - -* `HMAC_SHA256` is also used to derive the FPMCU’s encryption key. This is the - same as it was earlier; the only change is that source key has been updated - to also include the `TPM_Seed`. - -## Privacy Considerations - -This implementation should not have any adverse implications on Privacy (over -and above existing functionality on Chrome OS). This provides security hardening -for the fingerprint templates to prevent their retrieval and mis-use. - -[Fingerprint Authentication on Chrome OS]: ../fingerprint/fingerprint-authentication-design-doc.md -[`SBP_Src_Key`]: ../fingerprint/fingerprint-authentication-design-doc.md#sbp-secret-generation -[IPC Mechanism]: #ipc -[minijail0 arguments]: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform2/biod/init/bio_crypto_init.conf;l=36;drc=1fcefaa166e868069ad1b81091333ff75e0657f6 -[Design Ideas]: #design-ideas -[TPM seed generation]: #seed-generation -[Alternatives Considered]: #alt-considered - -<!-- Images --> - -<!-- If you make changes to the docs below make sure to regenerate the PNGs by - appending "export/png" to the Google Drive link. --> - -<!-- https://docs.google.com/drawings/d/1d0ocdnEjsO26c3usP1FwgTZ7VwEr-4ydnC0WMhOnbLY --> - -[TPM Seed Diagram]: ../images/cros_fingerprint_tpm_seed.png diff --git a/docs/fingerprint/fingerprint.md b/docs/fingerprint/fingerprint.md deleted file mode 100644 index 39785f5afb..0000000000 --- a/docs/fingerprint/fingerprint.md +++ /dev/null @@ -1,590 +0,0 @@ -# Fingerprint Firmware (FPMCU) - -[TOC] - -<!-- mdformat off(b/139308852) --> -*** note -NOTE: The build commands assume you are in the `~/trunk/src/platform/ec` -directory inside the chroot. -*** -<!-- mdformat on --> - -<!-- mdformat off(b/139308852) --> -*** note -WARNING: When switching branches in the EC codebase, you probably want to nuke -the `build` directory or at least the board you're working on: `rm -rf -build/<board>` or `make clobber` to prevent compilation errors. -*** -<!-- mdformat on --> - -## Software - -The main source code for fingerprint sensor functionality lives in the -[`common/fpsensor`] directory. The driver code for specific sensors lives in the -[`driver/fingerprint`] directory. - -## Hardware {#hardware} - -The following "boards" (specified by the `BOARD` environment variable when -building the EC code) are for fingerprint: - -MCU | Sensor | Firmware (EC "board") | Dev Board | Nucleo Board ----------------------- | ---------- | ---------------------------------------------- | -------------------------------------------- | ------------ -[STM32H743] \(Cortex-M7) | [FPC 1145] | `dartmonkey`<br>(aka `nocturne_fp`, `nami_fp`) | [Icetower v0.2] <br>(Previously Dragontalon) | [Nucleo H743ZI2] -[STM32F412] \(Cortex-M4) | [FPC 1025] | `bloonchipper`<br>(aka `hatch_fp`) | [Dragonclaw v0.2] | [Nucleo F412ZG] - -### Sensor Template Sizes - -Sensor | Fingerprint Template Size ----------- | -------------------------------- -[FPC 1145] | [~48 KB][FPC 1145 Template Size] -[FPC 1025] | [~5 KB][FPC 1025 Template Size] - -### Determining Hardware {#chromeos-config-fingerprint} - -If you have access to a shell on your Chromebook, you can use [Chrome OS Config] -to determine the FPMCU that it contains: - -```bash -(dut) $ cros_config /fingerprint board -``` - -Alternatively, if you have a Chromium OS build, you can use [Chrome OS Config] -in the chroot to determine the FPMCU: - -```bash -(chroot) $ cros_config_host -c /build/<BOARD>/usr/share/chromeos-config/yaml/config.yaml -m <MODEL> get /fingerprint board -``` - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: If you get an empty response when running these commands, the -[Chrome OS Config] properties for fingerprint may not have been set up yet. See -the [section on updating Chrome OS Config](#update-chromeos-config). -*** -<!-- mdformat on --> - -## Building FPMCU Firmware Locally - -### See `Makefile` target options - -```bash -(chroot) ~/trunk/src/platform/ec $ make help -``` - -### Build - -Replace `<BOARD_NAME>` in the command below with the fingerprint MCU that you -are targeting (e.g., `nocturne_fp`, `dartmonkey`, `bloonchipper`). - -```bash -(chroot) ~/trunk/src/platform/ec $ make BOARD=<BOARD_NAME> -j -``` - -### Verbose Build output - -Use `V=1` to see the complete compiler output (all flags). - -```bash -(chroot) ~/trunk/src/platform/ec $ make V=1 BOARD=nocturne_fp -j -``` - -## Building all EC firmware (before "repo upload") - -Before uploading a change to Gerrit via `repo upload`, you'll need to build -*all* the boards in the EC codebase to make sure your changes do not break any -others. - -<!-- mdformat off(b/139308852) --> -*** note -NOTE: If you forget to do this, do not worry. `repo upload` will warn you and -prevent you from uploading. -*** -<!-- mdformat on --> - -```bash -(chroot) ~/trunk/src/platform/ec $ make buildall -j -``` - -## Building and running unit tests - -See the [Unit Tests] documentation for details on how to [run the unit tests]. - -## Build ectool - -```bash -(chroot) ~/trunk/src/platform/ec $ make BOARD=nocturne_fp utils-host -j -``` - -## Build and run the `host_command` fuzz test - -```bash -(chroot) ~/trunk/src/platform/ec $ make run-host_command_fuzz -``` - -## Logs - -[`timberslide`] is a simple daemon that collects logs from the FPMCU and writes -them to disk. [`timberslide`] reads from sysfs, where the kernel driver -[periodically dumps the FPMCU console output][cros_ec_debugfs]. [`timberslide`] -writes the resulting logs to `/var/log/cros_fp.log`. There are multiple -instances of [`timberslide`] that run; one for each MCU running the EC codebase. - -### Starting timberslide - -```bash -(dut)$ start timberslide LOG_PATH=/sys/kernel/debug/cros_fp/console_log -``` - -### Stopping timberslide - -```bash -(dut)$ stop timberslide LOG_PATH=/sys/kernel/debug/cros_fp/console_log -``` - -### Manually running timberslide - -```bash -(dut)$ timberslide --device_log=/sys/kernel/debug/cros_fp/console_log -``` - -### Reading logs from kernel - -If [`timberslide`] is not running you can just `cat` the logs directly from the -kernel: - -```bash -(dut)$ cat /sys/kernel/debug/cros_fp/console_log -``` - -## Production Updates (Auto-Update) - -### `fp_updater.sh` and `bio_fw_updater` - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: The auto-update process requires a working version of the firmware -running on the FPMCU. See [Fingerprint Factory Requirements] for details on -flashing in the factory. -*** -<!-- mdformat on --> - -[`fp_updater.sh`] and [`bio_fw_updater`] are wrappers around [`flashrom`] and -require already-functioning RO firmware running on the FPMCU. It’s meant to be -used in production to update the RW firmware. `fp_updater.sh` was used prior to -M77; `bio_fw_updater` replaces it. - -It's also possible to use the updater to update the RO firmware if you disable -*both* HW and SW write protect, which we use for updating development devices -that do not have write protect enabled (dogfood devices, EVT, etc.) - -In production, only the RW portion of the firmware can be updated (unless the -user disables [hardware write protection]). - -## Factory / RMA / Development Updates {#factory-rma-dev-updates} - -### `flash_fp_mcu` - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: This tool is really just for us to use during development or during -the RMA flow (must go through finalization again in that case). We never update -RO in the field (can’t by design). See [Fingerprint Factory Requirements] for -details on flashing in the factory. -*** -<!-- mdformat on --> - -[`flash_fp_mcu`] enables spidev and toggles some GPIOs to put the FPMCU (STM32) -into bootloader mode. At that point it uses [`stm32mon`] to rewrite the entire -flash (both RO and RW). The FPMCU can only be put into bootloader mode when -[hardware write protection] is disabled, which means [`flash_fp_mcu`] can only -be used when [hardware write protection] is disabled. - -[`flash_fp_mcu`] is available in the [Chromium OS test image]. - -### `stm32mon` - -[`stm32mon`] is a tool used to send commands to the STM32 bootloader. We use it -for development (through [`flash_fp_mcu`]) to erase and flash the entire chip. - -[`stm32mon`] is available in the [Chromium OS test image]. - -## Keys - -The `RO` section of the fingerprint firmware contains the public portion of the -key used to sign the RW firmware. The RO firmware uses the public key to -validate the signature of the RW firmware before jumping to it. It is not -possible to update the public key stored in the RO firmware once a device has -been shipped (i.e., once [hardware write protection] is enabled). - -Different keys are used to sign the firmware during development and production. -The `dev` key is used for local builds and development and is not private; it is -called `dev_key.pem` and located in the "board" directory for the given FPMCU -(e.g., [`board/nocturne_fp/dev_key.pem`]). After doing a build, the `ec.bin` in -the `build` directory (e.g., `build/nocturne_fp/ec.bin`) will be signed with the -`dev` key. - -The two other types of keys are `premp` and `mp`, which stand for "pre-mass -production" and "mass production", respectively. Both the `premp` and `mp` keys -are only available to the buildbots as part of the official build. The `premp` -is typically used during bringup of new hardware to validate the signing flow of -the buildbots, while the `mp` key is used for PVT and production devices. - -Switching keys is only possible when the `RO` firmware is not write protected, -since the public portion of the keypair is stored in the `RO` firmware. - -### Generate Key - -For testing, you can generate a new key by using the following openssl command: - -```bash -openssl genrsa -3 -out board/$BOARD/dev_key.pem 3072 -``` - -### Resources - -* https://sites.google.com/a/google.com/chromeos/resources/engineering/releng/signer-documentation -* https://sites.google.com/a/google.com/chromeos/paygen---payload -* https://b.corp.google.com/issues/77882970 - -## Signing - -[`futility`] is used to sign EC firmware. There’s a wrapper script around it for -signing called [`sign_official_build.sh`]. - -### Key ID - -The output of `futility show` will show a `Public Key File` and `Signature` -section, each of which have an `ID` field. This ID lets you match the key to the -signature in case there is more than one. -[It’s just a sha1sum of the public key,][vboot_key_id] so it lets you -[uniquely identify the key being used][vb2_public_key]. - -If you have the key (e.g., in PEM format), you can compute the `ID` with the -`futility show` command: - -```bash -(chroot) $ futility show ./path/to/key.pem -``` - -#### Example - -If you are building the `hatch_fp` "board" on your local machine (which signs -the resulting `ec.bin` with the `dev` key, you can check the `ID` with: - -```bash -(chroot)$ futility show board/hatch_fp/dev_key.pem -``` - -``` -Private Key file: board/hatch_fp/dev_key.pem - Key length: 3072 - Key sha1sum: 61382804da86b4156d666cc9a976088f8b647d44 -``` - -```bash -(chroot)$ futility show build/hatch_fp/ec.bin -``` - -``` -Public Key file: build/hatch_fp/ec.bin - Vboot API: 2.1 - Desc: "" - Signature Algorithm: 7 RSA3072EXP3 - Hash Algorithm: 2 SHA256 - Version: 0x00000001 - ID: 61382804da86b4156d666cc9a976088f8b647d44 -Signature: build/hatch_fp/ec.bin - Vboot API: 2.1 - Desc: "" - Signature Algorithm: 7 RSA3072EXP3 - Hash Algorithm: 2 SHA256 - Total size: 0x1b8 (440) - ID: 61382804da86b4156d666cc9a976088f8b647d44 - Data size: 0x2864c (165452) -Signature verification succeeded. -``` - -### Showing Key ID (fingerprint) for running FW - -[Asked on chromeos-chatty-firmware][chatty-firmware-q] about adding an EC -command to show the Key ID (fingerprint) from the RO version. This would make it -a lot easier during both development and testing. - -## Power - -See [Measuring Power] for instructions on how to measure power with the -fingerprint development boards. - -### Dragonclaw v0.2 - -```bash -(chroot) $ dut-control -t 60 pp3300_dx_mcu_mv pp3300_dx_fp_mv pp1800_dx_fp_mv pp3300_dx_mcu_mw pp3300_dx_fp_mw pp1800_dx_fp_mw -``` - -**Firmware Version**: -`bloonchipper_v2.0.4277-9f652bb3-RO_v2.0.7314-3dfc5ff6-RW.bin` - -#### MCU is idle - -``` -(chroot) $ dut-control fpmcu_slp_alt:off -``` - -``` -@@ NAME COUNT AVERAGE STDDEV MAX MIN -@@ sample_msecs 113 533.56 40.91 658.52 447.06 -@@ pp1800_dx_fp_mv 113 1800.00 0.00 1800.00 1800.00 -@@ pp1800_dx_fp_mw 113 0.00 0.00 0.00 0.00 -@@ pp3300_dx_fp_mv 113 3280.00 0.00 3280.00 3280.00 -@@ pp3300_dx_fp_mw 113 0.01 0.05 0.26 0.00 -@@ pp3300_dx_mcu_mv 113 3280.00 0.00 3280.00 3280.00 -@@ pp3300_dx_mcu_mw 113 24.67 0.00 24.67 24.67 -``` - -#### MCU in low power mode (suspend) - -``` -(chroot) $ dut-control fpmcu_slp_alt:on -``` - -``` -@@ NAME COUNT AVERAGE STDDEV MAX MIN -@@ sample_msecs 115 526.56 36.79 607.60 426.58 -@@ pp1800_dx_fp_mv 115 1800.00 0.00 1800.00 1800.00 -@@ pp1800_dx_fp_mw 115 0.00 0.00 0.00 0.00 -@@ pp3300_dx_fp_mv 115 3287.30 2.25 3288.00 3280.00 -@@ pp3300_dx_fp_mw 115 0.00 0.02 0.26 0.00 -@@ pp3300_dx_mcu_mv 115 3280.97 2.62 3288.00 3280.00 -@@ pp3300_dx_mcu_mw 115 4.02 0.64 10.76 3.94 -``` - -### Icetower v0.1 - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: Icetower v0.1 has a hardware bug in the INA connections, so you cannot -measure the 1.8V fingerprint sensor rail. See http://b/178098140. - -Additionally, before https://crrev.com/c/2689101, the sleep GPIOs were not -configured correctly, so the change needs to be cherry-picked in order to -measure releases before that point. -*** -<!-- mdformat on --> - -```bash -(chroot) $ dut-control -t 60 pp3300_dx_mcu_mv pp3300_dx_fp_mv pp3300_dx_mcu_mw pp3300_dx_fp_mw -``` - -**Firmware Version**: -`dartmonkey_v2.0.2887-311310808-RO_v2.0.7304-441100b93-RW.bin` - -#### MCU is idle - -``` -(chroot) $ dut-control fpmcu_slp_alt:off -``` - -``` -@@ NAME COUNT AVERAGE STDDEV MAX MIN -@@ sample_msecs 178 337.13 20.91 404.32 289.82 -@@ pp3300_dx_fp_mv 178 3256.00 0.00 3256.00 3256.00 -@@ pp3300_dx_fp_mw 178 0.00 0.00 0.00 0.00 -@@ pp3300_dx_mcu_mv 178 3248.00 0.00 3248.00 3248.00 -@@ pp3300_dx_mcu_mw 178 45.17 0.09 45.21 44.95 -``` - -#### MCU in low power mode (suspend) - -``` -(chroot) $ dut-control fpmcu_slp_alt:on -``` - -``` -@@ NAME COUNT AVERAGE STDDEV MAX MIN -@@ sample_msecs 174 345.60 31.93 457.62 283.00 -@@ pp3300_dx_fp_mv 174 3264.00 0.00 3264.00 3264.00 -@@ pp3300_dx_fp_mw 174 0.00 0.00 0.00 0.00 -@@ pp3300_dx_mcu_mv 174 3260.69 3.94 3264.00 3256.00 -@@ pp3300_dx_mcu_mw 174 5.47 0.10 5.48 4.17 -``` - -## Chrome OS Build (portage / ebuild) - -In order to use the fingerprint sensor with a given [Chrome OS board], a few -things need to be configured for the [Chrome OS board]. - -### Enable biod USE flag - -The biod [`USE` flag] needs to be enabled for the [Chrome OS board]. This `USE` -flag -[determines whether the `biod` daemon is built and installed][biod chromium-os]. - -To enable the `USE` flag, update the `make.defaults` for the [Chrome OS board]. -See the [`make.defaults` for the Hatch board][hatch make.defaults] as an -example. - -#### Verifying biod is installed in the rootfs - -After enabling the `biod` [`USE` flag] and building the `biod` package for your -target [Chrome OS board], the `biod` binary should be in the build directory: - -```bash -(chroot) $ emerge-<BOARD> biod -``` - -```bash -(chroot) $ ls /build/<BOARD>/usr/bin/biod -/build/<BOARD>/usr/bin/biod -``` - -### Update FPMCU_FIRMWARE - -`FPMCU_FIRMWARE` should be set to the set of fingerprint firmware that should be -built and installed for the [Chrome OS board]. - -`FPMCU_FIRMWARE` is a [`USE_EXPAND` variable][`USE` flag], -[defined in the base `make.defaults`][FPMCU_FIRMWARE make.defaults]. - -The `biod` ebuild uses the resulting [`USE` flags] to -[determine which FPMCU release firmware to build][biod release firmware] and the -[`chromeos-firmware-fpmcu` ebuild] uses the resulting [`USE` flags] to -[determine which firmware to install][firmware ebuild] to the rootfs in -`/opt/google/biod/fw`. - -Possible values for `FPMCU_FIRMWARE` can be found by looking at the -`FIRMWARE_EC_BOARD` values in the [`chromeos-fpmcu-release*` ebuilds], which -correspond to the [FPMCU hardware](#hardware). - -See the [Hatch baseboard `make.defaults`] for an example. - -#### Verifying FPMCU firmware is installed in the rootfs - -Once you have added the `FPMCU_FIRMWARE` flag and rebuilt the -[`chromeos-firmware-fpmcu` ebuild], the firmware will show up in the the chroot: - -<!-- mdformat off(b/139308852) --> -*** note -**NOTE**: This requires access to the [internal manifest]. -*** -<!-- mdformat on --> - -```bash -(chroot) $ emerge-<BOARD> chromeos-firmware-fpmcu -``` - -```bash -(chroot) $ ls /build/<BOARD>/opt/google/biod/fw -bloonchipper_v2.0.2626-3c315108.bin dartmonkey_v2.0.2887-311310808.bin -``` - -The above output assumes you selected the `bloonchipper` and `dartmonkey` -firmware by setting `FPMCU_FIRMWARE="bloonchipper dartmonkey"`. The actual -version numbers displayed will not necessarily match since the firmware is -constantly updated. - -### Update Chrome OS Config {#update-chromeos-config} - -With "unibuild", the same OS image (build) for a given [Chrome OS board] is used -across multiple devices. Often there will be some devices that have a -fingerprint sensor, some that do not, and even different sensors for the same -board. - -Determining what fingerprint hardware is on a given [Chrome OS board] is thus -done at runtime, using [Chrome OS Config]. - -The `fingerprint` config needs to be in the `model.yaml` for the given -[Chrome OS board]. The [Chrome OS Config fingerprint] section describes the -attributes for the `fingerprint` config in more detail. - -The [`ec_extras` attribute] needs to be set to the list of fingerprint firmware -that should be built as part of the build. - -See the [`model.yaml` for the Hatch board][hatch model.yaml] as an example. - -Instead of crafting the `model.yaml` by hand, newer boards are moving to the -[Chrome OS Project Configuration] model, where the config is generated using -[Starlark]. The common [`create_fingerprint`] function can be used across models -to configure the fingerprint settings. See the [Morphius `config.star`] for an -example of how to call `create_fingerprint`. After you modify a `config.star` -file you will need to [regenerate the config]. If you need to change many -projects (e.g., modifying [`create_fingerprint`]), you can use the [`CLFactory`] -tool. - -Once you have updated the config, you can test your changes by -[running `cros_config`](#chromeos-config-fingerprint). The Chrome OS Config -documentation has a [section on testing properties] that describes this in more -detail. - -### SKUs - -The fingerprint sensor may only be included on certain SKUs for a given device. -The fingerprint code uses [Chrome OS Config] to determine whether a device has a -fingerprint sensor or not. For each SKU, there is an associated -[fingerprint config][Chrome OS Config fingerprint]. [Chrome OS Config] -determines the [SKU information][Chrome OS Config SKU] (and thus the -[fingerprint config][Chrome OS Config fingerprint]) from [CBI Info]. The SKU for -a given device can be found by viewing `chrome://system/#platform_identity_sku`. - -[`common/fpsensor`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/common/fpsensor/ -[`driver/fingerprint`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/driver/fingerprint -[`nocturne_fp`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/nocturne_fp/ -[`nami_fp`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/nami_fp/ -[`hatch_fp`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/hatch_fp/ -[`bloonchipper`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/bloonchipper/ -[`dartmonkey`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/dartmonkey/ -[hardware write protection]: ../write_protection.md -[`flash_fp_mcu`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/util/flash_fp_mcu -[`stm32mon`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/e1f3f89e7ea7945adddd0c2e6838f5e59856cff2/util/stm32mon.c#14 -[`futility`]: https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/HEAD/futility/ -[`sign_official_build.sh`]: https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/HEAD/scripts/image_signing/sign_official_build.sh -[vboot_key_id]: https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/e7db36856ce418552637d1981c173d22dfe5bf39/firmware/2lib/include/2id.h#5 -[vb2_public_key]: https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/e7db36856ce418552637d1981c173d22dfe5bf39/firmware/2lib/include/2rsa.h#14 -[chatty-firmware-q]: https://groups.google.com/a/google.com/d/msg/chromeos-chatty-firmware/ZSg423wsFPg/26UbdGwjFQAJ -[`fp_updater.sh`]: http://go/cros-fp-updater-nocturne-source -[`bio_fw_updater`]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/biod/tools -[`flashrom`]: https://chromium.googlesource.com/chromiumos/third_party/flashrom/ -[STM32F412]: https://www.st.com/resource/en/reference_manual/dm00180369.pdf -[STM32H743]: https://www.st.com/resource/en/reference_manual/dm00314099.pdf -[`board/nocturne_fp/dev_key.pem`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/board/nocturne_fp/dev_key.pem -[`timberslide`]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/timberslide -[cros_ec_debugfs]: https://chromium.googlesource.com/chromiumos/third_party/kernel/+/9db44685934a2e4bc9180ea2de87a6c429672395/drivers/platform/chrome/cros_ec_debugfs.c -[Fingerprint Factory Requirements]: ./fingerprint-factory-requirements.md -[Chromium OS test image]: https://chromium.googlesource.com/chromiumos/platform/factory/+/HEAD/README.md#building-test-image -[Chrome OS Config]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md -[Chrome OS Config fingerprint]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md#fingerprint -[section on testing properties]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md#adding-and-testing-new-properties -[Chrome OS board]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#Select-a-board -[biod chromium-os]: https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/4ea72b588af3394cb9fd1c330dcf726472183dfd/virtual/target-chromium-os/target-chromium-os-1.ebuild#154 -[hatch make.defaults]: https://chromium.googlesource.com/chromiumos/overlays/board-overlays/+/2f075f0e7ce09d3eb460f3c529da463a6201276c/overlay-hatch/profiles/base/make.defaults#22 -[Hatch baseboard `make.defaults`]: https://chrome-internal.googlesource.com/chromeos/overlays/baseboard-hatch-private/+/HEAD/profiles/base/make.defaults#17 -[hatch model.yaml]: https://chrome-internal.googlesource.com/chromeos/overlays/overlay-hatch-private/+/HEAD/chromeos-base/chromeos-config-bsp-hatch-private/files/model.yaml -[`ec_extras` attribute]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md#build_targets -[FPMCU_FIRMWARE make.defaults]: https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/4ea72b588af3394cb9fd1c330dcf726472183dfd/profiles/base/make.defaults#157 -[`USE` flag]: https://devmanual.gentoo.org/general-concepts/use-flags/index.html -[`USE` flags]: https://devmanual.gentoo.org/general-concepts/use-flags/index.html -[biod release firmware]: https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/4ea72b588af3394cb9fd1c330dcf726472183dfd/chromeos-base/biod/biod-9999.ebuild#49 -[`chromeos-firmware-fpmcu` ebuild]: https://chrome-internal.googlesource.com/chromeos/overlays/chromeos-overlay/+/HEAD/chromeos-base/chromeos-firmware-fpmcu/chromeos-firmware-fpmcu-9999.ebuild -[firmware ebuild]: https://chrome-internal.googlesource.com/chromeos/overlays/chromeos-overlay/+/HEAD/chromeos-base/chromeos-firmware-fpmcu/chromeos-firmware-fpmcu-9999.ebuild#40 -[`chromeos-fpmcu-release*` ebuilds]: https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overlay/+/HEAD/sys-firmware -[internal manifest]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md#get-the-source-code -[Unit Tests]: ../unit_tests.md -[run the unit tests]: ../unit_tests.md#running -[Measuring Power]: ./fingerprint-dev-for-partners.md#measure-power -[dragonclaw]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board -[FPC 1145]: ../../driver/fingerprint/fpc/libfp/fpc1145_private.h -[FPC 1025]: ../../driver/fingerprint/fpc/bep/fpc1025_private.h -[FPC 1145 Template Size]: https://chromium.googlesource.com/chromiumos/platform/ec/+/127521b109be8aac352e80e319e46ed123360408/driver/fingerprint/fpc/libfp/fpc1145_private.h#46 -[FPC 1025 Template Size]: https://chromium.googlesource.com/chromiumos/platform/ec/+/127521b109be8aac352e80e319e46ed123360408/driver/fingerprint/fpc/bep/fpc1025_private.h#44 -[Dragonclaw v0.2]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board -[Icetower v0.2]: ./fingerprint-dev-for-partners.md#fpmcu-dev-board -[Nucleo F412ZG]: https://www.digikey.com/en/products/detail/stmicroelectronics/NUCLEO-F412ZG/6137573 -[Nucleo H743ZI2]: https://www.digikey.com/en/products/detail/stmicroelectronics/NUCLEO-H743ZI2/10130892 -[CBI Info]: https://chromium.googlesource.com/chromiumos/docs/+/HEAD/design_docs/cros_board_info.md -[Chrome OS Config SKU]: https://chromium.googlesource.com/chromiumos/platform2/+/HEAD/chromeos-config/README.md#identity -[Chrome OS Project Configuration]: https://chromium.googlesource.com/chromiumos/config/+/HEAD/README.md -[Starlark]: https://docs.bazel.build/versions/master/skylark/language.html -[`create_fingerprint`]: https://chromium.googlesource.com/chromiumos/config/+/e1fa0d7f56eb3dd6e9378e4326de086ada46b7d3/util/hw_topology.star#444 -[Morphius `config.star`]: https://chrome-internal.googlesource.com/chromeos/project/zork/morphius/+/593b657a776ed6b320c826916adc9cd845faf709/config.star#85 -[regenerate the config]: https://chromium.googlesource.com/chromiumos/config/+/HEAD/README.md#making-configuration-changes-for-your-project -[`CLFactory`]: https://chromium.googlesource.com/chromiumos/config/+/HEAD/README.md#making-bulk-changes-across-repos diff --git a/docs/getting_started_quickly.md b/docs/getting_started_quickly.md deleted file mode 100644 index 325bef39b0..0000000000 --- a/docs/getting_started_quickly.md +++ /dev/null @@ -1,125 +0,0 @@ -# Get Started Building EC Images (Quickly) - -[TOC] - -The -[Chromium OS Developer Guide](https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_guide.md) -and [README](../README.md) walk through the steps needed to fetch and build -Chromium OS source. These steps can be followed to retrieve and build EC source -as well. On the other hand, if your sole interest is building an EC image, the -general developer guide contains some extra unneeded steps. - -The fastest possible way to build an EC image is to skip the Chromium OS chroot -install entirely. The following steps have been tested on an Ubuntu 15.10 (Wily -Werewolf) 64-bit host machine. Other distros / versions may be used, but -toolchain incompatibilities may require extra debug. - -## Building - -1. Install build / dev tools: - - ```bash - sudo apt-get install git libftdi-dev libusb-dev libncurses5-dev gcc-arm-none-eabi - ``` - -1. Sync the cros-ec git repo: - - ```bash - git clone https://chromium.googlesource.com/chromiumos/platform/ec - ``` - -1. Build your EC image: - - ```bash - HOSTCC=x86_64-linux-gnu-gcc CROSS_COMPILE_arm=arm-none-eabi- make BOARD=${BOARD} - ``` - - Note: the EC supports multiple architectures, check `core/*/build.mk` files - for other supported `CROSS_COMPILE_` variables. - -## External Dependencies - -Most boards are buildable, but some will fail due to dependencies on external -binaries (such as [`futility`](#building-futility)). Also, some related tools -(such as `flash_ec` and `servod`) must be run from the Chromium OS chroot. Here -is a set of steps to setup a minimal development environment to build EC images -from the Chromium OS chroot: - -1. Create a folder for your chroot: - - ```bash - mkdir cros-src; cd cros-src - ``` - -1. Run - - ```bash - repo init -u https://chromium.googlesource.com/chromiumos/manifest -g minilayout,firmware - ``` - -1. Run `repo sync`: - - ```bash - repo sync -j <number of cores on your workstatsion> - ``` - -1. Enter the chroot and enter your password for `sudo` if prompted: - - ```bash - ./chromite/bin/cros_sdk - ``` - -1. Set up your board: - - ```bash - setup_board --board=${BOARD} - ``` - - (ex. `setup_board --board=glados`) - -1. Build EC: - - ```bash - ./build_packages --board=${BOARD} chromeos-ec - ``` - -1. Now, EC images for any board can be built with: - - ```bash - cd ~/trunk/src/platform/ec; make BOARD=${BOARD} -j - ``` - -## Building `futility` outside the chroot {#building-futility} - -If you want to build the `futility` host tool outside the normal Chrome OS -chroot self-contained environment, you can try the following - -1. Install futility build dependencies: - - ```bash - sudo apt-get install uuid-dev liblzma-dev libyaml-dev libssl-dev - ``` - -1. Get the vboot reference sources: - - ```bash - git clone https://chromium.googlesource.com/chromiumos/platform/vboot_reference - ``` - -1. Build it: - - ```bash - cd vboot_reference ; make - ``` - -1. Install it in `/usr/local/bin`: - - ```bash - sudo make install - ``` - -1. Add `/usr/local/bin` to your default `PATH`: - - ```bash - export PATH="${PATH}:/usr/local/bin" - ``` diff --git a/docs/hammer.md b/docs/hammer.md deleted file mode 100644 index 6048f1c441..0000000000 --- a/docs/hammer.md +++ /dev/null @@ -1,199 +0,0 @@ -# Hammer care and feeding - -Original: [go/hammercare](http://go/hammercare) - -Last updated: 2021-03-18 - -[TOC] - -## Servo - -### Start servod - -``` -cros_sdk --no-ns-pid -sudo servod --port=9000 -b hammer -c hammer.xml -``` - -### UART console - -The simplest solution for most people is to use the `dut-console` script. - -First, add this line into your .bashrc (or other shell init script; needed once -only): -``` bash -alias dut-console="~/chromiumos/src/platform/dev/contrib/dut-console" -``` - -Then simply run `dut-console -c ec`. `dut-console` uses `cu` under the hood, and -works like ssh - to leave, press `<ENTER> <~> <.> <ENTER>`. - - -``` bash -src/platform/dev/contrib/dut-console -p 9000 -c ec -``` - -## Build EC - -(Inside chroot) -``` bash -cd ~/trunk/src/platform/ec -make BOARD=<BOARD> -j -``` - -## Flash EC - -### Prerequisites - -#### Find the USB VID:PID of the device - -USB VID:PID is listed in [hammer/variants.h](../board/hammer/variants.h). -Many scripts below requires correct PID to work. - -#### Stop hammerd - -Remove rootfs verification: -``` bash -/usr/share/vboot/bin/make_dev_ssd.sh --remove_rootfs_verification --force -``` - -Reboot the DUT then rename hammerd -``` bash -mv /usr/bin/hammerd /usr/bin/hammerd.bak -``` - -### Hammer connected to Chromebook, flash via USB - -(Inside chroot) Copy-paste the script below to a file named -"flash_hammer.usbremote", run -``` bash -bash flash_hammer.usbremote <BOARD> <VID:PID> <IP> [ro] -``` - -``` bash -#!/bin/bash -# flash_hammer.usbremote -set -x -e - -BOARD=$1 -ID=$2 -IP=$3 -EXTRA="-d $ID" - -ssh $IP sh -c "'rm -f /usr/local/ec.bin'" -scp ~/trunk/src/platform/ec/build/${BOARD}/ec.bin $IP:/usr/local/ec.bin - -if [ "$4" = 'ro' ]; then - ssh $IP sh -x -c "'usb_updater2 $EXTRA -j; - sleep 1.0; - usb_updater2 $EXTRA /usr/local/ec.bin; - sleep 0.5; - usb_updater2 $EXTRA -s; - usb_updater2 $EXTRA /usr/local/ec.bin'" -else - ssh $IP sh -x -c "'usb_updater2 $EXTRA -w; - usb_updater2 $EXTRA -r; sleep 0.5; - usb_updater2 $EXTRA -s; - usb_updater2 $EXTRA /usr/local/ec.bin'" -fi -``` - -### Hammer connected to Chromebook, flash via servo - -(Inside chroot) Copy-paste the script below to a file named "flash_hammer", -run `bash flash_hammer <IP> </path/to/ec.bin>` - -``` bash -#!/bin/bash -# Recommended to use a USB 3.0 Ethernet adapter for this to work, otherwise the -# network on the DUT will temporarily go down when the root USB hub is taken -# down. - -set -e -IP=$1 -shift - -# USB 2.0 root hub -USBID="usb1" - -set -x - -# unbind, then rebind, the root hub (in the mean time, we'll start programming) -ssh $IP sh -c "'echo $USBID > /sys/bus/usb/drivers/usb/unbind; sleep 3; echo $USBID > /sys/bus/usb/drivers/usb/bind'" & - -util/flash_ec --board=hammer --port 9000 --image "$@" -``` - -### Hammer connected via servo only - -Do not connect hammer to Chromebook in this case, or at least make sure -Chromebook is either suspended (S3) or off (when put into programming mode, -STM32 always prefers USB interface when available) - -For Servo V2: - -``` bash -dut-control -p 9000 spi1_vref:pp3300 spi1_buf_en:on spi1_buf_on_flex_en:on -util/flash_ec --board=hammer --port=9000 [--image=/path/to/ec.bin] - -# To disable power from servo to Hammer -dut-control -p 9000 spi1_vref:off spi1_buf_en:off spi1_buf_on_flex_en:off -``` - -For Servo Micro (there is only one buffer in the power delivery path, -so don't include the spi1_buf_on_flex_en control): - -``` bash -dut-control -p 9000 spi1_vref:pp3300 spi1_buf_en:on -util/flash_ec --board=hammer --port=9000 [--image=/path/to/ec.bin] - -# To disable power from servo to Hammer -dut-control -p 9000 spi1_vref:off spi1_buf_en:off -``` - -### Hammer connected via POGO-PIN-USB to Linux - -So this is very similar to Hammer connected to poppy, flash via USB, but you -are directly running commands on the machine connected to Hammer, so you don’t -need to SSH to it. - -``` bash -#!/bin/bash -# flash_hammer.usblocal - -EXTRA= -EC=build/${BOARD:-hammer}/ec.bin -UPDATER=usb_updater2 - -if [ -n "$ID" ]; then - EXTRA="-d $ID" -fi - -if [ "$1" = 'ro' ]; then - "${UPDATER}" $EXTRA -j; - sleep 1.0; - "${UPDATER}" $EXTRA "${EC}"; - sleep 1.0; - "${UPDATER}" $EXTRA -s; - "${UPDATER}" $EXTRA "${EC}"; -else - "${UPDATER}" $EXTRA -w; - "${UPDATER}" $EXTRA -r; - sleep 1.0; - "${UPDATER}" $EXTRA -s; - "${UPDATER}" $EXTRA "${EC}"; -fi - -# To use this script: BOARD=<BOARD> ID=<VID:PID> ./flash_hammer.usblocal [ro] -``` - -## Update touchpad firmware - -(Inside DUT) -``` bash -usb_updater2 --tp_update <FILE> --device=<VID:PID> -``` -or -``` bash -ec_touchpad_updater -p <PID> <FILE> -``` diff --git a/docs/i2c-debugging.md b/docs/i2c-debugging.md deleted file mode 100644 index 125e72b777..0000000000 --- a/docs/i2c-debugging.md +++ /dev/null @@ -1,51 +0,0 @@ -# I²C Debugging Tips - -The EC codebase has functionality to help you debug I²C errors without pulling -out the scope. Some of the debug functionality is disabled by default to save -space, but can be enabled with the `CONFIG_I2C_DEBUG` option. - -## Tracing - -You can use the `i2ctrace` command to monitor (ranges of) addresses: - -``` -i2ctrace [list - | disable <id> - | enable <port> <address> - | enable <port> <address-low> <address-high>] -``` - -For example: - -``` -> i2ctrace enable 0 0x10 0x30 -> i2ctrace enable 1 0x20 -> i2ctrace list -id port address --- ---- ------- -0 0 0x10 to 0x30 -1 1 0x40 to 0x50 -... debug spam may follow ... -i2c: 1:0x20 wr 0x10 rd 0x01 0x00 -i2c: 1:0x20 wr 0x10 0x01 0x00 -... -> i2ctrace disable 1 -> i2ctrace list -id port address --- ---- ------- -0 0 0x10 to 0x30 -``` - -A maximum of 8 debug entries are supported at a single time. - -Note that `i2ctrace enable` will merge debug entries when possible: - -``` -> i2ctrace enable 0 0x10 0x30 -> i2ctrace enable 0 0x40 0x50 -> i2ctrace enable 0 0x31 0x3f -> i2ctrace list -id port address --- ---- ------- -0 0 0x10 to 0x50 -``` diff --git a/docs/ide-support.md b/docs/ide-support.md deleted file mode 100644 index cec196be58..0000000000 --- a/docs/ide-support.md +++ /dev/null @@ -1,57 +0,0 @@ -# IDE Support - -[TOC] - -## Odd File Types - -EC uses a few odd file types/names. Some are included from other header files -and used to generate data structures, thus it is important for your IDE to index -them. - -Patterns | Vague Type ------------------------------------------------------ | ---------- -`README.*` | Text -`Makefile.rules`, `Makefile.toolchain` | Makefile -`gpio.wrap` | C Header -`gpio.inc` | C Header -`*.tasklist`, `*.irqlist`, `*.mocklist`, `*.testlist` | C Header - -## IDE Configuration Primitives - -Due to the way most EC code has been structured, you can typically only safely -inspect a configuration for a single image (RO or RW) for a single board. Thus, -you need to specify the specific board/image pair when requesting defines and -includes. - -Command | Description --------------------------------------------- | ------------------------------ -`make print-defines BOARD=$BOARD BLD=RW/RO` | List compiler injected defines -`make print-includes BOARD=$BOARD BLD=RW/RO` | List compiler include paths - -## VSCode - -You can use the `ide-config.sh` tool to generate a VSCode configuration that -includes selectable sub-configurations for every board/image pair. - -1. From the root `ec` directory, do the following: - - ```bash - mkdir -p .vscode - ./util/ide-config.sh vscode all:RW all:RO | tee .vscode/c_cpp_properties.json - ``` - -2. Open VSCode and navigate to some C source file. - -3. Run `C/C++ Reset IntelliSense Database` from the `Ctrl-Shift-P` menu - -4. Select the config in the bottom right, next to the `Select Language Mode`. - You will only see this option when a C/C++ file is open. Additionally, you - can select a configuration by pressing `Ctrl-Shift-P` and selecting the - `C/C++ Select a Configuration...` option. - -5. Add the EC specific file associations and style settings. Do the following - to copy the default settings to `.vscode/settings.json`: - - ```bash - cp .vscode/settings.json.default .vscode/settings.json - ``` diff --git a/docs/images/CQ_Prototype_Environment.jpg b/docs/images/CQ_Prototype_Environment.jpg Binary files differdeleted file mode 100644 index 77b39d9470..0000000000 --- a/docs/images/CQ_Prototype_Environment.jpg +++ /dev/null diff --git a/docs/images/TCPMv2-ExampleStates.png b/docs/images/TCPMv2-ExampleStates.png Binary files differdeleted file mode 100644 index 7068829e31..0000000000 --- a/docs/images/TCPMv2-ExampleStates.png +++ /dev/null diff --git a/docs/images/TCPMv2-ExampleTransitions.png b/docs/images/TCPMv2-ExampleTransitions.png Binary files differdeleted file mode 100644 index da88a143a8..0000000000 --- a/docs/images/TCPMv2-ExampleTransitions.png +++ /dev/null diff --git a/docs/images/TCPMv2-TaskLayers.png b/docs/images/TCPMv2-TaskLayers.png Binary files differdeleted file mode 100644 index 7429e8f9b1..0000000000 --- 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Several features interact to make it difficult to reliably turn on -the machine without browning out. Over the years, a variety of configuration -options have been written to maximize ChromeOS's compatibility with the basic -user expectation, - -"I plugged it in, therefore it should turn on." - -When creating a new board configuration, this document should aid the engineer -in navigating and choosing correct values for these options. - -The first section describes the various features which interact with each other -to create a complex environment for the EC during boot, especially at a low -state of charge. - -Second, we'll provide some reference configurations which cover many -Chromebooks' use cases. - -Finally, we'll close out with a detailed review of the configuration parameters -which are available. - -## Interacting Features - -### Battery and Charging Circuit - -For the most part, ChromeOS device power systems are much like other laptop -battery power systems. A variable-voltage rail is connected to the battery via a -series of cutoff MOSFETs. Several system power rails derive their power from the -system's variable-voltage rail. Mains power is delivered to the variable-voltage -system rail by a buck/boost charging circuit. Mains power is itself rectified, -isolated, and stepped down by an external power supply. - -During most of the battery charge, the charger operates in current mode, acting -as a constant current source that delivers current to the variable-voltage rail. -Load transients are served by the capacitance on the rail and the battery. By -superposition, load transients during the charge don't necessarily draw current -from the battery, they may just reduce the current flow into the battery. - -References to AC power in the EC codebase are actually references to an external -power supply's DC source. External supplies that are actually USB-PD-speaking -battery packs are indistinguishable from AC/DC adapters as far as the EC is -concerned. Variables and functions which refer to external supplies all refer to -them as 'AC', though. - -### Source Current Negotiation - -A device may draw power from an AC adapter via a few methods. - -#### USB BC1.2 Current Sources - -BC1.2 negotiation is usually managed entirely by an external IC. Once it is -complete, the EC limits itself to 2.4A max. Additionally, the charger may be -configured to switch to an input voltage regulation mode if the input voltage -begins to sag too low. - -Ideally, the input source provides a voltage droop, such that it is not quite -overloaded at the input voltage regulation setpoint of about 4.5V. Thus, 4.5V -serves as a reasonable reference voltage for the charger to use when it is in an -input voltage-regulation mode. - -In effect, the EC limits to both a maximum current of 2.4A and minimum voltage -of 4.5V, for about 12W of power draw from a BC1.2 source. - -See also `driver/bc12/max14637.c:bc12_detect()`. - -#### USB-PD Sources - -High-current power supplies are negotiated via the USB Type C Current Source and -USB Power Delivery specifications (PD). PD sources must support Type-C Current -Source, but the reverse is not true. Both types of current sources are managed -via the PD protocol module in the EC codebase. - -Type-C Current Source capabilities of up to 15W (3A, 5V) are advertised via -analog signaling alone. Via digital communication in the PD protocol, much -higher power states may be negotiated. However, higher power states also usually -run at a higher voltage state as well. Any time the voltage level is changing, -the power sink (the ChromeOS device) must lower its power consumption during the -transient. The standby current level is governed by -`CONFIG_CHARGER_INPUT_CURRENT`. - -PD port partners are capable of both soft and hard resets. Hard resets will -cause a dead-bus state for a brief interval before PD can renegotiate, from -scratch, because it is intended to emulate a cable disconnect. Therefore, a hard -reset without a connected battery will brownout the Chromebook. - -### Locked and Unlocked Firmware - -The Verified Boot implementation normally limits the complexity of the code -which executes in the locked Read-Only firmware package. The consequences for -the EC are: - -- Locked RO EC firmware does not process any digital PD messages at all, it - only recognizes the analog advertisement of USB Current Source (15W max). -- Installation of user-provided firmware is supported, but the write-protect - pin must be cleared to enable it. -- On recent systems, write-protect is cleared by removing the system battery. - -### ChromeOS `powerd` - -The power management daemon provided by ChromeOS displays a "low-power charger" -warning message via the system tray whenever the charger is limited to less than -20W. Therefore, if a USB-PD source is restricted to analog signaling, or a BC1.2 -source is connected, the user gets alerted to the situation. - -Systems that can run on very little power may be rapidly charged with a 15W -charger, while a high power system may require a 40W state or more for a decent -battery charging user experience. Therefore, a board's overlay may override the -warning threshold by replacing `/usr/share/power_manager/usb_min_ac_watts` in -the board's filesystem. - -See also `platform2/power_manager/` source code. - -### Cell Imbalance - -Under normal conditions, the battery pack is equipped with a management IC which -is solely responsible for the safety of the battery, measurement of the state of -charge, and the balance of its cells. Examples include (but are not limited to) -the TI BQ40Z50 and Renesas RAJ240. - -However, after very long periods of rest without a battery charging cycle, the -natural self-discharge rate of each cell will cause them to diverge somewhat -from each other. - -Some IC's can be configured to report a pack total state of charge of zero if -any one cell's voltage is below a certain threshold. However, many do not. -Therefore, after an extended rest period, one cell can be very close to the cell -undervoltage cutoff threshold, even though the pack as a whole is considered to -be at 3% charge or more. - -### Power Profile During Boot - -The power profile during the boot sequence is substantially different than that -seen during typical use. Dynamic voltage and frequency scaling of the AP is -partially governed by the temperature of the processor core. As the processor -gets hotter, it will reduce its maximum core voltage and frequency to settle out -at some maximum design junction temperature for the core. For passively cooled -devices, the profile may also be chosen to limit the external case temperature. - -At startup, the case and core are cold. The bootloaders and kernel are also -optimized to boot as fast as possible for a responsive user experience. So, the -power drawn during the boot is much higher than that seen during typical -productivity and entertainment tasks. - -### Depthcharge Power Verification - -After verification and optional update of the EC's RW firwmare, Depthcharge will -poll the EC to verify that it is allowed to proceed to boot to the kernel. - -It does this by polling via the: - `EC_CMD_CHARGE_STATE` host command. - -`CHARGE_STATE_CMD_GET_PARAM` subcommand. - `CS_PARAM_LIMIT_POWER` parameter. - -When the EC returns 0, power draw by the AP is unlimited and depthcharge resumes -the boot. If the EC fails to return 0 in three seconds, depthcharge shuts down. - -See also vb2ex_ec_vboot_done() in Depthcharge, and option -`CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW` in the EC. By default, this option is -not set, and the EC immediately allows the boot to proceed. - -## Example Low-Battery Boot Sequences and Configurations - -Most ChromeOS devices power needs will be met by one of the following templates. - -### Low-Power Device - -Low-power devices require 15W or less of power to boot the AP. The battery pack -is robust enough to support the device during brief intervals of PD negotiation -without browning out. - -``` -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 -``` - -A detailed boot sequence under this configuration, with a low battery and -available AC power via a USB-PD charger: - -1. EC ROM bootloader loads and jumps to the EC's read-only firmware image. -1. RO firmware negotiates a 15W state via Current Source analog signaling and - begins charging the battery with it. -1. RO firmware verifies conditions to begin booting the AP: - - Battery state of charge > 1% - - OR charger power greater or equal to 15W (met by Current Source analog - signaling). -1. AP firmware performs verification of the EC's RW image, upgrades it if - necessary, and sysjumps the EC to it. -1. AP firmware queries the charge state limit power flag via EC-host command, - and the EC immediately responds that it is clear. -1. Depthcharge continues the boot. - 1. In parallel with kernel loading and Linux's boot, the EC performs PD - negotiation. Charger power lowers to 2.5W for up to 500ms as the source - transitions from vSafe5V to its highest supported voltage (15V or 20V - are typical). During this transition time some power is drawn from the - battery. - 1. After PD negotiation is complete, the EC raises the charger current - limit to the negotiated limit (45W is typical). - -### Low-Power Device Startup With Marginal Battery Compatibility - -Similar in configuration to the low-power device startup, this system enables -additional options to maximize its compatibility with marginal batteries near -the bottom of charge. The Grunt family is an exemplar. This system will complete -software sync with less than 15W of power, but may require more power to boot -the kernel and get to the login screen. - -``` -/* Limit battery impact during PD voltage changes. */ -#define CONFIG_CHARGER_INPUT_CURRENT 512 - -/* Distrust the battery SOC measurement a bit. */ -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 3 - -/* - * Require PD negotiation to be complete prior to booting Linux, but don't - * care about how much power we negotiate. - */ -#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 15001 - -/* Extra paranoia about imbalanced cells. */ -#define CONFIG_BATTERY_MEASURE_IMBALANCE -``` - -Additionally, in order to take advantage of cell imbalance detection, the system -battery must support per-cell voltage measurement. - -A detailed boot sequence under this configuration, with a low battery and -available AC power: - -1. EC ROM bootloader loads and jumps to the EC's read-only firmware image. -1. RO firmware negotiates a 15W state via Current Source analog signaling and - begins charging the battery with it. -1. RO firmware verifies conditions to begin booting the AP: - - battery state of charge >= 3% AND cell imbalance < 200 mV - - OR battery state of charge >= 5% - - OR charger power greater or equal to 15W (met by Current Source analog - signaling). -1. AP firmware performs verification of the EC's RW image, upgrades it if - necessary, and sysjumps the EC to it. -1. AP firmware polls the charge state limit power flag via EC-host command for - up to 3 seconds, in 50ms intervals. The EC will return `1` (power limited) - so long as the charger power is < 15.001W and the battery is less than 3%. - 1. Meanwhile, the EC performs PD negotiation. Charger power lowers to 2.5W - for up to 500ms as the source transitions from vSafe5V to its highest - supported voltage (15V or 20V are typical). - 1. After negotiation is complete, the EC raises the charger current limit - to the negotiated limit (45W is typical). - 1. The EC returns 0 (unlimited) on the next `LIMIT_POWER` request. -1. Depthcharge continues to boot Linux. - -### High-Power Boot Device Startup - -A "high-power device" in this case is one that requires significantly more than -15W of power to boot the AP. These devices may complete software sync at 15W or -less. Very briefly drawing current out of the battery does not cause a brownout. - -Example configuration: - -``` -#define CONFIG_CHARGER_INPUT_CURRENT 512 -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 3 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 15000 -#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 27000 -``` - -Where the low-power device specified a threshold that just barely requires PD -negotiation to happen before booting, this device has a definite minimum power -to boot Linux (27W). A detailed boot sequence under this configuration, with a -low battery and available AC power: - -1. EC ROM bootloader loads and jumps to the EC's read-only firmware image. -1. RO firmware negotiates a 15W state via Current Source analog signaling and - begins charging the battery with it. -1. RO firmware verifies conditions to begin booting the AP: - - battery state of charge >= 3% - - OR charger power greater or equal to 15W (met by Current Source analog - signaling). -1. AP firmware performs verification of the EC's RW image, upgrades it if - necessary, and sysjumps the EC to it. -1. AP firmware polls the charge state limit power flag via EC-host command for - up to 3 seconds, in 50ms intervals. The EC will return `1` (power limited) - so long as the charger power is < 27W and the battery is less than 3%. - 1. Meanwhile, the EC performs PD negotiation. Charger power lowers to 2.5W - for up to 500ms as the source transitions from vSafe5V to its highest - supported voltage (15V or 20V are typical). - 1. After negotiation is complete, the EC raises the charger current limit - to the negotiated limit (45W is typical). - 1. The EC returns 0 (unlimited) on the next `LIMIT_POWER` request. -1. Depthcharge continues to boot Linux. - -### High-Power SwSync Device Startup - -Like the high-power boot device startup, these devices draw less than 15W during -most of the software sync process, but may briefly exceed 15W during short -intervals of software sync. However, there is substantial risk of brownout -during those intervals unless the battery is charged up a bit first. Therefore, -they strictly require 1% battery capacity to perform software sync. -Additionally, this configuration requires PD negotiation to be complete prior to -performing a no-battery boot. Nami is an exemplar. - -Example configuration: - -``` -#define CONFIG_CHARGER_INPUT_CURRENT 512 - -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC 1 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT 15000 - -#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 3 -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 27000 - -#define CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT 3 -#define CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW 27000 -``` - -1. EC ROM bootloader loads and jumps to the EC's read-only firmware image. -1. RO firmware negotiates a 15W state via Current Source analog signaling and - begins charging the battery with it. -1. RO firmware verifies conditions to begin booting the AP: - - Battery state of charge is greater than 1% AND charger power is greater - than 15W (met after a minute or so of charging on analog signaling) - - OR Battery state of charge is greater than 3% - - OR Charger power is greater than 27W (met after PD negotiation in - unlocked RO firmware). -1. AP firmware performs verification of the EC's RW image, upgrades it if - necessary, and sysjumps the EC to it. -1. AP firmware polls the charge state limit power flag via EC-host command for - up to 3 seconds, in 50ms intervals. The EC will return `1` (power limited) - so long as the charger power is < 27W and the battery is less than 3%. - 1. Meanwhile, the EC performs PD negotiation. Charger power lowers to 2.5W - for up to 500ms as the source transitions from vSafe5V to its highest - supported voltage (15V or 20V are typical). - 1. After negotiation is complete, the EC raises the charger current limit - to the negotiated limit (45W is typical). - 1. The EC returns 0 (unlimited) on the next `LIMIT_POWER` request. -1. Depthcharge continues to boot Linux. - -## Configuration Option Details - -### `CONFIG_CHARGER_INPUT_CURRENT` - -Required. - -The lowest current limit programmed into the charger. This determines both the -default level used on startup, and the value used during the voltage transients -in PD negotiation. - -It should not be higher than 512 mA unless the device ships with a discrete -power supply. Raising this term above 512 mA is contrary to USB-PD. It may be -lowered in order to improve compatibility with marginal BC1.2 chargers. - -### `CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON` - -Required. - -The minimum battery state of charge to start up the AP, in percent of full -charge. - -#### `CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON` - -Default: 15000 (15W) - -The minimum charger power level to start the AP even when the battery is less -than `CHARGER_MIN_BAT_PCT_FOR_POWER_ON`, in milliwatts. - -### `CONFIG_BATTERY_MEASURE_IMBALANCE` - -Optional. Only set this option if one or more batteries shipped with this board -support per-cell battery voltage measurement. - -When enabled, the EC will query the attached battery for its per-cell voltages. -If the cell voltage is excessively imbalanced at a low state of charge, the boot -is inhibited. - -#### `CONFIG_CHARGER_MIN_BAT_PCT_IMBALANCED_POWER_ON` - -Default: 5%. Above this battery state of charge, cell voltage balance is -ignored. - -#### `CONFIG_BATTERY_MAX_IMBALANCE_MV` - -Default: 200 mV. If the difference between the highest and lowest cell exceeds -this value, then the pack is considered to be imbalanced. - -Note that lithium chemistry cells will almost always read similar voltages. It -is only near the top and bottom of charge that the slope of dV/dQ increases -enough for small cell imbalances to be visible as a voltage difference. - -### `CONFIG_CHARGER_LIMIT_POWER_THRESH_CHG_MW` - -Optional. - -The minimum charger power level to allow Depthcharge to start up the kernel, -even when the battery state of charge is less than -`CHARGER_LIMIT_POWER_THRESH_BAT_PCT`, in milliwatts. - -When this term is `#undef`ined (the default), kernel startup is immediately -allowed. - -#### `CONFIG_CHARGER_LIMIT_POWER_THRESH_BAT_PCT` - -Optional. - -The minimum battery state of charge to allow Depthcharge to start up the kernel. -When using this feature, start with `CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON` - -### `CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC` - -Optional. - -Similar to `MIN_BAT_PCT_FOR_POWER_ON`, but used to define a secondary threshold -for this feature. - -#### `CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON_WITH_BATT` - -Optional. - -Similar to `CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON`, this is the minimum -charger power needed to boot even when the battery is less than -`CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON_WITH_AC` diff --git a/docs/new_board_checklist.md b/docs/new_board_checklist.md deleted file mode 100644 index 7fe89d4121..0000000000 --- a/docs/new_board_checklist.md +++ /dev/null @@ -1,179 +0,0 @@ -# Creating a new EC board - -[TOC] - -## Overview - -This document describes the high-level steps needed to create a new EC board. If -you're creating a new board based on existing baseboard, you can jump straight -to the relevant link found under -[Configuring EC Features](#Configure-EC-Features) and focus on known board -changes. - -## Conventions - -### Key Files - -Before you get started, it's important to understand the role of a few key files -in the EC codebase. - -- [`include/config.h`](../include/config.h) {#config_h} - Contains the list of - top-level configuration options for the Chrome EC codebase. Each - configuration option is documented inline and is considered the - authoritative definition. - -- `baseboard/<name>/` - This directory contains header files and source files - shared by all boards in a baseboard family. - - - `baseboard.h` - Contains the EC configuration options shared by all - devices in the baseboard family. - - `baseboard.c` - Contains code shared by all devices in the baseboard - family. - - `build.mk` - The board family makefile specifies C source files compiled - into all boards in the baseboard family. - -- `board/<board>` - Files in this directory are only built for a single board. - - - `board.h` - EC configuration options specific to a single board. - - `board.c` - Code built only on this board. - - `build.mk` {#board_build_mk} - The board makefile defines the EC chipset - family, defines the baseboard name, and specifies the C source files - that are compiled. - - `gpio.inc` - This C header file defines the interrupts, GPIOs, and - alternate function selection for all pins on the EC chipset. - - `ec.tasklist` - This C header defines the lists of tasks that are - enabled on the board. See the main EC documentation more details on - [EC tasks]. - -### GPIO Naming - -Many drivers and libraries in the common EC code rely on board variants defining -an exact GPIO signal name. Examples include the `GPIO_LID_OPEN`, -`GPIO_ENTERING_RW`, and `GPIO_SYS_RESET_L` signals. The net names in schematics -often do not match these names exactly. When this occurs, best practice is that -all the `GPIO_INT()`, `GPIO()`, `ALTERNATE()`, and `UNIMPLEMENTED()` definitions -in `gpio.inc` use the schematic net name. You then create `#define` macros in -`board.h` to map the net names to the EC common names. - -Below is an example configuration for the SYS_RESET_L signal. The schematic net -name of this signal is EC_RST_ODL and the signal connects to the EC chipset pin -GPIO02. - -```c -/* From gpio.inc */ -GPIO(EC_RST_ODL, PIN(0, 2), GPIO_ODR_HIGH) - -/* From board.h */ -/* Map the schematic net name to the required EC name */ -#define GPIO_SYS_RESET_L GPIO_EC_RST_ODL -``` - -Please see the [GPIO](./configuration/gpio.md) documentation for additional -details on the GPIO macros. - -## How to use this document - -Each of the following sections details a single feature set that may need to be -modified or configured for your new board. The feature sets are organized so -they can be implemented with a reasonably sized change list, and can be worked -on independently. - -Each configuration feature document includes the following sub-tasks: - -- **Config Options** - This section details the `CONFIG_*` options relevant to - the feature. Use the documentation found in [config.h] to determine whether - each option should be enabled (using #define) or disabled (using #undef) in - the relevant `baseboard.h` or `board.h` file. -- **Feature Parameters** - This section details parameters that control the - operation of the feature. Similar to the config options, feature parameters - are defined in [config.h] and prefixed with `CONFIG_*`. However, feature - parameters are assigned a default value, which can be overridden in by - `baseboard.h` or `board.h` using an `#undef/#define` pair. `c #undef - CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096` -- **GPIOs and Alternate Pins** - This section details signals and pins - relevant to the feature. Add the required `GPIO_INT()`, `GPIO()`, - `ALTERNATE()`, and `UNIMPLEMENTED()` definitions to `gpio.inc`, making sure - to follow the [GPIO naming conventions]. -- **Data Structures** - This section details the data structures required to - configure the feature for correct operation. Add the data structures to - `baseboard.c` or `board.c`. Note that most data structures required by the - common EC code should be declared `const` to save on RAM usage. -- **Tasks** - This section details the tasks that the EC feature requires for - operation. -- **Testing and Debugging** - This section details strategies for testing the - EC feature set and for debugging issues. This section also documents EC - console commands related to the feature set. -- **Example** - When present, this section walks through a complete example - for configuring an EC feature based on an existing board implementation. - -## Create the new EC board - -The first step when creating a new EC board, is to create the required files in -the `./baseboard` and `./board` directories. When adding a new board for an -existing baseboard family, use the python script [new_variant.py] to -automatically copy the `./board` directory from an existing EC board to get you -started. The [new_variant.py] script performs additional operations not directly -related to the EC code, including copying coreboot files and modifying the yaml -files. If you want to copy the EC board files only, you can directly call the -[create_initial_ec_image.sh] script. The instructions for running this script -are found in the corresponding [README.md] documentation. - -The [new_variant.py] script also verifies the new EC board compiles and prepares -a changelist to upload to Gerrit. You should upload this changelist unmodified -for review and submission (you may need to run `make buildall -k` to satisfy the -EC pre-submit tests). - -The next step is to review the following sections to make any needed -modifications to your new board files, test the changes, and upload the changes -for review. - -### Creating a new reference board - -If you are creating a new reference board, it is recommended that you manually -create new directories under the `./baseboard` and `./board` directories and -populate these directories with the minimum set of files required compile the EC -board. The initial changelists for the Hatch and Volteer reference boards -provide good examples for how to start. - -* [Volteer EC skeleton build] -* [Hatch EC skeleton build] - -After submitting the skeleton builds, review the following sections and add each -feature set as required by your design. - -## Configure EC Features - -The checklist below provides an overview of EC features that must be configured -for correct operation of a Chromebook. The "Needed for Power On" column -indicates which features are critical for board bringup. These features take -priority and should be ready before the first prototypes arrive. Use the -documentation link for details about the code changes required to implement each -feature. - -EC Feature | Needed for Power On -:-------------------------------------------------------------------------- | ------------------: -[Configure EC Chipset](./configuration/ec_chipset.md) | yes -[Configure AP to EC Communication](./configuration/config_ap_to_ec_comm.md) | yes -[Configure AP Power Sequencing](./configuration/ap_power_sequencing.md) | yes -[Configure USB-C](./usb-c.md) | yes -[Configure Charger (TODO)](./configuration/template.md) | yes -[Configure I2C Buses](./configuration/i2c.md) | no -[Configure CrOS Board Information (CBI)](./configuration/cbi.md) | no -[Configure Keyboard](./configuration/keyboard.md) | no -[Configure LEDs](./configuration/leds.md) | no -[Configure Motion Sensors (TODO)](./configuration/motion_sensors.md) | no -[Configure BC1.2 Charger Detector (TODO)](./configuration/template.md) | no -[Configure Battery (TODO)](./configuration/template.md) | no - -After finishing the changes required for all EC features, it is recommended that -you make one final pass over all the GPIOs and pin assignments used on your -board. Refer to the [GPIO](./configuration/gpio.md) documentation for details. - -[README.md]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/README.md -[new_variant.py]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/new_variant.py -[create_initial_ec_image.sh]:https://chromium.googlesource.com/chromiumos/platform/dev-util/+/HEAD/contrib/variant/create_initial_ec_image.sh -[Volteer EC skeleton build]:https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1758532 -[Hatch EC skeleton build]:https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1377569/ -[config.h]: ./new_board_checklist.md#config_h -[EC tasks]: ../README.md#Tasks -[GPIO naming conventions]: ./new_board_checklist.md#GPIO-Naming diff --git a/docs/reducing_ec_image_size.md b/docs/reducing_ec_image_size.md deleted file mode 100644 index a165f165ff..0000000000 --- a/docs/reducing_ec_image_size.md +++ /dev/null @@ -1,459 +0,0 @@ -# Reducing the EC image size - -The EC ToT codebase continues grows as new features are added and for bug -fixes. This puts pressure on older boards that have limited flash space -remaining. This document provides some tips for reducing the EC image size. - -[TOC] - -## Checking the EC image footprint - -The EC codebase supports two build types: - -1. `cros-ec` builds are the legacy EC images built using Make (e.g. `make - BOARD=volteer`) -1. `zephyr-ec` builds are the EC images built using the Zephyr RTOS kernel using - zmake/Cmake (e.g. `zmake configure -b zephyr/projects/volteer/volteer`) - -### Checking a single cros-ec build - -Building a single cros-ec board using `make BOARD=<board> -j` reports the the -number of bytes free in flash and RAM for both the RO and RW images. An example -from building the juniper board is shown below. - -``` -$ make BOARD=juniper -j - ... - *** 668 bytes in flash and 10308 bytes in RAM still available on juniper RO **** - *** 3224 bytes in flash and 7460 bytes in RAM still available on juniper RW **** -``` - -### Checking all cros-ec builds - -Running `make buildall -j` shows a summary of the three boards with the smallest -RO flash footprint, FW flash footprint, and RW RAM footprint. - -``` -$ make buildall -j - ... -buildall completed successfully! -Smallest free spaces in RO flash (bytes): -servo_v4 : 104 -scarlet : 108 -mushu : 160 -Smallest free spaces in RW flash (bytes): -mushu : 96 -bobba : 232 -trondo : 376 -Tightest boards' RW RAM images, bytes free: -whiskers : 244 -minimuffin: 284 -zinger : 284 -``` - -### Comparing cros-ec image sizes - -The cros-ec makefile provides two make targets for helping track the impact of -code changes. - -`make savesizes` saves the EC footprint information for all boards, providing -the baseline for comparison. `make newsizes` compares the sizes of the current -build against the EC footprint information saved by most recent invocation of -`make savesizes`. - -General workflow: -1. Checkout branch you need to compare against. For example `repo start - check-ec-size -r cros/main` or `repo start check-ec-size -r <hash>`. -1. Run `make buildall -j`. -1. Run `make savesizes`. -1. Apply your code change (e.g. change the local branch, cherry-pick your - changes, or directly edit source files). -1. Run `make buildall -j` again. -1. Run `make newsizes` to generate report of size changes. - -Example report from `make newsizes` shown below: - -``` -$ make newsizes -build/burnet/RO/space_free_flash grew by 576 bytes: (488 to 1064) -build/burnet/RW/space_free_flash grew by 552 bytes: (1324 to 1876) -build/cerise/RO/space_free_flash grew by 512 bytes: (276 to 788) -build/cerise/RW/space_free_flash grew by 548 bytes: (7076 to 7624) - ... -``` - -### Checking a single zephyr-ec build - -By default all the information messages from the `zmake` tool are hidden during -builds of zephyr-ec boards. - -Changing the logging level to INFO, displays the flash and SRAM usage of board. - -``` -$ zmake -l INFO configure -b zephyr/projects/volteer/volteer -INFO: Clearing old build directory /mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer - ... -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:ro]Memory region Used Size Region Size %age Used -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:ro]FLASH: 238852 B 512 KB 45.56% -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:ro]SRAM: 57144 B 62 KB 90.01% -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:ro]IDT_LIST: 0 GB 2 KB 0.00% -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:rw]Memory region Used Size Region Size %age Used -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:rw]FLASH: 238852 B 512 KB 45.56% -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:rw]SRAM: 57144 B 62 KB 90.01% -INFO: [/mnt/host/source/src/platform/ec/build/zephyr/projects/volteer/volteer:rw]IDT_LIST: 0 GB 2 KB 0.00% -``` - -For easier to read output, you can run the ninja build tool directly and see the -RO and RW footprint. - -``` -$ zmake configure zephyr/projects/volteer/volteer/ -$ ninja -C build/zephyr/projects/volteer/volteer/build-ro -ninja: Entering directory 'build/zephyr/projects/volteer/volteer/build-ro' -[1/324] Preparing syscall dependency handling - -[317/324] Linking C executable zephyr/zephyr_prebuilt.elf - -[324/324] Linking C executable zephyr/zephyr.elf -Memory region Used Size Region Size %age Used - FLASH: 238852 B 512 KB 45.56% - SRAM: 57144 B 62 KB 90.01% - IDT_LIST: 0 GB 2 KB 0.00% -``` - -Note, that the flash region size listed above represents the total flash -available on the EC. The actual available region size is only half the reported -value in order to store two images (RO+RW). - -#### Other Zephyr utilities - -The Cmake system utilized by Zephyr provides two build targets `rom_report` and -`ram_report` which generate a list of all the compiled objects in tabular form. -This can be useful for identifying particular modules that contribute to the -image size. - -The `rom_report` and `ram_report` targets are currently only supported when -working outside the chroot. Follow the [instructions][1] for building zephyr-ec -images outside chroot before running the commands below. - -``` -# Configure the Volteer zephyr project, storing the build files in /tmp/zephyr-volteer -$ zmake configure -B /tmp/zephyr-volteer zephyr/projects/volteer/volteer -t zephyr - -# Build the RO image -$ ninja -C /tmp/zephyr-volteer/build-ro - -# Generate the ROM report, report sent to stdout -$ ninja -C /tmp/zephyr-volteer/build-ro rom_report -``` - -Please refer to the [Zephyr Optimization Tools][3] documentation for details on -the `rom_report` and `ram_report` targets. - -## Disable console commands - -The lowest hanging fruit for reducing the EC image size is by disabling console -commands that provide debug information only and don't impact the user or the -automated testing. Any console command that is not used by the FAFT tests and -suites is safe to disable in the EC images. - -For cros-ec builds, add `#undef CONFIG_CMD_<name>` to the board.h or baseboard.h -file to disable the console command. - -For zephyr-ec builds, add `CONFIG_PLATFORM_EC_CONSOLE_CMD_<name>=n` to the board -prj.conf file to disable the console command. - -* TODO: Create new CONFIG/Kconfig option that disables all console commands not - required by FAFT. - -| Used by FAFT | config.h option | Console commands | Notes | -|:---|:---|:---|:---| -| | CONFIG_CMD_ACCELS | `accelrange`<br>`accelres`<br>`accelrate`<br>`accelread`<br>`accelinit`<br>`accelinfo` | | -| | CONFIG_CMD_ACCELSPOOF | `accelspoof` | | -| | CONFIG_CMD_ACCEL_FIFO | `fiforead` | | -| | CONFIG_CMD_ACCEL_INFO | `accelinfo` | | -| | CONFIG_CMD_ADC | `adc` | Note firmware_ECAdc uses the `temps` command. | -| | CONFIG_CMD_ALS | `als` | | -| | CONFIG_CMD_APTHROTTLE | `apthrottle` | | -| | CONFIG_CMD_AP_RESET_LOG |??? | | -| | CONFIG_CMD_BATDEBUG | `fgunseal`<br>`fgseal`<br>`fginit`<br>`fgprobe`<br>`fgrd`<br>`fgcmd`<br>`fcmdrd` | | -| | CONFIG_CMD_BATTFAKE | `battfake` | | -| | CONFIG_CMD_BATT_MFG_ACCESS | `battmfgacc` | | -| | CONFIG_CMD_CBI | `cbi` | firmwareECCbiEeprom uses `ectool` on AP to test CBI | -| x | CONFIG_CMD_CHARGEN | `chargen` | Used by firmware_Cr50CCDUartStress, included in faft_ccd, faft_cr50_prepvt, and faft_cr50_pvt suites | -| | CONFIG_CMD_CHARGER | `bd9995x`<br>`sy21612` | | -| | CONFIG_CMD_CHARGER_ADC_AMON_BMON | `amonbmon` | | -| | CONFIG_CMD_CHARGER_DUMP | `charger_dump` | | -| | CONFIG_CMD_CHARGER_PROFILE_OVERRIDE | `fastcharge` | | -| | CONFIG_CMD_CHARGER_PROFILE_OVERRIDE_TEST | `fastchgtest` | | -| | CONFIG_CMD_CHARGE_SUPPLIER_INFO | `chgsup` | | -| | CONFIG_CMD_CHGRAMP | `chgramp` | | -| | CONFIG_CMD_CLOCKGATES | `clockgates` | | -| | CONFIG_CMD_COMXTEST | `comxtest` | | -| x | CONFIG_CMD_CRASH | `crash` | | -| | CONFIG_CMD_DEVICE_EVENT | `deviceevent` | | -| | CONFIG_CMD_DLOG | `dlog` | | -| | CONFIG_CMD_ECTEMP | `ectemp` | | -| | CONFIG_CMD_FASTCHARGE | `fastcharge` | Obsolete? use CONFIG_CMD_CHARGER_PROFILE_OVERRIDE? | -| | CONFIG_CMD_FLASH | `flasherase`<br>`flashwrite`<br>`flashread` | | -| | CONFIG_CMD_FLASHINFO | `flashinfo` | | -| | CONFIG_CMD_FLASH_TRISTATE | `fpcapture`<br>`flash_tristate` | | -| | CONFIG_CMD_FLASH_WP | `flashwp` | | -| | CONFIG_CMD_FORCETIME | `forcetime` | | -| | CONFIG_CMD_FPSENSOR_DEBUG | `fpcapture`<br>`fpenroll`<br>`fpmatch`<br>`fpclear`<br>`fpmaintenance` | | -| | CONFIG_CMD_GETTIME | `gettime` | Used by Cr50 tests, not by FAFT EC | -| | CONFIG_CMD_GL3590 | `gl3590` | | -| | CONFIG_CMD_GPIO_EXTENDED | Adds options to `gpioget` and `gpioset`. | Should be renamed to CONFIG_GPOI_EXTENDED | -| | CONFIG_CMD_GPIO_POWER_DOWN | Not a valid config. | Should be CONFIG_GPIO_POWER_DOWN | -| | CONFIG_CMD_GT7288 | `gt7288_desc`<br>`gt7288_repdesc`<br>`gt7288_ver`<br>`gt7288_report` | | -| | CONFIG_CMD_HASH | `hash` | firmware_ECHash uses `ectool echash` | -| x | CONFIG_CMD_HCDEBUG | `hcdebug` | firmware_ECBootTime.py | -| x | CONFIG_CMD_HOSTCMD | `hostcmd` | | -| | CONFIG_CMD_I2CWEDGE | `i2cwedge`<br>`i2cunwedge` | | -| | CONFIG_CMD_I2C_PROTECT | `i2cprotect` | | -| | CONFIG_CMD_I2C_SCAN | `i2cscan` | | -| | CONFIG_CMD_I2C_STRESS_TEST | `i2ctest` | | -| | CONFIG_CMD_I2C_STRESS_TEST_ACCEL | Not a console command | | -| | CONFIG_CMD_I2C_STRESS_TEST_ALS | Not a console command | | -| | CONFIG_CMD_I2C_STRESS_TEST_BATTERY | Not a console command | | -| | CONFIG_CMD_I2C_STRESS_TEST_CHARGER | Not a console command | | -| | CONFIG_CMD_I2C_STRESS_TEST_TCPC | `Not a console command | | -| | CONFIG_CMD_I2C_XFER | `i2cxfer` | firmware_ECCbiEeprom uses `ectool i2cxfer` which is not guarded by CONFIG_CMD_I2C_XFER | -| | CONFIG_CMD_I2C_XFER_RAW | | Adds options to `i2cxfer` | -| | CONFIG_CMD_IDLE_STATS | `idlestats` | | -| | CONFIG_CMD_INA | `ina` | | -| | CONFIG_CMD_JUMPTAGS | `jumptags` | | -| x | CONFIG_CMD_KEYBOARD | `8042`<br>`ksstate`<br>`kbpress` | | -| | CONFIG_CMD_LEDTEST | `ledtest` | | -| | CONFIG_CMD_MCDP | `mcdp` | | -| | CONFIG_CMD_MD | `md` | | -| | CONFIG_CMD_MEM | | Not a console command - gates `md` and `rw` | -| | CONFIG_CMD_MFALLOW | `mfallow` | | -| | CONFIG_CMD_MMAPINFO | `mmapinfo` | | -| x | CONFIG_CMD_PD | `pd` | Used by FAFT PD | -| | CONFIG_CMD_PD_DEV_DUMP_INFO | | Not a console command | -| | CONFIG_CMD_PD_FLASH | `pd flash` | Not supported by TCPMv2 | -| | CONFIG_CMD_PECI | `peci` | firmware_ECThermal uses `ectool tempsinfo` | -| | CONFIG_CMD_PLL | `pll` | only used by lm4 chip | -| | CONFIG_CMD_POWERINDEBUG | `powerindebug` | | -| | CONFIG_CMD_POWERLED | `powerled` | | -| x | CONFIG_CMD_POWER_AP | `apreset`<br>`apshutdown` | Used by power_Monitoring.py | -| | CONFIG_CMD_PPC_DUMP | `ppc_dump` | | -| | CONFIG_CMD_PS2 | `ps2ench`<br>`ps2write` | Used only on NPCX | -| | CONFIG_CMD_PWR_AVG | `pwr_avg` | | -| | CONFIG_CMD_RAND | `rand` | Used only on STM32 | -| | CONFIG_CMD_REGULATOR | `ir357x` | | -| | CONFIG_CMD_RESET_FLAGS | `rflags` | | -| | CONFIG_CMD_RETIMER | `bb`<br>`kbxfer` | | -| | CONFIG_CMD_RTC | `rtc` | | -| | CONFIG_CMD_RTC_ALARM | `rtc_alarm` | | -| | CONFIG_CMD_RW | `rw` | | -| | CONFIG_CMD_SCRATCHPAD | `scratchpad` | | -| | CONFIG_CMD_SEVEN_SEG_DISPLAY | `seg` | | -| | CONFIG_CMD_SHA256_TEST | `???` | | -| x | CONFIG_CMD_SHMEM | `shmem` | Used by firmware_ECSharedMem | -| | CONFIG_CMD_SLEEP | `sleep` | used only lm4 | -| | CONFIG_CMD_SLEEPMASK | `sleepmask` | Only used for Cr50 tests | -| | CONFIG_CMD_SLEEPMASK_SET | | Adds options to `sleepmask` | -| | CONFIG_CMD_SPI_FLASH | `spi_flasherase`<br>`spi_flashwrite`<br>`spi_flashread`<br>`spi_flash_rsr`<br>`spi_flash_wsr`<br>`spi_flash_wsr` | | -| | CONFIG_CMD_SPI_NOR | `spinorinfo`<br>`spinorerase`<br>`spinorwrite`<br>`spinorread` | | -| | CONFIG_CMD_SPI_XFER | `spixfer` | | -| | CONFIG_CMD_STACKOVERFLOW | `crash stack` | Adds option to `crash` command. | -| x | CONFIG_CMD_SYSINFO | `sysinfo` | Used by firmware_ECSystemLocked | -| x | CONFIG_CMD_SYSJUMP | `sysjump` | Used by firmware_ECSharedMem | -| | CONFIG_CMD_SYSLOCK | `syslock` | | -| | CONFIG_CMD_TASKREADY | `taskready` | | -| | CONFIG_CMD_TASK_RESET | `taskreset` | | -| | CONFIG_CMD_TCPC_DUMP | `tcpci_dump` | | -| x | CONFIG_CMD_TEMP_SENSOR | `temps` | | -| | CONFIG_CMD_TIMERINFO | `timerinfo` | | -| | CONFIG_CMD_TYPEC | `typec` | | -| | CONFIG_CMD_USART_INFO | `usart_info` | | -| | CONFIG_CMD_USB_PD_CABLE | `pdcable` | | -| x | CONFIG_CMD_USB_PD_PE | `pe` | Doesn't appear to be used but might be by FAFT PD | -| x | CONFIG_CMD_WAITMS | `waitms` | firmware_ECWatchdog | | - -## Reduce or eliminate USB-C debugging - -The TCPM (Type-C Port manager) implementation is one of the more complex modules -implemented by the EC code. This module includes extensive debugging and is -enabled by default due to the value provided during both board bringup and on -production systems. - -The TCPM provides the following debug levels: -* `DEBUG_DISABLE` (0) - Debugging disabled, no runtime messages displayed -* `DEBUG_LEVEL_1` (1) - Displays all the state transitions for the TC (Type-C) - and PE (Policy Engine) state machines -* `DEBUG_LEVEL_2` (2) - Displays the raw contents of received PD (Power - Delivery) packets, excluding PING packets -* `DEBUG_LEVEL_3` (3) - Enables debug messages in the PRL Also displays received - PING packets. - -When `CONFIG_USB_PD_DEBUG_LEVEL` is undefined, the EC allows runtime -configuration of the USB-C debug level using the `pd dump <level>` EC console -command. In this configuration, the strings from all debug levels are included -in the image. - -Enabling a fixed debug level removes runtime control of the debug level and also -removes the strings for the higher debug levels. - -For cros-ec builds, add the following to your board.h/baseboard.h file: - -```c - #define CONFIG_USB_PD_DEBUG_LEVEL <level> -``` - -For zephyr-ec builds, add the following to your prj.conf file: - -``` - CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y - CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=<level> -``` - -Approximate flash space savings from each fixed level setting: - -Fixed Debug Level | Relative Saving | Cumulative Saving ---- | --- | --- -Disabled | 0 | 0 -3 | 100 bytes | 100 bytes -2 | 500-600 bytes | 600-700 bytes -1 | 100 bytes | 700-800 bytes -0 | 2000 bytes | 2700-2800 bytes - -The recommended setting is setting the fixed debug level to `DEBUG_LEVEL_2` (2). -This adds details about received PD packets in the EC log stored by the kernel -and can help troubleshoot PD issues when a PD analyzer isn't available. - -It is not recommended to set the fixed debug level to `DEBUG_DISABLE` (0) on any -shipping firmware. - -### TCPMv1 Configuration - -Many older platforms still use the legacy TCPMv1 (`CONFIG_USB_PD_TCPMV1`) -implementation. Specific to TCPMv1, the PD protocol state names can be removed -from the debug output by adding the following to the board.h/baseboard.h file. - -```c -#undef CONFIG_USB_PD_TCPMV1_DEBUG -``` - -This saves around 900 bytes of flash space. TCPMv2 does not currently provide an -equivalent configuration option, so there is also no Kconfig equivalent. - -## Other optional features - -### ASSERT() Calls - -By default, `ASSERT()` calls generate a console message of the following form: - -``` - ASSERTION FAILURE '<expr>' in function() at file:line -``` - -There are two options available that reduce the size of strings stored with the -`ASSERT()` calls. - -Description | cros-ec setting | zephyr-ec setting | Total Savings -:--- | :--- | :--- | :--- -Display only file and line number | `#define CONFIG_DEBUG_ASSERT_BRIEF` | `CONFIG_PLATFORM_EC_DEBUG_ASSERT_BRIEF=y` | 2000-2500 bytes -Disable all debug from ASSERT() calls.<br> EC is reset using a software breakpoint. | `#undef CONFIG_DEBUG_ASSERT_REBOOTS` | `CONFIG_PLATFORM_EC_DEBUG_ASSERT_REBOOTS=n`<br>`CONFIG_PLATFORM_EC_DEBUG_ASSERT_BREAKPOINT=y` | 3000-4000 bytes - -It is not recommended to disable `CONFIG_PLATFORM_EC_DEBUG_ASSERT_REBOOTS` on -shipping firmware. - -### Disable console help - -The help strings can be removed from the final build, saving about 5000 bytes of -flash space. - -For cros-ec builds, add `#undef CONFIG_CONSOLE_CMDHELP` to the -board.h/baseboard.h file. - -zephyr-ec builds use Zephyr's shell subsystem and by default enable the -`CONFIG_SHELL_MINIMAL` option. This option already disables shell help along -with many other non-critical features. Refer to the shell subsystem [Kconfig][2] -source file for the complete list of shell features than can be configured. - -### Link time optimizaiton - -Link time optimization (LTO) is a feature of the linker to identify and remove -unused code. - -For cros-ec builds, LTO is enabled by adding this to the board.h/baseboard.h -file. - -```c -#define CONFIG_LTO -``` - -For zephyr-ec builds, LTO is enabled by default and is controlled with Kconfig. - -``` -CONFIG_LTO=y -``` - -Note that for zephyr-ec builds, LTO is only turned on for the source files found -under `platform/ec`. The upstream Zephyr code does not currently support LTO -due to some auto-generated code that breaks the assumptions made by the linker. -This [Github issue][4] tracks the effort to support LTO in the Zephyr kernel. - -### CONFIG_CHIP_INIT_ROM_REGION - -The config option `CONFIG_CHIP_INIT_ROM_REGION` creates a new linker section to -store data that remains resident in ROM/flash at runtime. This reduces the -effective cros-ec image size by identifying data structures that do not need to -be copied into the code RAM section at startup. - -This option has the following requirements: -1. EC executes code from RAM -2. The ROM/flash size is larger than 2 times the code RAM size. -3. The RO code released for the board includes this - [change](https://crrev.com/c/2428566). - -The only EC chip that matches these prerequisites is the Nuvoton NPCX7. - -Due to the RO code requirement, take care before enabling this option for boards -released prior to 2021. - -If the above requirements are meant, add the following to the -board.h/baseboard.h file: - -```c -#define CONFIG_CHIP_INIT_ROM_REGION -#define CONFIG_CHIP_DATA_IN_INIT_ROM -``` - -These options are not supported for zephyr-ec builds. - -### Enable short GPIO names - -The [GPIO macros](./configuration/gpio.md) defined by the board get stored as -descriptive strings for use with the `gpioget` and `gpioset` console commands. - -The names of the GPIOs can be shorted by enabling the -`CONFIG_COMMON_GPIO_SHORTNAMES` option. - -For example, the Kukui board defines this GPIO: - -```c -GPIO(PMIC_FORCE_RESET_ODL, PIN(A, 2), GPIO_ODR_HIGH) -``` - -Normally, the GPIO name is stored exactly as specified by the macro: -`PMIC_FORCE_RESET_ODL`. However, when `CONFIG_COMMON_GPIO_SHORTNAMES` is -defined, then the GPIO name is shortened to only include port and pin number: -`A2`. - -This option is currently only supported by the STM32 chip and it is not -supported by zephyr-ec builds. - -Note that there are some [FAFT tests][5] that rely on the GPIO name. If you -enable this option, you may also need to change firmware testing configuration -[file][6]. - -[1]:./zephyr_build.md#Working-outside-the-chroot -[2]:https://github.com/zephyrproject-rtos/zephyr/blob/main/subsys/shell/Kconfig -[3]:https://docs.zephyrproject.org/latest/guides/optimizations/tools.html -[4]:https://github.com/zephyrproject-rtos/zephyr/issues/2112 -[5]:https://chromium.googlesource.com/chromiumos/third_party/autotest/+/069cb4b0/server/site_tests/firmware_ECUsbPorts/firmware_ECUsbPorts.py#81 -[6]:https://chromium.googlesource.com/chromiumos/platform/fw-testing-configs/+/e2e9547e/volteer.json#26 diff --git a/docs/schematics/dragonclaw/LICENSE b/docs/schematics/dragonclaw/LICENSE deleted file mode 100644 index d1b237d529..0000000000 --- a/docs/schematics/dragonclaw/LICENSE +++ /dev/null @@ -1,318 +0,0 @@ -Creative Commons Attribution 4.0 International Public License - -By exercising the Licensed Rights (defined below), You accept and agree -to be bound by the terms and conditions of this Creative Commons -Attribution 4.0 International Public License ("Public License"). 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Nothing in this Public License constitutes or may be interpreted - as a limitation upon, or waiver of, any privileges and immunities - that apply to the Licensor or You, including from the legal - processes of any jurisdiction or authority. - diff --git a/docs/schematics/dragonclaw/README.md b/docs/schematics/dragonclaw/README.md deleted file mode 100644 index 66fde41df8..0000000000 --- a/docs/schematics/dragonclaw/README.md +++ /dev/null @@ -1,10 +0,0 @@ -# Dragonclaw Fingerprint Development Board Schematics - -The schematics are in the [HTML file][schematic] and viewable with any browser. -Note that you'll need to download and save the HTML file from -[this link][schematic]; you cannot view it directly from the server. - -The layout file is in the [`.brd`] file. - -[`.brd`]: https://raw.githubusercontent.com/coreboot/chrome-ec/master/docs/schematics/dragonclaw/dragonclaw_v0.2.brd -[schematic]: https://raw.githubusercontent.com/coreboot/chrome-ec/master/docs/schematics/dragonclaw/dragonclaw_v0.2.html diff --git a/docs/schematics/dragonclaw/dragonclaw_v0.2.brd b/docs/schematics/dragonclaw/dragonclaw_v0.2.brd Binary files differdeleted file mode 100644 index 37e8b3190d..0000000000 --- a/docs/schematics/dragonclaw/dragonclaw_v0.2.brd +++ /dev/null diff --git a/docs/schematics/dragonclaw/dragonclaw_v0.2.html b/docs/schematics/dragonclaw/dragonclaw_v0.2.html deleted file mode 100644 index c3241ae00f..0000000000 --- a/docs/schematics/dragonclaw/dragonclaw_v0.2.html +++ /dev/null @@ -1,7087 +0,0 @@ -<!DOCTYPE html> -<html lang="en"><head><meta http-equiv="Content-Type" content="text/html; charset=UTF-8"> - -<link rel="icon" href="data:image/png;base64,iVBORw0KGgoAAAANSUhEUgAAAEgAAABIAQMAAABvIyEEAAAABlBMVEUAAAAAAAClZ7nPAAAAAXRSTlMAQObYZgAAAFdJREFUKM9jYGBg+A+EEEANFvN/EDgAZMmDWT+ALHsw6w+QVQ9m/UNh/YcAXCyo6VRiAc38D8ZUYoH9/R9qBxVYNHAfVcOPQGxhi19E7CNSBCKVUDf9AQBM1TcCCjMB0AAAAABJRU5ErkJggg=="> -<title>dragonclaw.cpm - ab219060b29f55c904192cae83fe7d668b73d4b9</title> -</head><body> -<script>/* Javascript code for DiffUI. Directly embedded. */ - -var zoom = 1; -var dark = null; - -/** Activates or deactivates animations referenced by diff id. - * classname -- used to select which animations to trigger - * state -- whether to animate (or reset) - * conflictswith -- classname this diff conflicts with. - * Conflicting animations will not be started. - */ -var setAnimation = function(classname, state, conflictswith='') { - var anims = document.getElementsByClassName(classname); - for (var i = 0; i < anims.length; i++) { - anims[i].setAttribute('fill', 'freeze'); - if (conflictswith) { - var attr = anims[i].getAttribute('attr'); - var siblings = anims[i].parentElement.children; - for (var j = 0; j < siblings.length; j++) { - if (siblings[j].classList.contains(conflictswith) - && attr === siblings[j].getAttribute('attr')) - break; - } - if (j !== siblings.length) - continue; - } - anims[i].beginElement(); - anims[i].setAttribute('dur', state ? '1s': 'indefinite'); - } -}; - -/** Callback for when a diff checkbox is clicked. - * Animates the diff and, if checked, unsets any conflicting diffs. - */ -var onDiffClick = function(target) { - setAnimation(target.name, target.checked); - if (!target.checked) - return; - var row = target; - var td = undefined; - while (row.tagName !== 'TR') { - td = row; - row = row.parentElement; - } - for (var i = 0; i < row.children.length; i++) { - if (row.children[i] === td) - continue; - var checkboxes = row.children[i].getElementsByTagName('input'); - for (var j = 0; j < checkboxes.length; j++) { - if (checkboxes[j].checked) { - checkboxes[j].checked = false; - setAnimation(checkboxes[j].name, false, target.name); - } - } - } -}; - -/** Handles restarting animations when a page header is held down. - * Also updates the history to include the page number. - */ -var onHeaderMouse = function(evt, down) { - pushHash(evt.target.parentElement.id); - for (var tag in {animate:0, animateTransform:0}) { - var anims = evt.target.parentElement.getElementsByTagName(tag); - for (var i = 0; i < anims.length; i++) { - var hasattr = anims[i].hasAttribute('oldDur'); - if (down && !hasattr) { - var olddur = anims[i].getAttribute('dur'); - if (olddur === null || olddur === 'indefinite') - continue; - anims[i].setAttribute('oldDur', olddur); - anims[i].beginElement(); - anims[i].setAttribute('dur', 'indefinite'); - } else if (!down && hasattr) { - anims[i].beginElement(); - anims[i].setAttribute('dur', anims[i].getAttribute('oldDur')); - anims[i].removeAttribute('oldDur'); - } else { - continue; - } - } - } -}; - -/** Callback on clicking the highlight all button for lists of diffs. - * FIXME: this isn't optimized at all - */ -var onHighlightAllClick = function(target) { - while (target.tagName !== 'TABLE') - target = target.parentElement; - // Erase existing highlights - highlight(); - // Highlight everything - var inputs = target.getElementsByTagName('input'); - for (var i = 0; i < inputs.length; i++) { - if (inputs[i].type === 'checkbox' && inputs[i].checked) { - var anims = document.getElementsByClassName(inputs[i].name); - for (var j = 0; j < anims.length; j++) { - highlight(anims[j].parentElement); - } - } - } -}; - - -/** Callback on clicking the expand button for lists of diffs. - */ -var onExpandClick = function(target) { - var show = target.value === '+'; - var row = target; - var func = (function(e){ - if (show) { - e.removeAttribute('hidden'); - } else { - e.setAttribute('hidden', null); - } - }); - while (row.tagName !== 'TR') - row = row.parentElement; - for (var i = 1; i < row.children.length; i++) - func(row.children[i]); - while (row = row.nextElementSibling) { - if (row.getElementsByTagName('th').length) - break; - func(row); - } - target.value = (show ? '-' : '+'); -}; - -/** Validation function to ensure conflicts have been resolved. - */ -var onSubmit = function() { - var rows = document.getElementsByClassName('conflict'); - for (var i = 0; i < rows.length; i++) { - var checks = rows[i].getElementsByTagName('input'); - for (var j = 0; j < checks.length; j++) { - if (checks[j].checked) - break; - } - if (j === checks.length) { - return confirm( - 'Some conflicts do not have any changes selected.\n' - + 'Unselected changes will be abandoned entirely.\n' - + '\n' - + 'Accept anyway?' - ); - } - } - return true; -}; - -/** Callback function when clicking on an instance. - * Updates the location with the instance's path. - */ -var onInstanceClick = function(target) { - while (target && !target.id) - target = target.parentElement; - if (target) { - // If this is the only instance of this refdes, strip the symbol suffix - var refdes = target.id.split('.')[0]; - if (document.querySelectorAll("[id^='" + refdes + ".']").length > 1) { - pushHash(target.id); - } else { - pushHash(refdes); - } - if (target.classList.contains('highlight')) { - highlight(); - } else { - highlight(target); - } - } -}; - -/** Updates the back/forward history with a new target (if not redundant). - */ -var pushHash = function(target) { - window.history.replaceState(null, '', '#' + target); -}; - -/** Highlights an element and removes other highlights. - */ -var highlight = function(elem, scroll) { - // Remove old highlights - if (scroll || !elem) { - var highlighted = document.getElementsByClassName('highlight'); - for (var i = 0; i < highlighted.length; i++) { - if (highlighted[i] !== elem) { - // This removes the item from the array, so don't advance i - highlighted[i--].classList.remove('highlight'); - } - } - } - if (elem) { - // In the case of a multi-highlight, ensure we're not redundant - if (!scroll) { - // Check parents - var p = elem; - while (p = p.parentElement) { - if (p.classList.contains('highlight')) - return; - } - // Clear children - var highlighted = elem.getElementsByClassName('highlight'); - for (var i = 0; i < highlighted.length; i++) { - if (highlighted[i] !== elem) { - // This removes the item from the array, so don't advance i - highlighted[i--].classList.remove('highlight'); - } - } - } - /** - * Vertical and horizontal lines have zero area, so the highlight filter - * causes the line to no longer render. Add an invisible 1x1 rect in this - * case to the group to work around the issue. - */ - var box = elem.getBoundingClientRect(); - if (elem.tagName === 'g' && (!box.width || !box.height)) { - var subg = elem.getElementsByTagName('g'); - subg = subg.length ? subg[subg.length-1] : elem; - var rect = document.createElementNS('http://www.w3.org/2000/svg', 'rect'); - rect.setAttribute('width', 1); - rect.setAttribute('height', 1); - rect.setAttribute('opacity', 0); - subg.appendChild(rect); - } - elem.classList.add('highlight'); - if (scroll) { - // Only scroll if the midpoint of element is not currently visible - var midX = box.left + box.width / 2; - var midY = box.top + box.height / 2; - if (midX < 0 || midX > window.innerWidth || - midY < 0 || midY > window.innerHeight) { - elem.scrollIntoView({block: 'center', inline: 'center'}); - } - } - } -}; - -/** Flips between light and dark color schemes. - */ -var invert = function() { - if (dark === null) { - // Grab the current color scheme - var svgs = document.getElementsByTagName('svg'); - if (svgs.length && svgs[0].style['background-color'] === 'black') { - dark = true; - } else if (svgs.length && svgs[0].style['background-color'] === 'white') { - dark = false; - } else { - return; - } - } - dark = !dark; - var bgcolor = dark ? 'black' : 'white'; - // For readability, some colors are tweaked in dark vs light schematics - var colormap = { - black: 'white', - green: 'lime', - goldenrod: 'yellow', - darkviolet: 'violet', - dodgerblue: 'skyblue', - deeppink: 'pink', - } - // Invert the table for light mode - if (!dark) { - var rev = {}; - for (var key in colormap) - rev[colormap[key]] = key; - colormap = rev; - } - // Update colors - // TODO: determine if it's faster to do this via css variables, in order to - // avoid all the DOM updates. - // FIXME: inverting before the page is fully loaded causes later pages to not - // be inverted. Add a step at the end of page load to correct this. - var applyMap = function(elem) { - for (var attr in {stroke:0, fill:0}) { - var color = elem.getAttribute(attr); - if (color in colormap) - elem.setAttribute(attr, colormap[color]); - } - for (var i = 0; i < elem.children.length; i++) { - applyMap(elem.children[i]); - } - }; - var svgs = document.getElementsByTagName('svg'); - for (var i = 0; i < svgs.length; i++) { - // If the bgcolor is already correct, the pages are out of sync. Skip it. - if (svgs[i].style['background-color'] === bgcolor) { - continue; - } - svgs[i].style['background-color'] = bgcolor; - applyMap(svgs[i]); - } -}; - -/** Navigates to the referenced target when back/forward are hit. - */ -window.onpopstate = function(evt) { - var refdes = window.location.hash.replace('#', '').toUpperCase(); - if (!refdes) - return; - var elem = document.getElementById(refdes) || - document.getElementById(refdes.toLowerCase()); - if (elem) { - highlight(elem, true); - return; - } - // If there's no exact match, exclude symbol index and try again. - var groups = document.getElementsByTagName('g'); - for (var i = 0; i < groups.length; i++) { - if (groups[i].id.split('.')[0] === refdes) { - highlight(groups[i], true); - return; - } - } -}; - -/** Takes an element and linkifies it, applying a provided function to the text - * contents to generate the link target. - */ -var onTextClick = function(text, linkfunc) { - while (text.lastChild) - text = text.lastChild; - var href = linkfunc(text.textContent.trim()); - if (href[0] === '#') { - window.location.hash = href.substr(1); - } else { - window.open(href); - } -}; - -/** General mousemove handler. - * Used to upgrade clickable things to links without slowing down initial load - * time. - */ -window.onmousemove = function(evt) { - var target = evt.target; - if (target.tagname === 'tspan') - target = target.parentElement; - if (target.tagName === 'text') { - var propname = target.getElementsByTagName('title'); - propname = propname.length ? propname[0].textContent.replace('$', '') : ''; - if (propname === 'AGILE_PN' || propname.startsWith('XR')) { - target.setAttribute('cursor', 'pointer'); - } - } -}; - -/** General click handler. Dispatches as appropriate. - */ -window.onclick = function(evt) { - var target = evt.target; - // Process inputs - if (target.type === 'checkbox') { - return onDiffClick(target); - } else if (target.type === 'button') { - if (target.value.length === 1) { - return onExpandClick(target); - } else { - return onHighlightAllClick(target); - } - } - // Process text clicks - // Clicking on tspan is the same as clicking on text - if (target.tagname === 'tspan') - target = target.parentElement; - if (target.tagName === 'text') { - var propname = target.getElementsByTagName('title'); - propname = propname.length ? propname[0].textContent.replace('$', '') : ''; - if (propname === 'AGILE_PN') { - return onTextClick(target, function(t) { - return 'https://goto.google.com/ee-part/G' + t.replace('G', ''); - }); - } else if (propname.startsWith('XR')) { - return onTextClick(target, function(t) { - // FIXME: this will be wrong on hierarchical designs if the - // module order isn't properly followed. - // TODO: some XR formats end with the page location (eg F7). - // use this to find the right location to scroll to. - return '#page' + parseInt(t); - }); - } - } - // If it wasn't the above, find the ancestor with an id set (if any) - while (target && !target.id) - target = target.parentElement; - if (!target) - return; - // If the ancestor is a g tag, it's an instance. - if (target.tagName === 'g') { - return onInstanceClick(target); - } -}; - -/** General double-click handler. Dispatches as appropriate. - */ -window.ondblclick = function(evt) { - var target = evt.target; - // Process text doubleclicks - // Clicking on tspan is the same as clicking on text - if (target.tagname === 'tspan') - target = target.parentElement; - if (target.tagName === 'text') { - var propname = target.getElementsByTagName('title'); - propname = propname.length ? propname[0].textContent.replace('$', '') : ''; - // Double-clicking on net names triggers a search for the next one. - if (propname === 'SIG_NAME' || propname === 'HDL_POWER') { - while (target.lastChild) - target = target.lastChild; - window.find(target.textContent.trim(), - true, false, true, true, false, true); - return; - } - } - // Double-clicking on random blank spaces will flip the colors. - // TODO: make a floating toolbar with zoom/invert/goto/etc instead - if (target.tagName === 'DIV' || target.tagName === 'HTML') { - invert(); - return; - } -}; - -/** Use css transform to scale the page instead of allowing the browser to zoom - * and reflow. This is waaaaaay faster. - * x, y -- point in client space to keep constant when zooming. - * if not provided, assume middle of the window. - */ -var setZoom = function(newZoom, x, y) { - newZoom = Math.min(10, Math.max(0.5, newZoom)); - if (x === undefined) { - x = window.innerWidth / 2; - y = window.innerHeight / 2; - } - x += window.scrollX; - y += window.scrollY; - document.documentElement.style['transform-origin'] = '0 0'; - document.documentElement.style['transform'] = 'scale(' + newZoom + ')'; - window.scrollBy(x*(newZoom/zoom-1), y*(newZoom/zoom-1)); - zoom = newZoom; -}; - -/** Captures keydown events to capture zoom. - */ -window.onkeydown = function(evt) { - if (evt.ctrlKey && (evt.code === 'Equal' || evt.code === 'Plus')) { - setZoom(zoom*1.1); - evt.preventDefault(); - } else if (evt.ctrlKey && evt.code === 'Minus') { - setZoom(zoom/1.1); - evt.preventDefault(); - } else if (evt.ctrlKey && evt.code === 'Digit0') { - setZoom(1); - evt.preventDefault(); - } -}; - -/** Captures wheel events to capture zoom. - * Note that this has to be added via addEventListener with {passive: true}, - * since browsers nowadays assume passivity for this event. - */ -window.addEventListener("wheel", function(evt) { - if (evt.ctrlKey) { - // Dividing by 500 seems to make zoom rate about the same as keyboard - setZoom(zoom * Math.exp(-evt.deltaY * (evt.deltaMode ? 120 : 1) / 500), - evt.clientX, evt.clientY); - evt.preventDefault(); - } -}, {passive: false}); - -/** Run on page load. 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j0IA1dgxbuQDqQQdzITE6XI5c/mBsb36YAvod22Z/cS925npEapHJJBbUFx11e783tuNqoirXWf+H8j8zio4hoW8j/5ot9iLfiUfS3v+EcDE61UTXwprbSv0p4WxQnqPJn73OnkfnFfYXdlKG/N/pvIxQXEgVv8AnflWgueQPzscEWu7fRAYA9XvtoHkEoJ2CdL66e87aBn1e8RXInrzrWvzHdqK70Sm29gcGJbb3n9A22rjXcGQIBNg5O5DcmPMjbTziC68KE10NdtfSxsa0vfWl8NGbo5Pyck9hcOddYmSjm7jQWcDS7OBrdyTYWdhFvdfrau+unyOu4qqgGwSCRhe+vXmO1rc7EvZ3sRkhOxGmgHc3L6HS5u+ju4tzjteg/x056a3oOZwbn3u2z3LFm7b31vGQiW91WcbWsdhyY77++LW8/civOvTmOnVXkL6NbnTXv1PIch5mMtCGA5gWbYWLA8mDEnXoItrjmwNSee/KprVI5epucV1udNnbWzH4gCx+EZEtBVtb3Wa3+Eb8z5AfQ5K4l594W5hhs18OM5ZlyRmSCUksTrK06j5LHlCHEuGHefgXmVRME4UAREDEh6DimiWYlh1pS2lZlFiFbhs9NTh9XU0VSj8s6mmrkrAseElChxJV+8hQUhQspJBEfLzFlTLecMMm4JmnAcJzDhU8K9rQ4xQ01fTlZSpPtUIqZcwSZ8sEmVUSjLnyVtMlTUTEhUZxOy77cfMsmdg8r9q7K4zXLVqhYdnihkKXQUszFCXDT8TmbJzSoSRzltZWIl2LywrL78G0w40xl6bvRLfuO6Mt+MdTKKabM1N95l/hAxKilolz0X4VKqKQFEmaCSCVU/sCgJIEmaVDh89PF/+j1wmvRUYx4M4wcGqkibNXlDMlVPq8Ln24kSsJx1Yn4hQKTwmWiRi4xKXPXMQuZidEiUv2mwxwo4x8LuOeUYTPfCPPOX8+5Vi1BoTSQxgeVBxZYZiVS2by95LMzkU3Zh4iHeiJPOoKAmkM2+yqIhGg4jvd64biuHYxSprMLrJFbTKLe0kr4ihbBRlzUFpkmaApJVKnIRNSCOJAcR5jZzyLm/w8xudl3O2XsSy5jEgFZpMRkcAnyeNcoVVDUyzMpMRolzJcxEquoJ9TRzVS1iVPWUKbsvH0I4nDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEW+bTeVSCVzCdz2Zy+TSWUQUTMZrN5rGQ8vlksl8G0t+LjphHxbjMLBwcKwhb0RExDrbLLSFOOLShJIjmzZUiXMnTpiJUmUhUybNmLSiXLloBUta1qIShCUglSlEAAEktGTRUVZiVZS4fh1JU19fWz5VLR0VHIm1VXV1U9aZUimpqaQhc6fPnTFJlypMpC5kxakpQkqIEa9nbW9tPCSt6bcN+yB9mmUcy5FS6a8bJzL24mVMOoSplZ4dyGPbUzNnGniS1mbMUKuUOFhZl0inEDFQk4T0Zm/wAXEyzNw/KvDMmJKpc3F5qAqWk3STQSFhprK0qZ6TJPCfZyZyVImj028AvsET6yXRZr8bva0tNMTJqqPIFBUqlVk1BImJGaMSplpXRImIACsKwucK1ImJ+9YjQz5U6iOvFmXOuac95gmebM7ZjnebczzqI+0zef5jmkbOZzMogIS2lyMmMwefinlNtNoaZ77pS0y22y0ENNoQnoWqq6qtnzKqsnzquonK45s+omrmzlq0da5hUtQAAAST+EABLAcMen2D4Dg2XMMpMFwDCsPwXB6GX7GjwzC6ORQ0NLLKisok0tMiXJlFS1KmLKUAzFqVMWVLUVRBbd3Brz1rW1lDwA0tXWmoxzcC7H909N2GhB+TxlzJb3sW+gCzNc6i+8T2n6UANvUgAV8+hHxU0BrXFH1e3I7HX07EveMZSHNwR77fDz6X0aLg3EV3vpXenKpFDXrfypUeos+vw7G+vTqIgVLcP0t7yWuxG4Fix7tPQ9epNhvvfQ01A9RS17VEPfrq4BvyI52A0Lb3jHVJbTTz6bO40a14ltxJ1rX0tShJ0PPVQB3NxamjA37uDfkp2fo4tu0QlDOW89jzfQsOxb3xJTFCl/6EaUJAOnhf5CpJ69mf4c+bkdoiMoEX89i77h2PbhIHrFYRKdK0Bvag8LUBr+umDvb8J53+THf0+Nhk9CknRiCe4uAH0ZnjmIogUqelzb5fWuKW5I9f8A0w9kf7yh0OvkygB5vH4YkDc1J3+tx60GK6ahIfkf4D+EPYF78XTi0fyMUjFDb5AgHxHdFxzGv0OSW7aDnu5JDe/0i8SgNgCGdyfh+FzvoTEZUUb6aa69TtTyJIGB1253ueQIF2G7+rXi8S3Fn7aeRuHs17u+sQ1v13qfKl6UpanQgA8hzBvdzJ+AOltz3GrzJlH1Hx3fe2rDoRq8Nx8CtTW1tdq02BO2pHhagPrqTd/K3QB+m/YmMhEoDYHk/L383vzG5D292I7wrXUa+VqUAqBsAQka1w3vci7Db5eZbpGQlDdXt7/W/IW2L2e3rdrXoRU+VgbW8BTcUBoTVuZfcC1uWwJ3+g8ZCJZOum4/W/mw6RbnnwK/FsamtzrqeQ0GpN9CMV199+WnrrsDpGSlLWDM1ybdPIDlfX1tTzwuSdLgaA0JvWlh09epn6DfuXfbzDX9L5KEaM+tz2fUPpfT1e4i3Ou/vKPgnSvIkaV5eHPSptYfm+HO/LmT+XvGQlOw03P1qdgLnSOz+C/aE4v9nTOcNnzg7nmdZLn7K2PtiYCIK5RPoSHWpxMrzLI4gOynMErJccJgZrCRLTK1/aIYMRSG32/q4RjWKYDVJrMKrJtJOSU+0KC8qelJJ9nPkl5c+WXICJqVN+ZJSr8Q4dnzwzyR4o4FOy9nrL1Dj2GLTM+7mpl8Ndh86akJNXhOISuCswyrHCl6iinSVzAn2U0zJBUhW032GPbA8Ku0a9J+GvGtuU8H+M8X3IOAiXYwscOM9xpLaGmZBNZjELfy7PYxxakM5ZnkTENRTqWmZPP5rHRaZZD7H5P8TsOx0yqDFhKwvFSyEqKuGgrF2AEiZMUTInKNhTzlEKLCVOmLUJY8fftD/Ygzj4Wors15BVW54yHJ4p9TKTI9pmnLtOONS14lR0spMvFMOkJSFLxbD5MtclBXMrsOpKeQqrm5l8dpxolDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIR03x34+8KuzZw6m/FDi9mmEyzliVJ90wlX+sTefTV1KjBSDLUpbUIqczuPUhQh4OGT3GWUPx8wfgpXBxsdDfLxjGsOwGhm4jidQmnp5dh+9NnTCDwSKeUPxTZyyPwoToAVrKJaVrTzrw68Ns4+K2aKHKGSMHnYti9YeOYR/ZUOG0aCBPxLFa1Q9jQYfTAgzJ808UyYqXTU0uorJ9PTzdO/tze0t4udsmcRmW4NyN4dcC4KLBkvDWXR6vez9MJFCIgp5xCjoYtpzBNy61DRcNKAVZckDsPDCWQ0VM2ImfTLVrOWfcTzVNVTpK6HBkq/ssPlrvP4VcSJtctJHt5hZKhK/zEghJlBSwZ033I+zz9lDJfgXQyMVnIkZn8RJ8kivzVVU6eHDTOk+yqMPyxTzgo4ZRhC50mdWFsUxKXNm/e5smlmSsNpcdjbwNKkA0pWtajW4G/I89KmuOA3HbXiYeY7dN7ux12hKeVxyvppvr1G3aLg09cA69b8/MjXqAb3IwIGx9N9nYvfnbXRwLQKQDcNo2nbv1d7c9zFxaiCKGvhU263NK6mx02odLXdhcdGt1/mCzt0EYypbbB2FnsdmflewOruHie2+DS9KC9BUelPhtrSosLVqQJuxHO2r9iLG3meQa8KpbliAPL3tt5ExObf59L+OuoA8a60p3RW1GbQtfTV/W+2x0jHVKIv57nV9x73sGd9CZaIkgWOl6UH4ingbDU0OHMkEdRfr+puPe0QmW2o+Y+LbDQjTlEoRXPQWrUHahJIFwKUp3vMXwBc6g67s3kNR37veLDLB66/p79y46CJCYoGgrem4qBtyVc05+W4XOzE6nXTmxB+P6RqkhtH00e/lcevxiqIpJ/etzH+O53pvc1rioNnuG5vt3ufreIzJS7Eatbf1c66/zjl9qT/Fbyr9PxxbxD+8fT/0xd7D/ABNy4v4/KOKopINQq2p/wr+FPLFwIZxcDkL+n16Rb7BIIDeRu/m7RTVFC97EWIFBvb7oF60qT5nTFOdne4f+JLeQH6SCSOTX0vbtoD6/xjqixcjn5a3Gh0prUDY2xU6XYON767cree8XiW3IXPy9x5OGiMuJJ33ItQnfSgNeYvzA3GKO+jq06Bxv6jr5AxIEasH1976377h+8RFv6XrS177C42150NQOZw7lg2g28xf0A0bm8yZRPIX2vz3Fr3ve452MJyIFNb35gX60qdxal9b1IrYWD9h/HnzOu0TJlAbcu+2/e1rcrxAdia2FKCvLTwvSgprf0FHfcaM/y09G31EZCUGw9B0HnbkN32i2uP8AUlWo0sbm1b60+I78jQmoD6lunnz+LPvZQ0yEyxvttyNrvv0OzDqIgOvU1uaig5G/qrwA1BoK3qHOhsDrsL+TsRvfrYNOlPTqBz/QbP6RbnXtSTUn1FPW3hcU7wtfADYeZt2fQFrOdBoOpnRLe5Ftg+xOpfQdSXIJ0sItjz9KitTy5aXJGxrTQi1jW+Lm6MO5JJLOAzO/Nj0LM2WmXuQwA+hr0sN99CBbXHKVNak/oW0rTQCwHTW4czZOybXe/n0HP35aUaOGa4HwNjryH72pswGdP2eXtk828F35Jwf7Uk0nGfOEQU1LpDxFfEROM9cNYYpbZhoaaLQHphnTJ0ItJqw99qzTI4R1aJVEzeWwMsy2x3DknxPqsLMrDMwzJlXhjiXIrVAzKyhTZKEzCHXVUqSNDxVEpJPslTJaJcgedv2nPsL4LnxGIZ38IKOiy5nYhdViOVpZlUWXc0zXWubNpASmmwHHqgEfjlmTg9fNQlVZKoaqoq8VmbZWWM0Zbzrl6T5tyfPpPmjK+YIBiaSLMMgmMJNpNN5dFIC4eOl0ygXX4SMhnkmqHmHVoNCK1BA2MkVEiqkyqimnSqinnIEyVOkrTMlTEKulaFoJSpJ2IJEeMeLYRiuA4nXYNjeHVuEYvhlTMo8RwzEqWdRV1FVSVcM2nqqWoRLnSJqDZSJiEqFizEGL7iaPnQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEeZ+1b2r+E/Y+4VzHifxTmhSkl2AynlOAcZVmXPOYvcl2HkUghHVpClU7r0zmT/dl8mge/GRzqR7lp/wCDmLMWHZZw+ZiGITLXRT0yCDPq54S4kyUnXnMmH8EpDqWRYHtjwb8Gs5eN+cKXKOT6QEsipxrGqlMwYTl7C/aBE3EcSnoBYOSikpJb1NdUcMinQTxrl6Qna17Y3FztlcS4nP3EyZmHlkEuKhckZClsTEnKuQ5K+tomBk0K6sh+YxqYeFdn2YX2xMJ5GMMqe+zy+Elstl+pmZszYnmmvVW16+FCCpNJRIUv7tSSSQ6JSTZS1sj285X4pykgnhQiWhH6BPBbwMyT4F5TlZaylSe0rJ6ZM7MGY6uVK/rjMdfKStqivmy0/wBnS05mzpeG4dKUaXD5MxYl+1qZ1XV1XmRp8ineJpXWugtrffwoTelaU42bjqbkEb206sebkM4eO21oJsBe22vXQk20I25OXuLb+lTpoR4358x56d4iuLWZ/eNbuw2Fxz063aMaZLBdxcjVnO4uBr0I72ie2/sTVNvCwJNL2/AjUACre1jyPI9+h3f0JIx1oI1BP+tc8m2ueelv7zRObfI0VXoTc33FQDe9qbdKUsQAf487Eb+rEODrEJTzD9W091ux8xExESLCpr/Ca87GlajTY8t6UMRobPd+m73csW3LbjUwqlPYM2rFtQ3yDbBnB5xObiiki+m42v41pQUAI/PFuj7Nz0HZ9tLAjQWERGWRe41sz8+j+XxtEtEWDavmDQ6a2JHjYDkNsVv27HrpcaN1fvERlf6vS1yQzcrAkkgeZGsSUxQ2URcChItToFUAtpT8Kj1AO9wwA8wz+lvWIlSknu99vgzn6N7xVETWg7w61NSegCiKDl41vinCLMS3QlvrtFnsfif5flfYtr+tUxJtcX/m/JR+dMPM+QB+CYtMkjR/R/0j9+19b+Ip6Vwe373fhL/BvdFPZHr/ALp/WPz7Sb3FP7V/TvfQnDzPmAPiIqJJOpPmG/WKZiQL98a6A0VvUnu18z41G+Dbkn1Ye5ou9h138vh1vo3naiqKA1UbEaGh8RVWh8Dv5Aw0A8ruPi58+8XiSnpcht/i/u98R1RdKivKwIIpXqRbla2lBatbuddd25+evUv21iVMo8r9WsPQHvaIbkWTvTauldKam3gBbStDhq372thps47Wu5v12kEo8tG2a2w0cNfbTRrtDcitfiJPIE/SpVrrX64qxO7Cwsz3fUm3OxvpdtJ0y25AcvPn/E9ohORBpc0HKoqNdtE+JNbeJFQwsL7Wvc6ue/q+pcPKlADMG6nduXPsPSILkRYgHfXcn1uelun8ogfvf7o5B7G3qx3dyNZUIJYi1tSzXbTyO79ogOP2N9qE2BN7bACmnTkK0wPL0A6gdzy/hGQiUzNcnV9HDEkancXN9QNmtzr9ahJN979NL3I1vpzsMXAMLhydADc9xytt5xlJltzJ9dXL30Gl7WFrOIgOPU36nQ16/W50Fr2pUjdTPsAOetr7u2z94yUoGp+L2u7OB5ksAX2i2uv1qEkcqg2A3obV6k610oKYuAIDm+4HXncga792JiZKe7bM5Jt+7bf++zagbPbXXtQDrUk67XoQfnvat7YrqfhyG258tXAta5OShAdy3YPz7EsS7q8hzjKB7OX2n2f+xRmmEydmlc1zz2c59MkqzNkkRAiJlkx6MiAqNzdw7+1vNsQsyQVuRc0y4t+Fk+aauIecls2ch53C9hZIz1WZWnppqgzKvBJ0z+3pX4plOpShxVNEFKZCw/FMkcSZU+4JRNInDUX7Uf2SctePeETsdwdNFl7xQw6lIwrH/Z+ypMdRTy+GRgmZvYoVMnUiglMmkxYInV2EHgVLRV0aZmHzt2jhtxJyLxgyLlniXw0zPK845GzhK2Jvl7MMnf8AfwcbCPd5K23EqCIiCmEFEIegJrKo5mGmcnmcNFyuaQkJMISJhmtpaGupMSpJFdQz5dTS1MtM2TOll0qSrYiykLSXRMlrCZktaVS5iUrSpI8Cs1ZVzDkjMOLZUzXhNZgeYMDq5lFieGV0v2c+nnIYpUkgqlz6aolKl1FHWU65tJXUk2RV0k6dTT5U1f3GMqOPwwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIR0D2mu0lwy7KHB/M3GXirNfsMhkTX2aVyuGKVzrN2Zopl9Ulyll2FUR9qnM5eYWhsrKIOXQbUZOJrEQUol0fGw/x8dxuhy9hs/E8QmcMmSGly03m1M9QJlU8lP702aQWdkoSFTZikykLWnsjwn8K82eMmd8JyLk6j+8YjiK/a1dXNdNBguEyVyxX41ic4f5mhoZcxKlBPFPqZ65FFRyp9bVU0ibofdrfte8Ue2RxcmvFPiTHFiECoiX5JyXBRLr0gyDlb7Qp2EkMoSpLSYiIKe4/O5y7DtRk9mXvIx9thhMJBQeo2Zcx4hmfEpmIVy2S6kUlMgkyaOn4iUyZYIDki82aUhU2Y61cI4EI/RV4K+CWUPAzJNFlDKsgTJxEuqx/Hp8lCMSzHjHsgifiNYQVmXKB45dBh6Zq5OH0vDIlqmTFTp8/zU0/TRVR0uR89fGxrc0GOPkP0Ojj0v31bnpHaykN08mDHUC1jrYgC2jl4uDT+l97bU3FRXcHqNyBQYt/xbaEWt31BOhdhyL6wlAILgfBux2JY80nyETm3qfdPltS9ed9qjatb4oX0Nw5Lj8wvt56t1iFUvZn6al/gQ4LNd9jE1uJA1NKW2pvSm1DtyA0xaQ9wXfbfzH6d4gVL152J/5dX3tuxc67xObiRqTre1NjXStNa1rptbFL6N5HXTby+XSMdUndiDa6R05M/YAlrA7iJjcTWlSFaa3p1uQfOu/UAGF2JBOr3A+f0LamIVSjsHblYvyIZh5gbXiSiIA/eINKUrUDmLkK8b1A3GFxdgW1Zja50u3kGB56xEUajTooN79PeLxJREkalJ5XoedQDTbS/mdcUZNthvqm/v8AePIRYZb7eYD9eo131ismKvevzpodaEjwofywZtyX5tb0+Y7RaZY7bsQ7RWEWB+/6kA/8wP8Aj6OEsCwPViG82Pu/nZ7Ht0+gB9e7mIux+Ktbgk976rA+WDbkC/Ignz3inse3qf0h9q/nT6YRb7E9fUQMXQfepzNe74aLp8geuKEbgDzLHysTF3se3qf0jgYuv71TrY1r0NCTTT8N8VYs9g7bG/mwGmnK+sV9kOmt9/K4Px9IoqijyPjp6VKRTwv47G6kX6fME+5vhF6ZYGxJPIfFr+/pFFUSdikdK6enjuQCd8Pw9SBp+8/V9fcW3FouEsD91u9hztoPSIy4kH94k6G9K6V0NbbiopvbS697Ad226aaF9ObXiQI0ABPIJHfcsB7/AIRFXE63AF6gGh13oeQ5nWtCLClupO2w9NddreRiRMpXID3qPqO2ib2iG5E9dOZpcVItW1qCtTpfTFb6Dlone7F28zyv1MTpk6G50ub2cC3TdierNpCciamxrqQa2pXx6UoK72NsG5nowufTb5d4yEyujltGc3Ggb4htr3LwXH/4j0pWg0pz2uNTbbF1+wDf49LdrdmD7ROmXpy3FidTvcB2e7nV7awnYim9AAbDXXlXrva+nOoBtw8hci7HZ929G7XmShm66276vuNXOp0dr25187qoPG5/PTpbrbFzMLa8z9CwezG0TJlk7A+Thg/+8Q5/1Q1g0W91+xJPdT6E/P6cvLAB/Q337gAENbpfZnjJTLbvsdd2Y89LAWtfrbXX6ggEhNNtTr1ubbGgvfbF2nUvp1drjnYW7XtGQlF3ZzybqGBt2HCPNtYtzr1rWGutyL0vurWh0Gmwxcx/xE2G4A30sGcdA9umQiW1zcsWcWHlt29GvGUn2YntLs0diHiI3lbOEVMswdm7PM2Y/wAussJXERj2TZlEe5hDxFydBhSgibwjDTCMxyqFbCM1SWFbhnEKm0tkUVB9g5FzpUZWrPu9Utc7BquYDV04dRplqZP32mTtMCQPbISP8plpCWMyXLWjUL7Wv2U8I8f8sqxfA5NLhvipl+jmfs7ixTLky8cpZftJ37L45OYcVFPmKmKwqsmqKsHrpy5qVCiqcRkz957KWbMt57yvl7OuTZ3L8yZTzZJpbmHLc/lMQiKlk5kk3hGo6WzKBiEfC7DRcI+080qx7qwFJSoFI2mp6iTVSJNTTTUTqeolonSZ0shSJkqYkLQtChqlSSCD1j89uM4NiuXcXxPAccoKnCsZwauqsMxTDa2UqTV0NfRTl09VS1EpV0TZE6WuWsXDpcEggn6HE0fMhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCPm85Zwyxw+ynmXPWdZ1BZcyjk+RzPMmZp9MnFNwMokcmg3o+ZTCKUhK3C1CwjDrpQ02484Uhtlpx1aEKhqaiRR086qqZqZNPTylzp81ZZEuVLSVrWpnLJSCWAJOgBJAj6uB4Ji2ZcZwrL2A0FRimNY3iFJhWFYdSpCqitxCunopqSmlBRSkLnTpiEBS1IlocqmLQgKUNCX2jHb3zX25uNcTmBpcwkvBzJT0wk3CHJEWoNuQMndebTF5qn8K08/Cqzdmsw0NFzUsuPIlUEzLcvw0TFtSpcxj9Sc65sqM1Yoqc65OG0pXLwymVbhlEjiqJwSpSfvNRwpVMZ/ZpEuSlSgjjX+jX7L32ccG+z5kKVhi001dnrHkU1dnbH5IKkT66WhRk4Ph05cuXOGCYMJs6TRcaUKrKiZV4nNlyV1iaWm8AtPmxSfEHfQ2ob2pWtz1rTHDS99rs/kWdmc3Lkh+mx2SWgj8wbrz0IJ73Lgk66tFwaiATYlJ0psTa3npTX6YtKWfkb2AY7aWZ20tpoLxCpHY2azX1a+4tobsDfV5zcRzNDzGn18DyItca05vvrdxaxvt1DB/K2OqW7tf1s3kCN+mo7Tm4jrUcxep8zTzNPle0pGosfduOXw6FogVLN+Q0dgdNtAeX7pZrOLTURANP3q+up2JrfbXyIpihDM4Nt9/W2lvzDnuLxqQNhfS9jqNCwLaHcM/nKQ/yVytt08vECu+BvuCG/e18jb42di0RKl6NZnNx15gM4dtLEsWiUiJNb3puDS/M3pXpXU7YtIDaEdWcdL6t6+cRKla27FnvewIB7fuuAwsIkoi/5iP7XOo12ANL0rp4YMdmc3cH5M7jW3pERlO9nZ7FiG32dx3ZmiQmKFhUXroaevxU7vQctNiuHJfXRQf4hn9OkRGQNWHMkO/lY3625iK6YobE+RvptcW8zXyxTlZOnb1uL/reIzJ6q0u7KFy7X0Onu86iYutu95X73zWflXywYDUK9fkRaLfYm9rD+8hh/4R8Y5/aa7p/vC/4n1xUEDVS+zhvKwinsTf8AJ5cXnZwB84faerf6/u4q45r9RD2J/wBX/m/WBiqDUD+yNNd7aC9xQYtLFmKzfQkegsTf6eAkl/3OliTfubeUUzF7d+3ME19e/T+u2K8P+qfM2b0A84u9iXYv5It70/MxTMUDbvHxJoDfoTflf02o9tE69yPV+bP6xcJHPj10sB/ugac+ZHrQVF0uSOdzU7XNTfpQfWuK3szl3FgQOwt0csIvEgBrJ3D6vqG0Atvaw2JiMuLuaEnw8OqqbUNPIYMGF0jnd/cAfc8TCVsxBFyNANuQ73dtS4ERlxKq6gV5kk/M9aHWuKtbQ9XZI8+e27nnEqZVzbhboA55mwN7HQ6O1oirfF6qJNDre2umwGtaDxvXFe5A6Is5Gz8+nbmHlEseYvbp1Zz6J20MRHIrr0oLmw6HlzNNCRioBZgANn0P689eHbQOIkSgH1u2j2uTsdTcg2dtohORBvVQSBWlSQT0F9/Ac6jarC5Nz1DAHsWfu/K8TBB5dmZrvdyLtb8ovzNohLf1pbeqvL8OeK3t8dBaxtvt6guYmTK5gDoBb06PcqN3cagRAdidaVUbipNhWo56VFDtS3TFWY3ccyfl5Nbz3jITL3Nn6G45aOpujBuhvAcfuaqqemnK+tRa4237wvi/UE6AbnVruNhd9Bbn1nRLJIYMOZcFuQIFhzAuw8otzz+p73gNuVDU62+7S+ADizgalRtbcW1G/KMhCOQHU2BHpoNTYvraLe8+b1J3oPWm4AH8uvnbF4AH5fXfy09dLaF3jJRL/ugPqTy2tbfn6g7W9x4nW2thpf0t0xcNuXf+frGQEgaX5q0FtQLO9/i5a8Z/vYqe0te4C50lnZV41z/ucEuIU6LPD3MU1fQmE4V5+nMSVJg4mMeWn7DkbOse6GI/3hXBZfzREQs9UICXTXNUyT214aZ0OFVKMBxKb/7sq5rUk6YocNDVzDZJUWKaapWWXqmVPUmaQhEyomR5tfb0+yojxGwKr8YMhYaVZ/yzQBeZcMo5ZM/OOXKGUyp8qRLSfvGYcBp0cdKEAVGJYTLm4ak1NVR4NSHcxxsdHhbDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEai3t7+3/Mc0ZqhexrwtmgGQ8rRjE240TqXxDhZzZniWRKXoDh8HmSGHpTkR4Qs1n7ClRSX84vS6GeagovKCjF6/wDipmpVVO/ZuhmPS06gvEpiFEioqkKdNI4/CZdKoJXNBKuKpKEEJVTni9WP6MDJPh7mCpz/AOJ6cWoMczxknGkZLl4KkJXNyfJxPC5dbNxmaJiSr71mCSqvwegrJASink4TmGhE2dNnVsmj1wYaLS6AtKqcxXQ2sRenjoa1NjfpbZtRsDr6m++9x6AeywCVo4geJJt/rJIsQbuD63u5DRc239AbG1xr1rT71ieSq3OLWO1xuk9NAH72e2hiJUvkxHLtpbnfZ3G0TkP1ArcaVGt9PDlQ2rzoa2M+ljcN9fMWIckWiBUofu668O36HZ7A6dHnNRBtcKHXyG532Oup7tzWhGxt+unpz1vdtGgXLvcMxfdvdcc9xtyMTG4kHQ92lqbddh86HQ60xRrWsG2v/EEndw+1neFUu2ludr+YsexY9dzMREfxAa6imxPIGnlrvhd+eum/kb78tRY7RCqVt7j5PYkp5lwQ1nu0S0RPJQP9oXHrQ1rfXagoMUYEu3LQsdrFvLW/SIjLIsNfo7l2D2ZRbV9olIiik3qOWh33JHjoaaXtTFAkjQ9gRyHPTU8iSzRGUNpsNrH38OnqfjXTFUpcHx+ZFQK9L05Ypw7FI2DgttcnQn05xGqWHDtsC9m83B20F+Z3NcRA1FLjYDTyT+tcU0s5SDzct6gN5E94tMp7t1d9ttSfifS5qCI0+MgfXyNaacqdNcUtq6S/NPvtf1iwy7a6mzjb/e+UVBEqFfj+X5U/HyxUgbpHrwjyBb3WiipWmnmNNLaa8/KP37Ss/v8A1H1wb/U/5ot9l0T6fwjl9pVsoA86p+dACfXDhP8AdJ6FQ+TQ9l27Ekj0NhHH7Uv+P5HAgDVA/wB6HsuifT+EcTEGpJXbnQDXyP6NjhoHZIHV1e8P9d4v9na3nZwPcG159xpFMxFtSdaHUEb7H9a9DgaKHkken84r7K46i3l1KlbdYpqiQKmwrWlh+Vb3HP6lrzVY9A+3T0J7ReJYGoax/e1Iu9iPmxuzRHMWBeo8hWo6Gg0Ntz5UrUAuGAS3Nn63u/S45ReEMxHO4ACQH1DkgX2ILcn2jqiiRWlK0uaDoa0AFN960pSutWfUk9gQC4+nYs+0Xpl9O+7jfca7gkjQsYiLih/FU8gN6HagA06keGKhrs3xPmWtrub83IiRMpx33Oh3fZLtve3URFXEHmEjrr0008rbHBuu/c99hzt6sLRMmULFr8/n7tQDq7m8Q1xA2+Lck+PM0PhUipvsQbmA6ak6G+psGZzsWA90TiX3HxNr2AKn0OwuO8QXIiv3lVpU0BNtbbeYF6Cx5VDtYeZv0YBn32BvqREyJZuwFtCQlvIaaWu5O+rGE5EGpv3dSANd61tbxN9BYgkVAfS5e5Onf4jd2cGJkyu6j1e3635sLk7xBciDse6KG5qa602BJryoBehG1wSHc/iPJ7DTV323ubuxjITL04mJFgAAW6PfezDUb84Dj+tDpqT59La6A1rypTF2vXk2nxLs2pto14nEsMH20SOnx5+93iGtwqNvX6/4m9LYrErNbQA6b7G5bTmHd72uDSwh7oYQjdg9iV7Qd7tLcKXuzzxUnRi+N3BWRQf7GmkcqsbxD4VwqoeVS2bvxBdWuNzJk2IcgpBmV95th+YQEZlqcrdmkzjMwxUNst4Z5uONUBwivm8WJ4ZKT7OYr81ZQJaWiYS54p1MSmVOJYrQqTMJWtU5Q8FPt8/Zql+FWcUeJuT6AScg59xCf9/pKcf2GWc4ThNrKqilyglIp8LxyWioxLCpaFTJdNUyMVoUoo6SThkmbnYx2lHnlDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIR4I9oz2uobshdnaeZolMQj/OhnYxOS+FUJ3YZ5UPmONg3Fxea4mGiUuodl2TZeXJutDkJFw0ZN/wBhyaMabh5suJZ4nnLMIy9g82fLI+/VRNLQJ/CSJy0ninkKcFFMh5hdKkqmeylqAExxwPxEzanKOXp9TJUP60riqiwpDJJTUrQSuqUlQUDLo5TzmKFoXO9hJWAmcVDRTz3LIvPEDNXpjFxUyn0VFRE4Eyj4hyMjY6cRDjsRFREdGRTi34l+ZvOvfa4l91Trjz5inVrcSe9q3VcU8KUtRXMWpUwrWorUpaiXKlqJUVLLlSieIkufxOY+f9hH7UVX9l/7QOCZxxSrnKyFm5UvKfihIXNqDxZcxKrQtGY2R7UzsRypiRlY7K45M6bV0cvFsKlLp1Ysupl+UWnHoR1QKVoUhRQ6y4lSFpUhRStC0qopC0KBBCgFJUCDS4x8g2JB2t6fXyj9lNDW09RIpq+gqKeso62nk1dLV0k6XU0dbSVUpM+mqqafJUuTPp6iTMROkVElSpc2UtMyWVIW6voGItLiQpCqg2IOoIoCk7VHQ1NiDocUb3db/rtfXrrH1xwTQFJs731bdiHtyPufVVwbiL6kU0HSx8fWoxQh9Q7eR+WtrWEWLlm5I4g2o131v03t1vE1ERShNb7g9AK7jzsd9NbCk3ANm/KfkSe+2u7h4gVLOgYi7A7e8aC1iNdNIloiK0FQflTexPqTWpppcYoQAzuk+ZGmo823tERlB3/KexL6eZ3/AL3SJSIihFFFJva522FjprU79MUY3txc2fs40c21YjnERlHVgW04SAbau3/l9SHiUiJJ1orS4NPqAa9KfXFGdwe1x7jv7jEJlgPqNQxGg8nHuG8SERQ5qSba3+RFaDwvinDq3xc+QN28ojMvo/bV9WsSP+XSJCYqp+8lVib21526+OKM3S/JvXr6RGZQfRux79U38vOKwiP5TpqFVJ15jrXXrrfC9tfJrdXIB+tOdipQ6HysPNhflc77mKgiqAXUOmv5fj44HdwCOxJ7/LQ84tEp9DfV+I99OJvdptFT7WLVXWlqd38e6fw6YoyW095T32vbtAylbA+/z/d9PoRzEWP4kjxA/wDcJxayb2T/ALx/T4PFplKGpV6J+bfW0fpix/Gg00sPl8GDJ5J/3z+kU9mf7yvRH6xwMWP4gPADrrRNPx64AA6AeSi/I7Rd7JXU9w3wB+to4mL0HfJF/wB2lP1/iMXAJ04fVJ+LfOK+yJ1cdywbv+FttDFNUTXdR86fh+fO2K3br0b5vAyg/Pp+a/rbyAikqJpsBY6q8b0pS16W8N6g/lzOvmAPhEnsgzufhs1/yW6Hv1igqK/n9B+NPxxViSW6ch6k+7SL0yunTzOx8/8AW5RHVEi9ATyJNB5bX6G2DDdreenLb4d4kTLY7PyAfof7xHqAbRGXFE1+IDoAdL2JtSniedMXAE6Am57efI6b9IkTKvoTrd2353N9WcX6mIi4i1bnqTrTpYEepHOmDWuW6emvTcajVr6zJl9QNdBfzOr6NfsBEVyJ5knagsPWmg2sAD0OKhJsWYC7m/u6XawfvEiZQayQANzy33AcdH0eIa4nUV7o1uTf8SKC1afndwvr+I+jC/16bXicS3L/AJjYcm215X6ekQlxHI+Zp4eA8q7Hli5voW+uu3SJghhcsP7o13735687XiIt4qJ1NdeVbeZ+XTFeXbTl8vj31iUBnAHDbuTr6dHOh0O9IknXCGjtZ9buT58ugYdI/MIQwhDCEdy9nzjnnns18ZeH/G7hzHLgs1ZAn8LOIZn3zzMJOZf8UNO8tzX3CkOOybMsnfjpHN2QauQEe+Ed10IWn6WEYpVYLiNJidGvgn0k1MwByEzUXE2RMa5lT5ZVKmDdKjoQCODeJfh9l/xUyNmTIOaKdM/B8yYbNoZq/Zy5k6hqbTaDFaP2gUlFfhVdLp8QophDIqaeWVOjiB/o5dn/AI3ZL7SHBjh1xw4exKojKfEbLkLPYBp1xhyLlcX7x2BnWX5kqGW6wmcZansHMsvzhplxxtmaS2LaQtSUBR3FwnE6bGcNo8UpCTT1klM1AJBUhTlMyUvhJHtJM1K5MwAkCYhQe0fl38ScgY94W57zP4f5llCXjOV8Um4dUrQmYiTVyeFFRQYlSialMw0WK4dPpMToVrSlS6OrkLUlJUQO4cfRjhEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIRpEe067Vjnam7TmZIySTB6J4YcMVxfD3huwiJLsvjIWWRixmLN8O226uFU5m+dsuxkPGtttxMRluDyzCRlXJclKNY8848cdxucqUsqoaHjpKMO6FoQr+1qAASl6mcCpKwyjJTICroAGlHibmo5nzJUzJEwqwzDOPD8NSFPLWiWtqirSASgmrngrSsAKVTIpkLvLjHs1YA+J8SbAeeOGHU/Ttv56x1voO513tt7wfq3QHFTLBl0xRPoRoiBmi+7FhNO4xMgkkqpQFKY5tKnxXvf6w3ElSk+8bRj509P4uIBn/MP9b5AtuTfYOY/Tx/RFfaqHij4VVHgFm/E5UzPfg/QSVZVVULKKzH/C+ZPFNQJSFKUipqMj1s6Rl+eqUmnEvAazKyDJnz5VfWTOq2nVMq7ybg0CkHRQGlOShqD5G2MePYyVNVKU4uP3knQj9eRi9NPBaUqQapOx1FLEHkQbEbeBuj6SVJWkKRoq7tfW4I0caWZx5NJS+QQakU8/nSv4fTCKlIOwVbUEgv236s7epiQiI/xB+opSviDzIrim+v8AH6bbziMywdDfkfT0tqfk8SkRNrK8v1Uc7Uv1xThHLRgCCx7tYBtfpoiVKbVPVwQfTUWfy2iSiJ5jU7G3lqB1JA5DFOFgWNmdiLaa97ObdxEZl21s37wYXFndz8HiuiK/nI+fPcaU8K9BbFOE3dLvu4Bc6+/R4jMlx+XTU/pr6cvWK4ib6g3/ALJJ6i3SvPytRuhTtuXPXm/Tl1iP2QuxULNe/oX2OlgeYG9YRG9DtXunTpoa9b8vE0YbqbbS9uYHxN4sMrqG/wBYMX7295vr25iLIp8RSK3rQemhPjfqcUAfYE9Xf4gfXaKCUW0B2DHfqyjzHKKgi66LJ8k/U/icV4W1H/MB9bRaZJ1KfeD5flJ3jkIv+e24KfrQeeuKFJGx+PwinsjpwH3X/wCWPost5dzXnJ9cLk/LmYM0xTau45D5akkznj7ayAe4tqWQsUtCqEHuqSDQg0xNIpampJTTU8+oULFMiVMmkE6AiWlREfKxbGMFy/LTOx3FcMwSStPEmdi2I0eGy1JduJMysmSUqS4ZwSHDR25B9lvtRzBsOwHZz47RrSrpcheEme321AioIU3IFAgi9dORNsfSTl7Hlh04Hi6xq6cPqyPJpB+POODT/GbwbpVmXU+KvhtTzAWKJ2eMsy1AjYpViILxFmHZl7TcsBVMOz1xxgQNftfCjPMMAACSauSNANNfDpiOdgeNUyFTKjCMSkS0h1LnUNUhKRa5UZSQPPruImpfGLwgqy1L4peHNT//AAM75bm9P3MS+jaPhorhbxWgnzDRvDPiDCRKbqh4rJ+YYZ8A2qpp2WpcAqDcgHa9McIrM4ZRw+pXR4hmnLtBWIuqlrMZw+mqEh2/FJn1KJqQ4I/Eh3Dc4+/KzxkeegTZGc8qTZRICZsrMGEzZZPILRWKST7m5REVw04m/wCzrPI/9lJ8B5gwN/T8sY/7e5GItnPKx2YY/hIF+1Xp3DlttpxnTJQ/+sMsX1bHcK67iqEUVcNeJwB/83ueBrYZSnoHWv8A1eKjrf8AOoz3kc//AFhlYnrmHCR6f5Xr9dRUZ1yTqc3ZZJ64/hdmu4/ys/HrFBXDTid/s6zyf/ZWe9dKQFR5nFRnvJH+meVBd7Zgwgt//wBdvXSL/wBt8kA/9sMrJ0/+3sKJ6v8A5WT5fh19KKuGfFC9OHeeRp/+k56TSh1/6vqaaUqAb3rq/bzIu+c8qk3d8w4Sm7uCR97e/wAGtF4zxkcm+ccsK0/+3sLa2n/zXvDM1zpEZXDHijU/+bnPZNLf/ZKff/D622+Ib1Bxd+32RR/9aZUA/wD6hwjbmTV6N59YlGeMjv8A9scqp01x/CibuP8A9LJu2gY8ndojL4YcUqEf5uM9jnTKU+PUX/Z9NCbkmo0OH7f5Ev8A/GmU+/7RYR0//bLfDTeJBnrIo/8ArHKyj1zBhQDjX/5tyNrPz5xHVws4pH/9uM9jxylPrf8A+fQYft/kTT9tMpvy/aLCP+si/wDbzIwA/wDjLKzasMfwkC77mr62t53MUzwp4ok34cZ7qf8A+pT75f6hiv7fZE/00yp/xDhHl/8ANw/bzI+2ccrB/wD94MK+JqyffH5/mp4of7Oc9f8AZKff+Aw/b7Iv+mmVP+IcI/6uKft5kfT9ssqvy/aDCf8Aq4f5qeKH+znPX/ZOff8AgMP2+yL/AKZ5U/4hwn/q4r+3mR/9Msrcv+0GE68v/wArj8/zVcTxrw6zyP8A2Tn3/gMV/b3Ix0znlU//AOw4T/1cP27yR/pjlb/iDCv+rj8/zWcTf9neeP8AspPf/AYr+3mR/wDTHK3/ABBhP/Vw/bvJH+mOVv8AiDCv+rh/ms4m/wCzzPH/AGUnv/gcP28yP/pjlb/iDCf+rh+3mR/9Mcrf8QYT/wBXH5/mt4mf7PM7/wDZWef+Bw/bvJB0zjlY/wD+fwr/AKuH7d5I/wBMcrf8QYV/1cbIXsAO0Hn/AIe52zl2SuImWc0yzJ/EBMw4g8NJpOJRN4KEk+epNL2BmjLoXGQSIZEPmvLMAicQ5+0w6IWZZViGm4eLicwrch+8fBjxPytVYqrKEjNGX66dihm1OFU1LjWH1NSuskSTMqaeRTyqhcyZ7WkkrqCJaXQaWYopV7RSk+XH9JBkDKOasCwHxkypj+X67H8uKpss5pocOxPDqqpr8vVtTMVhOJ8FPVKnKm4NitQqimgSZqp1JjEuYuZJlYYlM3a7xtFHjzDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhGN72qPaW/8nDsmZxXJphEQPEDix7zhdkVyCd9zGQL0+g4hWZ8wNvodbiYL9iZUZmqoGZQgU/CZijJAlBZL4iWeG56xr+p8AqTLWpNXXvQ0pSQFJM1J9vNdwpIlSBM4VpcpnKki3FxDrnxSzJ+zmU6wyJikYhir4XQlB4Vy1VCVfeagKBC0ewpRNKJiHUioXTtw8XEnSVQBQHeh+Z/p+qY1lP5jyDX5WcjsQDbSNKlmzc/gPoRPbH1AA8AT/Qb1xESwJiFRZPYe8nX4ekUJvJ4aeyqNlUWP9DFslAXSqmHge+xEN0IIWw6EuIvRXd7iwpC1IVirYhjvbW/IcgSC1v0t254CeNWafs8+LmSfFzKE5ZxHKWLyamsw7jCabMGATx91zBluuCgZaqPHMInVVAuYU+1op82TiFHMkV1HS1MrxvMpfFSmPi5bGo93FQT62Hk1qkqQbOIVQd5t1BS40ug7za0qoK0GGoEG/rseo6cunKP23+G/iFlbxXyHlPxIyTiAxPK2c8Docfwaq4TLnCmrpQWqlrZBKlUuI4fPE6gxOjWozKPEKWppZhK5KiY7TymVVF0k1Wnn1H8w0GxFQbaUjncqaZZ5pOo+Y6/HeLwhaXEhaTUHfTxFNQQagg3BGEfSSoKSFJLg6H5dxuI54Rc50/j6cvKOQWodfHCAYWuO3Tp02Zm1vFRL1NRpyJufM2ve2twcIo3FrwnVibEPyO5OhJI6RVEQdK21IVz86inj4X1NCPXR9xrofr1tFpQk24TbdP4m7C7m+ujFoqiJHJJ8Ca6iw+IV9NeYxVn52c8++r/y6RaZY0c8xxA2bcm5BGwZ79DFURIOxGgA5+Nfz1G+9Dp8mf5j6vtFDKJdikuBfn5akaMfcGi/5akOZM5z2WZWyfl+e5rzPOohEJKMu5blMfPJ5NYtZARCy2UyxmKmEdELJHdZhodxw7IO0kimn1c2XT08ibU1Ew8EqRIlrmzpiizJly5SVLWT/dSlRc2ePlYxieEZewysxrHsUw3BMHw6SqfX4ti9fTYbhtFITdU6qrqyZKpaaUAC8yfNQkbmM4fZq9hzxrz61C5i7RWboLgzInmmH2cmyJELmziLFhdFutTJ5l85UyqlLKh7t37fmiPEQHIeNkkCW/eOdq4H4S4nWBM/G58vC5JAIpZPDUVqn1Ewp/yenYMx456+J0qlIZz5yeLv9I94eZaXOwrwpwOp8QMTQuZLXmDElTsDynI4HSmZSS5kn+u8beYCFJ+7YLS+yKJ1PiNSFlCM1/B72W3Yq4PwUC3A8G5RxAm8MlH2rMvFxR4hzGZvooRExMpm0OjJ0KuoSAzJcrSqEFEqVDl0qcX2jhvh9lbDUICcMlVkxIdU/ElGtmLP95cuYkUqTdmlU8tJ14SXJ89c9/bN+0Ln2oqFVOf63K9DO4vY4PkUfsrR0cpQP9jIrqBasfnpuXmYhjVdPuQJvBwoHviU5alUkgISUyWVS+TyqAaSxASuUy+Hl0ugmE17rEHAQTTEJCsJuUtsNIbSSaJGOWy6aVKQmXKly5ctA4US5aRLQgD91KEhKUjoAAI1rrMUrMRqZ9diFZVYhW1SzNqaytqp1ZV1Ew3MyfU1Cpk6dMNnmTJilGzqMXUS9NLNqPShNK7W7tvXpbS72Pbs5+uv00Yv3qwI5tqH+B6D6vVEvNP/AESvPvWPyPlWn1xcJI6e8/HT09YtNQzlwLWGn6dL+7nbJxlGSZigzL5/IpTPYFRJMHOJdCzKGCjUd8MR7ESyFgUIWAFA/dUKCvx8dytlzNNErDMz5fwPMeGqJKqDHsJoMYo+JgCoU2IU9RJTMG0xKAtJAKVAgEZFJjOIYbOFTh+IVeHzwwE6iqp9LNbdJmyJqFlLv+EukvcXjznnfsa8Ic1tOOS2UxeSpoe8pEblqKUiEWpQNERMmjftUuUykkqIgG5bEKJAVElACMaq+If2EvAjO0qZOwjBq/w/xg8SpeIZTrFS6GYpX5ZdZgGI/fcJVToLq4cMk4TVEkBVYZaUyx2RgXjhnTBlpTU1snHKQMDIxSUlU8C/EqVXU/saoTFCwNSuqli5EniU8eHeJ3Y64l5CRFzOTsIz1l6HBdMbI2Hm5zCw6T8Tkfl9anooe6up1cqiJs02wkxL64dtLoa85PGX7D3jJ4XSq/GcvU0rxLynSAz1YhlmlnjMFHRi8ydieVVKn1p9h+JU+ZgtRjcmXTJNZUrpJSZyJHfWU/GvKWZFyKSvmLy/ik0hH3fEJss0M2aSwTT4iyJX4yAEprJdGtUxQlSkzVlBX5ZVBFKlJU33VJUpKkkKCklJKSlQI7yVpUCFA0KTVJAqRjR+ZWqQpaFOlaFLQtKxwKStCilaFJJBCkqCkqBHEFAv+IR28JgUApLFJSOEgcQKSAQUnQgguC7KBe40/Psunwg0OtCNK7DStd9vXFhq1K0e42D+87gw4iXckcxqwvyYaahx73jiYUDVIF61vWhtvSwpzNaabYp7d9Tozv8AHX+QPnFA2zG/1p/O8cTDWNQSRfe1KVoSDoN9gLilsBOAZlalncfJreZHWzwcO4dyx2IuTvrpoTrYO9zxMPXQWsampsb+B08BauLvbANcP09LM7e97m0OfPUBm5e7kQNGtFFUPYilwRoDqNTuRUUoBvXQgYkTPUWKTbRyQLadyzfCxivPbfe7sWbpe931e4ikWCCbCt9a1PLUk3FbEC1rVteiZ16gAu2xHPld769xHJ9ma/U3G1jd79bxRUzetCa6VGx1qTYg7geoqBiQTLgnbdy+oa/qNCG82o3MHQNbk1wHNgxbXTSKC2RyAANagHQU2UaVudh43oZ0zTd1JGx0JvsHubvZvK8VDd99Brpq7kDVt9xEdbQv0PMnewoANNNetd8TIWLC+3QN3Jb0FtG0EV5sNSC7Wu12YlzyYbBthGU1f7tDXS5162t4kEcqa5CFsbkMzu/933W6DU+tL/is/YHpttpyd7ADQRlsKINUUFjsKeZBsfwsSTXEwnJ5vdiQH+Funm/Q3sQ19DdzzuHAJ33fvbS55cnc1yfmORZqkcQIWdZcm8vnkriAVqDUwlcYxGQylgKQVt+9abDrYIDjZWgkpURj7+Xcx4lljHsFzJgs00uLYBitBjGHT9RJrsNqpVZTLKUqHFL9tIT7RHEAtBUgnhURGHiFBS4pQ1uG1iPa0ldSz6Ool6ccirlLkzACXZQQslKmBSoA63G0pwzz5K+J+QMpcQJMktS/NUkg5qiGW4l1yAiXUdyPljzqUpQ5ESuYNxUviFoAQt+GcUj4CDj9Knh1nbDfEjI2Vs9YQky6HM+DUmKIp1LEyZRVE1HBXYdOmJCUrn4bXS6mgnrQAhU6mmFH4SI84Mw4LU5cxzFMDqyFT8MrJtMqYElKZ0tJ4pFQhJJKUVEhUuegEuETEg3ePucc0j40MIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhGn97bLj9E8T+1UzwolszRE5R4DZeh5GiFhnGnoVWes1Q8DPs4RxeaTVcSxBHLeW4mFcccEvjcvRrQSxEvRqDr54lYsa3HBQIXxU+FSkygkEFP3qelM2pU4F1BPsJKgSeBUlQDFShGo3jTjysTzSnCpc0KpMDkIkBKSlSTXVKE1FWtwLqQn7rTqSSfZrp1pZKlLBw7oFwOVB6XJ+f60x1oXuR1L8wWDeTx04vUdHLdv5RPbGh5BR8bin0odMRrNu5H6/KIl8uqU+jP8ACJzYJNtzQeQJPy08fMYq9ugfrqAPf8PWBRBHx7k3+I6946a4w5VD0KzmmDaSHYRLcLNghJCnIVS/dwsWog0UqHcKYdxSgVll1kd73cNQQrDh9xbYdS/n2Fy2jR7wf0N32qlYTjmK/ZWzjiVQrDcwLxLNXhJNqp3tZFBj0iSqvzZlGnCyqZTyMbopdRmnDaeTwUUvFMPzCsoFfjqDN88Yhj9FEVmHlMKqKlBPxoFL/wAydPj86KFjsQiaTNMpV7oV+Ycv9YdR79DF4QtK0hSCFJIqCPp0I0I1Bsb4R9EEKAUkuCHB6dtj0NxHLCKwwhDCEMIq55mPb3Yp7B3GTtr5yXLcmQ5yzw5kMbDM584qziEddy/ltDzaogy6Ww4dhl5mzVEQ6KweX4CIb9yX4SKncdJ5Y+iPPK8rZQxPNVSUUqfYUMlYTV4hNSTJkOOLgQl0mfUKTdMlBDOlU1cqWoLjXH7RH2mvD/7O2X01eYJoxnNuJ006bljJNBPloxXF1S1iV97rJxlz04NgkmcpqjFKqUr2ns58nDabEK2UqlG472TOxDwD7HmVW5Nwsyuh7NEdAQsJmziZmFEPMM+Ztcao679smvuW0SqVOxI9+1luQsy6Rsltl1cHFR7Ko13ZnLuVcHyzTiVh9ODULQlNRXzgldZUkXPFN4R7OUVXEiSESQQCUqWCs+BPjf8AaL8T/H3GlYhnbGly8FpqqdPwTJ2FKm0mWcDQt0S/u9CZi1V1ciSfZzMXxOZV4lMCpqET5NMsUyPUOac25QyHJYjMWdMwyfLMlhRV2YTeNahGlukEtwsKhxQejo100SxAwbb8XEuENQ8O44QnHNMLwbE8brJdBhGHVOI1kz8sikkKmqCRrMmFI4JMlGsyfOVLkyx+KYtKQ8a9YnjGG4LSTK7FsQpsPpJQ/FPqpyZSSrZEsE8c6as2RJkpXNmK/DLQokCPC2fvaJZClMS5AcNsqTLOTjfeQueTp45ckynP3DAwZh4ucxzX/wDIYuHkqwQQ171Cg4O7MC8A8YqZaZ2YMSp8JSpiKOkQMQrG3E6aFy6SSv8Au+ymVgILrKCOE9L4548YRTTFScAw6pxUhx98q1mgpCrYypXBMqpqP73tUUirEJCgQqPME+7cfHnMD6lwU5kOU4RRIRA5cy9BKQkfuqXGT4z2Yrc7oAcUiMabKiVJZQCEp7Ho/BjJNAgCbR1uJzAzzq+unBR3ITKovucgB9EmUpQAA4yQ567q/GTOlfMJlVlJhso/lk0NFJIA2Jm1hrJ5UwuRNQklyEAECPj3e03xyi1FbvFDNaFE1IhI5uBbv/C1BNw7aRyCUgDlufqJ8O8nSQEoy5higzEzZJnK81TStT9SX6mPlq8Qs4zi6sxYk5v/AGU72I/3ZSEJa9rAchykQ3an48S8hUPxOzE6RtHKgZmk6WKZhCxQJqBuDemhxZM8N8mVFpmXaFIvaSJ1P6ewmS+Z2b4RdL8Rs5yC6MwVym2nGTUaEa/eJUz4HQnW8dm5V9oDxly64lvMsLlbPEDX/S/b5YmSTYISPuw0fIXISAQSAQVxkkj1Kt8SSFY+FiPghlOvSVUEzEcGnN+H2NQaymc3JmSK1M2cpuUqrkAcjpH3sP8AGvNdEQmvl4fjEh/xe3kGkqW0aXPolSpIYfvTaScbOI9f8NO35wXzopmX5yEbwxnTi0Nd+dqbmGV3VOK7qFIzFCNN/Y0JNDEOzqWymEhUkKMY8gOuJ6tzD4I5swoLn4V7HMNIlJWBSJVIxFIS5KVUE1Svaqb8iaSoqZkwuPZJVwpPaGAeNOVcVKZOKe2y/VKUEvVkTsPUSWBFfKSn2QButVXIppUsX9qsBSh7Yh34OYwrEfL4uFj4KMaQ/Bx0DEsxcJFsOJC2n4SKh1uMRDLiaKQ424ttxJBQsgjHT02VNkTFyZ8qZJnSlFE2TOlrlTZa0llImS1hK0LSbKSpIUk2IBjtyVNlT5aJ0iZLnSZqQuXNkrRNlTEKDpXLmSypC0qBcKSopULgkR5m409mTJnFJuJm8A1DZXzqoe8E9goZIhJo6lBQG5/ANd1EZ3/9GlUxZSiZtdxol2KYb+yOaY/aM+xf4deOUitx7CJVLkbxKmD20vNOHUgTQY3ORLKESM2YXTezRiCZoEtKsYp0oxuR7KSVT66mknD53beQ/FrHsnLk0VSubjGXweFWGz5jzqRBVxFeGVMx1SSklRFLMUqjXxLARJmKE5OKfOvD7M3D+fROW81Sx2XTGHCXEVAchI6FUSG46XxSR7mMg3SlSUPNE9xxtyHdDUQw8y14OeJnhtnnwhzXW5Mz7gk/BMaowJ0srPtKDFKGaVCnxTBsQQBIxLDakoWhFVTqV7OfKn0lUinrqappZO52X8xYRmjDZWLYLVyqukmkoWzpnU04AKVTVUlTzKeolggqlzACUqTNlqXKmS1r+QMKeQ3Gn5DbenyxwATy91dbXLvbUv5amPtW1Z7Wsx9S3O2nmIpqhrXCqeBudvvJr4i9Lcr3ieST1JuTe3JiTr5g+QitjoAOgZ7Xct0OuvNtTSMNSlE7GwFTanMV3rod+WJkzyXdugDXHIB3HuPPSwB7gq5HQa9QSw1Go5GKCoc6AGhtTrXrSp8KX5byoneoPRr2A2uddNLQ63vo9vg+789+0UFMEmw5G9QbilqA0rtY1vcbypmszkMHZ9Oe7aNcEdRZ4DS2/m+/0Aw5RSVBuEGiDp+98Ngb2JrQVrXbUdbxUoBJVMe9+C4u1u45ctelRcsd/N376t79i7RRVBU+8oA3FBcV8SBvQ6G/PTEwqd0pJ5EkA8tA/wARaKltWLEbMNzf97e2o7XvHXDtp1BVUDU7UuDSgpcUxPLnLU9+FiQQl+l3JJfVzbaKhiLh2STe+hsz8tmiC4hIBCQEig0HI3+nmcZMskqDkm5YEk6p4tenv9BAXUz6gkPfVPPz827RAeTZQrqD8jU/W36OMxB18vn9fyipuFFtQkj69fLpFud1Pn/ynGdLLl+Y+Yin7pPQf+I/CMx/syeKSpllvOvCKZR5cictRLeb8sQjzilOJkc3eEJP2INBJDcFLp39ijXkAJH23MrjgKy6vuevH9HP4kqxHLmbvCzEK4zKjL1UnNGXKWcsqmJwXFJiafG5FIlyEUdBjCqSrmpZLVeYJkwFZmr4NT/tEZcFPiWE5op5ATLxCUcMxGahICTWUqTMoVzTqqdPoxOlJVf+yw9KbBKXyo49Lo1shhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCPjeIueZFwxyBnfiRmd9UNlzIOUsw5xnjyEFx1Eqy3KYucR/uWgQp6IVDQbiYdhB777ykNNgrWkHHq6mXRUtTWTi0qlkTqiaQHIlyZapi2G54UlhqSwEYeIVsjDaCtxGpUU09BSVFZPUA5EqmlLnTOEbq4UEJSLqLAXMfzxc65vnHEHO+cM/ZheVEz/O+aMwZvnkQtRWt+b5lm0VOZm8pRCSpTsbGvLKiE94qrQVpjUarqJlXVVNVNPFNqZ86fMJOsydMVMWX1upRjz8r6udX11XXVCiufW1NTVz1EuVTqicZ0xRJAJJWsl2HYRZUfeHXX0xhfunkNOdyP0jBXqO3zMTW7U8U/8RUfwGIlmwHf69CYjUXUOpUfcf1ie1qnxUflT8TjGVv0AB8y/wCnvjHVZhzKfkfcIkuwzMXDOQsS2h6GimDDPsrAUh1l5JbebWk2KXELUlQ3BOI1WKj3j62XMyY5k/MeBZsyziNTg+Y8r41h2YMBxakWqXVYZjGD1kjEMMrqeYkhSZ1JWU0mcgggOgAukkHxRm/L7+U8wRsnd7zjKCIiXvrSUGJgHlK+zvCwQpSe6th8t1SIlh5KSe7iwpCmILdLFulgNPpo/bJ9k77Q+B/ag8DcneLGFIp6PEq+RMwfOeCU89M8ZczxhEuRLzBhBIUZiKda51PjGECpCKqdl/FsIrJ0tCqnhj54EEVH69MREMW/X5tGx8V2H1Mq3LZPxJHP+JINu9a4/eHWhwieTOMssboOo5HmOvTcdbxeEqStIUkggioI0PhphH0AQoAguDcERywisMIR779n72FM4dtrikqVh6Ny3whyY9ARvFHPUO2z7+FhIhxS4XKmWvtKXGIjN+Ym2IhuDcdYioKQwLcTPZnDxSIeDlU25lkzKFTmvEDLdcjDKUoXiFWAHSlRJTTyOIFKqmeEqCCQpElAVOmJUEplzNXftTfaYwD7OeSxW+zpsYz7mGXU02S8szVzPZz58pITPxvGPYqRNk4DhK5spVQlE2TU4nUrk4ZRTZCptRXUG7jwq4W5C4MZEy3wz4Y5Yl2UclZUgUS6TSSVtdxppAq7ExkW+sriplNZlErcjpvOJg9FTKbTB+Jj5hExEU846rarD8Po8Lo5FBQSEU1JTI4JUqWLAaqUol1LmLUSuZMWVTJiypa1KUST+dHOec80eIWZsXzjnLGavHsx45UqqsRxKsWCtamCZNPIlICZNHQ0klKKagoKWXJo6GklSqWlkypEpCE+Z+0922cpcDVReTcotwOcOKXulJiJcp1apHlBTsOlcM/mV6GWhcTHKDrb7GXYOIZi1spU5MYuVNOQZje9/DTwbxXOgk4vipnYTlkqSqXUBIFbiwTMKZkvDkTApMuQOBSFYhOQuUFkJp5NUpM32OuPiP4wYXk0zcJwtMnFcycJC5BUo0WFlaAqWvEFy1JVMnHjStFDKmImqRefNpkrkmdhczxxVz1xWzA7mXP+ZZjmKaOfAwYp1KYKXQ/xFMHKJZDpal8qg0HvK+zQMMw244px94ORDrzrm4eC5XwTLNAjDsDw6Rh9Km6xLS86fMs86qqJhVUVU02HtJ0xa0pCUJKZaUITqLjOZcZzNXKxHG8RqK+pNkmYoCTIQD+GVTU6OGRTygS/s5CEBSiqYrimLUtVnhosfCSaHSuxF/xv47jXGRNku9ut7dux+OvOMSVO27+e3TVme/UPF8YjqUv0GnkDQgiupG/LngrktqLDZgH66Hfe/aM5E4NY7Bzr6jfv8dTckTAUA71TyJJP1GvhT1xjmQHcgDn9EfwtGQJ2znycADnp11do4rmAp94Gm1TbkTc/rxxVMgA2AP10HxfSKKnvufNz6ON+vui2REb3rA13ua/971NyDTpjJRJ0tbtcctrfBvOMdc1rktuX1PTZuXwLCLBExQob358qEaX1/wANyT9CVJ6fLv2HvPpGFNmvZ7Ne79Pd07C+vcfBXtScUuAUzbXlSbrmOV3Ylt+b5HnTr0TlyZICkpfXCtFRckkyea+D9qyksPrWiHEc3MIWHEIri2b/AA2y1namUnE6UU+JJlqRS4xSJRKr6csSgTFNw1dOlX4jTVIWhIMz2KpE2YZo5RlPxEzFkqoCsNqlVFAqYldVhFWpUyhqACAsoS5VSVC02FRTFCnCPbJny0CUc7vADtJcO+0Zlpc1ynFmX5iljLJzRkyYvNieZfedUttMQO4EImcniXEK+xTiCQWHkqbZjG4CZB+XsaU568PceyFiApsTle3oKlaxhuL06Vfc65KQFFF3NNVy0qHtqScRMSypklU+n4J69y8j5/wLPdAajDJvsa6nQg4jhM9afvlEpRKQtgwqKWYpP9jVyQZagUompkT+OQj6nirwqy3xUy67JJ4wlmMYDzsknbLTao+Sx6mykOsqNC9BvlLYmEuUtLEay2kFTMSzDRcNqn4+eAeSftBZKqcq5rpk02JUyaipytmmmp5S8Xyxi65JRLqqWYsJVUYdUKTKRjGDTJsulxWmloBXTV1Nh+IUPc+TM6YvknFpeJYbMMyRMKJeI4dMWoUuIUwU5lzAHEuegFRpapKVTKaYo2mSZk+ROw/51yHPchZlmGWJ/DpZj4B0dx1rvOQ8wg3Cr7LMIJwpT76CjG0+8aKkIcQoLh4htmJZeYa/Nj4reGmbvBnPeNeH+dqRNHjGDTv7KokKUvD8YwyaVnD8cwietMtVTheJSUe1p5i5cuokrE2jrZFNX0tVSyN88t5iwzNOD0mNYTMVNpapJ4kLAE6lqEcPtqOpSCUy6inUeFaUqUhSeGdKXMkzJUxfyn7PcOjahUm6qIoO8TUg91XM1oabY66NagX4ypuTqHutf1axtH3mfbpe5vtyY3t00NjHBUtCT8ak6qr3RU1Ar9406bW8Nb0V5IHAk6BuIsNW0D9NdvOAYNvpv7jblFEwjKVAFJVcak7AkWFBTpSnOuJE1M5QP4uHnwvv3JPN7jto1bM4G6h6No7/AKxFWlKUgJSkUSLAAUvfQD9a4yEqUVB1KLvqSdjzJi17jsf/AMPw25RDcFUkdFg87/4188Zqf3fKL9xs/Dp5P7384tbopX+1+dMZksukDcAP5vFPkkg+awYtztiL6pB/Xp+qYzpX7+llfw+u5i9IfXkof+H9T6nnFtd08lYzJf50+X/gVBJuB2b/AHS/y93KID+/9/GdL38vnFdj/gHwVFucFQetL+IUPwFsZsu3D2HvDRa34f8AZPuUD+vrHofsicRUcMu0Lw8ncU4puUzeZf5ITohwNNpl+aQZS3ExClEJ+yy2ZPy+bRAIUS1AK7g953CNkvsp59R4d+OeRcXqZipeGYriX7LYuRMEtCaHMqRhcufUKUQn7th+IzqDFKgEKJl0KuAe04SOAeKmAnMOR8dpJaQqqpaYYpSOkqV7fDSqqVLlgX9pUU8ufSo/1p4c8LxsrY/QrHn3DCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEYqfbLcVmuG3YfzlJGn3GZvxczRlThpK/crCXAy/Gu5un63UA+8MG7lzKc1lr6xRsPTKFZdUQ+lp3g3iJXCjyzUygWmV86RRoY6AqNRNJGpSZNPMQdnWl7Fj1d4wYoMOyVWSUkibitTS4dLbXhUs1c8kC/Aaelmy1GweYkF+LhOl+1oOfdH9fwxrirU9z8Y04V+c/7XxEXBH3h5/Q4g/d8h8VRCv8AMfL4CJze3gj6LpiGZt5/KI1apbX8TekTm9U/2V4xzqt+aYhVqny/8Bi4J0RTmj6jEStFdjECtT3PxjrXi1k85ly6Y6CaW7N5GH4uHQ2ApyJgyEmOgwnVSw2lMTDpTVZeY9y2lSnyDbLWEqY6KYatdmFnYvu/ePT7+i0+1Yn7P/jkjImbMSp6Lww8Zp2HZexeorp5p6PLmcpS1ycoZmXPV/YU1LUT6iblzG508yKeXQ4pS4rWVUqnwIJV47beFRSpGtdyCBe33hSlT941pc1BlUgKdru7jRr9dPR7PsI/WcldyCWIJBBDFwwLg7h/Lo15iHAoddeYI5jne1NdKjECkEH+e3N+ly7b8ok10+vPtcmw1iXDvllV6ltX3huk/wASf+8ka66i9kTSZxlljdB1HI8x821EXhKgoBSSCCKgjQjCPo8iLg3B5jmI7S4K8H868fOKeSeEHDyXmYZsz1O4eTy8LChBy5hQXETOeTV4f/hpNIZWxGTibRN1NQEFEFpDr5aac+hhWGVeM4hSYZRI46mrmplIeyEA3mTph/dlSZYVNmK2QhTAlgeFeIuf8ueF2Scx5+zZVfdMCyzhs3EKspY1FXNBTKosNoZZ/wA9iGKVs2nw+gk2EyqqZQWpEvjWnfR7M3Z7yH2XeDuUODXDyGUmT5dg0OzOcRDTDc1zZmWO92ufZsni2EIQ7NJzFJ75SO83AQLUDKIMol8uhGm9wcCwWjy/hdNhdCn+ykJeZNUAJlTULYzqmbwhjMmqDtcIQESk/glpA/MR4weK2Z/GnxAx7xCzZOBr8Xn8FFh8qZNXRYFg1OpacMwLDRNUpSKLD5CuHiLLqqpdTX1HFVVdRMX5r7cXbJHBeXq4XcOJgyrinPoL3s0mrKkuHIEljEVYigC2tk5nmzKlLlEOtRVK4QidRTSS9J0xmz/gj4QftjUDM2YpChlihnlNLSrBSMerZKvxyiQpKxhtKscNVMAAqpwNFLUeCrMnTPxo8WhlGQctZfnpOZa2SFVNUhl/1FRzQOCaxSUHEapBJpZZJNNK/wAsmIHHSCdgmTMYiKiHoqKiHoqKinnYiKiYl1x+JiYl9anX34iIeUt55955anXnXFrcccWVqWpR7yt41U0uVLRJky0SpUpCZcuVLQlCJctACES0S0gIloQlISlCQlISGADMNKRPVNWubNmLmTJilTJkxalTFzJi1FS5i1rJUta1EqWtRKlKJKiSXi/QsXSl+XnqDfYiu4pWm9h86bK1bX5W7HY31G73fMlzWAc2tf6056aM53N9YjQKXsDz5Wpp5mpFK6m9MJckEszHl77N52Di2gjPRN699bm+u4107aARdmo4ilVH1NfzAFfE74w10/T3DnpyPkR7gIyEzuttObHX4NoOdomJjxrc2FgTUdampr5A/OsJp+bjmwt8SImFQwDnt8AN/R/J4LjxfUE8ya15/TYbmvImm/g4+VvnA1BNweh8+lufI9NIgux381utf8fA64nRT2/L7hft9GIFzjz3332J1059zpvaIiMqCK+Vxr6UtU60BPljMlym0D6eXX16A2taMZc1t7bE69fXmWYWOxiwxEXYgHT9frpyBJxnSpJd2fv8Db3XJ3jBmzX3YPfUnkXfbn8L/iueR+JWbuFmbZPnrI07iZFmSSRAfg4tg95p5pRAiZdMIZRDMwlUwZBhphLolK4aLh1rbcTQIUmHGcuYTmXCqvBcao5dbh9YjgnSpjBSFBzLqJEwDikVMhX9pT1EsiZJWEqSRcGfCMwYplvFKXGMGq5lHX0cwLlTEE8K06TJE6USUT6acAZc+RMdExBKVB7p2V+zD2k8r9pnh0zmiVpYleapOYeXZ6yol5xbkinam1rbfhFvJS5ESKcpadi5LGVdq0h+XxLxmUsj20edviV4eYl4dY+vDagzKrC6sTKjBMUKQlNdRpUApE0JJTLraQqRKrJTJ/EZdRLQKeokKV6CeHHiBh3iDgSMRpgimxKk9nT4zhgUoqoqspJC5ZWAqZRVQSqbSTXU6QuQtRnyJwFy498K2eI2V3X5ewk5rkTb0XInUqS2uMbp72Jkjy1gJLccEn7J31tpYmHuHC61Driw752/bW+zPS/aD8NZ9ZglHLPifkilrMTyXUpVKkzMXkhIqMSyfVTZoEtcjGkSnwtU6bIl0WOoopy6qnoZ+KJqNkvCrPkzJePIlVc1X9QYtMlU+KyyFKTTLJ4JGJy0pdQXSFX+UcCVqm0ZmoEuZORTmXipiEqbUttxKkOILiVoWkoWhYJCkrSoApUlQIUkgFJBBAOPzaqlTZMybJnSlyZ0lapM2TNQqXNlTJRKFy5ktYC5cxCgUrQpIUlQKSAQQN7pagtKFJKVJWUqSpJCkqTqlSSCQQpKgQQWILiLY7tXUlR/4aflXqcZMsMA2jJ96gYfXz+ukW5f3uV9OdqfjXGXL0Pv7bfP6aA0G91F9mcAe9/SLc593+6n64zkfmHn8DFNx2PxTEBwgJPOiz1oDT8KYzkaJOw4Yv8A3k/7PwB+MWx3f+1+eM2WGSObMfJ4p/5C/fjDe6Lc7Wo6JA/Xr+r4zZTfj58R+H84vSW9CfK36Hz7iLa7p5K/XyxmS/zpPb/wGCdRzt3/ACl/l9AtAf3/AL+M6Xv5fOK7H/APgqLc4QK8xS3gCfx8dcZssPw9gfd+sW/u9gfepvkYhB52HebfYWpt5hSHmnEmim3W1d9taTspC0hQOxAOPoU02ZImyp0lZlzZM1E2UtJZSJktSVoWk7FKgCDsRCalKwqWsBSVoUlSTopJStKgehBY9I2p+EudmuI/DHIWemi2FZpypJJvFttKKm4aZRMCyZrBBRuowMyTFwaidVsKudcfpd8Mc3S8++HeSs5S/ZhWZMs4PilTLlKK0U9fUUUo4jSBRuo0deKmlUbuqSS51jzYzNhCsBzDjWDK4iMOxKrpZalhlTKeXOV92nEB29tTmVNA5LEdh451Hw4YQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEI1n/8ApA2fmnJz2b+F7EXV+Dlue8+zaBCyAlqZxUjy7l6LW2DRZWuU5nZaWoVb7jyUH/SLp034r1QKsJokqulFTVTEvstUqVKURv8A5ueByuzvGuHj1XAzcvYYlX4kSq6vmofaYunp5CiHYv7KpAcWYtqY1yWtv7I/DHTitT3PxjXZX5z/ALXxEXBH3h+tsQD8p5HQ9iP1iJevl+sTWzp/c+RUDiGZt5/XuiIg8SehIPdv4RPa1T/eH4/Sv6tjHVbi68J8hb4t6xArY8in5JPzi4I+6joGyfCo/LEa/wB7z+cQkXPVRH16xNbFU16qFPEj8sQK18h8BFFliCCRwlJBBIOgDgi452v2jxRxcycco5lVEwTRTJJ2XY6ACTVuGfKgY2ABoC2IdxxLsOhVUiEiGUJWtTLndyJS+NL/AL6fwqZn3/ERoXbTmC0frt/o1ftWD7SPgPQ4ZmbFJdV4q+FSKHKWdhNdNdjWHIplIytnRaSpaZ6sdw6lm0eLVEpQWvMmEYzUTKWjpaygRN6zaeB3OorY18wNf7QpS17UxeQ7vobOR3ex0uwY9WaPRpE0ixY6N1f6256WJic29oLm1tzToaXHPQ6A74hVL1NtfrTqGv1IfbJCgpy+t3739+nIXi4w0T7o0NS0q5H8B/iTtQ/vDwNr4iLsAdtO3Ly9xcdsiTOMshKroPqk3uLOzm/NizkRtM+wv7LjGX8kZp7VmapQj9u56ejcj8LnoxIU9BZJlMahvNeYYBskoYOZszQYkTUU4hMciCypHJhVIlk8eMfsB4R5eEijqMxVMr+2rCukw8rF00kpQFROQNvb1CfYhRAWE0ywlpc08fjV/SXeNy8XzLgfgfgOIqOF5Zl0uZs6oplNKqsxYjTKVgWFVUwMqaMGwao/rRchClUqqjHaZU5K63DJYpc0XaM43yns9cIczcSZkhiLjoJlqU5VlD7wYTPc3TJLyJJK+9X3hYC2XpnMwwHIlqSy6ZxTKFGHttB4cZJq/EHN2GZbplLlSZylVeKVaEFZocIpVINbUt+ULIXLpqb2hTLXW1NNKWoCZHjt4h5zpchZUxLMVQlE2dJSKXDKRawgVuK1KVijpncKKAULqKn2YMxNHT1M1AJlxqzZgzfPc6ZinObczzSJnOYcxTKKm04mcYtTkRGR0W4XXnFEmiEAkNsMN91mGYQ3DsIbYabQj1IocGocGw6jwnDKaXSYfh9NKpKSmlJCZcmTJSEoSANVG6lzC6psxS5kwqWtSj5mVmL1uM19XimJVMyrxCvqJlVV1M1RVMmzpquNai7gC4ShCQEIQEy0JCEpBqQsXSlT9b/IDnevXxsmSjdw40trYW3+N9riKy52jfG3lv5dxF9YjK0odafiBS3Pem40FsYK5LuWte+1tT8bgxmy52lw+vmW5NpbpvrF4ZjiKX2sL9eleYsKfLGFMp3ezuP5ae52jLROZr/WxF/oHVg4uKI8Cl6AdK032Tr6jGKqnbTXb57n0cfrOmo8+2pHy7EbG8SkzAU+9XkdKeiMWewJ5egv74k+8Nvfu/yIgqYCla08qk+qf64exV9N+sDUO+pto7fIAxDcj7WPhtz6V3voPxkTT23c67cuoHKI1Tzcgt3bydy/TYcuttejSa3+uu40rzNeY8K5SKdmLMPLS/X4a894xlzX1L7/ABbXk4BfmNWaLO/GfzbEHa3PTz6fPGdLkgWLBty3O+9ratc6xiTJ1yHNy439x9Pq1hiYsEKvzB2Op8/r+ebLlOWu3xb5dHYM55DCmTXPfcX9LF+vnpt3N2aO0TO+zhxbkOfpeqJipC481KM8yBl5xtvMGUYx9H7Rh/dijS5jL0gTSRuPIUlqawkMldIV2JbXxPxF8PqLxCypXYHPEuVXpQqrwWtWhJVQ4pKQfu6+I/iFPPJNNWJQQqZTTZhT/aJlqTyzw+z3WZBzRRY3TmZMolKTS4zRJUUiuwuatP3iWQ5SZ8hhVUalAhFTLl8X9mqYFbXkoncpzLJZPmOQxsPM5HmCUy6dyaZQi0uwswlU0hmY+XR0M6glLjEXCRLL7K0mim1pI1x5a1tHVYdWVeH10iZTVtBVVFFWU01JTNp6qlmrkVEiYkgFK5U6WuWsEOFJIj01o6ymxCkpa+inS6mjrqaRWUlRKUFS59NUykzpE6WoEhSJspaFpIJBSoGMbPagyAnKmdxmGXw6GpNnAPxxSyAlqGnkOpv9rMFAr3BGF5mZIUe6HnouMS2gJYUB+eb+kW8DZfhl4wIz5gVDKpMp+LCKzGeClliXT4fnOjXITmimVKT+GQMUVVUeYpSzwS6iqxLFZVPLRLoFpTu94HZuVj+WVYPWTlzcSy3wUrzSVLn4ZOCjh00KP5zTCXNolWKkSqenUtRVNBPll0mljWgPQ0URT1AGvM10pjQJGrczblYG3k4Md2biztfXlr8/4xbnDfvV0qa9AKbdadNcZkoWNtWB63d/QEdxa8Bo3IBPqSfSx5xb3aAm/IdKAV18CmvOlfDNQL6de72HwPrFPkHIvZy3noNLxAetrr3L15qJrptY+FqXxmgWAG5YeQ/iPQxUdNh6cIt8B/JxFsdNCd6d4/qnUXxnI0A6j3sfnA+4Aepct9PvpEB0jvEcqAfT52/DGXJdieZJPezD4+sXCwJ/1fibe74Ra3Tr0AHqfyOM6WPxDk6vcOEfP+TiFwotsCPQFvO3xi3vKNFHofqQfWn61xmIGvl8/wBQfOKmwUOQSB/GLc7qfP8A5afUj1xnS7Hyb4e9h5ttAflI6J95JHq43tFvd/e8APQ1/H9GoGXKGu9yfRI/SKq1L3ZJPpofeQR0flGwP7OzNicydmyUSsqKn8k5ozNlh8qPxFL0SzmiGUBr7tMLmRphKh8JUw4KlSVU90vsJZlTj3gBheHFRVOyjmLMGXJpUfxKTMqJWYqdQBb8CafH5UlJA4SqSsOVJWBo7464YaDP9VUD8mLYdh+IIbQFEtWHTAf9YzKBayOSwdCI9043JjpyGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCNM322GcXs0duzMMnWoLa4fcOeHeToW4+FmJl8Znp1NhUd2OzpFpINSFVOhGNevEioM7Ms+WdKWjpadPZSFVJ/wCapVGoHjLVmpzvUSiXFDhtDRp3YKlqriO4XWr1MYnEG58CPmB9cdefXrHUpsR9WZ9uw+ETUH4q8yD5EAfniEuARsHA9QSfh9a2L1Fr3H6fGJ7ZoANyDToQbedfr6xr0+t7fOI16vpcH129+sTmzQ+Br6gg+la/KorUYq+fMN7wR9fpGOoFtb6+YJ3vy1+MT0EUtsDX+6dvX6YjLvfe/reIle6xHUEf+mJzRNPE19UjTxUD671xAqxblb3lvc3wixbEf7P6kX6Bvh0j5fP2UGc65YjZQQ0mPS39rk8S4e6IaZQ4Pue84EqUlmJSpUJE/CsJZeWsNrcQ2UxoX7OYTs7KB3BPY6G4PTq0bUfYx+0pin2WvHfK/iImbWzMoVswZb8SMGowJpxfJWLTZQxCbKpVqQmfieA1MqlzFg6UTaabOr8Ml4eqql0VfWy52PVxL0LEPQkS0tiJhXnId9lwd1xl5lZaeaXSoC21oUhQNgQoa4+jrd20uDrysXFyS0ftBwfGMNxvDMOxrBq6mxTB8YoaPFMKxKjX7WkxHDMQp5dXQV1LMAHtKarpZsqokTUgFcqYlRDGJLb53IpQVO2t6gXBrYEEDU4oxAIAOmm2+h5alla6MHj7CJhDEcnZ9idue+nO+jR9dk/Ls3ztmrLWTMvtpfn+b8wSfLEkZVUodm0+mMNKpc0sJClKQuMi2EKKQV0Pwg4vk0q6ufIpZABnVM6VTygQf85OmCXLfdipY1GjsdAcfGcdoMvYLi+P4osy8MwPC6/GMQmJI4kUWGUk2sq1h2SFJkSZihxEJBYKtH9Erg5wzy7wX4XcPuE2VELGX+HmUJFlGWuvJQmKj0ySXQ8G7NY4NjuGYziJbfmsyWj/AEa4+NfcSAkhKdysNoJGF4fRYdTA+xoqaTTIJbiWJSEpVMW1uOaoGYtrFa1ER+WHPWcMV8Qc55pzvjaknFM1Y9ieO1ctClKk0ysRq5tRLoaYq/F90oJK5dFSJV+JNNTykqJIJjB17U3je5m7jLJ+EcseUJDwqlbUTNQHFBEZnXNENDzGLWW0qKFNSnL65NBQ7i0pfZjYueN3ZcbK/Rr7LGR04TkyrzfUoBrs11K0Uh4Q8nBcMmzKeSOIhwqrr01s6YkEoXIlUKrLSoDza+01nNWK5wpcqUyyKHK9KhdVc8M3GMTly6iaW/KU0tAaSTLUQFonTa1LlCkmMaMNGXBB0Guvypt56W5Y2YmSm25sNdNG0OjkjXbSNcZc0Br77czYNzB3v83v0PGbVpz2rfSoFq78rDW+MCZId7DS3J92v8tthpmy51g56c72e3QbW3NhreGI2m/Pz/4aa2N+pOmMBdOQSw23D78nPLr3G2YiboxG36WOunS/J3i6NR+xPjv56Vr8r02xirk809iPncX1015CMhE9mv6nXzZm5P8ApE9EeOe24A1vShSPl+OIFSASdPRjbqSH8ifhE4qPNr2bXyPvaJAjhY1FacwD/wAtsW+wHMev/qi8VHU+/wCYMfhjrGhv0IJN/wCzh7Acx6/+qBqBrc+Z91gIjrjxc18bA1FOXdpi9MkDqOQ/V29SPhEap/lycjTe+2uwiA7Hkix6fMC1vLntSgxOiSdks+pPyY6eZ7DeBc539fI3199mDE9otT0brU1/Q2oKc+gFLiuMtFOd7/T7W6bWDNYRjLm63Gt7n3nftFliI3W+lv18NxvodqUvjPlyG2a/e4Omr+v88WZOcFiOnU353PI/DeLFExYIN9q+I2raw6dN9s2XK0DPfuzEddeml+djgLmM/LqbOG7D03jYa9k9xxdz1wczFwknDpdm/CObMrkrynCoxGSs1vRkdAQ5SpSll2TTyGncMpSfdsIlsZJodtvvMOLXoB9qjJKcDzdh+a6RITSZrpVprEBLCVjOFplSZ0xwAAisoZlFMALrNRJrJiiy0hO+H2Ys4qxnKlfleqWV1WVqpBpFlTmZhGJqmzpMsgkq4qStl1kskMgU86klpDoUVe3O0blVrNPC6fqDQVHZdT/lNAOjVv8AZgWJglVLqbdk7scFJrQuhh4gqaTjyT+3h4Z0viP9nDOc4U/tMZyCiV4hYJUJB46f9nkTTjyF8P4l09RleoxpK5RIlipRR1awpVJLEb1+DuPzMCz3hSSvhpcaJwSsQdFitUn7mQ9kzEYhLpClbE+zM2WGE1UYoXVVJ0NSdyD8NhSvXTkTQG1/zdoHw+N+Z2A5c943uIJ82H625s/MWEW9ehFrkDlfUgX8evxa2xmy0sBrufLkdd332i4/r6Cw59dz8zb3D3q21BPrWnhUX8xXQYzZQue4HmLkH0t2LavFA251IHYDUfE6Pr1eA8dRTQ0Brr3B+dqDrpTGWkXSL8/ruB7x53D947mzNuS9vQ+7WLa4b6XsPH9DXwxmpFgHsAS/v5+WsUto/wC8bi9hYH42fvFudP3tKEq+ZoKbadT90864zZQZIO5AP113frFyiW7EB35D9XL9vK3OG58b+QqfoRjNlDmNBr3NvUC/vvFAHB8gOVyPo73veLc7oRofh9bE+tDXGagWDbn5tF6jY7OT5EaevD7+l7e8bE7mtPMgD17o9dgK4zUb20a773HwP08GDs+4H+6Bvpqz6aHtFudNa1tRVPIDXGbKAAuNQfer+O3MxQ6l7hwPUj9COdgO2YP2Vk6dclfGXLy3CWoWYZOnLLP7rbkfDT6BinAP4nUyyDSroyMer/8ARu4tMXhnirgaphMqmr8rYtJlE/hRMrafGaOpmJDazE4fSpUX/wC6T0jVb7SFIlNVlavCWVNk4rSLVuUyJtHNlp7JNRNI5cZjLfj05jWSGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCNFb2oc9GYO312kY1CypEJm6UyNI7wUEKy5k/LcheSNQB9olzyinUKUoGmmNaM7TPbZoxdWwny5X/AN1TyZR96CLRpN4mzhPzzmBYuE1kmR/9xR09Ooa/3pZ5eseEEGhHKtvBW/qT6Y4edvQ9xZvQD1jgC7B97P3BZvQD1icjQc6fIH8K4iP5j1YPazhtOpuWvY84sWLA8j9H3RPbNxzBNPMWp/eoT/WmIVflPaIVgsez9gDp7omtn6VpzI2+vpjHWNNLFn2117W98RLAuNr3/wAQH6W1i4NEd0b1Iv0I/wDer0v1xEdebW9LfBv5xCoEsdPw6dbE+57a26RNaPWoCb73SbeZ1r0PWkKgz937vr6Ee/1sIBH1dxf0b3+s5s0ppZVL7A2+p16+NMdYu/MRCXI7Ai3MF/RtO3r5B7QuSDLJlD51lzQTBTd0Qs5S2juhmbJQSxGKCfhpM2W1BxQCVCKh1uLW45GCmdTTOMezNyi6BZ+E6jiN/wAJLdmDWj9I/wDRAfaoVnTI2JfZszhiE6dmbw3olYx4fVNZUe2mYn4eTalEqswGWZhM/wBpkrE6mUmjllcyWnL+L0FDRyqekwBQPnJp+lyanbcU1sajTc1saigOJyCNBbqGIZtRt01BtcR7YomG3a9+pfr0cMTfXSMmPskOHMHxM7evBBqZQ32uUZEjJ/xPjWSkEJjck5fmEwyrEkqCgkQed3Msxlwe/wC57ie4paVp5l4e0Ka7NuFcYKpdKqdXKSdlU0lcyQeyar2Ci9/wgAh41a+2xnCdlP7NniEqknexrsySMNyfTzAWJp8wYnS0uMygxD+3y8MXkAhmMx1AhJSreUejoeXwsTHxay3CQEM9FxK7VQxCNrfdVcjRltatQDTWhNNqpMmZUTpVPJDzZ8yXJlA7zJqwiWPNSgI/O7OnS6eVNnzS0qRLXOmHlLlpK1nUaJSTqO8aYvEHiDMuJPEPO/ECcOBUyznm3MGZ4tKVlTbC51NYmPRBsFVCmEgGXm4ODaACWoSHaaQEIQAPajLuXqXLeXcDy9RJamwXCcPwuUWZcwUVJKp1TpoDgzp65ap05bkqmzFrUSpRMeOuP47U5ix/GserFPU4zitfic0BRKZZrKmZUJky3ZpUlC0yZKABwSpaEgfh4RZ4eMpS4Btvvbr5jSopagxmTZDvbnbUaG/6nTubxhondunu59zfYkO7WvLEbpfXqK9RSmhNuh0FxjCXJPLdh27l3Yerl2N4zETnAvyZrnXfsb6ciSLxd2Y7kSQAdaX515bEVPOwOMVckFw2vkdfR9b7APyjJRP63+XJrAvfsTFybjhz6VsSa38vXQgg2virp+Y62fp5uzWfbtGQmfo5fc6/CxJJfTzG0S0R4FisAV/l6c7itNfAX1xCqmf93zYv8/jEongvsw13fyfS1vgIr/bU8x/vJxH91P8AdPof1iQT9yq/f5Ew+2pH7w9U4fdTyPof1gZ3JXdz8GMR1xw071aVp938L8tSD6YkFO23oDf0AiNU8bbhww5fz2G9ohuxwNaK8zQV01A8ufPpjITTtYB/XbU9ex6CIlT9htzOzPrfmUtvaLY9Gg1+KvmKHS1vGlR1FgLZCJLNa/Qd/IWe3axMYy5z3vytqA242Op8zZw4tL8YL3rXw6emlhoKA2JFMuXJJ2LM+40bU+rs29mvGKub1Zrtvo1ztb3RZYiMF71FtxYEm5+t+laWOM6VIfa/YhtAPdpv3uIxJk5xbqz207dOTAWHSPevswOJkXkntd5Rk6IkolfEmQ5nyLN2FKPu3veS5eZ5O4hJPcEU3P8ALcsaZeKfeJhomNYbKftS+/0V9prLcnGfCXFqwy+Kry5XYbjlItKfxIKKkYZVpJ1MpVBiNUpaPymZKkTFD+zS3d32cMwzcH8VMLpAvhpsw0WI4NVILsoKpziFKQHCRMFdh9OlKmJEuZNQktMvtIRzDEZDxMHEtpehoth2EiWXBVDzDyFNPtLFbpcQ4ttYBFQqxtjyvr6CjxWgrsLxGnl1mH4nRVWHV9JOHFJq6GukTKWrppqbcUqop5syTMDh0LUHj0xkzptPOk1Ehapc+nmy58mYgsqXOkrTMlTEk2CkLSlSSdCBGEWeQC5PNppKHCVLlcxjZctSqBRMDEuwxJFqFSmq0pqepp+SDM2X52V8z5iyxUKUufl3HsXwOctQZS5mEYhUYetSgAGUpVOSWDOWAA09MMNrE4jQUOIS0gJraOmrEAOQPvclE5IHYLsQ5F35xYHVWAGoHKt1G+96DU8iTuMfPQGfr15fAm9ttIzSwPQe/wCdztre0W9ZFSdgCTUW0oK9TfTrblmygWHPTU6na5s1hyNt3czC/T1N3HRrNfXbSLe8q/yNTuqpPjuDf+IUpjLlg8Tv5t2CW+fcPvDQe/m+wtvd+Z1Yavb3FD4vAkV5moHTc77HGYkP2JCWHJx8LesVFyOQAffqfJyduTxbnCKU0oeegFa/OtdLg6YzkAAW5W2d7fDTfTUxUnRtwT3J19zgbuG5PbnTbW/P+0aGp8KnyPPGZLDOeZDBuQAa3PSCRpbVz5AWI8z8Gi3um41p8Sjf0rz1PpjNQLpH0+vxirflDcydrEh/mNi/lFudpXlUgeBArvsCSL10vvjMRptr/D5P56CKh7O9gSW3d203Z+0W9ymh3rX+8fxOM6WLdmHp/Fj8YoG1bcm+rAA+rkHlq1tcmfstJwpnitxJkPfomZ8P2pwpupuqR5klcElVND3RP1iuo79N8ejP9HNiSpPiNn3BgpkV+SZGJqTupWE47h9MlTb8IxtSXu3Fs99eftGUwXlvL9Y15GNLpgf/AOcoKiaR5miB6tGcLHr5GoMMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEaAXbmjlzDtn9qp9w1LfaA4rwIIr9yW50nEtbGmqEQqRpqmg0rjVvMyuLMONl3bFK5J/2KiYgD0SI0VzuszM3ZnUdU47iiR/8A2aybLHuQ0eYknTw+mteWop05Y46oXJ6/HRvQv19Y4moO55+VlCze9+vPWJqDXyOvQ1oPWhp8qjEStQRu+mvcdxYnYREfxIPZz5XI/T6MTWySAOlvFNaV6WviM2JbTbsbiIy7DkPn59PV4ntq0PLn4UrT1tzBvXGMoaj4d+uj7P3iE2DHX5g2PoWvsUt0nMm9LA0oATuLjTzO9bU6QHy52ffXXty56M0QqFjqzvzLEXb4bMO95zaqEai4URpY2NeVNac611GI1jfmG68ww66fweIxuLdD57c309+jxObIrTb7vPw9QfzNsY6w47X+voxEoXP+8O41a29ifUxDnsjgczySZyGZpKoOawjkM8UgFxpdlMxDRWCgPwsQ2zEsKUCEvNIWQUimLULKCladUnyIL2Ouo4gbaR2H4Q+KWZ/BLxPyV4q5NnplZhyTjlPi1IiZMmyqfEKbhXTYpg1cuQpE7+rMewior8FxREtaVrw/EKlCSFEEYyswyePytPZnl6aI7sbK4pcO4ruqSl9qiXIaKbSr4vcRcMtqKhyDQsuoJNa4+ykpmJCkkjiDgg3Gx8wzGzR+1/we8VcreNXhnkvxUybUioy9nXA6fF6NJnSp8+gnlS6bE8FrlyD7MYpgWK09bg2KSgB7LEaCplFIKWjNx7AaVpmHa/4hzFxAWmRdnrNEW0sgHuxEbxA4ZyxIBuO8uGi4yhGyFihuFdneE8kKzFWLKQPZYPPWG0Cl1dFLYciQpVg4NzaNR/6SLEFU/gflikSoj+sfE7B5K0/3pVPlnNtWSf8ADNkyXIs5Ta4jaY7SWYV5X7OfHzMTDim4mTcGeJ0fBLSTUTBjJc7MuUFA1TWOMOkrp8Ne/U0rjb3wyoE4p4kZAw6YkKlVmdMryJ4LEfd143RfebHVpAmFt2bd48FfEeuVhnh7nvEJZKZtJk7Ms+SQSCKhGDVn3e4uHn+zDjR3jTVh4ugFFct/Cg+9rUeHnj2kmSX0uw110fpe4t10tHj2ic1j5X0bS/MdfIjSL1DxwtVV9zXw/mpavWhF96Ya5OxG3LvruNRfludYzETdLuH+n/XVrbxeWI3Q963j4/zWqNTzB0pXGGundh077227W69YyUzjYufWzevk2w1vFzajyP3j5n8e9Xnev0OMVdOC7i1/P3NdtBr1jJTPu+3dzppz38nuNYntzDT4r+Nr+YrQX33xjGm7nf56MRvfvdonTP2cjTr8eW7PEtEf/NalrmnpX6b761iMgvoPfoNNND9cokE4WLhvN/UW9A3KKojhuoU6G/zXi0yDsn3q/Q/CL/b21/5vr0aPwx4vRQp439Ar6bYewO6f/F+nyHSBnjmf979NfSKS4/8AmseppXwr54vTIL/lHLS/vF3iwzhzAew1fk30NIiOTDfvf8Qtp1NL03GnPEopyGd7dPSzD62aIlTxu56P6v57HybSLe7Hg/vddaC3P4q+BO+thjJRT3snW2ndtgPntYxAuft9cu55873GkWt+OF6q1qKWvborf0IrvjKRTtqNGb9NLe5g12ZsZc7mX18/JvotdtbNER1RTvAUrShPWlq8tN6W0OMyXJ5BtOvnoPXdhfWMZc2zu3NixN/Kz395YuI7a7M+a3MrdpTs/wA9Q4UIl/GnhiuKKSarlr+dJNCTNoUJJL8tfimfBw1ChUHiXiXhScT8N8/USkgmoyZmYSnGlSjBq2bSqJNv7Oplyl7XSzgsY5R4dYmrDvEPI1alRCZGb8uGaQ7mQvGKOVUpcX/HTzJqCdL3BGu6s8qhIrQiqa6WCviV531FNzapPi4LgHnHsKbEjlGHXjFDJgeKXECHAIT/AJVziJSNgiNjHI5CQOQTEhItcUqSbH8u/wBp7CRg32jvG+iQOFH/ALS811stLcIRKxfE5+Ly0JZvwol16UpAuUpTc3VHof4d1BqsiZRnk/i/qDDpKi5PEump00q1E8+KSSeSjpy6rdVtW/1JFehtS1d9TUW6SQLi1umwG3JjuNW6a8x82G/1/EXAiCtVAdBudNE17t7itxTWtNBQVzUhhroGt118tfc8XNcJ6382floBfzvFudVXTfa2/wDS3iKVtfLlJYP6a6egd9+R2vAuXv68gzORYuQ1t2YveIDyrUpvW42Gx8TWleY0qaZcoOR0D2O55dQCH7FwbRVLlyzuW2e7kt5dQO8W51Wt76b35725HWvnjNQOnXpaw+fmA2kUN3630swsOw1826mLe6dwfTS3wjTzNfDnjNlpYAer9bnTfsOtovA1HkNO6m9WsOTgNFvcNSa1pUDyFyfkeeltcZksany+vQesUNySNdr87Wba59x5vbnSb61p4/eNd+VL8wDuRjMQA4Fuemrbt6fxiuxI0sBoGAs+o3dvKLe6fvHlW3hb5E19NMZyAbdfiT+gHqYoA3MOydtTc/He4eMivsvP/wAwGcL1I4Oz8GmlRnTh+fW9D4DTG/n9Hd/+ejM+oB8L8cIfl+1mSB8ifPeOh/tEf9isM1/7VUQv0wnHD83jPJj2WjTOGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCP5+vbah1QvbK7VrSgQVdorjNEAHUJi+IWYItB8FpiAodKa41ZzICnMGOA6/1viCh1C6qaoX6Ai3UtaNFc5oKc25nBDPj+LqvuFV09Q9XfsR5+bGyKV8/Ctulhep5U1x8FYLjqG+bfBhzjiZvbl+Hu36sGHN9N5jRrbxHgbkHXX+tMQq0fl776HodxEY1IvbTkx+m7C2hia0r8xtY6+FqYiO13O937X7Fu4MRsQSPLqd/ewbvaJ7ZtS1rcyKaV2pTX+Y8jiFYv/LoPXTy7RCoXPViH0trZ+THQ2cRMaVfnvTqNjUitRYakioub4x1BvhyBB/Q63YG7MbRKDHcPbrfTt7hfoIuCToda3vQnum/Qa+FhzGIyNt/Qg/KIjY+6zgcrb6M+t+Yiag2F/ukA16Uppp3q3Na1p4YgI9/Lr35afwixYs9ufRruO2zdOV4mtquP5rgbAjXlqK7E2NKi2ICGJF/r6f9IiUHflz3bnpqDZzuw1BMeau0hkL9rShjPEsh1Lj5G39nnCWRVT8lUsrbiykUUVSp9ai4pFT9iinnXT7qCSUZtHN4VGSo/hU5SDsrcf7QHS6Wu8e0P9EP9qYZKztiX2b84YlJkZa8RKxeNeH1RWzPZIw3xAk0wl1+Ay5ymlJlZywunkGilTloCseweko6Ljr8wKlzsg//AEfSZNs9q7i9AKICo7s6TpxhRVSq4Lidwvq33eam4pxyxp3WlVrWuO4/CYgY9iCTqvB5pB6oraFw7t+8SwFmZuXpt/SRylTfBvJM9LkU3ifQIWG0TUZTzcOJ9glclKG3MwaMQdmftgQz0d2Tu0owwFKdRwP4nRoSknvKRLcoTaZutilytTMK4lCE1KyQmh7wGNw/CKoRTeKnhxOmEBAztlqWSdAajFqWnSSdAy5qSSWAZ3DR4O+LElVR4X+IctAJV+xmY5oA1Ip8KqahQDXJKZRAAuSQBrGmpDTCw+LlvQ/83T9UNfZZE7Y30DG+77i/La/dz5ClA21+vr1bYRe2I8Gnxaa1Pht3qdfHyJm/AvoX3/lZ2ufQD920KUn4fXr6Ns0XVmOpSivRWvhVW3I28K4iVI5aM7j+XxDxMmexu999O2nPf5sIuLUwI/eB89deStefyxjGQb2t2Y28rctWblE6Zw3IPMcn68vlyiciYDc8t6mg5fFpy1HzxCZAuOEvt/MD3fQmTOPPo4uOu2vqTuYkpmI/jGtqk1/5rXxEacDlbZv/AExeJwfXTQBwO+hPw0isJgCB8Z/3qfVdfXD7uOl/rk3pF3tyf3gO5L+d4GYAA0WfWv0USOuH3dOtrfWnDeHtj/efsSfgTFBUwT/HpyJ+fx4qKccgen0mLTOGxt2JY9LDXz0iM5MRoDXWwPpX4vy6YlEgacJ8wPn+sWGbu576dLcn8n3iA7MCa/FQeNetAe94/qpxOmQXDjRtveSw+fS8QKnAXfbQfT+nS0W16N1Pe3533t97XfrXUDE6ZATqG3fd32cX7huvOIFTuWvr1fbt0u+0Wp+PAr8d779P7Wg2rpXlTEjoRyJA/TsT5tzaInUv67/q3o8fdcD0vTrjtwRk0N3lxE34x8LpVDoQT31PzHPUhg2UppUhSnHUAUBNdBUEY4lnqtRS5JzlVTCEy6bKWZaiY+gRIwWumrJdgwSg23FtCI5PkqlXU5yyhTS/xTKnNWXKeWA4PHPxmilJZt3VbW7NpfeafcBUs1sVE+Ve93RvW5ruLlNBUY8TBYDsI9lzcnuYxBcbopMRxYz84gghOZItg3BHvIUNQqxufhcZWDyINDUUP5j/ALWlVLrftM+Ns6UXSjPuK0ZIL/2mGy6fDp42uJ9JMSRa4Ym0eg3hnLVK8P8AKKFAgnBaecAR+7UKmVCCO6JqdNY6gWok02H5Ene/+7S2lRQdAykjVuXrt6b7vqTHOufqRo+jX1PUbgekF1dPGmnSnwjal7kVN6m9yMtKXIFmFn2u4O9/TRj0Nb+avr36P/iEW9Zuan/E668uvLwGMxIYdrt8rfLuTqYp0Yudumo/W/TrEB1etNBpypoDqdTXzrU3NMuUki5N1HfZ+dg1m/TSLrB2/wANzoTq/kGBFrRb1qqfOlep8T/jTwGM2WASPJW2gsl/jbRuetBq/IOH3YgD9Lcm5mLe6oXPLptoNCdddKmtRYgDNQPd8d7HcaOLN5xfpzJA6n8SvoevMxAcIpTQ+e9yRroAaDn4Xy5adAe+nncd2B0taKC1xoLnTU2G578rvuGtzqt/FRFedk25HUg6UFN8ZktLnTkB9dPdA2YPoCDqe47a3HI7piA4aevyAqd/EaUJoNjjLQH13v6sBr5P5wFmfk+pFza/k515sNIyL+y6P/3gM3jnwdzAfXO3D63Sm39Mb/8A9HiG8aMz8/8A2X40PTNeSfm5PUmOhvtEf9isLF/+1FEb9cJxs3Hnt1B0jPNj2SjTSGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCNDL2k0jVlzt39pyXLT3DEcSo2fhOgKM0S2W5lSul7uNzYOE2BKqnXGsucJRlZmxhJH5qtS/OchE9JZtxMD7kRpH4hyPu+dcySyGKsRXP8qmXLqAR3E0E9+8eKmlbW5eVtem3hWgtji6g47X+uvLrHB1C56hx30LNu1+4D2ia2qh6n6pr+RxCRqNm9x5+vrESrEEae9iHHnt3LDWJqCAa7a+RrXzrW2ImsRvu+zaN5WGr9ALxrDEHR/lv9conNq0Olu71rqm3yvqTzocRLDjtf8AWI1cwNLjtuH5a928omoOnqKHcC9PpenkcYyxv5Hs/uboD1DREob+lvMeln0azWaJzSwoUqDbl+6RU7AWOtdqb6xkHd9WPfvEKhbvy5iwHWzswHXpNaVSx0sDrvodhrY03vYjESxf1I8mcfMctA+1mobcD1DBwednPTQagCYhR0JoTSnMEX8aEnS1AdjXEC0uH5e/6EREXIZ+VnJG4HUG76i5L713WoeLYehYpluIhYpl2HiYd5PfaeZeSpp5l1JstDralJWk17ySqoNsR31BIUCCDuORHbTzEZWF4rieAYrhuOYLX1WFYxg1fRYrhWKUM0yKzDsTw+ol1dBX0k0AmXU0lTKlVEmYx4JktCmPC0ffeyQa/wAy/tJZJkp5akS3iVw94j5ey0+64CIyDbk3+XjEMXFULkVCJyRGQTzawHHYmFDyEKbdaW52z4WVqU5mp0kgKq6SspSl2/tEShVbk8QUmlJTvcA3EfpVzb46UP2tPsCYd4oSlU6c15PzDlil8ScKp5Xsf6ozfQVErLmJTpVMCtMnDMaRmKhzBhSpUydJk4disuimTU1tFW09Pt5Z2y+3nPJGc8nPAOM5tynmTLDzZIAcZn8mjZS42SqwUpEWpJKqggmpIGNqcFxBWEYzhGLIPCvC8Uw/EkKv+FVDVyapJDXcGUCGvyjzCxnD04tg+LYUscSMUwyvw5aToUV1JOpVA90zSL25xomqefgYuJgYpK2omBiH4SJZWlTbrURDOqYfaWhRC0LbdQpKkKSFIUkgjvAg+19PVInypU6WoKlzkImy1JIUlSJiQtKgQWIKVJPECQQQQWaPGGdTrkzZkmYlSJkmYqVMSoEKTMlqKFoUCxSoFJDFiCCC1mubEwrT4q1pubaX1pawqK9K6DNTOt6nmOz97nR/UmApO4226dtG1ux7GLuzMiB962ouRUHlfYdb89sZKZ7b9Du3nzsNrFjq8RlAOmr2829wfQAcupuTUyr+9YEbn5XsfGmtgbYlEwH8wDl/kC7X2253Ooi3gIYg7WLkP21fTU/rE9EeDQFVCBzVXfrU/LkK4ueWbjm1228hcWt5PB1jc32Z3b3fyfkYkJjhaqqjf71deYJGmnlXlgZaC7Kt6A22sfrTWK+1UPgNbHqDy+jFX7cP4z6n/wB7FvsUbMfQfECK+2X09I/DHAarP/EfW5t42w9ijmPcfgkiHtl8x6RSVHUt3hfl3geupH65a4uEtAuVAD1HY2DdPf1GYouz9rm/TbqxtYxGXH0r8e/81QOu/X8dsHljYH08tBfrodWi38Z5uH6dQ4t8eWj3guzH+a3iRpY0ub1NK3F9RbFpnAaABrdbg7sTtbQ3aAQTvvq293v5adyCYtj0xN/iNthXf+9/Q7d6mIVT3cvz6XG3utfoWGl4QPVwH2tvtvztbTU2d+YG/wAXoTXexuLim1d9wMYyp2v8hps9+9xvs8XpST9dB6nRiSLesevvZ3ZbVnrtsdnyVBCnUSnO3+WrgSCot/5ASuZZ0ZeINQEtxcihrnQ0CSFUx034840MJ8Jc7z+PhVVYQcIS9nGNVMjCVpGl1SayZ3a4YFu3PAzCDi3ivkqSUlQpcW/rZVgQDg1PPxVCuQSmZRovZiRuwjc+ccJqAbU51CQb0reqj5062r5KgOWGpsI9W9IwuZ2mqJxm7NU2QrvomeY53HoWDXvJjJlFPpVW4PfS4CCTShG1MflJ8UscRmvxR8R8yyZgmycw58zdjUqY/EJsrFMfr66UsK3CkTkqcaghnBj0ny3RKw7LuA0CklKqHBsMo1I0IXT0UmUoaW4SguPXVx8e4sAEVFNT4W7oFgL+dRT7wxw5KWA17/E+T/xtH2hfl12uz7OW2Ye4mLe4v1v60pyoQB8xS9KjJloA9x67t+tub6Egix1e9y2oHfdxvzYvrEJ1VAb9COmpOoOn5igqTlITxEC3MnpozsRc+/qLVHM20bk+g12De7eLc6rb09LDTa1dj6DGchPL3bXBO9n0DPuIqeTvqOr7nnfTd76C0QHFH50Nb9SfIWqdCfGmXLSw6nTs1g30fcIqkaPsyraudB1/kNNYDqhuRa58NtNLj5DGYhOgAf17t8tyH3gdhZ7k6b3LvsNW3AHcQHVE2JAvTrcgm/oB1TyF8tA3+uXrc+RHlUc21udWAH5dHA2J5XeLc4oUr/FfrTYX5/M13Jxmy0sL9nHMuSfSw1a3aKO501sDfa537bM76teA6q5G33d/Ek11t8zfXGXLS5FtLiwO7BvMnVtAdou5aMTy2GjkdLh76DYxko9lrBOu8cM9zMD/AEEHwrj4Fw7B2Y5uyi+wOlUSt8i96G2PQf8Ao76OYvxZzfXgf2VL4dVlGthb2ldmXLM6Xf8Aw4fObnc7Rr99oqckZSweQWC5mY5E1Ox4ZGGYmhZblxVKPc8Z28ewsadQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIRpKe2Ty67l/2gPFiKcZLTOaJJw4zJCLUCBEsO5EkUlfeRspKZhJIyHJFfiYWKWONdvECQZeZ65TECdKpJyXGv+TS0EjW3EhY2uI078W6cyM84mtiBUyKCeg2HEDRSJJUD0mSlJ/2dWjGGhXU0018wfO2tr33xwg8+Yf683jrFQs4Fxdtbbj0iag6c/wAqC23K23gRiFQY/W7m+53vv3BiJYcdDvze4ffze4tYgxNQoEa6X8QeYG1tTppbESgxBG7D3+d+QY7lnEWH8SevwI2v6PExtexP5706Hztz2OIzr3uPP4to+8Ra/G/vv7/Vr6zkKre1TWviKWoQK2ptoKnXGOoMSNvr36/KImZ0+nY9NyCbXflyMxpVwa2NbUr4pvufDkACBiEhrcrcn1ZR2a7O78+URENbn31s2nQPZhbW8TkKvXXTTcGh57X3Oh5kYjIcN6d/r6eIiGPd/L3diLCxtExCqgdALjkN+Vq0NgdTawMJGvw+v423MWKD6WOo6d+h8+5YxKQve4071700qOVN9tCSaXhUOEg6jqPj3/VmiMh/kPeU+8ADsG1avJpo/kjiXwh4zyrvt5g4K8RssZ/h1w6HFRUykEpmsI9nDLaQ0FOOs5hy23HwBhkpIiHS1D99pDzro+zl3FDg+M4dXlREunrKebMa/wCBExPtAW2VLK5a+ctaraRuX9i3xzT4Y5xzT4a5nrly/DDx6y5U+HuaUT5qRQYHmGtlT5ORs8zETVIlyTljHapCcQqkzEmRgeIYnWexrJ9DR0x3PpfMYWYwcHMZfFsRsDHwsPHwEdCPNvwsbBxbKYiEjIaIaUpp5iIYcbeh3m1KbeaWhaFFCgRuklSVpSpJCkLSFJUCClSVAFKgRYpUCCCLEFxaO758idSz51NUSplPU006bT1EichUudInyFqlTpM2WsBcubKmJVLmS1gKQtKkqAUCI08PaS8J3+CnbB4oQTUucgMvcQ4//O1lZYQEwkTA55iYqOnggUoSENQ8vzmzmeVtwiUtmEagmm0NiGVDuOep/gJm8Zo8MsuzF1AnV2ByBlzEAS8yXNweXLk0ftiSVKmTsKVQT1TTxCaqaok8ftEp8s/HnKhyt4m5glJkGTQ43POY8PIDS1ysXmTJ9WJLAJTLk4omvp0ywB7JMpKQODgUrxGxMSACDXQnntf7vhUfIk1x3Yie36mz9y/v5ON46ZMsG/qN3521tqB2Di0XVqZbE9aG2m9adOe4qTpjJTPFr9tOfpsT3IZtozK1tz08rjmPVukXJuZDY8tPA9N9zb8MTJndX5v5an378zFnAfre/a3v8onImX83Sh/CqevLamwxKmd101Y2ctr35vr1eLeE+/49dOwfoIkomXUeGv8A3bdbYv8AbfTae/8AWLSkjZvL4bRUEzI/ePz/AARi4Tyd27kj5xRhyHoIGZE6q/XmjAzyN37En5wYch6CKS5l1B/Dy7t/Ei3mcWmfvp5fFz8IuCSRo47Dbv3+miMuZVr8VjsNP+WvyGIzO66XBJ/S53Gv6Q4SdL/XPQ+RMQXJluVeZt8u7rtobHUYiVO6/L3nyHnvF4Qfht387/7PnFsdmOtzvpoB/u/hfrTEKp/XzcHTa57ta4NokEs8r25uGAu7X7dPy2i1PzCoI71NfHW9yOVOVOgxjLn7P5u3vfk2j92iQSwO/r3udXA306sDGer2F/CByZ5s4wdoSZQDhgcvymG4T5SmEQ2DDLnU8el2Z84rgVKTaYymUQGVoVx9HdU1A5ofh+8pMW8lGl/2uc2hGG5ayXTz0+0rKleYsSkoJEwUtIifh+FpmjX2NRUz8QmJQXCp2HoWwMpBO5P2SsqmbiOZM5z5KjKo6ZGXsNnLDy1VVWuTX4mZb/8Af09NJoJalhiJNetBKhMUBn/4qZpOUuH2bJ826GImEk8SzAOlVPdTKYBEuly0/wATiY6LYcCNapOgBJ8rftF5+V4Y+B/iZnORUikxDDcrV1Jg1S7KkY/jfBgWAzpYcFUyTi+JUU5KQbmXf8IJHohkTBBmHOGX8JXL9rIqMSkzauWzhVFRvW1qVaslVLTzkk9bXaMPZPdApyAGuwoVeAGiiRy6j8v0qWEJSkCyQBzLAMB3LdbubtHoqSS5IAJuen8Tqdb2fWILrnXmQT8q/UAeKcZSEOe7cttW3sLXu+ouHbN9HRxb3+VywiEtQ3NgD40H4nnzOtaYykp5Dfyf+A2vYaM7UYmw82Nn92l/edNILi9/IX21AoBzNVG1/nmS0N1Jfb+dm0bbnaL+Tb2GvIORYluWhAG7kRAcVr00G1fl+tNaYykB29f9l99bndm90U17Cw9Q2xYk6nryBEQXFa3tz5getyRseQ2oM1Cd9rN6fIHl2La3aa8wTf8AeO3YdbaX1MW9xViTvrzp+6K6UFL389TjKQk66cje/nqTu3VtQAKC+rEncG7Wd7vyTz184DithvUA77FRJBr0uBztZOMxAuNwNeXT+Xxip0fdRDDp6+ezE6uAYgOq12r+NgOV/Gx6VIzEJsBye/vL66M3O3WKfOwu1tVGxb5MBqGBguq180jXU1JN9fTblplyk2BPfTlYBwex05jYvXY+YGmzsOz6jTmNTGXT2UErC47jZPFIBLUNkeVNOUugPu5mjH2weS/s8MpQoLtpN629QP6OPDQanxWxcoBKKfKWHS5mqkidMx6pnIB5LMiQohv3EuY1g+0jUtKynRg2MzF6hSdiUJoJaCQbgp9pMA/xG7u2ZTHqPGrMMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEaqX/AEgnh9+zeNPAbik2P9HnDhpPMixSUI7qUxGQczOztmIdUEgLfiYfiEWUqWorLMtQindaQMdLeKFIUYhhtaP+/o5lMWDfipZxmpJPNQqynshnEazeOtB7PFsExMWFVh06iUALcVDUKnJUS35lJrykFyWlgMAlxr/tqJGuhpsPA23Na9a2NjjqkhifUfMc7aXva4vbok3A9C/1p200OxM1pVRT/AUF9gBUeNB8o1Dfy9dO7G7e+ISGcNYctSCbW3Y9RtExtWnqNrGv631uCK4iI1B+vr+RiPRRfd+wIA6chq7dImoVQiulj5GtCeuunXnTEJFjfQ++w2G7WPe2piNQYvzv5/Xxia2r8BS1jWx5fOleSdY1Bx2/TsfgYjUN+VwNbEaef8eUTEKuPpfU/PTSo9K1xjqGrfEXGra6c2I7lmiJQcP/ADbR+4Lc9RozRNZXUAbkilTW41pXmKior5CmIiGLfTbP15hhESg4fkC458j2e/ruCIloV3SKaVoOgNa35crgDYVpixQcH6c/XRzo4ER8wfo2bnpfkdRExtehB6U6frQ6E7aYgIex+vrffa0WKB/Uc+WxuDt35l5SF0pQ22IP3a0oPMnnQaVFARCQ1iHB9/1t02YtES0pWCCAoEMoG4ULuS+zWIL3cFzrsnezs4xwnErs+SLLDzndzHwlTDZFmcKpaT3pHCMKOTI6HQmqmoIyJpMlaaVQiMy/HhCUMfZxjavwyx4YzlqRTzFk1uD8OH1AUXKpCUk0M4b8KqcCR+K5mU00/lKY3o8KM61Oc8tiZitXOrcewud9yxWqqZhm1VdxAro8SqJyiZk+fVyQUVVTPUuoqq2nqqicta5pWrpL2unZji+NvANjillCBiY7iBwJ/aWYPsUHD/aoifcPY9tg50l6GW0l9cXI0wMFmqDU2XO7BSudwbcK/ETRhxjc77OHiCjKWb14DiE5ErBs2+wozNmL4EUmMySsYZOKieAIqvazcPmghLzZ9JNMxCKdSV8D+0h4frzZlBGPYdJXNxnKRn1nspSOOZWYNOSg4nJCUjjVMpRJlYhKIJaVT1coS1rnoUjU4ZmVgQq1AQQQfOybgbHS9iNB6MpnX1vyHR9QfN36WvfznMvcfXT4W1F3eLo1MtB3vz/5fy863nTO6tbct878/PWLChQ69ouCJlTflp4f2a/S2Jkz2a5/hzccx3i0jmNemrd/oRMRMqU+Ijobjz+HEgn6OR6/Hme5iwoG1vf8b+hESEzPkR4/07oBxIKjd3POz+4xQoD2tzP8Gv6xU/af86fT/wCXD7z19/8A6oez6+7+MP2n/On0/wDlw+89ff8A+qHs+vu/jFJUz5keP6SR5YGobduelx1c6GHAL9mBd/kPRyIjrmVa/ETvyA8KJ08xiIzze7XuHJ9NLDf9Wi4JG9/QfDXzeIS5jqa3O538u7z1FOtd8Rqn63brp2Or69t4uCeQ6aefbrbvFvdmX8wFtAfHT4f1ep5QqndX7XOvM9vN9IuCC2w6fyiXluUZgzvmbL+TcqSuLnmaM1zqW5ey9JoFpb8bNJzN4tqAl8FDNIQVqciIp9ttJoEoBK1kISpSfm4jilHhdFWYlX1EuloaCmnVlXUzlBMuRT08tU2dMWolgEoQSdywAuQIzsPw2rxSuo8Nw+RNq6+vqZNHR00pJVMn1NRMTKkykJAJKlrUkDYamzxvZ9k/gFKuzBwA4dcGZdENx8dluTiJzVOGUIbTPc6TlxUzzXNWkhIUmCdm8REw0obeLkTDySFlkJEPvusLeV5OeIWcKnPmcMazNPSqVLrqkooKZSio0mGUwEjD6ck29omnQhdQUhKF1UyfMSlKVhI9ZPDzJ9NkPJ+C5ZkKTNmUNNx19SlISKvFKpRqMQqEgXEpVTMWimSoqWillyJa1LUgqPUva1z024qSZBg3ipTKk5gnaUKIbS4UuQ0ohXDWq1htcZGPtLAS2hyXup76lAteKH9Jp4uSJ83J/gphVUta6WYjO+b0yltKlT1S6mgythk4oU8yeJE3FcWqaaaAiVLn4JUpMyZNH3fdf7PWV1oTimbqmWEiYk4PhRUAVKQFInYlUIcfhTxopqaXMSSpSkVcv8ISfaeHXHK13+VdKAW+5yAuceTCU9Ow5aXNteZjZ7m3mfXkSC4+mcmGtVfM+FTt4AbD6k4yUpYNyuT/AA93xsLNO7e7X1I12A66Q3HPSnOlSB96lrbAmxFQbYyZaNzsXTzAOxLuCz22N30i4AAFzprbW4tY9nvZx1iA4utq3/O5Og150HqDjLQO3lz0AG2t9TtpaKa8uulh7hu9jctoYguKFDtb5E+f3gOQoOYOMyWgjub9reVgdD5sS4Nwt1uyR1Gp2sLgkDrreILiqn633JFE7mmldtNaWykp0G3y+F7+h3sXyFzuTqTffmObA6AiC6vTnXXruRbRI0voK7hWMxAa/wANOp897fMCoG176h9Bdk35+Rvfrb3FWN7ECnQD1N/11y5aW729duWlz1YiKOSdeg9znUPodQBbQG0QXFa62Phe3gbDnY2rcAYykJdg1vgBbfmer2OgvFddG5DoB17j3W3UIDq9dKCo2rWlztTlfx01zUi132ezM/PVvQ8gAGYddLCw01IDNawHWzt0jPh7MLKK5LwDnWZ4hkIfzrnybRUI/oXpNIoKXSOGSRStWZxDZgFakUWAAkhVfZv7AWWVYT4OYpj86UEzs1ZvxGop5o1m4ZhFJRYTISbay8TkYzoSn8dgDxE6YfaCxMVec6TDkKdGEYNTSpif7tVVzp9XMOrfjpplGW1cXOwyQY3mjomGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCMJHt3+ErmdeyVlziXAwwdmHBriTKJhMXyuhYyjneHdynNUttgd5x1zM7+SHCQoBuGh4lxQoO+jrzxJoTUYJKq0h1UFWhSjykVAMhbDcmcac9ACeo6f8acLNZlenxFCXmYTiEqYtTtw01Yk0sxhuTUKo+gSFEgxqBNK0rSlKGh/msbDwBIFfC1OhlDdnLuH5Ncb6M7G2w3jVA6sHu3Qudr7XI18zE5CqHbxrpvWt9RenhfEZ9x5/V4sUNDq23N9fSJiFbjmafiLeda0JvamIVBj2Af9flZwNHeIlBx5C+vY3207WuDExtVQPXlXmKc+XLmRrEob+Xbkeje8tZ7xYfxAhmPXY/Xu7xLbUNP0R8jblXQcq4jOr+u9/rsNWsIi6GxHx58gNtRsbtE5Cxp4UF7i1/HoKE21JFIljf1+m+tLBojUGPIPfoevIEgag3G0SkLuDrahqdQdPmefgDYDHUGdu4YaFr6bED9W1MSh8fgbjfyIdueoia2vvAdQa6Co/i1Gm513oajuxmx+v4RGoee29jo2/kNL6j96U2sjka22+IX6fevbY354jUnf6GnubkHHa0WAag7e7nblz38gYloXoQbE9TS4FDUi9Bfn40JiUl7H65Xvz2+ERqSQ/vHXRwBr1exEereyB2hIjs8cX5VmSMeilZJzAhvLefoBhZIXIol5CmZu3DkFD8blqNKJrDAJTEPQqZlLIeIh0TR5eOV5IzKrK2OyaqaVnD6kClxKWg2NMtX4agIuFTKRf8AbIFlqQJslKkCcoxzvw3zivJmZaeumKmKwqtAocYlIJPFSLWCmqCLpXOoZpFQgMFqlifIQtAqFKO0TL5hAzWAhY+CioaYSyYwcPGQcZDutRUHHS+NZQ/CxMO82pbMTCRUO6h5l9srbeaWhSFLQoE7eSpqJiJc6TMSuXMQibKmy1BSVoWAuXMQtJIUlSSFIUkkEEEFjG+kuZKqJMudKWidIny0TZUxCkrlTZU1AWhaFAlK5cxCgpKgSlSSCCQY1FvaidhaYdl7iJE8VOHUoeVwB4jzd6IgUwSHnmOGubZi69ExWSo5z3akQ0jjXPfRmSIlx0gwHv8AL7qlRUmbipn6JeBni3Lzrg0vAsaqU/tXg1OlE0zFJQrGqCSkIl4lKALzKqWOGXiiEpDzSirSOCoVLk+dfjt4STckYzMx7BaZRyljVQpcoSkqUnBMQnLK14ZNUQRLpZpKpuGLUoj2QVSKPtKZMyfipamWnxD1BvzrTQbm1+e+wYqNXJ7X/ju2jlnjXwoG1v57c9+fcARPbmRtem1QRXUgmlPClhbXniZM8XvuNN7Pq+o1a/TaLeDbvy+HL16gRMRM/wCaleov6AEeeJBP6976DZnd+ul4s9mHFhvt8mfZ9PnFYTLmpJ31A6X+Hn15ed3t3A67t/H1tFPZjRutyRZ+rRVTMzSykEf2k1+YqPD5Yu9sOnoYt9mOZ9R+kfipmd1I8O8N+dBfxpTD2w5j0MBLHXzIH6RTVMuSk+RB3HQH62162mfa9tA7X+LRd7MOLe8kdrP6fKI65nWvxC1rEVGmtRXmLH0Othn9S7dBa+mz6bfIxXgF7DVtHbqzONNx5F4iLmRv8QvzItvUig+nLxxGqf1azXPuB6A7WffaL+D46+XL+Om0W56ZgBRKwlKRVVwABrUkgUApUnQbkVtCqe+76s2rdtLizDUltRFwRvsA5fTfct0t7jGzv7HLsER+R4OD7XPGOSvQWa59KohngtleZoch4vLuXZxDFiN4hTSEdaacYm2ZpW87L8rw61qEJliNmE0fYciJ5LHJXpB9onxal4uuZkHL1UJmH0s9CsyVslQVLrKynWFS8JkzApSV09FOSJtasJBmVsuVJSpKaWcJ+8f2c/CSZhMuV4gZipVS8Qqqdact0M8KTMo6OoRwTcXnSylJTUVshSpNCglpdDNmz1IK6qSZGdrOmcZXknLc0zLN1n7HLmStDCFJDsZFuEohICHCjRcRFvqQ0ip7iQpTyyGm1qOhPit4l5d8Icg5j8Qc0TVDDMBozMl0klSE1eLYlPPscMwagEwpQqtxOsVLppJURLkpVMqp5RT086YjdXLWXq/NWN0GBYakGorZvCqaoEyqWnR+OprJzAkSaaUFTFsCVEJloBWtIOIvM+ZJlmqezXMM3eL8xm8W5GRKu8ShHfISzDtBR/0cLCsIbhodofC3DMNNpACRT8xue86Y/wCJOdMx57zRUmrx3M+KVGKVyypRlyTNZFLQUiVMZVBhlHLpsOw+QAEU1DS09OgBMsN6IYLg9Fl/CaDBcNliVRYdTS6aSGAUvhBMydMb806omqmT58xzxzpsxb/jL/MqXX9Ur0A0HIDWlq3OONpS3zLe/ctp6R9QjTo5bzdyLuW1G1nuLRHHNR5WOuthf7w3OgHzyEIduWvf0/d6G5NrMWuAaw13PLff3DzOn4YLixU3rzpudheptXw31IrlpT5W1O3Xlo7N5MA4oSNrcvdf0Jbq5ABMQ1qpv58yNiaggClyK8tbHJQjQkBnsGdurcy/PRtzaoDb2Zy+wPkWJGz3A6hoLi9aUqfDXY05AbV8NcZaUt589hydrP2HXR4uPIWLMOg7au19joLsYhrXTfrWoGlyqthcmnje1MZSEW5Hc62P6+VgAXd4pbXVrMdSdg3vJu7nsLe4uu9LU10SNrbq3000BpjLQlz2PqT/ABuf4wI0BZybn1YOdOQtpcXcRCcWTWmt7eAFL+dfG/Q5aQLcti3PU/Adh1io7ty6B9Ws3FYab2s4EBxXnqBf1PlTw8KkDLlI3LXYkXFth1Yi7+bmDtcXFrCxbtblyuAxcXEBxWo0pU+NK8jzPKtTQXuMtCXI1/m3p73AuwNwYW5P5ki51BYDfkdQA8bTfZbyO/w67PnCfKsYwuGmMNlCXzOawzqAh6Em+Yy5mKaQbyRb3kDHTV+DWampYrU64/Q19n7Kc3JPgx4c5eqZS5FZIy1RV+ISJiAibT4jjZXjdfTTUi3tKWrxCbTLIdzJdzrHnb4h4ujHM7ZkxGUtMyTMxSfT08xJdM2moeGhp5qT/dnSaZE0WH59BpHfuO4o4ZDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhHQfal4OM9oHs68ZeDiywiLz7kDMEnkcRFd4w0DmhEGuOylMYgI+NUPLczQkpjn20FK3WYdbaVJK+8PmYzQDE8Kr6CwVU001EonRM8J4pCy12ROShRa5AIj4mZMJGOYDi2EuAutop8qQpT8KKkJK6WYprlMuoRKWoAglKSAQ7x/PHeh4iBiYiCjGXIeKg33YWKhnklDrD7DpaeYdQaFLjLqFoWkmqVApobjGra0KSSlQKVJJBB2UHBB10Lg+e8aHzEKQpSFJKVJUUrSdUrS4UDyIIY2FwXZorNq2JGlzpW5of1bU1oAMY7bAEbi733Gtm5a/lDRGbjsw+PflzG7DUxNbVtWlSK7eGtRtcWsKUAxYoOH1IBYfXuiIhrbMeHU99Pdyd3tEtCqHpcX2P5Heu1MQkWv3+ux5bve0RENfo562t6aHXfUgRMQrfw9fyJrqa+PexGbWL3LCz25NbSxtba7NFqg/wCIcrjmO46ddNIltuaX011323trsa10G0ZGxuD7/r3d4jLKF7k6hu/v7D3xLQvxBHy+WljcnyAqBCtOr3d9foX36d2eIhnHNz35f7Xbm5fQykLpoTrXrtpbmTc1Ota1OIFAjt7t231AGgDbNzjKWPPUHrzHQ+49mImoWCPqOW5pXWlq8611qTZ9fXKIynceR62seV9OTNyArpWR+B/dIsBUcwNDcmwoRUYsUl/q7308zcaam0Wu7hXXa4PIeeoNuxiWlY1Hhe51III+VRWvM0OIiNjp8dD+kRlPJux0NvdZtn00u+YL2eXbFhpB+zeAHE+aoh5TERPuOGWZo95ppiWxcY8gDJMzinHG0ogo6KcW7lqIdqWI992SOvKhYmTswPdXhlndFL7LLWLzgmnWvhwirmKCUyVrUGw+ctRAEuYoqVSLU5RMUqnUrgXITK2O8GfElFH7DJ2PT+CnWvhwKunKSlEiZMUP/ddRMUpIEqbMUVUMwuUTlqpVK9mumTKzH53yZlDiZlDMOQc+yCW5pyfmqWvyjMEhmzPvoKYQMQBVLiUlDsPEsupbiIKOhXWYyXxrEPGwL8PGQ7DrexuGYniGC4hSYphdXOocQoZyZ9LVSFcMyVMTuNUqSpJKJktYVLmy1LlzELlrUk7K4pheH43h9XhWK0kmuw6vkqp6ulnp4pU2UvUFiFJWlQC5cxCkzJUxKJspaJiEqGoZ7QD2ZXEfsnTKa8ROHELOOIfZ4fiDENz2HYdmGYeGrcS86GZVn5mGQVGVw/8AooaDzy00zJ4t16Gg5uJTNYqDh4/fzwq8bcKzvJkYTjC5GFZsSkJVTqWJVJjCkJTxz8MVMLCev8S5mGqUqolhKl05nyETFyvPbxZ8D8XyHOqMXweXPxfKK1laalKVTavBkrWrhp8VShJJko/CiXiaUpp5ilIl1Ap58yWibiqbmQt8XMipBN6n+Kh9D1x3sJ3XkA77Wdx05n3R0Lwh3bn3vbXX1fozRKTM6f8ArKUO5vvWnxW11p64vE8WuwHX5FrfXN6cAt7+v6ekSBM/5/mDX/j+mLxOJFz2sD6W+NvlQy+RPZh/D5RzEyt979ep+uK+36e7+MU9mDqfUfxgZnS/eHn/AIj64e36N5em8PZtofIAfqI4GaWJ79P7wH/fP0OKGcRoX62Deo6dor7Pq/u/X4RHVNK/+srrpv4/Fiwzhzfk5e/k7esVCBvf3eUUURb8U+xCwrb0VExLzcPCw0Ohbz8REPrS0wwwy2VuvPPOLS2000kuOLUEISpRAxDMqUy0LWtSUIQlSlrUQhKEpBUpalKICUgByolkgOWiSXLUtaZctClrmKCEIQFKWtaiEpSlIdSlEkBKQ5KjYORGyH7Nf2RkyRG5f4/drvLbkE3CLhZzkPgVO4ZaIxyJ921Ey/MPFKAeUPsjcMpwOQnD2NaEaqMZBzgxDtMvZejNQ/GDx9QuVVZXyJWe0MwLp8TzLTLBlhDqROpMFmpssr4QF4rLUZfs1H7gpSlJqpe4vg59n6YmbSZpz9RmWJZl1OF5YqUELK+FK5NXjcpX5Eod5eEzEhZmJH9YISlK6SZsgTqfSjLspmU9nszgJPI5LARMym02mUUzCS6WS2AZXERcdGxb6m4eFhIVhC3nnnVoQ2hBUogfFjTmbNlyJUyfOmIlSpSFTJs2YoJRLQgFS1rUogJSlIJUSWADmNxKiokUkidU1M6VT01PKXOnz5y0y5UmVLSVzJkyYshKEISCpSlEAAEkxi34occ4vjNFQ0fL2YyXZHYWt/K0vjmFQsdMIRYUhjMs1g3FKehYucQ6vtMBARQh4mVSiIhoaNgoKcOThpXgX9uX7Qczxf8AEP8AY7L9YVZA8Paqpo6NMpajJxvNA46bF8dnMfZzU0bLwjCWSsSqeXX1Mmdw4tMSnczwByqvDMqS8011JNpcSzXJlVlLJqpIkVdHl5bTMLROlqedInYmhScUqJE0ypsqVOoKSqpZFZRTwrqNazSpvTc2rpqdNf66E40fSkbW95/Ww+nIB77Dvq5O/JtG389dgBvFW7qB1FdyK0NK2AsAdx1OuQiXoTpy5EXDsXOp79AxioHbq7Fturs+g6Pe0QXHPytsLHui/qrf0Bykp+vmbNtYb9AIP79B3a553056mzCIi161O1+g5eJ21O56zy0uXaz/AO8f0u+l9ra1A5XO5se7X25mxtsfxQ1r18Li3kBTw131NhjLQkAP6eYuer9e93eLuTB7gjVyeZO2+urcohLUdTQk20B/ui3ma0F6+GUhPuOhf1PfQt0S7uDQX+L6NcufXR9CCWEQXF6nra51FgNK90VvpS9STbGUlJsBc3c6a6k+73WiugfYAW772s52+T2hOLpb12qbeNAOXgANMZaEgAfrcC/x+FwRaKNzvufgBzLkB3I0uxiC4quluRtbcm9OtCBYmoNKjGShLntqDudh6s9+TizxUDV9f3r8hYcuhCjzd7GIDqxsRyTyA/8AmG1NLXtjMSGsNhqB723PLfQvZ4E3ex2GmrMSbaDqTz0YjtDgPw9ieLHGbh1w/YbU6zmDNMuRNSkpqxIIBwzTMcSAv4FLg5FBTGIabUU++dbQ0FAugjtXwbyPO8Q/E3JOTpUtUyXjOP0SMQI4XlYLRr+/43UAKZClU+EUtbOQhRAmzEIlghUx441nLG0ZcytjmNLVwqocPnmmd/x1s8fdqFBIuBNrJ0lClgEpC1LAZLnbCSlKEpSkBKUgJSBoEgUAHQAUGP0VJSEpCUgBKQEpAsAAGAA5AWEecBJJJNyS5PMmP3FYpDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEaK/tVeAjXZ+7a/FOUyuEcg8rcRn2OMOU0KQlDSYHPkRHRU9hoRDaEMtQEtztCZqlUuh20hMPL4KFZNSgqOumdcM/q3H6xKE8MmqUK6SGAHBUlRmAMAAlFQmdLQB+VCUjYk6ZeJeBpwLN2Jy5aOGlxApxWmSQAOCtVMVOCWYBEusRUykJAZKEIBI1jHg2si9dzTmRrTlUXpyFQTbHD1JcefSxfrsdD6gPHXxsedg7aH+Btc6m+4ichWlOVddv1pXWxvfEZ9Oe1/rXk+1otIceevvHr5HXSJbaq+I86g1PiSCDStzeoFbRKHp8DoOwI100HQGIhxe12PQ7eRHuAuTrLQuljf8AEfr5ailcREOOX19fziLQ9CbbNbTr0t3OkSkKof1cfO9vl0IEZBIL837W6C40BZmsWILmxQa40PLu/ppExtelDcabVrSo1tv15bVsIdwYsIcP2foeY7+7TRnlpWDcf4G553t5UuLaQKS1tvl9Hy9CYiNj5dRyHUk3O3aJCF0p86ag6AgU89eadwDEUs/mR/EvqP46cURqBHJ9+vMdDZuvWxEtDgVy112N9SNjrSh5AVpawi7Mba9PTbraLCl9D0A30sPhY6XL6xISunXXehF6UNNRal62Fq4sKX0tz3/kbnRvnFhJFue+r77932N7xIS7XpfUHfWtrpIIJqN7g2AMZSR/LytsdR1vpFCkHr2Fx2PmOt7jWMw/Y69oWiTw0q4Xcf5o+uXsIZgMscT4pTkS7BMtobZhZXnl5S1vvwraUqahs0hLz7J9y3PW1w32idQ/dmRvEwU6JOD5kmqMpIEukxdZK1S0gAIk4iSSpSAAyKwcS0/hFSCniqE7IeGvjGKVFPgGcJ61SUBMmgx6Y61SkpCUy6fFlFRWuWACEYgApaTwpq0lHHVIzSsRUBNYFDrLsHM5ZMYULbdZcYjoCYQUU2Clba21vQsZCRLK+8hbanWX2lhQK0LBX3zLmgiXOkzAoEJmSpspYIILKRMlzEEgg2UhaSxsQdDGziVSqiUFIVKnyJ0t0qSpE2TOlTE2KVJKkTJa0lwQVJWkuCQYwtdrf2KnBTjLFR+cuz7NoXgJnyLXGRUZlxEC9H8JJ3GPqcfQUyGCpM8irXEL7jruVxGyKEgwlEFkwvNlx3YnI32h8x4AiVQZnlTMy4bLEuWirM0Sscp5aWSXqV/2WJAIDpTWezqVzLzK8pICdcc+/Zvy1mJc7EMqzZeV8UmFa5lIJSpuBVExXEoNTS2nYYVLLKVRCZTIlgCVh4UCV68nHzsCdsDs2ftCN4jcHcyRmVZc48l7P2R2XM85HTDNLKG5hGTmQIiHsvwUWO6uFObIDL8WoLS07CMxIcYRtNlnxXyTmv2UvC8epUVs1KeHDcQUMOxDjIBMpEip4U1UxFws0cypQGKkrUghR1NzT4SZ7ygZ8zFcv1cygkFROK4eP6ww72aVcKZy6im41UiJgIUkVyKaZfhUhK0qSPGH7SUhRQtSkrSSFINUlJBoQpJUCkg6g7645+KjRrvcbgjYggX90dcmUxYgg8h6aXPqY5ftP+f/AIv/AKmLvbn+6Iey6K9P4Q/af8//ABf/AFMPbn+6PUw9l0V6fwivBOR81i2JfK4WMmUfFOoZhoGBhn42MiHnVhtpmHhYZLr7zri1JQ222ha1rUlCUlSgDFMrJcpC5s2YiVLQCpa5qky5aEpDqKlrYJCQHJJYC5MXyqabOmIlSZcybNWoJRKloUuYtSiAEoQgcSlEkABIJci14yednb2R3bQ49xsrjJ5kdzgZkeMSiJi82cXWYqQTNuC7yFH9mcPwhWdY+YxDKi5L2ZlK5DKIrupMVPoBl1t9XUOafHfIuXJc5FNiIzFiCCUoosEUiolGY1va4kSKCVKSphNMmdUz0X4aaYoFMd0ZT8APEDM02VMqsNOWsOWApddjgVTzeBw/scMD4hNmKSSZQmyaenmWCqmUhQWNlPsa+zC7OPY/MtzVBQL/ABP4yQzLvveKed4aDXESmIiW/cxCch5bbMRK8nMe478OiObcmmaVMRUfDP5ldl8auAb1Mz74x5sz0J1FNnDCMBWoNg2HzJgRPQg8SP6yqyUzq9XEyzKIk0QUmWtNIJssTTuB4feC2UMgGTWyZJxnMCEEKxvEZaCuQpaQlf8AVtGOORh6SkFPtUmdWlK5yFVhkzTJHvDP3EbJfC/Ks1ztxBzLKsq5WkzPvo+bzaJ90wlSiEsQsM38URHzCMdKWICWQDMVHzCJWiHg4V95aW1dN1tdSYdTTayuqJVNTSQ65s1QSL2SlI/MuYs/hRLQFTFqIShKlECO0MSxPD8Hop2IYnVyaKjp08U2fPXwpBJZKEC65k2Ypky5MtK5s1ZCJaFKIEYK+JnaozP23+JH+RWWoOZ5Y7NeSI2GnU6l0UsQs34ix8HFuLkKM1iGedbalsXFw7cbCZTZeeh4aGg4qPmcZETUSlMq8+vtg/aMn5QyHV0OBVCqHFcyKn4TlySGNWohKRiOP1KQSmXKwqlmpVRSlGZKRitThy58upSlaJPwvBrB6z7Q/iXIoZlHUSPCzJs2mxvMkuYr2K8enSpy1YNhNcpBV/ZYpVyPaTMOlqZOGUeITZtQmr+5+y7aU4kWtSlABQeASkaDSlKUrpY08OglSiSSSol1E3JJLlSidSSSSTqbk3D+toSwAACUgAAAcKQALBhYW0AFhYABojOOa0NjyNB53qo3Jpzte2MhEvR7nYat2DNsL6EbB4v0bXoG/FyNhoLPa5a6haIi3Otdxp5c7Dbn9MhKRvzvy2t3Je/nuDFpL232AZg/Tnrf01BEVbm5Ph1roE/ncDeuJ0S31FruD11Km62YfoIqA/zL2HN2AZ3/ACuDz2iG44fACulTQ3vzJOmpqOW2UlA8tGPlq/b6Ac3WA3bS4ubWDWt01Lk6OTDWvc2poNe7X6qOw8hbXJSh9dPR2dx0axv3OwFLk/AbAf8Al5ka6C0QnXNRWnnWnofiUbaaWxkpTpuf4drfRPStrubaknU8v9nlz00d4ji9didq6culTb89MZUtDX58xqR3D8I3fyuYHrqxa+3M7Bg787toIguL1Gwsabi9h42rqdx0ykpuG1JJHd9T8B1DGFurai13L3L+4lha+xMJxeulz8VzvsN7b08dajGXLQw00H168/N2Nh6HSxYNYD3X0YFrkbiIDiya/wCFa/gNDXStDpXGVLQ5BOjB/V/0ZjsTAbbOAN7DVnve7bPZmIjKz7LHhYJvnTPHGCYNqVCZSlyMpZe77ZLbk8zAlMVN4xp7vDuxErksKzBKaKVhbOY1LV3VNoKvRz+j88PhiGZ81+JNZLeny5Qoy5g3FLPArFcZAqMRqZc1wEzaDC5EumMtlBcrHCpXCpEsnXD7Q+Yvu2F4TlmQoCZiU9WI1vCpiKSiJl00pSN0VFVNVN4iQQuhYBlKjOHj1djUmGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQjBz7dPs2xHFDs55e455dgWojMfAKcRD8/922RGxXDfOLsvls6WgtNrdjFZfzBDZcmyGXyGJfJ3czzBC2j75ET174h4UqswuViEpIVNw2YTMYfiVSzylExmBKjLmplLANkoM5Qa4PTvjLl9WJYDIxiQgKqMEmqVOAH410FWZcucQwJWZE9NPNAP4Zco1EwEfiCtQZKqdNDrpyPPmLjnY0v0WpLHodP0jVYjUem7g6/AO933Dhpja6U8qgD7t7baG9NDqDqaQKSQ5HvL8Q3LE6iz82sHaI+muwP11N7tve0TULof0dd+oP63BsIfqDof5aHf0MWKD3GrevToQdDziWhVdNdTpvQ1BrpfavjXWFSW7ba7DTv7vLSJQcX00u+2xtY2HLpbSShdbf189KcvG29Diwh+/wBW+tOoJBs0se199Axc66uGvqLuIlJXTz228jzoPLcWxEQbg7Al9wOXb4O4La2qDXH8nt/B997gEym3N9Ot79Dcb9RQ737xsIex+u0RkAj1t8x29d+bS0r8RSu9x9LUqbWGmthEpLdR2/if115PEZDa3vY8+/IlyHfmWe8V0r8K130NOfXba1qWAxEU8nb3ja3Q7jc6m5IsKe4PvG9xv5i3IOIlIcN6/wCGml7iwsdBqqgIMR+vrnz91osIG/8AA6+hv77OWIkJVW4qLg2F/wC8DXp/ShwI2P1tEZS389e2np7y4iqlwjfmLXTyun16VsTQA4sKOX8fX01B5i+tH5j4vfr17G3VyfXPZ37ZnFvs8uQ8rlUajNmQREpdi8h5giH3Jey2s0iFZcmKQ7HZYi3kFS0mDTESlUVSKj5LHud7vcwyznnG8sKTJkzBWYbxhS8Nq1KMoAn8f3ScxXSLIJIKOKQpbLmU8wx2HkzxLzHkxSKemmpxDB/aBUzB65ajJSD/AJw0M8BUygmEEn+zC6ZUxpk6knKcHNZwW7eXALi8xBwb+ZG+HmbX1oh3cs57fhpUhyJc7qG0ynMa3UyKZtRLqg1CNmMg5s64O67KIfvsB3vjAfEXLeNpRLVVDC61RCTSYipMkFZsPY1RP3aclRsgGZLnE2VIS6eLZ7LHi1lDMiZcpdanBcRUQhVDiy0UyVLUwT93rSoUdQlajwy0mbKqFKsqmQ6OL2o3EGxSok0+8D3hRQIpYhQBG5NFDU0OOd6x2cDyPpyP6iOjeIfZg7NfFz3q+JvAThDniLfSULmuYOHuV4+ftpqSTC5iXLET+BUa/EuCmTCiD3akKpjkWGZvzVgvCMKzHjdAhJcSabE6tFMT/rUvtTTL7LlKA2jjeKZOynjRUrFstYHiExaSkz6nDKRdUEkuQmr9kKmWCbn2c5LnWPLEx9kd7O6ZvriVdnOXwLjqitxEs4icXpfD946+7g2c/iDh0DRLcMyw0kCyBcnmMrxr8TpSAgZomzAkMDNwzBZi26rVhvGo9VKUescIneBXhVOWqYcpypalElQk4rjstBJ5ITifAkdEJSByi9Zc9lN7PTLEW3GwXZnyvMopsgp/ylzTxEzdCGhqA5KczZymkndGv/pZevvCoVUWxBV+MfiXWIMuZmusloOopKTC6NflOpaGTPHlNHSMii8E/C2hmCdJyjRzJidDV1uLVqPOTV4hOkKH+KUdS9rR7KyHwk4R8K2EwvDDhVw64cQyRQMZDyNlbKDVe73CpSMvy2XpWtSahbiwpxdSVqUVEng+I45jWLq48WxjFcUUf3sRxCrrTq4Y1M6awB0AYCzAMI59huBYHgyeHCMGwrCk3JGG4dR0Lk6lX3WTK4lH95SnKiSSSSY+1nE+lEglkbO8wTSXSSTS1hcXMpvOY6Clkrl8K3T3kTHTGOfYhIOHRUd96IebbSSApQJGPjzZsmnlLnT5sqRJlJKpk2dMRKlS0DVS5iylCEjcqIA5xn1FRIpZMypqp8mmp5KTMnVFRNlyZMpA1XNmzVJly0jdS1ADnGNTj57Urgxw3aiZPwpZc4v5uS0+hEVBLdleQpbEAKQyY2fuNiMnhS4UP/ZstwkRBxMOFtKzBL4hSSnrvG/EvB6AKk4Wk4vVAEcaCqXQylXA46gjinMWVw06ShSQR94lqaOoMzeNGXsJC6fA0nH68JUPaSiqThcldwn2lUoBdSXZXBSIVLWl0/e5S9MEnGztB8Y+0nmqGm3EfMcXPn0P/Zsu5XlrRgMtSRcW73EwkgkLK1MtREQ44lhcfFLjZzHISw1HTOLSwwEdJZgzNW4p7bEcbr0IpqSVNqFcZ9hQUFPKQqZOmhDlEtEuUlSps5ZXNKEvMmKCQ2uuM5hzLnfE6ZNdOnV9XUT5dLhuGUqCmQifUzBKk09DRoJBnT5i0SgtRmVM4mWiZNmcKWyP8F+HMPwsyJLZAUMKncUP2nmWMYqsxM4ikNh5pDyqKXCy5ptqXwlEoQtuHVFBlDsS97zxG8cvEqo8V8/4ljyJs8YDQvhOV6SaPZ+wwalmzDLqVyBZFVik5c3EarjK50sz5VGqcqVRyBL9xPs++ElN4O+G2E5dmSqc5hrmxnNtbKPtPvOO1kqUJtNLnllTaPCZCJOGUfAJciaimmViZKZ9bUKX2it3W++t6V3qa3050Jpvc9SJQBoNPXyG5uS/e7Wju1xqPU6joAC3PkNgxERVOa00/wABbfbXXoTTEyUXAZ+n6nRtBycPzgz9ty4t37WYWdrAGIy3KV15nUGtK/Edq1Fhc1rWmMhMsb3I0DeRZPYEgk6FrRcBboX6uTY8I1sAbm7PaIrjl689uelfDau2pvjIShm57W+n6e/QNXQMQP8ADfvc3fdufcMIil8zcV8rbVuoj1O9MZCUbl25cx15X9Ip7z1e3Q7gM5vdW/IxHHNem2wvfvG9SRc/7u9DkpTpzLfJuX87m7NXQdNzuS1m0tsG8m1iGtdOp9OdzS2u3XmSTkoRz/jtYXY99tTFN/gBdhfRjd9202ZrQ3F61r43tWlTcU0JAB8qb5KU9PL4DYtzPUmzxXa+hO1+yRzvq1nsLO0Ja6VPSw5DUkjnWutT51xlS0WBIB5m9zsBpYenwFb8rnQdR8SBqXANhEFxeo2uCdaVpvzqRQVobXtXGUhJJbnd32+W+wIvd7RQcjcXvqC1w3bkN9NDEUJcecQyy24666tLTTTaS4644tXcbbbQkFSlrUoAJSkqUpXdpW2M6VKXMXLlS0qmTJi0oQhCSpcxaiAlCEJBUpalEJSlIKlEhIckQJShJUtQSlKVKWoqCUpABJUSTYAAkk2sVG942meypwg/zI8C8kZJi4NmEzEuB/b+cfdhsuOZqnoRGTJqJeaUpuJdlTZhZA1EIUpLkHKIUIUpCUk/oF+z54bDwq8Jsq5VqKaXTY0qkOMZl4PZla8wYtw1NdLnzZRUifMw9Bp8IROQpSV02HSOBSkBJPnj4i5m/azN2LYtLmqm0InfcsLfiCU4dRvKp1S0KAVLTUK9pWKQQCJlTM4gFEiPROO6Y4RDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIR8/mzKuXs9ZWzHkrNsqhp7lbN0im2WsxyWNCzCTaRzyBfls1l0SG1tuBmMgYl+HcU0426lLhU24hYSoRT5MqpkzaeegTJM+WuTNlq0XLmJKFpLXZSSQWIN7GIKqmkVlNUUlVLTOpqqTNp58pb8MyTOQqXMQpiCy0KKSxBD2IN4/nydq/s85k7LHaA4jcE8xtxKxlWePOZZm0QEEZkyTM/wDrDKWYW3mUIhnVzKSREIuYNw/wS+ctzKUv+7i5fFMt6z43hczCMSqsPmufYzD7JZH+ckL/ABSJoIYHjllPEB+VYWg3SY0czRgNRl3G6/CZ4U9NOV93mqb+3pJrrpagFICSZsgpMwJsicJktQCpZA8+oX4351uN0/kLX3vf4hS1j5b+Y6xx0h+mr6a87bX/ABHcMW0Imtr0Fa60J5bg21sK8tb3rCoNtaztsdiB/dufgW2sLmzX+i/8dGv1iUhfWnI10J50286XruCLSNj9fX1eLFA6i/Mcx+v10MtK6+OpB873OlBpT8cRKS3y/QsNSdC8RkAi1xt5NYsNX0LxJbXsf67XFtfn5iuIyH0sRp/H6+YMbtY3B0P6/ozcuQkpUefK96E8jp/XpUDEZ34rch06a+mmvJxaU7p76+jdtt++0lDg8KctRfUGl/xsDa2LSG10PoYsLHodxty5W87cy8SEroNSbgVpY7abWGltQSRYCIo5M1uh9bv3bbeLCkjRm0bQjz73vvpeJCVeHgb+Y+o6Gtq4iKe4PS3117MdIj4QQe7Ho/MWa/JwA/K9ZLlKUOnqB49Dfw+I3BxGUkfVn7bPbTe2hEWkH153HXt1G2rc5CXRvroaGhF7VFADbTQUOhFsWtZ/TkdN/Pl01iwh7adDdy3O/nvZxzNcLFbGpGux6Cm5/wAU4oRz0Pv+t4t4Trpy3HUvqAdtevOOXe1CiCNPiFut7AnnShO9cW8Iv1+tC4bkCGG0Uvyd9RbTtezaOGD2jubh32huNvChcOOH/E3NuXYSFAS1J0zIzXLhSP3XcsTpuY5eeoPhQp2WKW0Cr3SkE1x9vDMx4/g3D/VmL1lMhH5ZHtPa0jbA0k8TaZTXbilEh7MXMckwXOWaMvFH9T47iFFLR+WmE729CQGYKoaoT6NTbFUhRT+6Q5Mevcu+1F7RUoSy1OJbw5zYlASHXZrl2aS6LdA+8sO5fnsqhGnVCp7wgVtJJsxoBzOl8Wc0yGE+ThdaBZSptNNlLUOYNNUSUBXX2ZT/AKsdi0XjznOmCU1MjBcRAYKVPo58maobkKpKunlpV19iU/6hjt2A9rjmVpsJmfA7L8a7T4ly/iDM5W0pVqkMxWUp0sJqD8JiFWNCo0JP2pfjLWBP9rl2mWprmViUyUkm37q6OeW1txb62vyOV9oiuCQJ+VKSYprqk4xPkJJt+5Mw6pIGtuM94hzf2uGd3m1/sPgxk+Wu90lC5zm2dT9tBAJqpmAk+WVrSLVAfbJofiFbWTvGTEVAinwGjlKP5TPrZ9SBydMuTSE9WUOQiGo+0NiqwRSZYw6Qo/lNTiNVWAHqmTT0JV1AWl9ARrHQObfaedqKftOsyiZ5KyQXAoe+yxlCGiohoEEENLzfE5paSdSFqaUtBHeSpJAI+RU+J+a6lJEqZQ0JUNaWkQtQBbQ1i6sXBsWcPq4eOO13jbnmsSpMidhuFuPzUWHomKAIYkHEF14Sb2dJI1Bdo8PZ/wCKnEjiZGGN4hZ7zbnWIDyoho5ln0xmrEM4sE/6lCRT7kHANoqQ0xAw8PDsNkNMNNtpSkcQrMSxLElceIV1XWrB4gamdNnBJL2loUoolgBwlKEpSkWSkANHXmI43jONTBMxfFK/E5nEVA1tVOnpQp/+6RMWZcoDRKZaUISmyUpAAHWTqjcCxOu+lrGlLctb1roMQJDJL7/AgP8Ap6+WDcHpbcHUgHkdmFttL29edkrhkJ7mCI4iziGSuU5YeMNI232++iLzGtpK1RaQurfdksK8l5s91SxMIqDfZW27BKxpr9sDxSOXsuU/hxg9StGMZrkfeccmSJnAujywicqX92UUlMzixyrkrpVjiCFYdS18icFy6xIO/P2H/BwZkzRUeKeOUyJmC5NqDR5dlTpPtEVua1yZcw1ifaJMtScvUdQiplqIMyXilZh1TTrlzaBRORpTta79dB/gPz51PmgEXHP1N+TWHS2rdo9ZdTz6ve9rcgNQ4tY7gRQU5zNdh89BqdNrHniVMs7uOYdzrubtrtudeYB9b8+mhLkju4Fx6xHU7y1FaHU0r0000FbE0pWgnTLbZhv31Nn1c9b6u0XN/tNrqwLcrufU87xFU5yvSt+XnvcGutzXc4nCeQv8v00bowvaKO5bU3v7rat3D6Al2IiOpwXvU0ra59Nhbe1bUNcTol87nsw31LOXHqC5ZrUuegcOX8tSbs/QOPw3iItw86bVFSQL0AFTQW5m4vUaZCU8tbfp07Pb1Je5gxHIEsTcnmrTvruHawiItwjX0rpy51J3/GtTkol7n158wNttS0ULlrNZmGo67Nozbiw1LQ3HNfMmum9Sq1unXrpkJTp6MPgH15k+Z2EVA7c7G3+zyH970HSIte58QDqb6nwrYbDrplIljfXcjQdB8epvo3FUltB2Hp6FjYdb3LRCcXUa66m+nO1/C9Ba9SAMlCX25e46b7bWO2mtNr35n/8ACN9rgl9zcxBWuu+/TS+vpppTyploTwjS++/l/Kz6bRdp56bcmDchc8xexvHuf2fXAxXF3jfA5knEA5E5K4WmEzXNnXE0hYzMbcQVZSkrhqfel6Yw7s5iIdaFw8RL5HFQUXREahLu332N/CU+IvilSY5idGudlfIRpswYhMUP8mqcalzQrLmFrOkwzaySvE58kpXInUmFVFPUcKamWmZ07405v/ZrKk6gpZwRimYfa4dTgf5yXRKQ2J1SRqkJkTE0iFhQWidVSpkpzKUU7HuPbSNGoYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQjBj7bnsaq4x8G4TtIZFlLb/EXgZLok5vahk92NzHwiLjsdNFfC2v7TFZBj3X8ywra3IVDcgjs4LLkVFolsGvr3P8AgX3+hGK06HqsPQROAsqbRE8S9i5plEzU3S0pU+5JSk9O+L2U/wCtsKTj9HKCq/B5ahVBIHHPwskrmaj8SqJZVUJcp4ZC6supXAk6g6F+u45jkL0qK/dHOnInpBSXtuI1ZUkguNdL/WurFmN7cpTa77EEfo6W7o8DtUDSBSdjb9Hv3B626RGoOHHz5s17uTryvufxTEL05GtK2qAdx/S2oGqcQkNZrBtP3X0a1x3OzHYizXv8fkANv00lIXSnLprp4/nbS1MWkecWFLOWudrMfUG/wOu8SkLqdq8ga63r51r4eF4lJb9fgPQM/Pm9oyHG/chhYafLvze0hDlKfXTfQgfPTTFhD2P11HyMRl08yPgG56kaXANnJeJKVdetzca3v/Q68gMRkEdrafpuToP9n8TvFCkKuDfnsYrpc686nx2PKnKnLTXFpTy+trHe/Qai14s0sofR5H1O4fZ7xIS513qakkHmLXA2ppTWpAxYUg6i9x2+vdFpSD5bjb9eY1tfnFcOC1d7XNq1tfr89QNcRlBuR9a7fD6MWEEdeu/WzsQWb3aANVCxb9U5XGhtatxyxGU67H6sQdi9xZ/WLWG22p0sBexL/C7u2sVQ51oNwfiH0rXxxYUkX1N7ixc87s3v20izh1a3u52Y+bgA36sYqpdI001qDXTc94EDoKHcilK4oRq+ugDc+RBu3NvKLSDvfV3t5aE+9+fKOYeF+9SvMpKb8goGv9ByxRn0+IPus3m3KKNbQgche3MguOtn5xzDw5Vr/MT8yBQeflvijWOtuYPye/du8WlI3U1uTe6xO+g89o/fe+P+8j8cGHMe/wDSKhIOjFt2P/mb0ik89RBFTUmmqTbU6U5bm+lDi+WAVXO2z/pfXRjvFwQHcsALnX5k9/KLU65SprvXXnehA5HrW9DUC+UlgGGotcEbW7WA925idAHn2u7kWNjfS3LRyYtzihegrWvPw38a/kDUSp5M93GnY7jo3zZolFi5tqQ1n/g3q4i45Zy7NM5ZilGWZO0XZjOo1qEh6pUpDIUSuIi3wgVRDQUOhyMinKgNwzDq1KSlJOPjZozJheT8u4xmfGpwkYXglDOrqtQUhK5gQAiTSyDMISuqrahcqjo5RLzaqfKlJBUsA8syXlHGM95pwLJ+ASPbYvj+ISMPo08C5iJQmErn1lSJYKkUeH0qJ9dXTfyyKSnnzlqCEKUMyOUctSvJOWZPlWTpKYCSwaIRpa0pDsS6VKdio2IDYS2IiOi3X4t8p+H3zywkd2mPFPOuasTz3mrGs24yp6/GqxdUuSha1yqSQlKZNJQSFrPGqmoKSVJpJBUxMuSlSgFKVH6B8g5Jwfw6yfgGTMCQU4bgGHy6SXOmIlyp1ZUFSp9diNSiV+D71iNbNqK+oCTwidPWEMlKYvxdtqa+p8rCnkDeh+KluNpl2YMB+m/Vxpp+vMGsP3g9tgPLVW/N/WKCnOtTfSu/W/PT5a4kCRyf+HPbqet+TUJF9w46AAer69X5MA8da61rsLitvAml9NOulNJkoLh7X7/R7dGL6Lk31LW56bdL3LjW2sR1u089LX1vRJGwBub9AK4nTLZmt8+Rsez79dIrq79yBYP1Pm/IMdWiKtyv1IJHzpXqKG9Kg7HEyUHYWtf618t35xVw53I0DORzYdQ13Z+WkRlL2BqdK+ug+df8cZKEAbd/Tc7dtegF4tJ5+etmvazAiwFzcsSXtEW5rtz3N6aDcmvp5gzpS7W225B9eQF+vLV4u5ci1xZ+5uw2A1ewiI4v8wDvT95VPkNh1FsmXL3OulvgPgXF976Uv0J0A2Df3R8TZvIxEccvc6nzrUX6U5beNhkJS9hft+u/xJcsRqYbl+Z5HuNTsH013AiEtdev46dPufM30FcZaEcOuv0+939dnJgx1NuQ9bturvpqYQcHGzWPgpXLIWIj5lMYuGgYCBg2VxEXGxsW83DwkLCsNJU48/EPuNssNNpUtxxaUISSUg59DRVWIVdNQ0VNOq62tnyaWkpaaUufUVFTUTEyZNPIkywpc2fOmrRKlSkpKlrUlIBJaLJ06VTyps+fNlyJEiWubPnTVhEuVKlpUtcxa1EJQlCEqWpaiAEgqVYCNo7socB4Ts98HZDk9xpo5qmVMxZ6jW3Ev/ac0TGHYTFQrT6CptcDJoZmGk8F7gpYebglR/dMTHRLrvvr9nvwlpvBzw1wjLS5cs4/W/8AvnNdUhYne3x6slShPkInJKkLpcMkS5GG0xlcMmailVVhPtqqetfnx4jZwmZ0zPWYmlShh0j/ACHCJKklHs8PkLWZcxSCyhNqpiplVN43WlU0SSeCUhKfSmO744JDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEUIqFho6GiIKNh2IuDi2HoWLhIpluIhoqGiG1NPw8Qw6lbT7D7S1tPMuoU242pSFpUlRBoQFApUAUkEEEAgghiCDYgixBsRFqkpWlSFpStCklKkqAUlSVBlJUkuCkgkEEEEFjaNGr2ofYjjuxzx8jXctS58cEeKERMMzcMJg208YSRqW+XZ3w9iIhSVJTG5UiYhH7NSp11yMyxFyaLW65G/tNqG19zdl9WCYioyUn7hVlU2kUyiEX/tKYkhgqSSOAOeKSqWX4+IDT3xFygvK2NLNOg/1RiKplRhy2VwSnU86hUdPaUyikS3USunVJUT7QL4cayFX662/ep+8KnXn63sTxBSXHXY/LtHXSk7jzFuRseRvr6ixAkoWPHw31uDWgI29BUGghI2NiPrzB+tjEZD+T+WnctzuWdza6paHOtRzppU6Hp5gGtjuYiltA/MPcsC5HPtqNgx4Yt5A2+F9++xb4i8pK6Uofn15/oiugJxY3mPr663aLVJvyPMjUdRof1HSJKXARty02rptzoKWqRfc2FHL478/g/bezRlN2Otyz+8au5/2mGh1isldKX52r9PrWlaHriMgj6+Pw7uIsKSHbubWvz5GzHq+piQlwGhNa+NxWleh6bEnmcWFPJvSxbT65WDC0Wu7gjn59udm035WeuFcjtt06XvuN9dCMWNo40tv00L/qkE8ja0o5en8YrJcpT62I8frp5a4tZ9Pr5chq7lmiw21Bf60tflvYdmrJXyNOo0qLC1KDc1ArW4xaQDqP16/wAYoUgjnt8yx5cy/e0VQ5yobUtqTzodSdyTYV1xaUDbn9abfTjWLSg6Pbkbhuh1ZtGPnvHP3gFa+RNq+J08Kcji3gPft/FvreLeEjbux2vZjrzu/cbVA4RpXyuBXny61GLCgbgX9fXfyJihAGpvexSQP+X5PrHL3h518AD9AcW8CRt7z5bxRh08lN/4h8zDvj+Ef7h/LDh/1lesUbt/vD9YiPugrCR3RRO1rmta8iBz56WxNLSQkm5fRyHPLrEqE22ux1H69+e2jxDdXUG9a3pSmhFOXT/C2JAn8tmD+4uAzWfptptEnCByYG4u4D9LPzG22sQnV1qN6bnQ2pewv0pTE6UgNprctdnc8ywHN9IlDKFuTC3d9dLdC+h0j332UeGwlEqiOI02h1ImM9ZcgsvNup7q4eSIdAio8N/eC5rFMpbYccSlQgYUPMFUNMSpXnf9rzxQGKYrS+GeEVCV0GBzZWI5lmSVFSZ+NLlFVFhhmD8BRhdNPNRVS0KWn7/VS5U32dThykD1W+wz4N/1LglX4uY9SzJeJ5ikz8MylJnp4TTZflzwmuxZMpQ40TMZrJAp6SbMTLUMNo1z5BmUmLJmK9iKdJ28yQBtoB6HTnfGlIQ2gbv83u1u3nHoODqUjmx1Oh5787u2xiipyouajmfhGv6r6dMSCXe79t/5NobP0aDE9Tu2nrYP1uQ24sKK3ABbSngNxQAUJ8DTcUrQYlTLbSwfffS+453uDYaCAABbQ8gHO2pOl+TM4L7xHW6TvSwAsajwAsLHW1wQbVJlSjkH3f8AU+T3s9w1oqGYDQGzC+rC51326XuBEdTmvn1J0udQN7cieoxMmW4c307D4E9m8ooTZhYWADjXnZ+egvZ3FnjLcsbgC9tv631POu9sZCUsdH8i/pt7z20gPjdr37tYFmtu7WBDR1uHrcWpqbUqTsBU8gdhcjEqEvYWFg5u3IAXJ27b7RUb8w1rsGsDs/ndg40DxFuU8f8AhTW1BzIHoNSBbGUiWA1rnV7knr9dbXBPdtSWdxz6bbqIs/MaRDcc19bm29/QGtDypc1xOlJJtq/Ueb2HXsTcbB593c/7OlrEuNRpewiqXyr56kAine05aUJpS4tTKSgJ6n6+u1gAIq2nTQbDuemgJ05ExDW4Njf9bU+7alBc0p45CUF9L8tuTuNDdxty6HGxve521OhOvPezmMtXs0ezKcwTg9oXOkuSuSSCKiIHhtAxjCltzLMTClQ8xzWlLoDLkJl5XvZfJ3QiISqfqjItpcHG5dYW96NfYe8Cv61xH/2xZmokrwzCJ06lyTTVMpRTXYzKKpNbmAJWEyl0+DkLo8OmcE5KsXVU1MtVNVYNIVM1r8d8/fc6X9isKnlNTWoROx2bLWOKRRLAmSMOdP40rrnTPqUkoP3MSpahMk1y0oziY9UY1NhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQhhCGEIYQjzd2sOzFkHtc8E808Gs/NfZ2Zq0JjlfMjMOmImOS85QLMQmQ5qlrZdYLrkA6+6zHwP2iHbm8niplJ332mI9xxHy8ZwmmxqgnUNSGCxxSpoDqkT0giXOSHDlJJCkkgLQpcskBRMfAzNl2hzRhFThVcGE0cdNUBPFMpKtAV7Gplh0uUFRC0cSRNlKmSlEJWSNBrjhwW4hdnXinm/g9xQlBk+cMmTJyBjUsl5yXTOEWkPSyfyKMfh4VcfIZ7AuMTKURyodhb8FEI+0Q0NFJiIVnXLEcPqcMq51HVo9nPkLKVM5QsaomIUQCqXMSQtC2DpUOIAvGlmMYRXYFiNVheJSvZVdLMMtRHEZc1GsudKUpKTMkzpZTMlLZJUkhwlYUkdYJXXqaXpaut9OlOgFbjT56kv0On19e5wfkqSdRY6B/W/rq3zEV0OHUE7DWnkT+OvI3riBSWsR7vg4aIyAduHXVz6ebaWLjUhhKQ5S2vNPp90ix5jQioHTEZTckWPPY/4hqORN+ZEWENrfl07jyIb0dolIXXS3+B1B8+ZsagYj9x+mZn117RQpBF7/H3dGe+7bGJCXCLE+VBTw/pqeZJAxQpBvvzGsWFN3Z+ofi7636cn0IEV0r0oeetjXal78tuZN8RlLe7TTqTa3PzYaRYQC++mgcNu4a2jt5ARWS4Rap+iqV+Y26898WEdAR6j37/VosII0uNLu3PXnpqLdLiKyXAdT+fkL1ttShtvXFhSNrdNvrrqxI0tFHB1Dd9NOZtzFu+kVAvetLc6EdOtedqb4oxGz9g4LdNBZ+V2Cd4oUDY6+n16xUDhFa7c9vMWPqcWsC2z/Wh15ai+gLXtKVDZ9NOnofTvFUOnWp9aj54o36XcX5OQ3vi09Q3ldvcPcNO8cw9pcedfnenp/TBi7Nccr/CH4eo9D+kcg7/MfJZ+hJxQpG6fURaw5D0EfvvbffV8iB/h5eWKMOQ9BFeAEOw9Db/liGtwKUpROp1qnTS9Dy1+eJQg200bR79mvy9D0ioSQOXQg+gs3a/TpEZ1YFaUqDuo/nSht09MXhNwwYPy6HRhdteY7ERIA6ebjUC769yXsd+mpj73hTkKI4kZ0luX0BaJc2r7fPolCi2qFksM419qKHBVSYmLUtqCg+6lSkxMS24pIZbdcR1z4teINJ4ZZIxTMk0y14gU/cMBo5ifaCtxyqlzfucpct0g01NwTa2tJWkfdKWclBM5cqWvuTwM8Kq3xg8RcGylKTNRhIV/WmZ66XM9kaDL1FMl/f5kubwqKaqqMyXh1BwpWfvtXImLSmnlz5svLbCswsvhIaBgmGoOCgodmEhIZhIbZhoaHbSzDsNIqSltppCW0JoKJSBUmhPjlW1VZiVbV4jX1E2srq+pnVlbVz1cU6pqqmaqdPqJqgAlUybNWpayAzqsBYD3ww/D6HCqCiwvDKWRRYdhtJTUNBRUyGk0tHSSUU9NTSUl+GXJky0S5YLnhSOIliTULxAsTfdPqTU2HjQVvrriAIG+nx+Y9T5Rltu1/wDX/Qc9h6RQU8aGhrtUVUo23JNBTkfOgOLwi/5fMhm/l0v3hbm+tk2Hazkud9L3Y2NJTnWm1jVWlN7CngKbcjKmW7O9z2B9b/A62irnQMA/zawcPudC+m7Cgp3XrW9b9d9elzyxOlDeR8vSxPu896M+rA8zfUnQX13cs7kbkxlO7ih31trap30OgN9gQDiQIvpftfyFmFwNrc4rZzs+5/Ny5MNQ2hbbcR1OnUk2qBU32Fh1NflrQHE6ZT6+nwJNnsQ3wIJhYB9ObO/m+7ka/AkCOtzrTUm9z41uNdPwFp0oA5emnbU2HdmtDkHYNtqdbgMTcc+92vEW515gAb66DkKC9TcUNqHGQmXxbW6v8u7eTgMbG0cWvawHN1N5dLdWiKpwnfyOnIXqb86WvSmoOQlITYeZ36/rc9zFQ+9zcO7atpuxO+r6BtIq3L0HrUjzPT8bUJ0nQh+XXfyHMhr8nDkB3o528zvbVhyHP0c6+k+yp2b592lOJMPl5n7VL8lyQwszz7mJgBBlsnW8oNy+AddadY/bk7LL0JKW3G3g33IqZOsPQsviEL7++z94I4r41Z1kYPKE+kyzhSpFbm3GpQAVQ4apZCKOlmzJcyWcVxQy5lPh6FomBHBUVsyTMp6Kcg8B8RM80mRcCXWr9nNxSrEyRg1AokifUhI4p05KVBRpKTiRNqFAoKuKXJStMyegp2g8vZfk2VJFJ8s5dl0PKZDIJbByiTyyFSpMPAy6AYRDQkM131LcUlpltCSt1bjrigXHXFuKUtXu3g+EYZl/CsOwPBqOTh2E4RRU2HYbQ04Ik0lFSSkyKeRL4ipZEuWhKStalzFl1zFrWpSjoFW1tViNZU19dPXU1lZPm1NTUTCCudPnLMyZMUwABUpRLJASkfhSAkAC8Y+lGLDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEYxfaYez2y/22eGjc2yw3L5Hx/4fwEW7w9zM/RiHzFLwH4uI4dZmiO+hv9izeLX7+UTSIS47lidLMbDqTLZhP4OZcTzVlqXj1JxyeGXiVMlRpppsJqbk0s4uPwLVeWs3kzPxAhC5qV9e5/yPIzdh/tKcS5ONUSFGiqFfhE+X+JSqGoU4HspizxSpinNPNJWlkTJ6ZmkTmrK2ZciZmn2TM5SSY5azXleaxkkzDIJvDOQUzlE2l764aNgYyGdAW08w6hSFapWnuutqU2ptaugp8ibTzZkifLVJnSVqlzZSxwrRMSWKVJLXBfQF9RqANRKqlqKKfOpauTMp59PMVJnyZqSmbKmoUykTEG4UlTnlqzhQizpcBpU30rSlqXrzG/ysTXEBGx+vlrGKUnUBuxB30+AYvcPtaulZtXpvatToRodeorUXFcQqQR1F/o+X1dojbn1u1vP3W3ZnLtElLm9TUCtQKGo/iAtSt6i9+hOIyl7eRB25tuD006RaUkG1ntrYvsDbzB5dQIkJdFL0tao0r4W+dN/vUxGUkbE6f4m07ejtaw0i3XXU9hc6F+X0NbSEr3BtzOnz0pXela6EYo3K/Tf0/R4tKQe/MfV/OK6Xda01qK/nbb8upsKQem1rdfjFhSe40/D+nU8rbtFULHPkb9dBXXzOt9MWlH0Pi1teQZrM8WsD8wNetiz7uAwFme8VQs7Go9RbwNvlXrixiP00Pv18n6xaUtdyDqRp0diGPk/WOaXeumlDb0r+uWKFPMa8xeKMoG7abuD30P1y0ioHR0B3qKV8aW/XrbwjmRyvp27xR9iD1s4+fTn7o5hwcyOgIV9b/r1t4COR7hh6DU9T/Kn4NwB7j+o93pHLvjkf15jAJUNCPU/DT1EOFJ0PoX/WOK3KJJChWlBYi5sL1wSFOHdt7+vPbpDgHM+79Ii962iR1p/X6+eJeI8z6/Xu8orw9VHo7vFFazempNa6X5nlQg10OlOtwBtfsGc31YXdw1ri5sIvCQGLpG3UDdj2PUXLxk27PvDsZCyW1GTBhLeZM0Jh5lNCtKkvQkIEKVK5SsqAUlUKw8qIi0JSjuR0VEMKLyIZlw+WP2kvEtXiBniZhmGVKpmWMpKqcMw1KC8mtxErSnFsXCU2WmdPkpo6KYpUwKoaWXUS0yVVk+WfbH7JPg6PC7w5k4ri9GiXnHO6KXGcX4pZ+8YdhnAteCYGpawFoVTU9Quur5aUS+HEq2dTTTPTQ002O9y7zIqNKXN+psfkfGt9eBK0d9RrYa+vdie0bVObiwsAGPPewN3vZvO0Ui5YipO57xrz2FvzxIJYB08wL+pbns+8GO77asB2+G190gtFNTttQNgNNuQ100NOtMSBAvbY9T35D084MG2a/wCV92dyT19zOzg0VObabXtXmQNdK2qa7XFReEktqddLnnroH924Aitxc+4OXI322Hu0FjRU5zpy+I0HkAeZ5img5mVMon5MxvYhzZvTXswachzL/i2bX520cD8sR1O6mp318dhbnrppWuJ0ywNh5WcAHW93Gvp3dtrudLPZ3HqOrkuYjLd1ua+pp62uenia2lSglgB5D6s2+uujgiHDvd+o7sw7sSSe5/MIjLcubjpa3O3O5sRprTXGQiU11emnL9B17GKgejamxb5M3TW4cRHWvcknxNzb0FgdKV0ucTBOwsP5D5iK6aBte/Rn6mz25Bi8RHHKa6bXtYmo6n53xkIQCOXPmX07DdtbB2vFt9n7DdjuT0F99js/ZPB3hDnbjpn6UcPsjS8xc0mK/fR0e8h79k5ek7LjaI+fz6KZbd+xyuBDzaVK7qn4qKdhZdANRMxjYKFf7F8NPDbMvinmzDsoZVozPra1XtKqrmJmCgwfDZa0JqsWxSfLlzDTUFIFoBVwqmT6iZIoqWXOrKqnkTOP5nzNhWUcHqcaxeeJciQOCTIQUfeK2pUlRkUdGhak+1qJvCoi4RLlJmzppRIkzJiNofgVwSydwA4eSrh/k5gqZhv9dnc5fbCJhmXMD7DDUwnkwotwIdifs7TUPCocWzL4FiFgGFKah0qV7t+FPhflvwiydQZQy3KeXJ/yrFMSmICKvG8XmypUusxWsZSgmZP9lLlyZCVql0lLKkUsolEkKOgObs14nnLGqjGcUWApf9lSUqC8mhokKWqTSSbJdMvjUqZMKQudOXMnLAUsgdxY7IjjEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEYffae+zDkPbAkERxV4VQ0sy52kctSwNsvOGHl0o4sSeXsL+z5XzPE9xDUNmaGaQ3C5SzZFuJaYbS1l7MTv7CMtmeVuFZsynKxuWayjSiVikpDAlkIrEJFpM5TMJoYCTOVYMJU0+z4VSur/EHw9k5okqxLDRLp8ekS2BJCJOJSpaTw09SWZNQkMmmqlH8IAkTz7HgXT6ZuaMr5lyLmWd5OzlI5rljNOWplFSaf5fncE/LptKJpAulqKgZhBRKEPQ8Qy4khSFpood1aCpspUroydImyJsyRPlLlTpS1omS5gKVoWk3SoKYhQYguG3cjhB1TqaSfRz51LUyJlPUyJi5U+nnJVLmSpiSUrQtCgClQ0YsNxZos6F228Dp/Sx89q944gIN20+n9Ow6sbRjEcV2Lb2v1BG9+Vr6gJiQldaU8aE32pQ1odeZ8QTQRlAOlu1h8IjKSNDyBG29tHG9iD0FhFZLnjzqCQelR1oNuovfEZSRYj57X9N/wBIsKXtp0IHm2+pJ1Poz10uEUIttavd5XBIIN9ietiTiMpfru+hfuBpszadgItIPudidRqWaxHWz7XESEu6VpytSmtNNf8Al5E1xYUkPuL3NjoCeh0O/YbxS29vX+Oupt25RVS4DodDsfnQ/QVN6Yo1+X+K3l/Gw3ihAOoB2f6uP5tFUOEU2ttY0tt5aW6EYoRzDh+4f4Rbw9X6KuP1H1rFQO+o0JF/Cv589cW8I6gcgbd2+tIt4TuLbhJt6Hfkx8tjUDg5mw0B71et7jwH+NpRybvow8rHu38KEdGvYkEfC3dwG67cu+Dv6g/UE/S3XFOA8n6gj4ED4+kU4QzFj2UG9CB8fSP0L5ECvJX5C/rinD/i/wB3+MU4B/dP+5/GOK3NB3t664uQncjoxi9EvU8I5M1/PlFJS7XVXX979XNbYv4RyHoIuUiws1xt39w38ucd89nnh5/ltnFubzFlLmXsqLYmEYlxv3jUdM+8pcqlpC6tqQXWlR0YlSXe/DQghnG0pjUOp16+0f4lHIWSZmGYdPVKzJm1NThmHLlzDLnUGHhCUYviiVIaYiZJkz5dHRrQqUtFZWS6lEx6RaVbX/ZF8G0+JviLLxnF6UTso5FmUmM4qidITNkYniypi14FgqhMHsVyZtRTzMQr5cxM6XMoaGZRzZQFfLmoyVl2orc1uTpv/NY151N/KvlqENYWbYEkegcD0HSPagu92J1/Eoqcnf4vbz1bgXTsR43J8O7oNuR+dbgg68JF+QAPnvvoDDnfk/CG31e79b6bRTLlRuB5AfmPC2pFcXiWQTpY6an5B/XR2sYNr2Aclz2a99xbUi0Ui51vb7uvmTr68rb4lEodSH/e08kjTtrrdMVt3Y6DYbizm2xte1hFFTtNKX0OppW9TX8786YkCALNowuwvpp+unckmjm2g0F9n6B9e+2gZ4oKdtqdaVrUgVv9dNR1rUSJQSzdNrXvp8m3fRnMTe5/xaciyR33Da33igpwHetR5UuLmouaDrsf3jidMrQm3x58ufPe7WAFWf0a/kbBt+bG/QMaC3K3sNegvXrfz9KWEyUgWA/X+UNOvUtqPeNOps50vHU5S9ak1t6moHpz6hN8SJS/bV9rbE+ul/8AFaGnXzs46XJNhzNjpEVbmv52Ap+8b7aXv1xkpls25ttv0GzvyfqNIaks/dtw4s/Unto7GOwuE3CbPfG7O0syFw+lDk0nMwUHop9ffZlkjlTbzLMZPp5GpbdEuk8AX2vtEQUOvvvOQ8BL4eMmUZBQcRz3w98Os1eJ+ZqHKmUcOXX4lVkTJ01XEigwuhRMly6nFcXqghaaPDqQzZftppSubNmTJVLSSamtqKemnfBzJmTCMqYTUYxjNSKelkumWkELqKyoUhapVHRyiUmfUzgg8CHCEJSudOXLkSZs1GzN2aOzVkrs1ZHby5l5CJpmWaJh4rOecoiGbZmWY5m0hQShABcXAyKXKcebkkmQ861BNOvRD7sXM42YR8X7geCXgnljwTysjBcHSmuxquEmfmXMk6QiXW4zWy0nhQkArVS4VRlc1GGYamauXSy1zJs1c+tqayrqND8956xXPWLKrq0mnoacrl4XhiFlUiikKIcqLJTOrJwSg1VUUJVNUlCEJlyJUmTL9HY7njg8MIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhDCEMIQwhGL/ANod7Mzhv22ZA5mmSOS/h/2gpHLwxlviAiF7sszLDQwQIfLPEWHhIdyLmkpDSFQ8qnMOlydZaccbehUzKWNxMgj+J5lyrS49LM1HBT4ihDSqhvwTgPyyqoJBUpGyJgeZJJdPGkGWrr3PGQKDNsk1Ekoosako4ZFbw/2dQlLNT1yUgqmS2HDLnJBnU5IKRMlhUlel9xo4KcUuzxxCnHC/jBlCaZMzjJVBbsvmLaVQ0wgHHn2YSdSKZMKcgJ5IpgqGiPsE5lcRFS+KUy+0h4vw77TXRlfh9XhlTMpKyQuTOl3KF7pchMyWsEpmS1MoIWglJIsXCm1SxfB8QwSum4filLMpaqTcpWPwrQSQmbJmB0TpKyDwTZalIUxD8SVJHWCHPltv5amwt5mgFcYJSNm9dLPd+V+TDmbR8oixfrcP7wPV+gd9DXS6TQVrv18bCh1JPS5rcGwjn9dO4iwpBDtbtZ78ySC3e55ERVSvkamun3SB59P8SL4sKBtaLSkjqDsb+hu7Hvy2isHDemvOlD9NgeW4r1jKSNRb1ixhZ3HQ3A8+7b9LGKqXTfTyHdPTSxI1oKVqKEXGLCkFtbc3PxO+nLpFOHy7aDvoQGO9xd3sYqh4ilSLUA7w031AIqB4E600raUHZxbYuOzEg33vyu2lGOrPva3TSxbsOji8Vg7XUUpyoR8q18KjXzxYQ3IvzdPmx9zltYpb6+vke+0cg4k6EV5Go5+JHPf8hDaggerelj5RRu3r9P5RzCzUAH5gjyrfTW1RhbmObF3+Y98UKRuPkf1+ukcu+rn6AH8PpimsU4E8vef1imVoJua0tTumg1romlb3xeEqa3qCL+/07mLwCBYkPe6v1MSIKFiZjGwcvl8O7FR0dEswcJDMtqU9ERMS4llhlpHd+JxxxSUpFdTe1SMesq6bD6KsxDEKiVSUNDTT62rqqiYmXJpqWllLnVE+bMUQlEuTJQuYtRsEpJJDRm4dhtfjGIUGE4ZSzq/EsTraXD8PoqZJnVFXXVs9FNS00iUl1TJs6fNRLlpAJKlDvGVvhrkyF4eZOleXIchyKaR9rm8UnugRk4ikIVHRAKaD3KFIRCwoNVpg4aHStS3AtavIbxWz3U+JWdcVzJOeXQqX9xwOlUCTR4LSrmCilK4i4nT+OZW1YACfvlVUcATLCEp97vBLwuofCDw7wTJ9PwT8RSj+scx1yAnhxDMNbLlHEZ6ClISqmpzLlYfQEuv+r6Kk9quZNC5ivui6L1APnX1FPDHXQQBuX6W+vJrR2yX/ALoYcym3xt6RxL19daWA89/p41xdwi5bk7kmx77ae6D3IcDRgA50e1hb17iKRdr1O+9L/KmtT1scXhJ5bW2Hbbbl0uIo3MEuBqW9Q5Ol9+3Kmp0ixIGovep2sNK2pS52G+L0ylEP9fEdi3rtFRsOmiR5am/QksxFyIoqdvzBpruDra56/Ikm2JRKAZ7+T+8/p+sVZn0Gt9fj1vq2tjrFJThoa0pTwHLT5Ct+dqAShI0AuYr2D33t19NNHc35mKCneZrQa6C/Ifha/XEgQT66b66OWH8L8oo9+dhowDc9e7P7tTHU7t6ab05U0GvI9MTJl899db93uXPaxu5NqOTZntYBwByvbRujH/ljqd1uDTao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Type,Vendor Name,Vendor P/N,URL,Notes
-C1 C3 C4 C5 C7 C10 C11 C14 C15 C16 C18 C19 C20,,13,Yageo,CC0201KRX5R6BB104,0201 0.1 uF 10 V ±10 % Tolerance X5R SMT Multilayer Ceramic Capacitor,tempo,smt,Digi-Key,311-1593-1-ND,https://octopart.com/click/track?ai=8297&sig=067af79&sid=459&ppid=25629481&vpid=193845858&ct=offers,
-C2 C8,,2,TDK,C1005X5R1A475K050BC,C Series 0402 4.7 uF 10 V ±10 % Tolerance X5R SMT Multilayer Ceramic Capacitor,tempo,smt,Digi-Key,445-13820-1-ND,https://octopart.com/click/track?ai=8297&sig=01f98a8&sid=459&ppid=28166959&vpid=73759644&ct=offers,
-C6 C12 C13 C17,,4,Taiyo Yuden,LMK063BBJ105MPLF,CAP CER 1UF 10V X5R 0201,tempo,smt,Digi-Key,587-6263-1-ND,https://octopart.com/click/track?ai=8297&sig=0712f19&sid=459&ppid=59159715&vpid=528035991&ct=offers,
-J1,,1,Panasonic,AXK750147G,"Connector, Receptacle, 50 Position, 2Row; Pitch Spacing:0.4Mm; No. Of Contacts:50Contacts; Gender:receptacle; Product Range:p4 Series; Contact Termination Type:surface Mount; No. Of Rows:2Rows; Contact Plating:gold Plated Contacts Rohs Compliant: Yes",tempo,smt,Digi-Key,255-2533-1-ND,https://octopart.com/click/track?ai=8297&sig=053b57f&sid=459&ppid=6716868&vpid=34098380&ct=offers,
-J4,,1,Samtec,FTSH-105-01-L-DV-P-TR,Connector Systems:wire-To-Board; Pitch Spacing:1.27Mm; No. Of Rows:2Rows; No. Of Contacts:10Contacts; Contact Termination Type:surface Mount; Product Range:ftsh Series; Connector Shroud:unshrouded; Contact Material:phosphor Bronze Rohs Compliant: Yes,tempo,smt,Mouser,200-FTSH10501LDVPTR,https://octopart.com/click/track?ai=8297&sig=062d0da&sid=2401&ppid=9236906&vpid=493091076&ct=offers,
-J3,,1,Hirose,BM10NB(0.8)-16DS-0.4V(51),CONN RCPT 16POS SMD GOLD,tempo,smt,Digi-Key,H11823CT-ND,https://octopart.com/click/track?ai=8297&sig=086fb17&sid=459&ppid=19073631&vpid=33743439&ct=offers,
-J2,,1,Molex,505110-2091,CONN FFC/FPC BOTTOM 20P .5MM R/A,tempo,smt,Digi-Key,WM11287CT-ND,https://octopart.com/click/track?ai=8297&sig=08af8fc&sid=459&ppid=57952888&vpid=213397109&ct=offers,
-J5,,1,Hirose,FH35C-13S-0.3SHW(99),CONN FPC 13POS 0.30MM R/A,tempo,smt,Digi-Key,H122265CT-ND,https://octopart.com/click/track?ai=8297&sig=0682a03&sid=459&ppid=33632612&vpid=120326136&ct=offers,
-U8 U12,,2,Texas Instruments,TS5A23159DGSR,Analog Switch Dual SPDT 10-Pin VSSOP T/R,tempo,smt,Digi-Key,296-18598-1-ND,https://octopart.com/click/track?ai=8297&sig=026eeda&sid=459&ppid=512343&vpid=1735040&ct=offers,
-U14,,1,Texas Instruments,SN74LVC1G07YZVR,Buffer/Driver 1-CH Non-Inverting Open Drain CMOS 4-Pin DSBGA T/R,tempo,leadless,Digi-Key,296-21057-1-ND,https://octopart.com/click/track?ai=8297&sig=0e65ea2&sid=459&ppid=664237&vpid=1799702&ct=offers,
-U9 U10,,2,Texas Instruments,SN74AUP1T97YZPR,IC TRNSLTR UNIDIRECTIONAL 6DSBGA,tempo,leadless,Digi-Key,296-17899-1-ND,https://octopart.com/click/track?ai=8297&sig=0e9ca45&sid=459&ppid=464945&vpid=1674955&ct=offers,
-U1,,1,Texas Instruments,INA3221AIRGVR,IC CURRENT SHUNT MONITOR 16VQFN,tempo,leadless,Digi-Key,296-INA3221AIRGVRCT-ND,https://octopart.com/click/track?ai=8297&sig=0b68a57&sid=459&ppid=22631279&vpid=595207883&ct=offers,
-U2,,1,STMicroelectronics,STM32F412CGU6,IC MCU 32BIT 1MB FLASH 48UFQFPN,tempo,leadless,Mouser,511-STM32F412CGU6,https://octopart.com/click/track?ai=8297&sig=0d8fdb9&sid=2401&ppid=74146039&vpid=458625504&ct=offers,
-U3 U4 U5 U6,,4,Texas Instruments,TPS2559DRCR,IC PWR SWITCH N-CHAN 1:1 10VSON,tempo,leadless,Digi-Key,296-40730-1-ND,https://octopart.com/click/track?ai=8297&sig=0e5279b&sid=459&ppid=47153743&vpid=192871412&ct=offers,
-U7 U13 U15,,3,Texas Instruments,TS3A5018RSVR,IC SWITCH QUAD SPDT 16UQFN,tempo,leadless,Digi-Key,296-27552-1-ND,https://octopart.com/click/track?ai=8297&sig=0179e01&sid=459&ppid=18629953&vpid=34364363&ct=offers,
-DS1,,1,Lite-On,LTST-C190GKT,"Smd, 0603, Grn, 569Nm, 6Mcd, Clr, T/r Rohs Compliant: Yes",tempo,smt,Digi-Key,160-1183-1-ND,https://octopart.com/click/track?ai=8297&sig=0316225&sid=459&ppid=549821&vpid=1103326&ct=offers,
-R37 R38 R47 R49 R51,,5,Vishay,CRCW02010000Z0ED,CRCW Series 0201 0.05 W 0 Ohm Jumper Surface Mount Thick Film Chip Resistor,tempo,smt,Digi-Key,541-0.0AGCT-ND,https://octopart.com/click/track?ai=8297&sig=0ed1c57&sid=459&ppid=39994378&vpid=114977597&ct=offers,
-R35 R36 R40,,3,Vishay,CRCW02011M00FKED,"THICK FILM RESISTOR, 1MOHM, 50mW, ±1%",tempo,smt,Digi-Key,541-1.00MAABCT-ND,https://octopart.com/click/track?ai=8297&sig=0227c5e&sid=459&ppid=41857821&vpid=116456133&ct=offers,
-R31,,1,Vishay,CRCW020110K0FNED,Res Thick Film 0201 10K Ohm 1% 1/20W ±200ppm/°C Molded SMD SMD Paper T/R,tempo,smt,Mouser,71-CRCW0201-10K,https://octopart.com/click/track?ai=8297&sig=0ddf9ae&sid=2401&ppid=39803208&vpid=116516014&ct=offers,
-R48,,1,Vishay,CRCW0402120RFKEDC,D10/crcw0402-C 100 120R 1% Et7 E3,tempo,smt,Digi-Key,541-4077-1-ND,https://octopart.com/click/track?ai=8297&sig=08ebab3&sid=459&ppid=75649391&vpid=454352811&ct=offers,
-R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R17 R18 R21 R22 R27 R28 R30 R33 R39 R41 R44 R50 R52 R55 R56,,26,Vishay,CRCW0201100KFKED,Res Thick Film 0201 100K Ohm 1% 1/20W ±100ppm/°C Molded SMD SMD Paper T/R,tempo,smt,Digi-Key,541-100KAABDKR-ND,https://octopart.com/click/track?ai=8297&sig=0c369aa&sid=459&ppid=41857764&vpid=115224580&ct=offers,
-R26,,1,Vishay,CRCW02011K00FNED,Res Thick Film 0201 1K Ohm 1% 1/20W ±200ppm/°C Molded SMD SMD Paper T/R,tempo,smt,Mouser,71-CRCW02011K00FNED,https://octopart.com/click/track?ai=8297&sig=000b814&sid=2401&ppid=39803573&vpid=116319440&ct=offers,
-R1 R19 R23 R24 R42 R43,,6,Stackpole Electronics,CSR0402FKR500,"Thick Film - Current Sensing 0402, 1%, T&r - 1,000 Pcs/reel, 0.5 Ohms Rohs Compliant: Yes",tempo,smt,Digi-Key,CSR0402FKR500CT-ND,https://octopart.com/click/track?ai=8297&sig=0aa805e&sid=459&ppid=21887093&vpid=203733614&ct=offers,
-Q1 Q2,,2,ON Semiconductor,BSS138,Fet 50V 3.5 Ohm Sot23 Rohs Compliant: Yes,tempo,smt,Digi-Key,BSS138CT-ND,https://octopart.com/click/track?ai=8297&sig=004b419&sid=459&ppid=19021258&vpid=452459305&ct=offers,
-SW1 SW2,,2,C&K Components,JS102011SAQN,"Slide Switch, Spdt, 0.3A, 6Vdc, Smd; Contact Configuration:spdt; Switch Operation:on-On; Switch Mounting:surface Mount; Product Range:js Series; Contact Current Max:300Ma; Contact Voltage Ac Max:-; Contact Voltage Dc Max:6V Rohs Compliant: Yes",tempo,smt,Digi-Key,401-1999-1-ND,https://octopart.com/click/track?ai=8297&sig=0e387fb&sid=459&ppid=7088996&vpid=34441074&ct=offers,
diff --git a/docs/sitemap.md b/docs/sitemap.md deleted file mode 100644 index 2b9f4aaaf8..0000000000 --- a/docs/sitemap.md +++ /dev/null @@ -1,79 +0,0 @@ -# Sitemap - -## Getting Started - -* [Getting Started Quickly](./getting_started_quickly.md) -* [Core Runtime](./core_runtime.md) -* [Write Protection](./write_protection.md) -* [EC Acronyms and Technologies](./ec_terms.md) - -## EC Bringup - -* [New Board Checklist](./new_board_checklist.md) - -## Case Closed Debugging (CCD) - -* [Case Closed Debugging Overview][1] -* [Google Security Chip Case Closed Debugging][2] -* [Tutorials][3] - -## Verified Boot Troubleshooting - -* [Cr50 Verified Boot Troubleshooting][4] - -## Fingerprint MCU (FPMCU) - -* [Fingerprint MCU (FPMCU)](./fingerprint/fingerprint.md) -* [FPMCU Development for Partners](./fingerprint/fingerprint-dev-for-partners.md) -* [FPMCU Firmware Testing for Partners](./fingerprint/fingerprint-firmware-testing-for-partners.md) -* [FPMCU Debugging](./fingerprint/fingerprint-debugging.md) -* [Fingerprint Authentication Design Doc](./fingerprint/fingerprint-authentication-design-doc.md) -* [Fingerprint Factory Requirements](./fingerprint/fingerprint-factory-requirements.md) -* [Fingerprint Quick Factory Guide](./fingerprint/fingerprint-factory-quick-guide.md) -* [Dragonclaw Schematics and Layout](./schematics/dragonclaw) - -## Testing - -* [Unit Tests](./unit_tests.md) - * [Porting EC unit tests to Ztest](./ztest.md) -* [Code Coverage](./code_coverage.md) - -## Updaters - -* [USB Updater](./usb_updater.md) - -## USB - -* [USB-C Power Delivery and Alternate Modes](./usb-c.md) -* [USB-A and USB-C Policies for Sourcing Power](./usb_power.md) -* [USB-C Power Delivery TCPMv2](./usb-tcpmv2.md) - -## Verified Boot - -* [Detachable Base Verified Boot](./detachable_base_verified_boot.md) - -## EC-3PO - -* [EC-3PO overview](./ec-3po.md) -* [EC-3PO design doc](./ec-3po-design.md) - -## Zephyr - -* [Initialization Order](./zephyr_init.md) -* [Proof-of-Concept-Device Bringup](./zephyr_poc_device_bringup.md) -* [Shimming](./zephyr_shim.md) -* [Porting EC unit tests to Ztest](./ztest.md) - -## Miscellaneous - -* [Low Battery Startup](./low_battery_startup.md) -* [I2C tracing via console commands](./i2c-debugging.md) -* [Application Processor to EC communication](./ap-ec-comm.md) -* [Reducing EC Image Size](./reducing_ec_image_size.md) -* [Code Reviews](./code_reviews.md) -* [IDE Support](./ide-support.md) - -[1]:https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging.md -[2]:https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md -[3]:https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/ccd_howtos.md -[4]:https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/cr50_vboot_troubleshooting.md diff --git a/docs/unit_tests.md b/docs/unit_tests.md deleted file mode 100644 index f26a8519c8..0000000000 --- a/docs/unit_tests.md +++ /dev/null @@ -1,232 +0,0 @@ -# Unit Tests - -Provides an overview of how to write and run the unit tests in the EC codebase. - -[TOC] - -## Running Unit Tests {#running} - -The unit tests run on the host machine using the [`host` board]. - -List available unit tests: - -```bash -(chroot) ~/trunk/src/platform/ec $ make print-host-tests -``` - -Build and run a specific unit test (the `host_command` test in this example): - -```bash -(chroot) ~/trunk/src/platform/ec $ make run-host_command -``` - -Build and run all unit tests: - -```bash -(chroot) ~/trunk/src/platform/ec $ make runhosttests -j -``` - -## Debugging Unit Tests - -You need the host version of gdb: - -```bash -(chroot) sudo emerge -j sys-devel/gdb -``` - -Then run gdb on the specific test you want to debug (the `host_command` test in this example): - -``` -(chroot) gdb build/host/host_command/host_command.exe -handle SIGUSR1 noprint nostop -break test_hostcmd_ok -run -``` - -## Writing Unit Tests - -Unit tests live in the [`test`] subdirectory of the CrOS EC codebase. - -All new unit tests should be written to use the Zephyr Ztest -[API](https://docs.zephyrproject.org/latest/guides/test/ztest.html). If you are -making significant changes to an existing test, you should also look at porting -the test from the EC test API to the Ztest API. - -Using the Ztest API makes the unit tests suitable for submitting upstream to the -Zephyr project, and reduces the porting work when the EC transitions to the -Zephyr RTOS. - -### File headers - -Include [`test_util.h`] and any other required includes. In this example, the -function being tested is defined in the test, but a real unit test would include -the header file for the module that defines `some_function`. - -`test/my_test.c`: - -```c -#include <stdbool.h> -#include "test_util.h" - -static bool some_function(void) -{ - return true; -} -``` - -[`test_util.h`] includes `ztest.h` if `CONFIG_ZEPHYR` is defined, or defines a -mapping from the `zassert` macros to the EC `TEST_ASSERT` macros if -`CONFIG_ZEPHYR` is not defined. - -### Test cases - -Define the test cases. Use the `EC_TEST_RETURN` return type on these functions. - -```c -/* Write a function with the following signature: */ -test_static EC_TEST_RETURN test_my_function(void) -{ - /* Run some code */ - bool condition = some_function(); - - /* Check that the expected condition is correct. */ - zassert_true(condition, NULL); - - return EC_SUCCESS; -} -``` - -`test/my_test.c`: - -```c -/* Write a function with the following signature: */ -test_static EC_TEST_RETURN test_my_function(void) -{ - /* Run some code */ - bool condition = some_function(); - - /* Check that the expected condition is correct. */ - TEST_EQ(condition, true, "%d"); - - return EC_SUCCESS; -} -``` - -The only difference between those two versions of `test/my_test.c` is the -assertion: `c zassert_true(condition, NULL);` versus `c TEST_EQ(condition, true, -"%d");` - -### Specify the test cases to run - -The EC test API enumerates the test cases using `RUN_TEST` in the `run_test` -function, while the Ztest API enumerates the test cases using `ztest_unit_test` -inside another macro for the test suite, inside of `test_main`. - -`test/my_test.c`: - -```c -#ifdef CONFIG_ZEPHYR -void test_main(void) -{ - ztest_test_suite(test_my_unit, - ztest_unit_test(test_my_function)); - ztest_run_test_suite(test_my_unit); -} -#else -/* The test framework will call the function named "run_test" */ -void run_test(int argc, char **argv) -{ - /* Each unit test can be run using the RUN_TEST macro: */ - RUN_TEST(test_my_function); - - /* Report the results of all the tests at the end. */ - test_print_result(); -} -#endif /* CONFIG_ZEPHYR */ -``` - -### Task List - -EC unit tests can run additional tasks besides the main test thread. The EC unit -test implementation provides a phtreads-based implementation of the EC task API. -We do not yet support running additional tasks in Ztest-based tests. - -In the [`test`] subdirectory, create a `tasklist` file for your test that lists -the tasks that should run as part of the test: - -`test/my_test.tasklist`: - -```c -/* - * No test task in this case, but you can use `TASK_TEST` macro to specify one. - */ -#define CONFIG_TEST_TASK_LIST -``` - -### Makefile - -Add the test to the `Makefile` so that it can build as an EC unit test: - -`test/build.mk`: - -```Makefile -test-list-host += my_test -``` - -and - -```Makefile -my_test-y=my_test.o -``` - -Make sure you test shows up in the "host" tests: - -```bash -(chroot) $ make print-host-tests | grep my_test -host-my_test -run-my_test -``` - -### Build and Run - -Build and run the test as an EC unit test: - -```bash -(chroot) $ make run-my_test -``` - -For building the test as a Zephyr Ztest unit test, follow the instructions in -[Porting EC unit tests to Ztest](./ztest.md) to build the unit test for Zephyr's -"native_posix" host-based target. - -<!-- mdformat off(b/139308852) --> -*** note -**TIP**: Unit tests should be independent from each other as much as possible. -This keeps the test (and any system state) simple to reason about and also -allows running unit tests in parallel. You can use the -[`before_test` hook][`test_util.h`] to reset the state before each test is run. -*** -<!-- mdformat on --> - -## Mocks - -We do not yet support mocks for Zephyr Ztest-based tests. [Mocks][`mock`] enable -you to simulate behavior for parts of the system that you're not directly -testing. They can also be useful for testing specific edge cases that are hard -to exercise during normal use (e.g., error conditions). - -See the [Mock README] for details. - -### Mock Time - -When writing unit tests that rely on a clock, it's best not to rely on a real -hardware clock. It's very difficult to enforce exact timing with a real clock, -which leads to test flakiness (and developers ignoring tests since they're flaky -). Instead, use the [Mock Timer] to adjust the time during the test. - -[`mock`]: /include/mock -[Mock Timer]: /include/mock/timer_mock.h -[`test`]: /test -[`host` board]: /board/host/ -[`test_util.h`]: /include/test_util.h -[Mock README]: /common/mock/README.md diff --git a/docs/usb-c.md b/docs/usb-c.md deleted file mode 100644 index 1e009f82b2..0000000000 --- a/docs/usb-c.md +++ /dev/null @@ -1,219 +0,0 @@ -# EC Implementation of USB-C Power Delivery and Alternate Modes - -USB-C PD requires a complex state machine as USB-C PD can operate in many -different modes. This includes but isn't limited to: - -* Negotiated power contracts. Either side of the cable can source or sink - power up to 100W (if supported by device). -* Reversed cable mode. This requires a mux to switch the signals before - getting to the SoC (or AP). -* Debug accessory mode, e.g. [Case Closed Debugging (CCD)] -* Multiple uses for the 4 differential pair signals including - * USB SuperSpeed mode (up to 4 lanes for USB data) - * DisplayPort Alternate Mode (up to 4 lanes for DisplayPort data) - * Dock Mode (2 lanes for USB data, and 2 lanes for DisplayPort) - * Audio Accessory mode. (1 lane is used for L and R analog audio signal) - -For a more complete list of USB-C Power Delivery features, see the -[USB-C PD spec][USB PD Spec Id]. - -This document covers various touch points to consider for USB-C PD and Alternate -Modes in the EC codebase. - -[TOC] - -## Glossary - -* PD {#pd} - * Power Delivery. Protocol over USB-C connector that allows up to 100W of - power. Not supported on USB-A or USB-B connectors. A good overview of - USB PD is found in the [Introduction to USB Power Delivery] application - note. -* TCPC {#tcpc} - * Type-C Port Controller. Typically a separate IC connected through I2C, - sometimes embedded within the EC as a hardware sub module. The TCPC - interprets physical layer signals on CC lines and Vbus, and sends that - information to the TCPM to decide what action to take. In older designs, - there was a separate EC (running this codebase) that acted as the TCPC - that communicated with the main EC (also running this codebase), which - acted as the TCPM. More info in the official - [TCPC spec][USB TCPM Spec Id]. -* TCPM {#tcpm} - * Type-C Port Manager. Manages the state of the USB-C connection. Makes - decisions about what state to transition to. This is the code running on - the EC itself. -* PE {#pe} - * Policy Engine. According to the [TypeC spec][USB TC Spec Id], the policy - engine is the state machine that decides how the USB-C connection - progresses through different states and which USB-C PD features are - available, such as Try.SRC -* TC {#tc} - * Type-C physical layer. -* PPC {#ppc} - * Power Path Controller. An optional, separate IC that isolates various - USB-C signals from each other and the rest of the board. This IC should - prevent shorts and over current/voltage scenarios for Vbus. Some PPCs - will protect signals other than Vbus as well. -* SSMUX {#ssmux} - * SuperSpeed Mux. This is typically the same IC as the TCPC; it enables - the mirrored orientation of the USB-C cable to go to the correct pins on - SoC. Also, allows the SuperSpeed signal to be used for different - purposes, such as USB data or DisplayPort. -* SVDM {#svdm} - * Structured Vendor Defined Messages are a class of [USB PD](#pd) messages - to enable non-power related communication between port partners. SVDMs - are used to negotiate and set the display port mode on a USB-C - connection. -* DRP {#drp} - * Dual Role Power Port. A USB-C port that can act as either a power Source - or power Sink. -* UFP {#ufp} - * Upstream Facing Port. The USB data role that is typical for a peripheral - (e.g. HID keyboard). -* DFP {#dfp} - - * Downstream Facing Port. The USB Data role that is typical for a host - machine (e.g. device running ChromeOS). - -* E-Mark {#emark} - - * Electronically marked cable. A USB-C cable that contains an embedded - chip in the cable, used to identify the capabilities of the cable. - -* VCONN {#vconn} - - * Connector Voltage. A dedicated power supply rail for [E-Mark](#emark) - cables and other accessory functions (such as display dongles, and - docks). VCONN re-uses one of the CC1/CC2 signals to provide 5 volt, 1 - watt, of power. - -## Different PD stacks - -Right now platform/ec has two different implementations of USB-C PD stack. - -1. The older implementation is mainly contained within - [`usb_pd_protocol.c`](../common/usb_pd_protocol.c) and - [`usb_pd_policy.c`](../common/usb_pd_policy.c) -2. The newer implementation is found under [`common/usbc`](../common/usbc) and - is broken up into multiple different files and state machines - * Policy engine state machine files, `usb_pe_*_sm.c`. - * Protocol engine state machine file, `usb_prl_*_sm.c`. - * State machine framework file, `usb_sm.c`. - * Type-C physical layer state machine files, `usb_tc_*_sm.c`. - * USB-C PD Task file, `usbc_task.c`. - -The older implementation supports firmware for device types other than -Chromebooks. For example, the older stack supports the Zinger, which is the -USB-C charging device that shipped with Samus, the Google Chromebook Pixel 2. -The Zinger implements the charger only side of the USB PD protocol. - -To use the newer USB-C PD stack implementation, see -[TCPMv2 Overview](usb-tcpmv2.md). - -## Implementation Considerations - -In both older and newer implementations, the following details apply: - -* For each USB-C port, there must be two tasks: `PD_C#` and `PD_INT_C#`, where - `#` is the port number starting from `0`. - * The `PD_C#` task runs the state machine (old or new) for the port and - communicates with the TCPC, MUX, and PPC. This task needs a large task - stack. - * The `PD_INT_C#` tasks run at a higher priority than the state machine - task, and its sole job is to receive interrupts from the TCPC as quickly - as possible then send appropriate messages to other tasks (including - `PD_C#`). This task shouldn't need much stack space, but the i2c - recovery code requires a decent amount of stack space so it ends up - needing a fair amount too. -* Saving PD state between EC jumps - * PD communication is disabled in locked RO images (normal state for - customer devices). When the jump from RO to RW happens relatively - quickly (e.g. there is not a long memory training step), then there - aren't many problems when RW takes over and negotiates higher PD - contracts. - * To support factory use cases that don't have a battery (and are - therefore unlocked), PD communication is enabled in unlocked RO. This - allows systems without software sync enabled to get a higher power - contract than 15W in RO. - * We save and restore PD state between RO -> RW and RW -> RO jump to allow - us to maintain a higher negotiated power through the full jump and - re-initialization process. For example, for each port we save the power - role, data role, and Vconn sourcing state in battery-backed or - non-volatile RAM. This allows the firmware image that is initializing to - restore an existing SNK contract (Chromebook as SNK) without cutting - power. We don't cut the power from the external supplier because we - issue a SoftReset (leaves Vbus intact) instead of a HardReset (drops - Vbus) in this contract resume case. - * Both use cases where we actually are able to restore the PD contract - require an unlocked RO (e.g. factory) otherwise RO cannot communicate - via PD and will drop the higher PD contract (by applying Rp/Rp on the CC - lines temporarily) - * The RO->RW use case is for an unlocked (e.g. factory) device that - negotiated power and we want to keep that contract after we jump to - RW in the normal software sync boot process. This is especially - useful when there is no battery and Vbus is our only power source. - * The RW->RO use case happens when we are performing auxiliary FW - upgrades during software sync and BIOS instructs the EC to jump back - to RO. We'll also try to maintain contracts over an EC reset when - unlocked. - -## Configuration - -There are many `CONFIG_*` options and driver structs that are needed in the -board.h and board.c implementation. - -### TCPC Config - -The `tcpc_config` array of `tcpc_config_t` structs defined in `board.c` (or -baseboard equivalent) should be defined for every board. The index in the -`tcpc_config` array corresponds to the USB-C port number. This struct should -point to the specific TCPC driver that corresponds to the TCPC that is being -used on that port. The i2c port and address for the TCPC are also specified -here. - -### SSMUX Config - -The `usb_muxes` array of `usb_mux` structs defined in `board.c` (or baseboard -equivalent) should be defined for every board. Normally the standard -`tcpci_tcpm_usb_mux_driver` driver works, especially if TCPC and MUX are the -same IC. - -If the signal strength for the high-speed data lines needs to be tuned for a -specific hardware layout, the `board_init` field on the `usb_mux` is called -every time the mux is woken up from a low power state and should be used for -setting custom board tuning parameters. - -### PPC Config - -Some boards have an additional IC that sits between the physical USB-C connector -and the rest of the board. The PPC IC gates whether the Vbus line is an input or -output signal, based on i2c settings or gpio pins. A PPC also typically provides -over voltage and over current protection on multiple USB-C pins. - -The `ppc_chips` array of `ppc_config_t` structs defined in `board.c` (or -baseboard equivalent) sets the appropriate driver and i2c port/address for the -PPC IC. - -### Useful Config Options - -Many USB-C policies and features are gated by various `CONFIG_*` options that -should be defined in `board.h` (or baseboard equivalent). - -Most USB-C options will start with `CONFIG_USB_PD_` or `CONFIG_USBC_`. For their -full descriptions see [config.h][config header link] - -## Interactions with other tasks - -TODO(https://crbug.com/974302): mention `USB_CHG_P#` and `CHARGER` - -## Upgrading FW for TCPCs - -TODO(https://crbug.com/974302): Mention how this works even though it is in -depthcharge. Probing now. Need new driver in depthcharge - -[Case Closed Debugging (CCD)]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md -[Introduction to USB Power Delivery]: https://www.microchip.com/wwwAppNotes/AppNotes.aspx?appnote=en575003 -[USB PD Spec Id]: https://www.usb.org/document-library/usb-power-delivery -[USB TC Spec Id]: https://www.usb.org/document-library/usb-type-cr-cable-and-connector-specification-revision-20-august-2019 -[USB TCPM Spec Id]: https://www.usb.org/document-library/usb-type-ctm-port-controller-interface-specification -[config header link]: ../include/config.h diff --git a/docs/usb-tcpmv2.md b/docs/usb-tcpmv2.md deleted file mode 100644 index b942b048d8..0000000000 --- a/docs/usb-tcpmv2.md +++ /dev/null @@ -1,221 +0,0 @@ -# EC USB-C Power Delivery TCPMv2 Overview - -As the original USB-C Power Delivery (PD) solution for the ChromeOS Embedded -Controller has aged, it has grown to the point where it is difficult to add new -features and address bugs. A new PD stack (generally referred to as TCPMv2) has -been introduced to the codebase for use moving forward. It implements a layered, -state-based design which tracks more closely with the USB Type-C and USB PD -specifications. - -[TOC] - -## Enabling TCPMv2 - -Boards may enable TCPMv2 by adding the following defines: - -* `CONFIG_USB_PD_TCPMV2`Configures the board to use the new stack. -* `CONFIG_USB_DRP_ACC_TRYSRC`: Configures the type of state machine to run (in - this case, a DRP which performs Try.SRC behavior). Currently available are - DRP and charge-through Vconn-powered device options -* `CONFIG_USB_PD_DECODE_SOP`: Sets up messaging for SOP’ and SOP’’, which is - strongly encouraged in the TCPMv2 code moving forward -* `CONFIG_USB_PID 0x1234`: Sets the USB Product Identifier. This will be - shared for all boards within one reference design, and new PIDs may be - requested by sending an email to the ChromeOS FW Team. -* `CONFIG_USB_PD_REV30`: The TCPMv2 stack defaults to PD2.0 operation but - defining this macro enables PD3.0 functionality. - -Other configurations to specify behaviors within the task still apply (ex. -`CONFIG_USB_PD_ALT_MODE_DFP` and `CONFIG_USB_PD_TCPC_LOW_POWER`). - -## State Machine Framework - -The basis of the TCPMv2 state machines is a generic state machine framework. -This framework can be found in common/usbc/usb\_sm.c. For each state, there may -be defined: - -* Entry: Called upon entering a state -* Run: Called while steady in a state -* Exit: Called upon leaving a state -* Parent: Superstate. Enters, exits, and runs alongside the child state. Only - enters and exits when transitioning between states which do not share the - parent. - -All fields are optional and may be set to NULL. A new state is transitioned to -with a call into set\_state(), which exits the old state and parents and enters -the new parents and state. States may be changed with set\_state() in any entry -or run function, but any call from an exit function is ignored since exit is -only called when a change is already in progress. While in a state, run\_state() -executes the run function for the current state and parents. If set\_state() is -called from either an entry function or a run function, the remaining run or -entry functions are stopped. - -Below is a graphical example of what some states may look like. States 1 and 2 -share Parent State 1, while State 3 has Parent State of 2. - - - -Translated into code, this would be something like below (note it is not -necessary that the states be a part of an array, but the TCPMv2 code generally -organizes the states in this way): - -``` -static const struct usb_state test_states[] = { - [PARENT_1] = { - .entry = parent_1_entry, - .run = parent_1_run, - .exit = parent_1_exit, - }, - [PARENT_2] = { - .entry = parent_2_entry, - .run = parent_2_run, - .exit = parent_2_exit, - }, - [STATE_1] = { - .entry = state_1_entry, - .run = state_1_run, - .exit = state_1_exit, - .parent = &test_states[PARENT_1], - }, - [STATE_2] = { - .entry = state_2_entry, - .run = state_2_run, - .exit = state_2_exit, - .parent = &test_states[PARENT_1], - }, - [STATE_3] = { - .entry = state_3_entry, - .run = state_3_run, - .exit = state_3_exit, - .parent = &test_states[PARENT_2], - }, -}; -``` - -For this example, each test state is written simply to produce a print of its -function name. The two exceptions are: - -* parent\_1\_run() calls set\_state() into STATE\_2 when called a second time -* state\_2\_entry() calls set\_state() into STATE\_3 - -Graphically, this is represented below: - - - -And the following code output is produced: - -``` -Calling run_state() -state_1_run -parent_1_run - -Calling run_state() -state_1_run -state_1_run calling set_state() to state 2 -state_1_exit -state_2_entry -state_2_entry calling set_state() to state 3 -state_2_exit -parent_1_exit -parent_2_entry -state_3_entry - -Calling run_state() -state_3_run -parent_2_run -``` - -## TCPMv2 PD Task - -The TCPMv2 PD task is built upon state machines using the above framework and is -located in common/usbc/usbc\_task.c. It is separated into three layers which -track with the USB Type-C and USB PD specification states and run in a loop with -5 ms periods between executions. A graphical representation of these layers is -below. - - - -The task is designed such that the Type-C (TC) layer could run independently for -any application which doesn’t wish to enable PD messaging. Boards define their -appropriate Policy Engine (PE) and TC state machines through their selection of -a CONFIG\_USB\_\* define, with current options supporting both Dual-Role Ports -(DRPs) and Charge-Through Vconn-Powered Device (CTVPD). All boards use the same -Protocol Layer (PRL) code. - -## TCPMv2 Layers - -### Overview - -The three state machines mentioned above interact with each other and the EC -drivers in order to orchestrate all Type-C connection behavior. Graphically, -they are represented below. - - - -Layers communicate with each other using atomic operations on flags and shared -buffers. Functions calling into each layer are clearly named to indicate the -layer they are acting on, and anything calling into the PD task should be doing -so through pd\_\* named functions. - -Some specific examples of how this communication works between layers is below. -If a port partner sends in a Vconn\_swap request, then: - -* PRL will communicate that a message was received to the PE layer through - pe\_message\_received(), which sets PE\_FLAGS\_MSG\_RECEIVED and indicates - the receive buffer has a message -* PE asks with the TC whether the board is sourcing Vconn with - tc\_is\_vconn\_src() which checks TC\_FLAGS\_VCONN\_ON -* PE tells the PRL to send an ACCEPT message to the port partner through - prl\_send\_ctrl\_msg() which fills in shared message information and sets - PRL\_FLAGS\_MSG\_XMIT -* PRL lets the PE know that the message transmit was successful through - pe\_message\_sent() which sets PE\_FLAGS\_TX\_COMPLETE -* TC tells the PE layer that the Vconn swap completed with - pe\_vconn\_swap\_complete() which sets PE\_FLAGS\_VCONN\_SWAP\_COMPLETE - -### Type-C Layer - -Defined in the USB Type-C specification, this layer is responsible for basic -connection. It takes care of setting the CC lines, detecting and debouncing the -partner CC lines, and performs most of the interactions needed with the PPC and -USB mux. Once the TC layer has gotten the connection to the point of being -Attached.SNK or Attached.SRC, it will enable the PRL and PE layers accordingly. - -### Protocol Layer - -A part of the USB PD specification, the protocol layer is responsible for the -actual sending and receiving of PD messages with the TCPCs. The layer is -actually composed of 4 separate state machines running one after the other. -These state machines are: - -* Chunked receive (RCH): passes messages up to the PE and requests chunks when - chunking -* Chunked transmit (TCH): receives messages from the PE and waits for chunk - requests when chunking -* Protocol transmit (PRL\_TX): passes messages to the TCPCs and handles PD 3.0 - collision avoidance -* Protocol hard reset (PRL\_HR): responds to or transmits hard resets, resets - PRL layer variables, notifies PE of hard reset receipt or sent - -### Policy Engine Layer - -The PE layer states are defined as a part of the USB PD specification. State -names are meant to track very closely with the specification so they can be -easily searchable and understood. The PE’s primary responsibility is to send and -process PD messages in order to implement the port’s policy. - -## Best Practices - -* Always call return after set\_state(). Once the state has been changed, - nothing further should be done in the current state. -* Never call set\_state() from an exit function. The call will be ignored as - there is already a state transition taking place. -* Never call set\_state() from outside the PD task. The task may be waiting in - any number of locations and the context should not change around it while it - does so. -* Always use flags to communicate between layers, and to communicate with the - PD task from other tasks. Flags should be accessed through atomic - operations. -* Always use pd\_\* functions to access the PD task from other tasks. -* Always write unit tests as code is added, to verify new code works and - protect against regressions as development continues. diff --git a/docs/usb_power.md b/docs/usb_power.md deleted file mode 100644 index 95177dc150..0000000000 --- a/docs/usb_power.md +++ /dev/null @@ -1,277 +0,0 @@ -# USB Power Considerations - -Users want to be able to charge external devices using their Chromebook USB -ports, e.g. charge a phone from their Chromebook. We want to provide a fast -charging experience to end-users, so we prefer to offer high power charging when -possible. - -[TOC] - -## Summary of Design Requirements - -For explanations of calculations see rest of doc. - -### Total System Power - -Total current needed for external USB devices at 5V: - -``` -((Number of Type-C Ports) * (1800mA)) + 1500mA + -((Number of Type-A Ports) * (900mA)) + 600mA§ -``` - -§ The additional 600mA can be omitted if BC1.2 is not supported for Type-A - -### Daughter Board Considerations - -If a daughter board has 1 Type-A (supporting BC 1.2) and 1 Type-C, the max -potential current load at 5V is `Type-A Vbus (1500mA) + Type-C Vbus (3000mA) + -Type-C Vconn (300mA) = 4800mA` - -* The DB ribbon cables need to be able to carry enough current to supply 24W - (4.8A * 5V) of power to the DB. - * This may be on a single or multiple power rails depending on hardware - design. -* The ground path on the ribbon cable from the DB also needs to be able to - carry enough current to match the power rails. - -## USB Type-A Ports - -For Type-A ports, the [BC 1.2 Specification] adds higher power modes on top of -the [USB 3.2 Specification]. While BC 1.2 support isn't required, it is -preferred, as it allows end-users to charge their devices more quickly. - -[BC 1.2 Specification] defines multiple modes of operation including, but not -limited to: - -* CDP - Charging Downstream Port - * Allows USB Data. Provides guaranteed 1.5A @ 5V power. - * ChromeOS device can act as a CDP. -* SDP - Standard Downstream Port - * Allows USB Data. Provides guaranteed current defined by USB - Specifications - * For USB3, provides guaranteed current of 0.9A @ 5V. - * For USB2, provides guaranteed current of 0.5A @ 5V. - * ChromeOS device can act as a SDP. -* DCP - Dedicated Charging Port - * No USB Data. Provides max of 1.5A @ 5V power. - * ChromeOS device **will not** act as a DCP. - -For detection logic of each mode (e.g. on the D+ and D- pins) and nuance of -power/current power requirements, see full [BC 1.2 Specification]. - -Without BC 1.2 support, the max power requirements match that of a Standard -Downstream Port (SDP) as defined by various specification (e.g. -[USB 3.2 Specification]). - -### ChromeOS as Source - Policy for Type-A - -If BC 1.2 is supported on a ChromeOS device, then the first Type-A port in use -will act as a CDP, providing a maximum current of 1.5A while also enabling USB -data. All other Type-A ports will only be SDP, providing a maximum current of -900mA. - -Note that the CDP Type-A port allocation is dynamic; the first Type-A port to -draw more than 900mA gets to be the CDP, with a maximum current of 1.5A. Then -all other Type-A ports get downgraded to the lower, 900mA current limit (i.e. -SDP) while the first Type-A port maintains a current draw of more than 900mA. In -practice, this means that the first Type-A device plugged in gets to consume -1.5A and any Type-A device inserted after that will only get 900mA. - -Once the Type-A device drawing 1.5A stops pulling more than 900mA or is -physically removed, then the extra 600mA (as well as CDP advertisement) becomes -available to any Type-A port. In practice, Type-A devices only determine current -limits when they are first inserted, so any Type-A device that is still plugged -in when the 1.5A device is removed will not notice that it can pull more -current. This means that the first Type-A device **inserted** after removing the -original 1.5A device gets access to 1.5A. - -The allocation of the one CDP Type-A port is unaffected by user interaction with -Type-C ports. Once a Type-A port has been claimed as CDP, inserting a Type-C -device will not revoke the CDP status of the Type-A port. - -For example, the below sequence of events illustrates the above Type-A policy if -BC 1.2 is supported: - -1. Insert Type-A phone first - * Since no other Type-A port is currently supplying more than 900mA, this - port can supply 1.5A as the CDP. - * Phone pulls 1.5A; other Type-A ports are now marked as SDPs limiting - current to 900mA, each. - * Current state: `phone @ 1.5A`. -2. Insert Type-A mouse second - * Mouse is only allowed 900mA since port is SDP. - * Current state: `phone @ 1.5A` and `mouse @ 900mA`. -3. Remove phone - * High-current port status is relinquished. Now first Type-A port to draw - more than 900mA will claim the one high-current port status (as the - CDP). - * Mouse does not realize that more power is available since most Type-A - devices only determine their current limits upon connection. - * Current state: `mouse @ 900ma`. -4. Insert Type-A battery pack - * Since no other Type-A port is currently supplying more than 900mA, this - port can supply 1.5A as the CDP. - * Battery pack pulls 1.5A; other Type-A ports are now marked as SDPs - limiting current to 900mA, each. - * Current state: `mouse @ 900ma` and `battery pack @ 1.5A`. - -The total current needed for all Type-A ports at 5V is: - -``` -if (BC1.2_Supported) - (# Type-A Ports)*(900mA) + 600mA -else - (# Type-A Ports)*(900mA) -``` - -## USB Type-C Ports - -USB Type-C allows for dynamic negotiation of high power contracts; this is -accomplished through varying CC resistors and/or USB-C Power Delivery (PD). More -in-depth information can be found in the [USB Type-C Specification] \(section -4.5.2.3) and the [USB PD Specification]. CC resistor contracts can range from -500mA/5V to 3A/5V, while PD contracts can range from 0mA/3.3V to 5A/20V. - -### ChromeOS as Source - Policy for Type-C - -**Note:** Behavior outlined here is only implemented in the TCPMv2 Device -Policy Manager (DPM) when a board defines a non-zero maximum number of 3A -ports supported through `CONFIG_USB_PD_3A_PORTS`. - -ChromeOS devices currently source power to external USB devices at 5V with a -typical current of 1.5A for each Type-C port. In certain scenarios, a Type-C -port can source up to 3A @ 5V. - -ChromeOS prefers that the first PD-capable Type-C device **that requires 3A** -should get 3A guaranteed at 5V. Once the maximum supported number of PD-capable -Type-C device has claimed 3A, then other PD-capable Type-C devices will only be -offered a maximum of 1.5A. - -If Fast Role Swap (FRS) is supported and a sourcing port partner reports -requiring 3A after a fast role swap, then this port should be allocated 3A if -no more PD-capable sinks require 3A, and FRS detection may be enabled. Once a -PD-capable device **that requires 3A** is inserted, the FRS port may have FRS -detection disabled if the maximum number of 3A ports has been reached. - -If there are no PD-capable Type-C devices requiring 3A and no FRS ports -requiring 3A, then the first non-PD device will be given 3A until a PD-capable -device **that requires 3A** is inserted, or until an FRS source that requires -3A is inserted. - -Devices will indicate they require 3A operating current in their sink -capabilities, and this will be used as the trigger to let the EC know to -offer that port a 3A source contract. FRS source partners will also -indicate the need for 3A in their sink capabilities, under their Fast Role -Swap required current. - -This policy is laid out in the following flow chart. Current policy for the -"next" port allocation is to select the lowest port number any time more than -one port meets criteria to receive 3A. - -Port balancing will occur when: -* Sink Capabilities are received for a device -* Source capabilities are not replied to after nCapsCount, indicating a non-PD - sink -* Power roles are swapped -* Detach occurs - - - -Inserting a Type-A device does not affect the power assignment for Type-C ports; -only Type-C devices affect the power of Type-C ports. - -For example, the below sequence of events illustrates the above Type-C policy -with a board with a maximum number of 1 3A-ports supported: - -1. A non-PD capable Type-C keyboard is inserted first - * Keyboard will be offered 1.5A initially - * Current state: `keyboard @ 1.5A`. -2. Partner is established to be non-PD through reaching PE\_SRC\_Disabled. - * Since there are no other PD-capable devices and this is the first - device, offer this device 3A via CC resistor change. - * Current state: `keyboard @ 3A`. -3. A non-PD capable Type-C mouse is inserted second - * It will be offered 1.5A since there is already another non-PD device - claiming 3A. - * Current state: `keyboard @ 3A` and `mouse @ 1.5A`. -4. A PD-capable Type-C hub is inserted third - * Initially negotiate for 1.5A. - * Since this is a PD device, query its operational current through - requesting Sink Capabilities. - * Hub does not want high power from Chromebook; hub continues to receive - 1.5A. - * Keyboard gets to maintain higher 3A current supply. - * Current state: `keyboard @ 3A` and `mouse @ 1.5A` and `hub @ 1.5A`. -5. A PD-capable Type-C phone is inserted fourth - * Phone is initially offered 1.5A. - * Since this is a PD device, query its operational current through - requesting Sink Capabilities. - * The phone reports it wants 3A. - * Since PD devices are preferred for 3A, the non-PD keyboard will be - downgraded from 3A to 1.5A via a CC resistor change. - * After tSinkAdj (60 ms), phone is offered 3A through new Source - Capabilities. - * Current state: `keyboard @ 1.5A` and `mouse @ 1.5A` and `hub @ 1.5A` - and `phone @ 3A`. -6. A PD-capable Type-C tablet is inserted fifth - * Tablet is initially offered 1.5A. - * Since this is a PD device, query its operational current through - requesting Sink Capabilities. - * Tablet would like 3A, but the board has reached its maximum number of - supported 3A ports. Note this port's desired current for later. - * Current state: `keyboard @ 1.5A` and `mouse @ 1.5A` and `hub @ 1.5A` - and `phone @ 3A` and `tablet @ 1.5A`. -7. The PD-capable phone is removed - * The next PD-capable sink device is offered 3A: the tablet - * Current state: `keyboard @ 1.5A` and `mouse @ 1.5A` and `hub @ 1.5A` - and `tablet @ 3A`. -8. A FRS-capable dock is inserted - * The dock is sourcing us - * Since this is a PD capable device, query its FRS current through - requesting Sink Capabilities. - * Dock reports requiring 3A current after FRS. - * Tablet is currently occupying the 3A port, so note this port's desired - FRS current for later. - * Current state: `keyboard @ 1.5A` and `mouse @ 1.5A` and `hub @ 1.5A` - and `tablet @ 3A`; dock `FRS detection disabled` -9. The PD-capable tablet is removed - * The next PD-capable device requiring 3A is offered 3A. If there are - no PD-capable devices requiring 3A, then the next FRS device is - allocated 3A. - * The hub only requires 1.5A, so FRS is enabled for the dock. - * Current state: `keyboard @ 1.5A` and `mouse @ 1.5A` and `hub @ 1.5A`; - dock `FRS detection enabled` -10. The FRS dock is removed - * The next PD-capable device requiring 3A is offered 3A. If there are - no PD-capable devices requiring 3A, then the next FRS device is - allocated 3A. If there are no FRS devices, then the next non-PD - capable device is given 3A. - * The hub only requires 1.5A, so mouse is given 3A via CC - resistor change. - * Current state: `keyboard @ 1.5A` and `mouse @ 3A` and `hub @ 1.5A`. -11. The non-PD capable mouse is removed - * The hub does not require 3A. - * Current state: `keyboard @ 3A` and `hub @ 1.5A`. - -Note: Not all released Chromebooks implement the above policy due to -pre-existing hardware design constraints. - -Type-C ports also need to provide an additional 300mA @ 5V (1.5W) for Vconn on -every port. Note: the 1.5W for Vconn may also be supplied at other voltages, -such as 455mA @ 3.3V instead. - -The total current needed for all Type-C ports at 5V is: - -``` -((Number of Type-C Ports) * (1500mA + 300mA)) + 1500mA -``` - -The total maximum current needed for a single Type-C port at 5V is `(3000mA + -300mA) = 3.3A`. This max current for a single port is especially relevant for -sizing the daughter board ribbon cable appropriately. - -[BC 1.2 Specification]: <https://www.usb.org/document-library/battery-charging-v12-spec-and-adopters-agreement> -[USB 3.2 Specification]: <https://www.usb.org/document-library/usb-32-specification-released-september-22-2017-and-ecns> -[USB PD Specification]: https://www.usb.org/document-library/usb-power-delivery -[USB Type-C Specification]: https://www.usb.org/document-library/usb-type-cr-cable-and-connector-specification-revision-14-march-29-2019 diff --git a/docs/usb_updater.md b/docs/usb_updater.md deleted file mode 100644 index f1505550d1..0000000000 --- a/docs/usb_updater.md +++ /dev/null @@ -1,201 +0,0 @@ -# EC update over USB - -chip/g (Cr50) and common code (hammer, servo_micro/v4) update over USB protocols -share a lot in terms of protocol and ideas, but use different code bases. - -chip/g EC-side implementation is found in `chip/g/*upgrade*`, and the userspace -tool which provides updates over USB among with supporting other features and -interfaces is found in `extra/usb_updater/gsctool.c`. - -Common code uses implementations in `common/*update*.c` and -`include/*update*.h`, and `extra/usb_updater/usb_updater2.c` for the userspace -updater. - -## Cr50-specific notes - -The Cr50 firmware image consists of multiple sections, of interest to the USB -updater are the RO and RW code sections, two of each. When firmware update -session is established, the Cr50 device reports locations of backup RW and RO -sections (those not currently used by the device). - -Based on this information the updater carves out the appropriate sections from -the full Cr50 firmware binary image and sends them to the device for programming -into flash. Once the new sections are programmed and the device is restarted, -the new RO and RW are used if they pass verification and are logically newer -than the existing sections. - -There are two ways to communicate with the Cr50 device: USB and `/dev/tpm0` -(when `gsctool` is running on a chromebook with the Cr50 device). Originally -different protocols were used to communicate over different channels, starting -with version 3 the same protocol is used. - -## Common-code notes - -For non-Cr50 or chip/g devices (common code), the layout is a bit different, as -devices usually have a single RO and a single RW, where RO is truly read-only in -production, and verifies RW before jumping to it. - -For testing and development, `usb_updater2` is provided, while production code -will use `hammerd` (in `src/platform/hammerd`) to update the device. - -## Update protocol - -The host (either a local AP or a workstation) is the master of the firmware -update protocol, it sends data to the Cr50 device, which processes it and -responds. - -The encapsulation format is different between the `/dev/tpm0` and USB cases: - -``` - 4 bytes 4 bytes 4 bytes variable size -+-----------+--------------+---------------+----------~~--------------+ -+ total size| block digest | dest address | data | -+-----------+--------------+---------------+----------~~--------------+ - \ \ / - \ \ / - \ +----- FW update PDU sent over /dev/tpm0 -----------+ - \ / - +--------- USB frame, requires total size field ------------+ -``` - -The update protocol data units (PDUs) are passed over `/dev/tpm0`, the -encapsulation includes integrity verification and destination address of the -data (more of this later). `/dev/tpm0` transactions pretty much do not have size -limits, whereas the USB data is sent in chunks of the size determined when the -USB connection is set up. This is why USB requires an additional encapsulation -into frames to communicate the PDU size to the client side so that the PDU can -be reassembled before passing to the programming function. - -In general, the protocol consists of two phases: connection establishment and -actual image transfer. - -The very first PDU of the transfer session is used to establish the connection. -The first PDU does not have any data, and the `dest address` field is set to -zero. Receiving such a PDU signals the programming function that the host -intends to transfer a new image. - -The response to the first PDU varies depending on the protocol version. - -Note that protocol versions before 5 are described here for completeness, but -are not supported any more. - -Version 1 is used over `/dev/tpm0`. The response is either 4 or 1 bytes in size. -The 4 byte response is the *base address* of the backup RW section, and there is -no support for RO updates. The one byte response is an error indication, -possibly reporting flash erase failure, command format error, etc. - -Version 2 is used over USB. The response is 8 bytes in size. The first four -bytes are either the *base address* of the backup RW section (still no RO -updates), or an error code, the same as in Version 1. The second 4 bytes are the -protocol version number (set to 2). - -All versions above 2 behave the same over `/dev/tpm0` and USB. - -Version 3 response is 16 bytes in size. The first 4 bytes are the error code the -second 4 bytes are the protocol version (set to 3) and then 4 byte *offset* of -the RO section followed by the 4 byte *offset* of the RW section. - -Version 4 response in addition to version 3 provides header revision fields for -active RO and RW images running on the target. - -Once the connection is established, the image to be programmed into flash is -transferred to the Cr50 in 1K PDUs. In versions 1 and 2 the address in the -header is the absolute address to place the block to, in version 3 and later it -is the offset into the flash. - -Protocol version 5 includes RO and RW key ID information into the first PDU -response. The key ID could be used to tell between prod and dev signing modes, -among other things. - -Protocol version 6 does not change the format of the first PDU response, but it -indicates the target's ability to channel TPM vendor commands through USB -connection. - -Common-code updater also uses protocol version 6, but has a fairly different -`first_response_pdu` header, indicated by setting `1` in the higher 16-bit for -the protocol version field (`header_type`). The response includes fields such as -maximum PDU size (which is not fixed to 1KB like for Cr50), flash protection -status, version string, and a minimum rollback version. - -Details can be found in `include/update_fw.h`. - -### State machine (update over USB) - -This describes the EC-side state machine for update over USB. - -IDLE state: - -* If host sends update start PDU (a command without any payload, digest = 0 - and base = 0): - - * Reply with `first_update_pdu` block. Go to OUTSIDE_BLOCK state. - -* If host sends a vendor command (see below), execute that, reply, and stay in - IDLE state. Note that vendor commands are only accepted in IDLE state. - -OUTSIDE_BLOCK (preparing to receive start of PDU): - -* If no data is received in 5 seconds, go back to IDLE state. -* If host sends `UPDATE_DONE` command (by setting `dest address` to - `0xb007ab1e`), go back to IDLE state. -* If host sends a valid block start with a valid address, copy the rest of the - payload and go to INSIDE_BLOCK state. - -INSIDE_BLOCK (in a middle of a PDU): - -* If no data is received in 5 seconds, go back to IDLE state. -* Copy data to a buffer. - - * If buffer is full (i.e. matches the total expected PDU size), write the - data and go to OUTSIDE_BLOCK. - * Else, stay in INSIDE_BLOCK. - -### Vendor commands (channeled TPM command, Cr50) - -When channeling TPM vendor commands the USB frame looks as follows: - -``` - 4 bytes 4 bytes 4 bytes 2 bytes variable size -+-----------+--------------+---------------+-----------+------~~~-------+ -+ total size| block digest | EXT_CMD | vend. sub.| data | -+-----------+--------------+---------------+-----------+------~~~-------+ -``` - -Where `Vend. sub` is the vendor subcommand, and data field is subcommand -dependent. The target tells between update PDUs and encapsulated vendor -subcommands by looking at the `EXT_CMD` value - it is set to `0xbaccd00a` and as -such is guaranteed not to be a valid update PDU destination address. - -These commands cannot exceed the USB packet size (typically 64 bytes), as no -reassembly is performed for such frames. - -The vendor command response size is not fixed, it is subcommand dependent. - -The Cr50 device responds to each update PDU with a confirmation which is 4 bytes -in size in protocol version 2, and 1 byte in size in all other versions. Zero -value means success, non-zero value is the error code reported by Cr50. - -Again, vendor command responses are subcommand specific. - -### Vendor commands (common code) - -Vendor commands for command code look very similar to the TPM vendor commands -above, except that we use `UPDATE_EXTRA_CMD` (`b007ab1f`) instead of `EXT_CMD`, -and `Vend. sub.` have a limit set of values (unless otherwise noted, commands -take no parameter, and reply with a single 1-byte status code): - -* UPDATE_EXTRA_CMD_IMMEDIATE_RESET (0): Tell EC to reboot immediately. -* UPDATE_EXTRA_CMD_JUMP_TO_RW (1): Tell EC (in RO) to jump to RW, if the - signature verifies. -* UPDATE_EXTRA_CMD_STAY_IN_RO (2): Tell EC (in RO), to stay in RO, and not - jump to RW automatically. After this command is sent, a reset is necessary - for the EC to accept to jump to RW again. -* UPDATE_EXTRA_CMD_UNLOCK_RW (3): Tell EC to unlock RW on next reset. -* UPDATE_EXTRA_CMD_UNLOCK_ROLLBACK (4): Tell EC to unlock ROLLBACK on next - reset. -* UPDATE_EXTRA_CMD_INJECT_ENTROPY (5): Inject entropy into the device-specific - unique identifier (takes at least CONFIG_ROLLBACK_SECRET_SIZE=32 bytes of - data). -* UPDATE_EXTRA_CMD_PAIR_CHALLENGE (6): Tell EC to answer a X25519 challenge - for pairing. Takes in a `struct pair_challenge` as data, answers with a - `struct pair_challenge_response`. diff --git a/docs/write_protection.md b/docs/write_protection.md deleted file mode 100644 index 0ce6253a04..0000000000 --- a/docs/write_protection.md +++ /dev/null @@ -1,307 +0,0 @@ -# Firmware Write Protection - -[TOC] - -This is a somewhat tricky topic since write protection implementations can -differ between chips, and the hardware write protection has changed over time, -so please edit or open a bug if something is not clear. - -## Terminology - -## RO and RW - -MCUs running the EC code have read-only (RO) and read-write (RW) firmware. -Coming out of reset, the MCU boots into its RO firmware. - -In the case of the EC, the RO firmware boots the host and asks it to verify a -hash of the RW firmware (software sync). If the RW firmware is invalid, it is -updated from a copy in the host's RW firmware. - -In the case of the FPMCU, the RO firmware uses the public key embedded in it to -validate the signature of the RW firmware. If the RW firmware is invalid it does -not jump to the RW firmware. - -Once the RW firmware is validated, the MCU jumps to it (without rebooting). The -RO firmware is locked in the factory and is never changed. The RW firmware can -be updated later by pushing a new system firmware containing an updated RW -region. - -Note that both the RO and RW firmware regions are normally protected once write -protect has been turned on. - -In the case of the EC, the RW region is unprotected at MCU boot until it has -been verified by the host. The RW region is protected before the Linux kernel is -loaded. - -In the case of the FPMCU, the RW region is protected before jumping the RO -firmware jumps to it. - -## Hardware Write Protect {#hw_wp} - -On modern Chrome OS devices, the Cr50 (aka GSC / TPM) provides a "hardware write -protect" GPIO that is connected to the AP SPI flash, EC SPI flash, EEPROM, and -FPMCU via a [GPIO][write_protect_gpio]. This "hardware write protect" can only -be disabled with [Servo] or [SuzyQ](["CCD open"]) and corresponds to -[`OverrideWP`] in ccd. Disabling this write protect disables it for everything -connected to this signal. - -In the case of the FPMCU, the hardware write protect GPIO is tied to the STM32 -`BOOT0` pin, which is what tells the MCU to enter the STM32 bootloader mode. - -You may see various references to a -[write protect screw in documentation][wp_screw]. Older Chrome OS devices had a -write protect screw that had to be physically removed. More details on this -history can be found here: http://go/cros-wp-status. - -Another way of disabling hardware write protection is to remove the battery; -this method is mainly used during bringup. - -Additional reference: -https://chromium.googlesource.com/chromiumos/docs/+/HEAD/write_protection.md - -## Changing Hardware Write Protection - -Modifying the state of hardware write protection (via Cr50 GPIO) can be done if -the ["CCD open"] process has been completed. - -<!-- mdformat off(b/139308852) --> -*** note -`servod` *must* be running for `dut-control` to work. See the [Servo] page for -details. -*** -<!-- mdformat on --> - -### Enable Hardware Write Protection - -```bash -(chroot)$ dut-control fw_wp_state:force_on -``` - -### Disable Hardware Write Protection - -```bash -(chroot)$ dut-control fw_wp_state:force_off -``` - -### Enable/Disable Hardware Write Protection via Cr50 Console - -You can use the following commands from the [Cr50 console]: - -```bash -wp disable -``` - -```bash -wp enable -``` - -```bash -wp follow_batt_pres -``` - -## Software Write Protect - -Software-based write protect state stored in non-volatile memory. If hardware -write protect is enabled, software write protect can be enabled but can’t be -disabled. If hardware write protect is disabled, software write protect can be -enabled or disabled (note that some implementations require an EC reset to -disable software write protect). - -The underlying mechanism implementing software write protect may differ between -EC chips. However, the common requirements are that software write protect can -only be disabled when hardware write protect is off and that the RO firmware -must be protected before jumping to RW firmware if protection is enabled. - -Additional reference: -https://www.google.com/chromeos/partner/fe/docs/cpfe/firmwaretestmanual.html#software-write-protect - -## Changing Software Write Protection - -<!-- mdformat off(b/139308852) --> -*** note -*NOTE*: You cannot disable software write protect if hardware write protect is -enabled. -*** -<!-- mdformat on --> - -Software write protection can be toggled with `ectool --name=cros_fp -flashprotect enable/disable`, which sends the `EC_CMD_FLASH_PROTECT` command -toggling `EC_FLASH_PROTECT_RO_AT_BOOT` (changing `--name` to target different -ECs). - -### Changing Software Write Protection with ectool - -#### ectool flashprotect - -Print out current flash protection state. - -``` -Flash protect flags: 0x0000000f wp_gpio_asserted ro_at_boot ro_now all_now -Valid flags: 0x0000003f wp_gpio_asserted ro_at_boot ro_now all_now STUCK INCONSISTENT -Writable flags: 0x00000000 -``` - -`Flash protect flags` - Current flags that are set. - -`Valid flags` - All the options for flash protection. - -`Writable flags` - The flags that currently can be changed. (In this case, no -flags can be changed). - -Flags: - -* `wp_gpio_asserted` - Whether the hardware write protect GPIO is currently - asserted (read only). - -* `ro_at_boot` - Whether the EC will write protect the RO firmware on the next - boot of the EC. - -* `ro_now` - Protect the read-only portion of flash immediately. Requires - hardware WP be enabled. - -* `all_now` - Protect the entire flash (including RW) immediately. Requires - hardware WP be enabled. - -* `STUCK` - Flash protection settings have been fused and can’t be cleared - (should not happen during normal operation. Read only.) - -* `INCONSISTENT` - One or more banks of flash is not protected when it should - be (should not happen during normal operation. Read only.). - -#### ectool flashprotect enable - -Set `ro_at_boot` flag. The next time the EC is reset it will protect the flash. -Note that this requires a cold reset. - -#### ectool flashprotect enable now - -Set `ro_at_boot` `ro_now all_now` flags and immediately protect the flash. Note -that this will fail if hardware write protect is disabled. - -#### ectool flashprotect disable - -Clear `ro_at_boot` flag. This can only be cleared if the EC booted without -hardware write protect enabled. - -Note that you must reset the EC to clear write protect after removing the screw. -If the `ro_at_boot` flag set, and the EC resets with the HW gpio disabled, the -EC will leave the flash unprotected (`ro_now` and `all_now` flags are not set) -but leave `ro_at_boot` flag set. - -### Changing Software Write Protection with flashrom - -#### View the current state of software write protection - -```bash -(chroot) $ flashrom -p ec --wp-status -``` - -``` -WP: status: 0x00 -WP: status.srp0: 0 -WP: write protect is disabled. -WP: write protect range: start=0x00000000, len=0x00000000 -``` - -#### Enable software write protection - -This is immediate. The protection range indicates the RO region of the firmware. - -```bash -(chroot) $ flashrom -p ec --wp-enable -``` - -``` -SUCCESS -``` - -```bash -(chroot) $ flashrom -p ec --wp-status -``` - -``` -WP: status: 0x80 -WP: status.srp0: 1 -WP: write protect is enabled. -WP: write protect range: start=0x00000000, len=0x0001f800 -``` - -#### Disable software write protection - -Disable can only be done with hardware write protect disabled. - -```bash -(chroot) $ flashrom -p ec --wp-disable -``` - -``` -FAILED: RO_AT_BOOT is not clear. -FAILED -``` - -Reboot with [hardware write protection](#hw_wp) disabled. Note that protection -is still enabled, but the protection range is zero. - -```bash -(chroot) $ flashrom -p ec --wp-status -``` - -``` -WP: status: 0x80 -WP: status.srp0: 1 -WP: write protect is enabled. -WP: write protect range: start=0x00000000, len=0x00000000 -``` - -```bash -(chroot) $ flashrom -p ec --wp-disable -``` - -``` -SUCCESS -``` - -## system_is_locked() - -The [`system_is_locked()`] function in the EC code returns false if the HW write -protect GPIO is disabled, or the read-only firmware is not protected. - -One way this is used in the FPMCU source is to compile test or debug -functionality into the firmware. Guarding the test functionality with -`system_is_locked` allows us to execute the test code in automated testing by -disabling the hardware write protection; this means we can run the automated -tests against the exact same firmware we ship, rather than a different version -that has test functionality compiled in or out. - -## RDP1 {#rdp1} - -Stands for Readout Protection Level 1. - -Protects user flash memory against a debugger (JTAG/SWD) or potential malicious -code stored in RAM by disabling access (a bus error is generated when read -access is requested). Otherwise (no debugger connected and no boot in RAM set), -all read/program/erase operations from/to flash are allowed. - -When switching to a lower level of RDP (i.e., setting to 0), the user flash -memory is mass erased (set to all `0xFF`). - -Note that this completely destroys *all* of the firmware, including the RO -section. - -### Additional References - -https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1222094 - -## EC Flash Read/Write Command Write Protection Checks - -The EC code command handlers (`command_flash_erase`, `command_flash_write`, -etc.) return an error if `EC_FLASH_PROTECT_ALL_NOW` is set. - -["CCD open"]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md#Open-CCD -[Cr50 console]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md#Consoles -[Servo]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/README.md -[`OverrideWP`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md -[`system_is_locked()`]: https://chromium.googlesource.com/chromiumos/platform/ec/+/aaba1d5efd51082d143ce2ac64e6caf9cb14d5e5/common/system.c#195 -[wp_screw]: https://www.chromium.org/chromium-os/firmware-porting-guide/firmware-ec-write-protection -[write_protect_gpio]: https://chromium.googlesource.com/chromiumos/platform/ec/+/aaba1d5efd51082d143ce2ac64e6caf9cb14d5e5/include/ec_commands.h#1599 -[SuzyQ]: https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/HEAD/docs/ccd.md#SuzyQ-SuzyQable diff --git a/docs/zephyr_build.md b/docs/zephyr_build.md deleted file mode 100644 index 5a3c809724..0000000000 --- a/docs/zephyr_build.md +++ /dev/null @@ -1,164 +0,0 @@ -# Building Zephyr OS - -[TOC] - -Chromium OS EC uses the `zmake` tool to build Zephyr. - -This section describes how to build and use zmake. - -## Syncing the source - -N.B. The Zephyr build relies on multiple repos and tools which get installed as -packages into the chroot. This means that partial syncs are not supported -(i.e. just doing `repo sync .` in platform/ec). You must run -`~/trunk/src/scripts/update_chroot` frequently, ideally each time you do a full -repo sync. This will update zmake and the repos in src/third_party/zephyr - - -## Working inside the chroot - -### Install zmake - -The `zephyr-build-tools` ebuild builds and installed zmake. This should happen -automatically, with the caveat above. - -To do this manually and run tests: - -```bash -FEATURE=test sudo -E emerge zephyr-build-tools -``` - - -### Building - -You can build zephyr with: - -```bash -emerge-volteer chromeos-zephyr -``` - -For local development you can run zmake directly; see instruction below. - -## Working outside the chroot - -Running outside the Chromium OS chroot is useful for upstream work and for -those using the EC outside the Chromium OS. - - -### Remove west, if installed [b/184654974](http://b/184654974) - -Zephyr's Cmake system will try to attach itself to the west tool if it finds it -installed, conflicting with manual cmake invocations. If you installed west, -you'll need to remove it: - -```bash -python3 -m pip uninstall west -``` - - -### Install zmake - -You can install zmake with pip: - -```bash -cd ~/chromiumos/src/platform/ec -python3 -m pip install -e zephyr/zmake --user -``` - -Ensure that ~/.local/bin in on your PATH - -You may also need to install these items: - -```bash -sudo apt-get install cmake ninja-build python3-pyelftools gcc-multilib \ - python3-pykwalify python3-colorama python3-testfixtures -``` - -You must reinstall zmake after any `repo sync` since new features may have been -added that are needed by the build. - - -### Install binman - -First build pylibfdt: - -```bash -cd somewhere -sudo apt-get install flex bison swig -git clone git://git.kernel.org/pub/scm/utils/dtc/dtc.git -cd dtc -make -make install PREFIX=~/.local # You can install this where it suits -``` - -If you have a Chromium OS checkout then you should do: - -```bash -cd ~/.local/bin -ln -s ~/chromiumos/src/third_party/u-boot/files/tools/binman/binman -``` - -otherwise: - -```bash -cd somewhere -git clone https://source.denx.de/u-boot/u-boot.git -cd ~/.local/bin -ln -s somewhere/u-boot/tools/binman/binman -``` - -As above, ensure that `~/.local/bin` in on your PATH - - -### Building - -You can use `zmake help` to obtain help on how to use zmake. The following is -a rough guide. - -First configure the build with the project you want: - -```bash -# Use -t zephyr when running outside chroot - -zmake configure -B /tmp/z/vol zephyr/projects/volteer/volteer/ -t zephyr -``` - -If you are building for posix-ec, change the default toolchain to host to make -it use the native system one instead of llvm. Make sure to start with a clean -build directory if zmake returns any build error: - -```bash -zmake configure -B /tmp/posix zephyr/projects/posix-ec -t host -``` - -Then build with just the target directory: - -``` -zmake build /tmp/z/vol -``` - -The output is in that directory: - -* `output/zephyr.bin` - output binary (read-only and read-write packed - together) -* `output/zephyr.ro.elf` - read-only ELF for debugging -* `output/zephyr.rw.elf` - read-write ELF for debugging - -You might also find these files useful (using read-only as an example): - -* `build-ro/zephyr/.config` - Kconfig options selected -* `build-ro/zephyr/include/generated/devicetree_unfixed.h` - the (large) - header file that zephyr uses to provide devicetree information to the C code -* `build-ro/zephyr/zephyr.dts` - devicetree that is used -* `build-ro/zephyr/zephyr.dts` - map of image - - -### Looking at the Kconfig - -It should be possible to do this with: - -```bash -ninja -C /tmp/z/vol/build-ro menuconfig -``` - -However at present this does not work [b/184662866](http://b/184662866). diff --git a/docs/zephyr_init.md b/docs/zephyr_init.md deleted file mode 100644 index 8822736efb..0000000000 --- a/docs/zephyr_init.md +++ /dev/null @@ -1,53 +0,0 @@ -# Zephyr OS-based EC Initialization Order - -Zephyr provides Z_INIT_ENTRY_DEFINE() & the extend macro to install the initial -function. The initialize flow for different levels would be like the following -(not very detailed): -* architecture-specific initialization -* `PRE_KERNEL_1` level -* `PRE_KERNEL_2` level -* `POST_KERNEL` level -* `APPLICATION` level -* main() - -The kernel and driver initial functions separate into specific initialize -levels. It couldn't put all initial functions in main() for the Zephyr OS-based -EC. It is also hard to maintain those initial priority which separates into -different files. - -This file defines some Zephyr OS-based EC initial priorities which have critical -sequence requirement for initializing: - -## PRE_KERNEL_1 -* Priority (0-9) - Reserved for system testability: - - The highest priority could be used in zephyr. Don't use it when system - development. Buffer it for the following system development & testing. - -* Priority (10-19) - Chip level system pre-initialization: - - These priorities in this range are used for critical chip initialization, - including determining the reset cause and initializing the battery-backed - RAM driver. Most chip drivers should only be initialized after - `PLATFORM_EC_SYSTEM_PRE_INIT`. - -* Priority (20) - PLATFORM_EC_SYSTEM_PRE_INIT: - - At this initialization priority, the CROS system checks the reset cause and - initializing the system reset flags. Any chip level drivers related to - determining the reset type must be at a higher priority. - -* TODO - -## PRE_KERNEL_2 -* TODO - -## POST_KERNEL -* TODO - -## APPLICATION -* TODO - -## main() -* TODO -* Start the tasks. diff --git a/docs/zephyr_poc_device_bringup.md b/docs/zephyr_poc_device_bringup.md deleted file mode 100644 index 394aa4a05b..0000000000 --- a/docs/zephyr_poc_device_bringup.md +++ /dev/null @@ -1,52 +0,0 @@ -# Zephyr Proof-of-Concept-Device Bringup - -It may be useful to build a Zephyr OS-based EC for a device which -already has a CrOS EC device build, for the purposes of demonstrating -the feasibility of Zephyr OS. - -This document is a work-in-progress list of tricks & tools that may be -useful to you. - -## Initial Bringup - -Initially, you'll want to get a basic UART functioning with nothing -but a shell and some basic console commands. - -An example CL to do this for Lazor can be found -[here](https://crrev.com/c/2749765). - -## Bringing up GPIOs - -After you have UART functioning, GPIOs can be an easy target to start -unblocking further features. - -We have a very ugly program to auto-generate the GPIO DTS based on -gpio.inc for the existing board. You can find it at -`util/gpios_to_zephyr_dts.c`, and instructions are in the file on how -to compile and use it. You may have to hand-modify the output. - -The resultant CL for Lazor can be found [here](https://crrev.com/c/2749768). - -## Bring up Host Commands - -Set `CONFIG_PLATFORM_EC_HOSTCMD=y` and enable the appropriate -host-command interface for your platform (e.g., eSPI). - -An example CL for Lazor can be found [here](https://crrev.com/c/2749428). - -As long as you get this compiling that should be enough to move to the -next step. Further testing of the host command layer will require -power sequencing up and going. - -## Enabling some simple GPIO-based buttons and switches - -Next, you can: - -* [Add the lid switch](https://crrev.com/c/2749768) -* [Add the power button](https://crrev.com/c/2749426) -* [Add AC presence detection](https://crrev.com/c/2749428) - -## Power Sequencing - -TODO(jrosenth): add steps on enabling power sequencing and expand this -document. diff --git a/docs/zephyr_shim.md b/docs/zephyr_shim.md deleted file mode 100644 index fac0383aff..0000000000 --- a/docs/zephyr_shim.md +++ /dev/null @@ -1,381 +0,0 @@ -[TOC] - -# Zephyr Shimming How-To - -## Objective - -Allow a subset of the platform/ec code to be built as part of the Zephyr-based -EC without needing to land code into upstream zephyr, or our zephyr-chrome -repository. - -## Background - -Now that Google has joined [Zephyr OS](https://www.zephyrproject.org/), the EC -team is moving toward it instead of platform/ec code on embedded controllers for -future Chrome OS devices. See the -[originally proposed idea](https://goto.google.com/cros-ec-rtos) and a more -specific [Zephyr process doc](https://goto.google.com/zephyr-structure) of what -future development on Zephyr will look like. - -Simply put, we want to move to Zephyr OS to use an open-source embedded OS that -has a vibrant community. The embedded OS scene for the industry is very -fragmented, with various parties using their own custom solution. We see the -strong open-source community at Zephyr as potentially helping to consolidate -efforts in the embedded controller space. It will also benefit our partners -(both chip vendors and OEMs) since they should only have to support one embedded -OS (i.e., Zephyr) for both their Chrome OS and Windows based devices. - -Migrating to use Zephyr fully is going to take a few years. We do not want to -diverge from the active development happening on platform/ec code. We -potentially want to ship a product using Zephyr before the migration is -complete. - -## Design ideas - -In order to reuse `platform/ec` development , we shim "active" `platform/ec` -code as a -[Zephyr Module](https://docs.zephyrproject.org/latest/guides/modules.html). This -requires us to add some Zephyr specific code in a `zephyr` directory in the -`platform/ec` codebase. Once we release a Zephyr-based EC, then we can turn down -platform/ec for future development and work on migrating the platform/ec-module -code out of the module directory and into a first-class Zephyr code format -- in -the local -[Chrome Zephyr repo](https://chromium.googlesource.com/chromiumos/platform/zephyr-chrome/+/HEAD) -and ultimately [upstream](https://github.com/zephyrproject-rtos/zephyr). - -For platform/ec code that is stable and not under active development, the Zephyr -team may port that code to Zephyr, thus skipping the shimming process. - -### Subsystems of interest - -#### With Shim - -We shim the following subsystems (non-exhaustive). - -* USB-C: TCPC, PPC, MUX, TCPMv2 -* Charge Manager -* SoC Power Sequencing -* Sensors, if Intel’s HID-based solution is delayed in getting to Zephyr - upstream - -#### Little-to-No Shim - -We adopt upstream Zephyr or skip the shimming process (non-exhaustive). - -* CBI and dependent EEPROM code - * The format is stable. We pull in the list of CBI tags from platform/ec - though -* EFS2, Vboot, RO/RW split - * Adjusting flash layout would be difficult to shim, and the concept is - very stable. - * We may shim some core EFS2 logic -* Host command framework -* Sensors, if Intel’s HID-based solution getts to Zephyr upstream and passes - CTS -* Keyboard and keycode scanning support - * We may shim the newer Vivaldi feature. -* Console support - * We allow individual console commands via DECLARE\_CONSOLE\_COMMAND to be - shimmed to Zephyr. These convert commands to work with Zephyr's shell - subsystem. -* I2C - -### New content in platform/ec - -Add the `src/platform/ec/zephyr` folder with: - -* [Module integration files](https://docs.zephyrproject.org/latest/guides/modules.html#build-system-integration), - e.g., module.yml, CMakeLists.txt, and KConfig. - * **module.yml** is the required entry point (must be located at - _zephyr/module.yml_ in the repository) for Zephyr modules, and declares - the location of Kconfig and CMakeLists.txt files used by the Zephyr - build system. - * **CMakeLists.txt** replicates build logic for the files being shimmed, - outside of the platform/ec Makefile. - * **Kconfig** will declare any CONFIG\_\* options which are important to - expose from platform/ec code to the Zephyr build. -* Shim code to translate platform/ec code into Zephyr code - * For example, redefine platform/ec’s - [`DECLARE_HOST_COMMAND`](https://source.chromium.org/chromiumos/chromiumos/codesearch/+/HEAD:src/platform/ec/include/host_command.h;l=256;drc=514923bc59f5a3435dbb7cbf348735ed41889ffe) - to map to Zephyr's upstream - [`EC_HOST_CMD_HANDLER`](https://github.com/zephyrproject-rtos/zephyr/blob/d7468bf836b75c29980441f294a61eae6bf4bc75/include/ec_host_cmd.h#L73) - macro. This allows us to compile select platform/ec files in the Zephyr - build. - -### Namespace Collisions - -One significant issue of mixing Zephyr headers with our existing EC code is that -we currently have many names colliding with the Zephyr code. For example, -Zephyr's atomic functions also are named `atomic_add`, `atomic_or`, ..., -however, have a different API from our EC's atomic functions. This is critical, -since atomic operations are often used in `static inline` functions placed in -header files. - -In some cases, we are able to hack around these collisions by creating macros -and functions which are compatible with both Zephyr and our EC's usages. For -example, we can create a modified `IS_ENABLED` which accepts both defined to -nothing usages (CrOS EC `config.h` style), and defined to `1` usages (Zephyr -Kconfig style). - -However, long term, we may find this to be a continual cause of issues, and -creating hacks for every colliding macro or function may be unsustainable. We -propose _gradually_ introducing a namespace prefix to the `platform/ec` -codebase, for example `crec_`. We can begin at the critical areas of namespace -collision (e.g., atomics) and continue to improve the naming convention with -time. - -### New CQ check - -As long as code from platform/ec is part of the zephyr -[ebuild](http://cs/chromeos_public/src/third_party/chromiumos-overlay/chromeos-base/chromeos-zephyr-2_3/chromeos-zephyr-2_3-9999.ebuild), -then we need to run the Zephyr CQ checks on any platform/ec CLs in addition to -the normal platform/ec CQ checks. This ensures that platform/ec changes aren’t -breaking the Zephyr builds and requiring the Zephyr team to debug recent -changes. - -For local builds, we can run `emerge-betty chromeos-zephyr-2_3` or `zmake` -utility to check that an EC CL has not broken anything on the Zephyr side. - -We will work with the CI team to enable this. - -## How to shim features - -Before you get started shimming a feature, it's important to -understand the general philosophies behind Zephyr OS and shimming: - -* Our current EC's OS isn't going away any time soon. Even after we - ship our first device with a Zephyr-based EC, we may still be working on - other projects using the old OS. It's important to consider how - your feature will apply to both the Zephyr world and CrOS EC OS - world. - -* We won't be converting old devices to use Zephyr-based firmware. - This means that our existing OS and its code will need maintained - for bug and security fixes for years to come. **Do not allow the - code you write for the CrOS EC OS to lack in quality or be "throw - away code" as it will need to be maintained for a long time.** - -* Shimming, by the very nature of the design, will lead to some ugly - hacks. We try and avoid this when we can, but some of them may be - completely unavoidable. This means we need to actively work against - nature to keep the code clean. If we do things right, there's even - a possibility that we leave things cleaner than we found them. - -* Shimming occasionally digs up landmines. Be prepared to step on - them. 💣 - -### What code can be shimmed? - -Code in the `common/` directory (and other common code directories, -like `power/`) is the ideal target for shimming, with the exception of -core OS features which have Zephyr OS equivalents. - -Code in the following directories should **never be shimmed**: - -- `core/`: this directory contains architecture-specific code which - should have a Zephyr OS equivalent feature. - -- `chip/`: this directory contains chip-specific code, and similarly - should have a Zephyr OS equivalent feature. - -In both cases, you should instead determine (or, in rare cases, -implement upstream) the equivalent Zephyr OS feature, and *implement -an architecture and chip agnostic* "shim layer" in the `zephyr/shim/` -directory which translates the APIs as necessary. - -As of the time of this document, the shim layer is nearing 100% -complete, and it should be rare that you encounter an API which needs -translation. - -Finally, code in the following directories should **avoid being -shimmed, if possible**: - -- `board/`: this directory contains variant-specific code. - -- `baseboard/`: this directory contains baseboard-specific code. - -In both cases, the only value in shimming in code from one of those -directories would be to enable a Zephyr OS build for a device which -already has CrOS EC OS support, as *Zephyr-only projects will not have -these directories*. You should be thinking about how this would be -implemented for a Zephyr-only project, and filing bugs to create the -appropriate device-tree and Kconfig equivalents before shimming this -code. - -See [Zephyr PoC device bringup](zephyr_poc_device_bringup.md) for more -information about bringing up proof-of-concept devices. - -### Configuration - -CrOS EC OS uses a special header `config.h`, which sets configuration -defaults, and includes board and chip specific configurations by -expecting the headers `board.h` and `config_chip.h` to be present. -Most of these configuration options start with `CONFIG_`, however the -rules were loosely defined over the years. - -Zephyr OS, on the other hand, uses two different configuration -systems: - -* Kconfig, the configuration system from the Linux Kernel, which - fits well within the domain of preprocessor definitions in C. The - schema for our Kconfig files can be found under `zephyr/Kconfig`, - and project-specific configurations are made in `prj.conf` files. - - Kconfig is generally used to select which EC software features are - enabled, and should be avoided for hardware configurations, such as - chip configuration registers and their default settings. - -* Open Firmware Device Tree, which you may also be familiar with from - the Linux kernel. This configuration can be found in `*.dts` files. - - Device-tree is generally used for hardware configurations, and - should be avoided for EC software feature configuration. - -For code which is shimmed, we need to play nicely with both the CrOS -EC OS configuration system, and Zephyr's configuration systems. Thus, -we follow the following pattern: - -* EC software features are configured using `Kconfig` and - `zephyr/shim/include/config_chip.h` translates them into the - appropriate CrOS EC OS configurations using patterns such as below: - - ```c - #undef CONFIG_CMD_GETTIME - #ifdef CONFIG_PLATFORM_EC_TIMER_CMD_GETTIME - #define CONFIG_CMD_GETTIME - #endif - ``` - - The preprocessor code should follow that template exactly, and not - use any nesting (Kconfig handles dependencies, there is no reason to - do it again in the preprocessor code). - -* **The domain of Kconfig options and CrOS EC configuration names - should be completely distinct.** This is because the Kconfig options - are included automatically, and including `config.h` may undefine - them. To mitigate this, we follow a convention of using - `CONFIG_PLATFORM_EC_` as the prefix for EC software features in - Kconfig. - -One special configuration option exists, `CONFIG_ZEPHYR`, which you -can use to detect whether the OS is Zephyr OS. This is the -conventional way to add Zephyr-specific (or excluded) code in CrOS EC -code. - -The typical EC macros for reducing `#ifdef` messes (e.g., -`IS_ENABLED`, `STATIC_IF`, etc.) work with both CrOS EC OS and Kconfig -options, and should be used when possible. - -### Header Files - -Besides the include paths provided by Zephyr OS, the following paths -are additionally added for shimmed code: - -* `include/` -* `zephyr/include/` -* `zephyr/shim/include/` - -The names of headers in these directories should be completely -distinct. C compilers have no mechanism for "include ordering", and -there is no way to "override a header". - -If you feel the need to "override" a header, say `foo.h` in -`include/`, the best way to do this is to give it a different name -under `zephyr/shim/include` (e.g., `zephyr_foo_shim.h`), and include -that in the `foo.h` header with a `#ifdef CONFIG_ZEPHYR` guard. - -The typical styling convention for includes (following existing -conventions in `platform/ec` and other C codebases we have) is: - -* Zephyr OS headers in pointy brackets, in alphabetical order. - -* One blank line - -* CrOS EC OS headers (either from `include/`, `zephyr/shim/include/`, - or the current directory), in quotes (not pointy brackets). - -### Adding files to Cmake - -Zephyr's build system (including shimmed code) uses CMake instead of -`Makefiles`, and your code will not be compiled for Zephyr unless you -list the files in `zephyr/CMakeLists.txt`. - -### Step-by-step guide to adding a Kconfig - -Follow these steps: - -1. Make sure you have read the above Configuration section - -2. Add your config to one of zephyr/Kconfig* files. Note the PLATFORM_EC_ prefix - and try to put it near related things: - - ```kconfig - config PLATFORM_EC_CHARGER_BQ25720 - bool "TI BQ25720 charger" - help - The TI BQ25720 is a blah blah (describe summary from datasheet, - at least 3 lines so take 10 minutes to write something truly useful) - ``` - - Consider a `depends on PLATFORM_EC_...` line if it depends on an existing - feature. - -3. Add to zephyr/shim/include/config_chip.h (put it at the bottom): - - ```kconfig - #undef CONFIG_CHARGER_BQ25720 - #ifdef CONFIG_PLATFORM_EC_CHARGER_BQ25720 - #define CONFIG_CHARGER_BQ25720 - #endif - ``` - -4. Add the source file to zephyr/CMakeLists.txt if it is not already there. For - ordering check the comments in that file: - - `zephyr_sources_ifdef(CONFIG_PLATFORM_EC_CHARGER_BQ25720 - "${PLATFORM_EC}/driver/charger/bq25720.c")` - -5. Run a build on a board that enables the new CONFIG (in config.h) to make sure - there are no problems. - -6. If it doesn't work, please email zephyr-task-force@ or file a bug and assign - it to sjg@, cc zephyr-task-force@ (please include CL link and the error - output). - -### Unit Tests - -Unit tests, implemented using the Ztest framework, can be found in -`zephyr/test`. - -To run all unit tests, you use `zmake testall`. - -## Alternatives Considered - -### Translate code and mirror into the zephyr-chrome repository - -We could potentially write a script which, via a series of find/replace -operations, translates a platform/ec module to use Zephyr functions, macros, and -paradigms. On a frequent basis, we would translate all modules of interest in -the platform/ec repository and land an "uprev" change in the zephyr-chrome -repository. - -The main disadvantage of this technique is that we can't get any CQ coverage -when platform/ec CLs land that the modules will continue to work in Zephyr. -Additionally, the translator script would be delicate and probably require -frequent maintenance. - -However, this technique does have some benefits. With modules directly -translated to code in the Zephyr paradigm, the process of upstreaming a shimmed -module to ZephyrOS would be significantly easier. Additionally, it would require -no shim code in platform/ec. - -### Don't do any code sharing - -One option is to avoid shimming in any platform/ec code and allow the Zephyr -team to re-implement features in upstream zephyr, or our local zephyr-chrome -repository. - -Disregarding the infeasible amount of work required to complete this option, the -platform/ec repository has a far faster development pace as there are many more -contributors, and the Zephyr features would quickly lose parity during the time -frame that we are launching both Zephyr-based and platform/ec-based devices. diff --git a/docs/ztest.md b/docs/ztest.md deleted file mode 100644 index 021b3391bd..0000000000 --- a/docs/ztest.md +++ /dev/null @@ -1,200 +0,0 @@ -# Porting EC unit tests to Ztest - -[TOC] - -This HOWTO shows the process for porting the EC's `base32` unit test to Zephyr's -Ztest framework. All of the work is done in `src/platform/ec`. - -See -[Test Framework - Zephyr Project Documentation](https://docs.zephyrproject.org/1.12.0/subsystems/test/ztest.html#quick-start-unit-testing) -for details about Zephyr's Ztest framework. - -For examples of porting an EC unit test to the Ztest API, see: * -[base32](https://crrev.com/c/2492527) and -[improvements](https://crrev.com/c/2634401) * -[accel_cal](https://crrev.com/c/2645198) - -## Porting Considerations - -Not every EC unit test can be ported to Ztest. This section describes cases that -are not supported and cases where caveats apply. - -### EC Mocks Are Not Supported - -If a test has a `$TEST.mocklist` file associated with the unit test, it is using -the EC mocking framework, which is unsupported in the Ztest framework. Ztest has -its own mocking framework which the EC does not support. - -### Multiple Task Caveats - -The EC unit test framework starts a single task to call `run_test`, and this -task will then call the functions for the various test cases. Some unit tests -have multiple threads of execution, which is enabled by a `$TEST.tasklist` file -associated with the unit test. The test runner task has a task ID of -`TASK_ID_TEST_RUNNER`, which can be used as an argument to any of the task -functions. See for example the -[`charge_ramp` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/charge_ramp.c#81) -and the -[`host_command` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/host_command.c#32) - -When a unit test is ported to Ztest, `test_main` doesn't have a thread ID, so -`TASK_ID_TEST_RUNNER` is undefined. `charge_ramp` and `host_command` cannot be -ported at this time. `test_main` also cannot call any of the task functions that -must be called from a task, such as `task_wake`; these functions can pend the -calling task, but since `test_main` doesn't have a thread ID, the pend will -fail. See the -[`mutex` unit test](https://chromium.googlesource.com/chromiumos/platform/ec/+/HEAD/test/mutex.c#116) -for an example. - -## Determine source files being tested - -Determine which C files the unit test requires by finding the test in -`test/test_config.h`: - -``` -#ifdef TEST_BASE32 -#define CONFIG_BASE32 -#endif -``` - -Locate the `CONFIG` item(s) in `common/build.mk`: - -``` -common-$(CONFIG_BASE32)+=base32.o -``` - -So for the `base32` test, we only need to shim `common/base32.c`. - -Add the C files to `zephyr/shim/CMakeLists.txt`, in the "Shimmed modules" -section: - -``` -# Shimmed modules -zephyr_sources_ifdef(CONFIG_PLATFORM_EC "${PLATFORM_EC}/common/base32.c") -``` - -Refer to [zephyr: shim in base32.c](https://crrev.com/c/2468631). - -## Create test directory - -Create a new directory for the unit test in `zephyr/test/base32`. - -Create `zephyr/test/base32/prj.conf` with these contents: - -``` -CONFIG_ZTEST=y -CONFIG_PLATFORM_EC=y -``` - -Create `zephyr/test/base32/CMakeLists.txt` with these contents: - -``` -target_sources(app PRIVATE ${PLATFORM_EC}/test/base32.c) -``` - -## Modify test source code - -### Test cases - -In the unit test, replace `run_test` with `TEST_MAIN()`. This will allow both -platform/ec tests and Ztests to share the same entry point. - -Change `RUN_TEST` to `ztest_unit_test` and add the `ztest_test_suite` wrapper -plus the call to `ztest_run_test_suite`. - -```c -/* - * Define the test cases to run. We need to do this twice, once in the format - * that Ztest uses, and again in the format the the EC test framework uses. - * If you add a test to one of them, make sure to add it to the other. - */ -TEST_MAIN() -{ - ztest_test_suite(test_base32_lib, - ztest_unit_test(test_crc5), - ztest_unit_test(test_encode), - ztest_unit_test(test_decode)); - ztest_run_test_suite(test_base32_lib); -} -``` - -Each function that is called by `ztest_unit_test` needs to be declared using -`DECLARE_EC_TEST`. Keep the `return EC_SUCCESS;` at the end of the test -function. Note that for the EC build, `TEST_MAIN` will call `test_reset` before -running the test cases, and `test_print_result` after. - -### Assert macros - -Change the `TEST_ASSERT` macros to `zassert` macros. There are plans to automate -this process, but for now, it's a manual process involving some intelligent -find-and-replace. - -* `TEST_ASSERT(n)` to `zassert_true(n, NULL)` -* `TEST_EQ(a, b, fmt)` to `zassert_equal(a, b, fmt ## ", " ## fmt, a, b)` - * e.g. `TEST_EQ(a, b, "%d")` becomes `zassert_equal(a, b, "%d, %d", a, b)` -* `TEST_NE(a, b, fmt)` to `zassert_not_equal(a, b, fmt ## ", " ## fmt, a, b)` -* `TEST_LT(a, b, fmt)` to `zassert_true(a < b, fmt ## ", " ## fmt, a, b)` -* `TEST_LE(a, b, fmt)` to `zassert_true(a <= b, fmt ## ", " ## fmt, a, b)` -* `TEST_GT(a, b, fmt)` to `zassert_true(a > b, fmt ## ", " ## fmt, a, b)` -* `TEST_GE(a, b, fmt)` tp `zassert_true(a >= b, fmt ## ", " ## fmt, a, b)` -* `TEST_BITS_SET(a, bits)` to `zassert_true(a & (int)bits == (int)bits, "%u, - %u", a & (int)bits, (int)bits)` -* `TEST_BITS_CLEARED(a, bits)` to `zassert_true(a & (int)bits == 0, "%u, 0", a - & (int)bits)` -* `TEST_ASSERT_ARRAY_EQ(s, d, n)` to `zassert_mem_equal(s, d, b, NULL)` -* `TEST_CHECK(n)` to `zassert_true(n, NULL)` -* `TEST_NEAR(a, b, epsilon, fmt)` to `zassert_within(a, b, epsilon, fmt, a)` - * Currently, every usage of `TEST_NEAR` involves floating point values -* `TEST_ASSERT_ABS_LESS(n, t)` to `zassert_true(abs(n) < t, "%d, %d", n, t)` - * Currently, every usage of `TEST_ASSERT_ANS_LESS` involves signed - integers. - -There isn't a good replacement for `TEST_ASSERT_MEMSET(d, c, n)`, but it is only -used in two tests, `printf.c` and `utils.c`. If you need this test, you'll need -to code up a loop over the `n` bytes starting at `d`, and `zassert_equal` that -each byte is equal to `c`. - -Also note that some tests use constructs like `TEST_ASSERT(var == const)`, which -would have been better write as `TEST_EQ(var, const)`. These should be rewritten -to use `zassert_equal`. - -Refer to -[test: Allow EC unit test to use Ztest API](https://crrev.com/c/2492527) for the -changes to the base32.c source code. - -### Tasklist - -For any test that has a corresponding `${TESTNAME}.tasklist`, add the file -`shimmed_test_tasks.h` in the zephyr test directory, and in that file, -`#include` the tasklist file. See [accel_cal](https://crrev.com/c/2645198) for -an example. - -Add `CONFIG_HAS_TEST_TASKS=y` to the `prj.conf` file, as well as the appropriate -`CONFIG_PLATFORM_EC` defines to include or exclude code that the unit under test -uses. - -## Build and run - -Use `zmake` to build and run the test: - -``` -(cr) $ zmake -l DEBUG configure --test -B build/ztest/base32 zephyr/test/base32 -... -UART_0 connected to pseudotty: /dev/pts/1 -*** Booting Zephyr OS build zephyr-v2.4.0-1-g63b2330a85cd *** -Running test suite test_base32_lib -=================================================================== -START - test_crc5 - PASS - test_crc5 -=================================================================== -START - test_encode - PASS - test_encode -=================================================================== -START - test_decode - PASS - test_decode -=================================================================== -Test suite test_base32_lib succeeded -=================================================================== -PROJECT EXECUTION SUCCESSFUL -(cr) $ -``` |
