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-rw-r--r--driver/bc12/max14637.c25
-rw-r--r--driver/bc12/max14637.h8
-rw-r--r--driver/bc12/mt6360.c60
-rw-r--r--driver/bc12/mt6360.h2
-rw-r--r--driver/bc12/pi3usb9201.c59
-rw-r--r--driver/bc12/pi3usb9201.h6
-rw-r--r--driver/bc12/pi3usb9281.c37
-rw-r--r--driver/bc12/pi3usb9281.h80
8 files changed, 132 insertions, 145 deletions
diff --git a/driver/bc12/max14637.c b/driver/bc12/max14637.c
index 4c7cbffd18..09fa009c45 100644
--- a/driver/bc12/max14637.c
+++ b/driver/bc12/max14637.c
@@ -1,4 +1,4 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
+/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -12,6 +12,7 @@
* the system will have to charge ramp.
*/
+#include "builtin/assert.h"
#include "max14637.h"
#include "charge_manager.h"
#include "chipset.h"
@@ -28,7 +29,7 @@
#include "usb_pd.h"
#include "util.h"
-#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args)
#if defined(CONFIG_CHARGE_RAMP_SW) || defined(CONFIG_CHARGE_RAMP_HW)
/**
@@ -38,10 +39,10 @@
* @return 1 if charger detect is activated (high when active high or
* low with active low), otherwise 0.
*/
-static int is_chg_det_activated(const struct max14637_config_t * const cfg)
+static int is_chg_det_activated(const struct max14637_config_t *const cfg)
{
return !!gpio_get_level(cfg->chg_det_pin) ^
- !!(cfg->flags & MAX14637_FLAGS_CHG_DET_ACTIVE_LOW);
+ !!(cfg->flags & MAX14637_FLAGS_CHG_DET_ACTIVE_LOW);
}
#endif
@@ -52,12 +53,12 @@ static int is_chg_det_activated(const struct max14637_config_t * const cfg)
* @param enable 1 to activate gpio (high for active high and low for active
* low).
*/
-static void activate_chip_enable(
- const struct max14637_config_t * const cfg, const int enable)
+static void activate_chip_enable(const struct max14637_config_t *const cfg,
+ const int enable)
{
- gpio_set_level(
- cfg->chip_enable_pin,
- !!enable ^ !!(cfg->flags & MAX14637_FLAGS_ENABLE_ACTIVE_LOW));
+ gpio_set_level(cfg->chip_enable_pin,
+ !!enable ^ !!(cfg->flags &
+ MAX14637_FLAGS_ENABLE_ACTIVE_LOW));
}
/**
@@ -67,7 +68,7 @@ static void activate_chip_enable(
*/
static void update_bc12_status_to_charger_manager(const int port)
{
- const struct max14637_config_t * const cfg = &max14637_config[port];
+ const struct max14637_config_t *const cfg = &max14637_config[port];
struct charge_port_info new_chg;
new_chg.voltage = USB_CHARGER_VOLTAGE_MV;
@@ -100,7 +101,7 @@ static void update_bc12_status_to_charger_manager(const int port)
*/
static void bc12_detect(const int port)
{
- const struct max14637_config_t * const cfg = &max14637_config[port];
+ const struct max14637_config_t *const cfg = &max14637_config[port];
/*
* Enable the IC to begin detection and connect switches if
@@ -176,7 +177,7 @@ static void detect_or_power_down_ic(const int port)
static void max14637_usb_charger_task_init(const int port)
{
- const struct max14637_config_t * const cfg = &max14637_config[port];
+ const struct max14637_config_t *const cfg = &max14637_config[port];
ASSERT(port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT);
/*
diff --git a/driver/bc12/max14637.h b/driver/bc12/max14637.h
index 2b18bc222b..119437d9da 100644
--- a/driver/bc12/max14637.h
+++ b/driver/bc12/max14637.h
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,8 +7,8 @@
#include "gpio.h"
-#define MAX14637_FLAGS_ENABLE_ACTIVE_LOW BIT(0)
-#define MAX14637_FLAGS_CHG_DET_ACTIVE_LOW BIT(1)
+#define MAX14637_FLAGS_ENABLE_ACTIVE_LOW BIT(0)
+#define MAX14637_FLAGS_CHG_DET_ACTIVE_LOW BIT(1)
struct max14637_config_t {
/*
@@ -29,5 +29,5 @@ struct max14637_config_t {
* Array that contains boards-specific configuration for BC 1.2 charging chips.
*/
extern const struct max14637_config_t
- max14637_config[CONFIG_USB_PD_PORT_MAX_COUNT];
+ max14637_config[CONFIG_USB_PD_PORT_MAX_COUNT];
extern const struct bc12_drv max14637_drv;
diff --git a/driver/bc12/mt6360.c b/driver/bc12/mt6360.c
index 487883ec62..49ec031e09 100644
--- a/driver/bc12/mt6360.c
+++ b/driver/bc12/mt6360.c
@@ -1,4 +1,4 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+/* Copyright 2020 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -19,20 +19,20 @@
#include "util.h"
/* Console output macros */
-#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_CHARGER, format, ##args)
#define CPRINTS(format, args...) \
- cprints(CC_USBCHARGE, "%s " format, "MT6360", ## args)
+ cprints(CC_USBCHARGE, "%s " format, "MT6360", ##args)
static enum ec_error_list mt6360_read8(int reg, int *val)
{
return i2c_read8(mt6360_config.i2c_port, mt6360_config.i2c_addr_flags,
- reg, val);
+ reg, val);
}
static enum ec_error_list mt6360_write8(int reg, int val)
{
return i2c_write8(mt6360_config.i2c_port, mt6360_config.i2c_addr_flags,
- reg, val);
+ reg, val);
}
static int mt6360_update_bits(int reg, int mask, int val)
@@ -121,7 +121,7 @@ static void mt6360_update_charge_manager(int port,
if (new_bc12_type != current_bc12_type) {
if (current_bc12_type >= 0)
charge_manager_update_charge(current_bc12_type, port,
- NULL);
+ NULL);
if (new_bc12_type != CHARGE_SUPPLIER_NONE) {
struct charge_port_info chg = {
@@ -146,10 +146,9 @@ static void mt6360_handle_bc12_irq(int port)
/* Check vbus again to avoid timing issue */
if (pd_snk_is_vbus_provided(port))
mt6360_update_charge_manager(
- port, mt6360_get_bc12_device_type());
+ port, mt6360_get_bc12_device_type());
else
- mt6360_update_charge_manager(
- 0, CHARGE_SUPPLIER_NONE);
+ mt6360_update_charge_manager(0, CHARGE_SUPPLIER_NONE);
}
/* write clear */
@@ -168,9 +167,8 @@ static void mt6360_usb_charger_task_event(const int port, uint32_t evt)
/* vbus change, start bc12 detection */
if (evt & USB_CHG_EVENT_VBUS) {
bool is_sink = pd_get_power_role(port) == PD_ROLE_SINK;
- bool is_non_pd_sink = !pd_capable(port) &&
- is_sink &&
- pd_snk_is_vbus_provided(port);
+ bool is_non_pd_sink = !pd_capable(port) && is_sink &&
+ pd_snk_is_vbus_provided(port);
if (is_sink)
mt6360_clr_bit(MT6360_REG_CHG_CTRL1, MT6360_MASK_HZ);
@@ -197,15 +195,15 @@ static int mt6360_regulator_write8(uint8_t addr, int reg, int val)
* Note: The checksum from I2C_FLAG_PEC happens to be correct because
* length == 1 -> the high 3 bits of the offset byte is 0.
*/
- return i2c_write8(mt6360_config.i2c_port,
- addr | I2C_FLAG_PEC, reg, val);
+ return i2c_write8(mt6360_config.i2c_port, addr | I2C_FLAG_PEC, reg,
+ val);
}
static int mt6360_regulator_read8(int addr, int reg, int *val)
{
int rv;
uint8_t crc = 0, real_crc;
- uint8_t out[3] = {(addr << 1) | 1, reg};
+ uint8_t out[3] = { (addr << 1) | 1, reg };
rv = i2c_read16(mt6360_config.i2c_port, addr, reg, val);
if (rv)
@@ -262,22 +260,10 @@ static const uint16_t MT6360_LDO5_VOSEL_TABLE[8] = {
};
static const uint16_t MT6360_LDO6_VOSEL_TABLE[16] = {
- [0x0] = 500,
- [0x1] = 600,
- [0x2] = 700,
- [0x3] = 800,
- [0x4] = 900,
- [0x5] = 1000,
- [0x6] = 1100,
- [0x7] = 1200,
- [0x8] = 1300,
- [0x9] = 1400,
- [0xA] = 1500,
- [0xB] = 1600,
- [0xC] = 1700,
- [0xD] = 1800,
- [0xE] = 1900,
- [0xF] = 2000,
+ [0x0] = 500, [0x1] = 600, [0x2] = 700, [0x3] = 800,
+ [0x4] = 900, [0x5] = 1000, [0x6] = 1100, [0x7] = 1200,
+ [0x8] = 1300, [0x9] = 1400, [0xA] = 1500, [0xB] = 1600,
+ [0xC] = 1700, [0xD] = 1800, [0xE] = 1900, [0xF] = 2000,
};
/* LDO7 VOSEL table is the same as LDO6's. */
@@ -410,14 +396,12 @@ int mt6360_regulator_enable(enum mt6360_regulator_id id, uint8_t enable)
if (enable)
return mt6360_regulator_update_bits(
- data->addr,
- data->reg_en_ctrl2,
+ data->addr, data->reg_en_ctrl2,
MT6360_MASK_RGL_SW_OP_EN | MT6360_MASK_RGL_SW_EN,
MT6360_MASK_RGL_SW_OP_EN | MT6360_MASK_RGL_SW_EN);
else
return mt6360_regulator_update_bits(
- data->addr,
- data->reg_en_ctrl2,
+ data->addr, data->reg_en_ctrl2,
MT6360_MASK_RGL_SW_OP_EN | MT6360_MASK_RGL_SW_EN,
MT6360_MASK_RGL_SW_OP_EN);
}
@@ -468,8 +452,7 @@ int mt6360_regulator_set_voltage(enum mt6360_regulator_id id, int min_mv,
step = (mv - MT6360_BUCK_VOSEL_MIN) / MT6360_BUCK_VOSEL_STEP_MV;
- return mt6360_regulator_update_bits(data->addr,
- data->reg_ctrl3,
+ return mt6360_regulator_update_bits(data->addr, data->reg_ctrl3,
data->mask_vosel, step);
}
@@ -489,8 +472,7 @@ int mt6360_regulator_set_voltage(enum mt6360_regulator_id id, int min_mv,
if (mv + step * MT6360_LDO_VOCAL_STEP_MV > max_mv)
continue;
return mt6360_regulator_update_bits(
- data->addr,
- data->reg_ctrl3,
+ data->addr, data->reg_ctrl3,
data->mask_vosel | data->mask_vocal,
(i << data->shift_vosel) | step);
}
diff --git a/driver/bc12/mt6360.h b/driver/bc12/mt6360.h
index 781bed2f57..85dab2b6ad 100644
--- a/driver/bc12/mt6360.h
+++ b/driver/bc12/mt6360.h
@@ -1,4 +1,4 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+/* Copyright 2020 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/driver/bc12/pi3usb9201.c b/driver/bc12/pi3usb9201.c
index 9e60c9b4fd..e892c34e8c 100644
--- a/driver/bc12/pi3usb9201.c
+++ b/driver/bc12/pi3usb9201.c
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -18,7 +18,7 @@
#include "usb_pd.h"
#include "util.h"
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args)
enum pi3usb9201_client_sts {
CHG_OTHER = 0,
@@ -45,21 +45,21 @@ static enum charge_supplier bc12_supplier[CONFIG_USB_PD_PORT_MAX_COUNT];
* will continue to allow those.
*/
static const struct bc12_status bc12_chg_limits[] = {
- [CHG_OTHER] = {CHARGE_SUPPLIER_OTHER, 500},
- [CHG_2_4A] = {CHARGE_SUPPLIER_PROPRIETARY, USB_CHARGER_MAX_CURR_MA},
- [CHG_2_0A] = {CHARGE_SUPPLIER_PROPRIETARY, USB_CHARGER_MAX_CURR_MA},
- [CHG_1_0A] = {CHARGE_SUPPLIER_PROPRIETARY, 1000},
- [CHG_RESERVED] = {CHARGE_SUPPLIER_NONE, 0},
- [CHG_CDP] = {CHARGE_SUPPLIER_BC12_CDP, USB_CHARGER_MAX_CURR_MA},
- [CHG_SDP] = {CHARGE_SUPPLIER_BC12_SDP, 500},
- [CHG_DCP] = {CHARGE_SUPPLIER_BC12_DCP, USB_CHARGER_MAX_CURR_MA},
+ [CHG_OTHER] = { CHARGE_SUPPLIER_OTHER, 500 },
+ [CHG_2_4A] = { CHARGE_SUPPLIER_PROPRIETARY, USB_CHARGER_MAX_CURR_MA },
+ [CHG_2_0A] = { CHARGE_SUPPLIER_PROPRIETARY, USB_CHARGER_MAX_CURR_MA },
+ [CHG_1_0A] = { CHARGE_SUPPLIER_PROPRIETARY, 1000 },
+ [CHG_RESERVED] = { CHARGE_SUPPLIER_NONE, 0 },
+ [CHG_CDP] = { CHARGE_SUPPLIER_BC12_CDP, USB_CHARGER_MAX_CURR_MA },
+ [CHG_SDP] = { CHARGE_SUPPLIER_BC12_SDP, 500 },
+ [CHG_DCP] = { CHARGE_SUPPLIER_BC12_DCP, USB_CHARGER_MAX_CURR_MA },
};
static inline int raw_read8(int port, int offset, int *value)
{
return i2c_read8(pi3usb9201_bc12_chips[port].i2c_port,
- pi3usb9201_bc12_chips[port].i2c_addr_flags,
- offset, value);
+ pi3usb9201_bc12_chips[port].i2c_addr_flags, offset,
+ value);
}
static int pi3usb9201_raw(int port, int reg, int mask, int val)
@@ -73,8 +73,7 @@ static int pi3usb9201_raw(int port, int reg, int mask, int val)
static int pi3usb9201_interrupt_mask(int port, int enable)
{
return pi3usb9201_raw(port, PI3USB9201_REG_CTRL_1,
- PI3USB9201_REG_CTRL_1_INT_MASK,
- enable);
+ PI3USB9201_REG_CTRL_1_INT_MASK, enable);
}
static int pi3usb9201_bc12_detect_ctrl(int port, int enable)
@@ -91,7 +90,7 @@ static int pi3usb9201_set_mode(int port, int desired_mode)
desired_mode << PI3USB9201_REG_CTRL_1_MODE_SHIFT);
}
-static int pi3usb9201_get_mode(int port, int *mode)
+static __maybe_unused int pi3usb9201_get_mode(int port, int *mode)
{
int rv;
@@ -121,7 +120,7 @@ static int pi3usb9201_get_status(int port, int *client, int *host)
}
static void bc12_update_supplier(enum charge_supplier supplier, int port,
- struct charge_port_info *new_chg)
+ struct charge_port_info *new_chg)
{
/*
* If most recent supplier type is not CHARGE_SUPPLIER_NONE, then the
@@ -155,8 +154,8 @@ static void bc12_update_charge_manager(int port, int client_status)
new_chg.current = bc12_chg_limits[bit_pos].current_limit;
supplier = bc12_chg_limits[bit_pos].supplier;
- CPRINTS("pi3usb9201[p%d]: sts = 0x%x, lim = %d mA, supplier = %d",
- port, client_status, new_chg.current, supplier);
+ CPRINTS("pi3usb9201[p%d]: sts = 0x%x, lim = %d mA, supplier = %d", port,
+ client_status, new_chg.current, supplier);
/* bc1.2 is complete and start bit does not auto clear */
pi3usb9201_bc12_detect_ctrl(port, 0);
/* Inform charge manager of new supplier type and current limit */
@@ -257,6 +256,9 @@ static void pi3usb9201_usb_charger_task_event(const int port, uint32_t evt)
*/
bc12_update_charge_manager(port, client);
if (!rv && host) {
+#ifdef CONFIG_BC12_CLIENT_MODE_ONLY_PI3USB9201
+ pi3usb9201_set_mode(port, PI3USB9201_USB_PATH_ON);
+#else
/*
* Switch to SDP after device is plugged in to avoid
* noise (pulse on D-) causing USB disconnect
@@ -272,6 +274,7 @@ static void pi3usb9201_usb_charger_task_event(const int port, uint32_t evt)
if (host & PI3USB9201_REG_HOST_STS_DEV_UNPLUG)
pi3usb9201_set_mode(port,
PI3USB9201_CDP_HOST_MODE);
+#endif
}
/*
* TODO(b/124061702): Use host status to allocate power more
@@ -281,8 +284,7 @@ static void pi3usb9201_usb_charger_task_event(const int port, uint32_t evt)
if (!IS_ENABLED(CONFIG_USB_PD_VBUS_DETECT_TCPC) &&
(evt & USB_CHG_EVENT_VBUS))
- CPRINTS("VBUS p%d %d", port,
- pd_snk_is_vbus_provided(port));
+ CPRINTS("VBUS p%d %d", port, pd_snk_is_vbus_provided(port));
if (evt & USB_CHG_EVENT_DR_UFP) {
bc12_power_up(port);
@@ -298,14 +300,17 @@ static void pi3usb9201_usb_charger_task_event(const int port, uint32_t evt)
new_chg.voltage = USB_CHARGER_VOLTAGE_MV;
new_chg.current = USB_CHARGER_MIN_CURR_MA;
/* Save supplier type and notify chg manager */
- bc12_update_supplier(CHARGE_SUPPLIER_OTHER,
- port, &new_chg);
+ bc12_update_supplier(CHARGE_SUPPLIER_OTHER, port,
+ &new_chg);
CPRINTS("pi3usb9201[p%d]: bc1.2 failed use defaults",
port);
}
}
if (evt & USB_CHG_EVENT_DR_DFP) {
+#ifdef CONFIG_BC12_CLIENT_MODE_ONLY_PI3USB9201
+ pi3usb9201_set_mode(port, PI3USB9201_USB_PATH_ON);
+#else
int mode;
int rv;
@@ -335,6 +340,7 @@ static void pi3usb9201_usb_charger_task_event(const int port, uint32_t evt)
*/
pi3usb9201_interrupt_mask(port, 0);
}
+#endif
}
if (evt & USB_CHG_EVENT_CC_OPEN)
@@ -383,9 +389,8 @@ const struct bc12_drv pi3usb9201_drv = {
#ifdef CONFIG_BC12_SINGLE_DRIVER
/* provide a default bc12_ports[] for backward compatibility */
-struct bc12_config bc12_ports[CHARGE_PORT_COUNT] = {
- [0 ... (CHARGE_PORT_COUNT - 1)] = {
- .drv = &pi3usb9201_drv,
- }
-};
+struct bc12_config
+ bc12_ports[CHARGE_PORT_COUNT] = { [0 ...(CHARGE_PORT_COUNT - 1)] = {
+ .drv = &pi3usb9201_drv,
+ } };
#endif /* CONFIG_BC12_SINGLE_DRIVER */
diff --git a/driver/bc12/pi3usb9201.h b/driver/bc12/pi3usb9201.h
index 3163a3eebc..61728cce2a 100644
--- a/driver/bc12/pi3usb9201.h
+++ b/driver/bc12/pi3usb9201.h
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -21,8 +21,8 @@
/* Control_1 regiter bit definitions */
#define PI3USB9201_REG_CTRL_1_INT_MASK BIT(0)
#define PI3USB9201_REG_CTRL_1_MODE_SHIFT 1
-#define PI3USB9201_REG_CTRL_1_MODE_MASK (0x7 << \
- PI3USB9201_REG_CTRL_1_MODE_SHIFT)
+#define PI3USB9201_REG_CTRL_1_MODE_MASK \
+ (0x7 << PI3USB9201_REG_CTRL_1_MODE_SHIFT)
/* Control_2 regiter bit definitions */
#define PI3USB9201_REG_CTRL_2_AUTO_SW BIT(1)
diff --git a/driver/bc12/pi3usb9281.c b/driver/bc12/pi3usb9281.c
index 3c3a0a7256..9e92d0f273 100644
--- a/driver/bc12/pi3usb9281.c
+++ b/driver/bc12/pi3usb9281.c
@@ -1,10 +1,11 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Pericom PI3USB3281 USB port switch driver.
*/
+#include "builtin/assert.h"
#include "charge_manager.h"
#include "common.h"
#include "console.h"
@@ -19,9 +20,9 @@
#include "usb_pd.h"
#include "util.h"
- /* Console output macros */
+/* Console output macros */
#define CPUTS(outstr) cputs(CC_USBCHARGE, outstr)
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args)
/* I2C address */
#define PI3USB9281_I2C_ADDR_FLAGS 0x25
@@ -30,10 +31,10 @@
#define PI3USB9281_SW_RESET_DELAY 20
/* Wait after a charger is detected to debounce pin contact order */
-#define PI3USB9281_DETECT_DEBOUNCE_MS 1000
-#define PI3USB9281_RESET_DEBOUNCE_MS 100
-#define PI3USB9281_RESET_STARTUP_DELAY (200 * MSEC)
-#define PI3USB9281_RESET_STARTUP_DELAY_INTERVAL_MS 40
+#define PI3USB9281_DETECT_DEBOUNCE_MS 1000
+#define PI3USB9281_RESET_DEBOUNCE_MS 100
+#define PI3USB9281_RESET_STARTUP_DELAY (200 * MSEC)
+#define PI3USB9281_RESET_STARTUP_DELAY_INTERVAL_MS 40
/* Store the state of our USB data switches so that they can be restored. */
static int usb_switch_state[CONFIG_USB_PD_PORT_MAX_COUNT];
@@ -69,8 +70,7 @@ static uint8_t pi3usb9281_do_read(int port, uint8_t reg, int with_lock)
if (with_lock)
select_chip(port);
- res = i2c_read8(chip->i2c_port, PI3USB9281_I2C_ADDR_FLAGS,
- reg, &val);
+ res = i2c_read8(chip->i2c_port, PI3USB9281_I2C_ADDR_FLAGS, reg, &val);
if (with_lock)
unselect_chip(port);
@@ -91,8 +91,8 @@ static uint8_t pi3usb9281_read(int port, uint8_t reg)
return pi3usb9281_do_read(port, reg, 1);
}
-static int pi3usb9281_do_write(
- int port, uint8_t reg, uint8_t val, int with_lock)
+static int pi3usb9281_do_write(int port, uint8_t reg, uint8_t val,
+ int with_lock)
{
struct pi3usb9281_config *chip = &pi3usb9281_chips[port];
int res;
@@ -100,8 +100,7 @@ static int pi3usb9281_do_write(
if (with_lock)
select_chip(port);
- res = i2c_write8(chip->i2c_port, PI3USB9281_I2C_ADDR_FLAGS,
- reg, val);
+ res = i2c_write8(chip->i2c_port, PI3USB9281_I2C_ADDR_FLAGS, reg, val);
if (with_lock)
unselect_chip(port);
@@ -120,8 +119,9 @@ static int pi3usb9281_write(int port, uint8_t reg, uint8_t val)
static int pi3usb9281_do_write_ctrl(int port, uint8_t ctrl, int with_lock)
{
return pi3usb9281_do_write(port, PI3USB9281_REG_CONTROL,
- (ctrl & PI3USB9281_CTRL_MASK) |
- PI3USB9281_CTRL_RSVD_1, with_lock);
+ (ctrl & PI3USB9281_CTRL_MASK) |
+ PI3USB9281_CTRL_RSVD_1,
+ with_lock);
}
static int pi3usb9281_write_ctrl(int port, uint8_t ctrl)
@@ -156,7 +156,6 @@ static void pi3usb9281_init(int port)
pi3usb9281_enable_interrupts(port);
}
-
int pi3usb9281_enable_interrupts(int port)
{
uint8_t ctrl;
@@ -297,7 +296,7 @@ static int pc3usb9281_read_interrupt(int port)
do {
/* Read (& clear) possible attach & detach interrupt */
if (pi3usb9281_get_interrupts(port) &
- PI3USB9281_INT_ATTACH_DETACH)
+ PI3USB9281_INT_ATTACH_DETACH)
return EC_SUCCESS;
msleep(PI3USB9281_RESET_STARTUP_DELAY_INTERVAL_MS);
} while (get_time().val < timeout.val);
@@ -418,7 +417,6 @@ static uint32_t bc12_detect(int port)
static void pi3usb9281_usb_charger_task_event(const int port, uint32_t evt)
{
-
/* Interrupt from the Pericom chip, determine charger type */
if (evt & USB_CHG_EVENT_BC12) {
/* Read interrupt register to clear on chip */
@@ -443,7 +441,8 @@ static void pi3usb9281_usb_charger_task_event(const int port, uint32_t evt)
if (evt & USB_CHG_EVENT_VBUS) {
pi3usb9281_enable_interrupts(port);
if (!IS_ENABLED(CONFIG_USB_PD_VBUS_DETECT_TCPC))
- CPRINTS("VBUS p%d %d", port, pd_snk_is_vbus_provided(port));
+ CPRINTS("VBUS p%d %d", port,
+ pd_snk_is_vbus_provided(port));
}
}
diff --git a/driver/bc12/pi3usb9281.h b/driver/bc12/pi3usb9281.h
index ca1828f49c..7910502df8 100644
--- a/driver/bc12/pi3usb9281.h
+++ b/driver/bc12/pi3usb9281.h
@@ -1,4 +1,4 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
+/* Copyright 2014 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -8,55 +8,55 @@
#ifndef __CROS_EC_PI3USB9281_H
#define __CROS_EC_PI3USB9281_H
-#define PI3USB9281_REG_DEV_ID 0x01
-#define PI3USB9281_REG_CONTROL 0x02
-#define PI3USB9281_REG_INT 0x03
-#define PI3USB9281_REG_INT_MASK 0x05
-#define PI3USB9281_REG_DEV_TYPE 0x0a
-#define PI3USB9281_REG_CHG_STATUS 0x0e
-#define PI3USB9281_REG_MANUAL 0x13
-#define PI3USB9281_REG_RESET 0x1b
-#define PI3USB9281_REG_VBUS 0x1d
+#define PI3USB9281_REG_DEV_ID 0x01
+#define PI3USB9281_REG_CONTROL 0x02
+#define PI3USB9281_REG_INT 0x03
+#define PI3USB9281_REG_INT_MASK 0x05
+#define PI3USB9281_REG_DEV_TYPE 0x0a
+#define PI3USB9281_REG_CHG_STATUS 0x0e
+#define PI3USB9281_REG_MANUAL 0x13
+#define PI3USB9281_REG_RESET 0x1b
+#define PI3USB9281_REG_VBUS 0x1d
-#define PI3USB9281_DEV_ID 0x10
-#define PI3USB9281_DEV_ID_A 0x18
+#define PI3USB9281_DEV_ID 0x10
+#define PI3USB9281_DEV_ID_A 0x18
-#define PI3USB9281_CTRL_INT_DIS BIT(0)
-#define PI3USB9281_CTRL_AUTO BIT(2)
+#define PI3USB9281_CTRL_INT_DIS BIT(0)
+#define PI3USB9281_CTRL_AUTO BIT(2)
#define PI3USB9281_CTRL_SWITCH_AUTO BIT(4)
/* Bits 5 thru 7 are read X, write 0 */
-#define PI3USB9281_CTRL_MASK 0x1f
+#define PI3USB9281_CTRL_MASK 0x1f
/* Bits 1 and 3 are read 1, write 1 */
-#define PI3USB9281_CTRL_RSVD_1 0x0a
+#define PI3USB9281_CTRL_RSVD_1 0x0a
-#define PI3USB9281_PIN_MANUAL_VBUS (3 << 0)
-#define PI3USB9281_PIN_MANUAL_DP BIT(2)
-#define PI3USB9281_PIN_MANUAL_DM BIT(5)
+#define PI3USB9281_PIN_MANUAL_VBUS (3 << 0)
+#define PI3USB9281_PIN_MANUAL_DP BIT(2)
+#define PI3USB9281_PIN_MANUAL_DM BIT(5)
-#define PI3USB9281_INT_ATTACH BIT(0)
-#define PI3USB9281_INT_DETACH BIT(1)
-#define PI3USB9281_INT_OVP BIT(5)
-#define PI3USB9281_INT_OCP BIT(6)
-#define PI3USB9281_INT_OVP_OC BIT(7)
-#define PI3USB9281_INT_ATTACH_DETACH (PI3USB9281_INT_ATTACH | \
- PI3USB9281_INT_DETACH)
+#define PI3USB9281_INT_ATTACH BIT(0)
+#define PI3USB9281_INT_DETACH BIT(1)
+#define PI3USB9281_INT_OVP BIT(5)
+#define PI3USB9281_INT_OCP BIT(6)
+#define PI3USB9281_INT_OVP_OC BIT(7)
+#define PI3USB9281_INT_ATTACH_DETACH \
+ (PI3USB9281_INT_ATTACH | PI3USB9281_INT_DETACH)
-#define PI3USB9281_TYPE_NONE 0
-#define PI3USB9281_TYPE_MHL BIT(0)
-#define PI3USB9281_TYPE_OTG BIT(1)
-#define PI3USB9281_TYPE_SDP BIT(2)
-#define PI3USB9281_TYPE_CAR BIT(4)
-#define PI3USB9281_TYPE_CDP BIT(5)
-#define PI3USB9281_TYPE_DCP BIT(6)
+#define PI3USB9281_TYPE_NONE 0
+#define PI3USB9281_TYPE_MHL BIT(0)
+#define PI3USB9281_TYPE_OTG BIT(1)
+#define PI3USB9281_TYPE_SDP BIT(2)
+#define PI3USB9281_TYPE_CAR BIT(4)
+#define PI3USB9281_TYPE_CDP BIT(5)
+#define PI3USB9281_TYPE_DCP BIT(6)
-#define PI3USB9281_CHG_NONE 0
-#define PI3USB9281_CHG_CAR_TYPE1 BIT(1)
-#define PI3USB9281_CHG_CAR_TYPE2 (3 << 0)
-#define PI3USB9281_CHG_APPLE_1A BIT(2)
-#define PI3USB9281_CHG_APPLE_2A BIT(3)
-#define PI3USB9281_CHG_APPLE_2_4A BIT(4)
+#define PI3USB9281_CHG_NONE 0
+#define PI3USB9281_CHG_CAR_TYPE1 BIT(1)
+#define PI3USB9281_CHG_CAR_TYPE2 (3 << 0)
+#define PI3USB9281_CHG_APPLE_1A BIT(2)
+#define PI3USB9281_CHG_APPLE_2A BIT(3)
+#define PI3USB9281_CHG_APPLE_2_4A BIT(4)
/* Check if charge status has any connection */
-#define PI3USB9281_CHG_STATUS_ANY(x) (((x) & 0x1f) > 1)
+#define PI3USB9281_CHG_STATUS_ANY(x) (((x)&0x1f) > 1)
/* Define configuration of one pi3usb9281 part */
struct pi3usb9281_config {
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