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-rw-r--r--driver/led/aw20198.c22
-rw-r--r--driver/led/aw20198.h66
-rw-r--r--driver/led/ds2413.c27
-rw-r--r--driver/led/is31fl3733b.c116
-rw-r--r--driver/led/is31fl3743b.c50
-rw-r--r--driver/led/lm3509.c15
-rw-r--r--driver/led/lm3509.h12
-rw-r--r--driver/led/lm3630a.c21
-rw-r--r--driver/led/lm3630a.h90
-rw-r--r--driver/led/lp5562.c4
-rw-r--r--driver/led/lp5562.h66
-rw-r--r--driver/led/max695x.c27
-rw-r--r--driver/led/max695x.h32
-rw-r--r--driver/led/mp3385.c28
-rw-r--r--driver/led/mp3385.h4
-rw-r--r--driver/led/oz554.c27
-rw-r--r--driver/led/oz554.h2
-rw-r--r--driver/led/tlc59116f.c25
-rw-r--r--driver/led/tlc59116f.h114
19 files changed, 365 insertions, 383 deletions
diff --git a/driver/led/aw20198.c b/driver/led/aw20198.c
index 1322c08a09..e2eea69481 100644
--- a/driver/led/aw20198.c
+++ b/driver/led/aw20198.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -16,12 +16,12 @@
#define CPRINTF(fmt, args...) cprintf(CC_RGBKBD, "AW20198: " fmt, ##args)
#define CPRINTS(fmt, args...) cprints(CC_RGBKBD, "AW20198: " fmt, ##args)
-#define BUF_SIZE (SIZE_OF_RGB * AW20198_GRID_SIZE)
+#define BUF_SIZE (SIZE_OF_RGB * AW20198_GRID_SIZE)
static int aw20198_read(struct rgbkbd *ctx, uint8_t addr, uint8_t *value)
{
- return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG,
- &addr, sizeof(addr), value, sizeof(*value));
+ return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG, &addr,
+ sizeof(addr), value, sizeof(*value));
}
static int aw20198_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
@@ -31,8 +31,8 @@ static int aw20198_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
[1] = value,
};
- return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG,
- buf, sizeof(buf), NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG, buf, sizeof(buf),
+ NULL, 0);
}
static int aw20198_set_page(struct rgbkbd *ctx, uint8_t page)
@@ -103,8 +103,8 @@ static int aw20198_set_color(struct rgbkbd *ctx, uint8_t offset,
buf[i * SIZE_OF_RGB + 3] = color[i].b;
}
- return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG,
- buf, frame_len, NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG, buf, frame_len,
+ NULL, 0);
}
static int aw20198_set_scale(struct rgbkbd *ctx, uint8_t offset,
@@ -131,8 +131,8 @@ static int aw20198_set_scale(struct rgbkbd *ctx, uint8_t offset,
buf[i * SIZE_OF_RGB + 3] = scale.b;
}
- return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG,
- buf, frame_len, NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, AW20198_I2C_ADDR_FLAG, buf, frame_len,
+ NULL, 0);
}
static int aw20198_set_gcc(struct rgbkbd *ctx, uint8_t level)
@@ -159,7 +159,7 @@ static int aw20198_init(struct rgbkbd *ctx)
rv = aw20198_get_config(ctx, AW20198_REG_GCR, &u8);
if (rv) {
return rv;
- }
+ }
u8 &= ~AW20198_REG_GCR_SWSEL_MASK;
u8 |= ((ctx->cfg->col_len - 1) << AW20198_REG_GCR_SWSEL_SHIFT);
rv = aw20198_write(ctx, AW20198_REG_GCR, u8);
diff --git a/driver/led/aw20198.h b/driver/led/aw20198.h
index bbb284cc3a..85ef8c4b9e 100644
--- a/driver/led/aw20198.h
+++ b/driver/led/aw20198.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,38 +7,38 @@
#define __CROS_EC_DRIVER_LED_AW20198_H
/* This depends on AD0 and AD1. (GRD, GRD) = 0x20. */
-#define AW20198_I2C_ADDR_FLAG 0x20
-
-#define AW20198_ROW_SIZE 6
-#define AW20198_COL_SIZE 11
-#define AW20198_GRID_SIZE (AW20198_COL_SIZE * AW20198_ROW_SIZE)
-
-#define AW20198_PAGE_FUNC 0xC0
-#define AW20198_PAGE_PWM 0xC1
-#define AW20198_PAGE_SCALE 0xC2
-
-#define AW20198_REG_GCR 0x00
-#define AW20198_REG_GCR_SWSEL_MASK 0xF0
-#define AW20198_REG_GCR_SWSEL_SHIFT 4
-#define AW20198_REG_GCR_SW1_ACTIVE 0
-#define AW20198_REG_GCR_SW1_TO_SW2_ACTIVE 1
-#define AW20198_REG_GCR_SW1_TO_SW3_ACTIVE 2
-#define AW20198_REG_GCR_SW1_TO_SW4_ACTIVE 3
-#define AW20198_REG_GCR_SW1_TO_SW5_ACTIVE 4
-#define AW20198_REG_GCR_SW1_TO_SW6_ACTIVE 5
-#define AW20198_REG_GCR_SW1_TO_SW7_ACTIVE 6
-#define AW20198_REG_GCR_SW1_TO_SW8_ACTIVE 7
-#define AW20198_REG_GCR_SW1_TO_SW9_ACTIVE 8
-#define AW20198_REG_GCR_SW1_TO_SW10_ACTIVE 9
-#define AW20198_REG_GCR_SW1_TO_SW11_ACTIVE 10
-
-#define AW20198_REG_GCC 0x01
-#define AW20198_REG_RSTN 0x2F
-#define AW20198_REG_MIXCR 0x46
-#define AW20198_REG_PAGE 0xF0
-
-#define AW20198_RESET_MAGIC 0xAE
+#define AW20198_I2C_ADDR_FLAG 0x20
+
+#define AW20198_ROW_SIZE 6
+#define AW20198_COL_SIZE 11
+#define AW20198_GRID_SIZE (AW20198_COL_SIZE * AW20198_ROW_SIZE)
+
+#define AW20198_PAGE_FUNC 0xC0
+#define AW20198_PAGE_PWM 0xC1
+#define AW20198_PAGE_SCALE 0xC2
+
+#define AW20198_REG_GCR 0x00
+#define AW20198_REG_GCR_SWSEL_MASK 0xF0
+#define AW20198_REG_GCR_SWSEL_SHIFT 4
+#define AW20198_REG_GCR_SW1_ACTIVE 0
+#define AW20198_REG_GCR_SW1_TO_SW2_ACTIVE 1
+#define AW20198_REG_GCR_SW1_TO_SW3_ACTIVE 2
+#define AW20198_REG_GCR_SW1_TO_SW4_ACTIVE 3
+#define AW20198_REG_GCR_SW1_TO_SW5_ACTIVE 4
+#define AW20198_REG_GCR_SW1_TO_SW6_ACTIVE 5
+#define AW20198_REG_GCR_SW1_TO_SW7_ACTIVE 6
+#define AW20198_REG_GCR_SW1_TO_SW8_ACTIVE 7
+#define AW20198_REG_GCR_SW1_TO_SW9_ACTIVE 8
+#define AW20198_REG_GCR_SW1_TO_SW10_ACTIVE 9
+#define AW20198_REG_GCR_SW1_TO_SW11_ACTIVE 10
+
+#define AW20198_REG_GCC 0x01
+#define AW20198_REG_RSTN 0x2F
+#define AW20198_REG_MIXCR 0x46
+#define AW20198_REG_PAGE 0xF0
+
+#define AW20198_RESET_MAGIC 0xAE
extern const struct rgbkbd_drv aw20198_drv;
-#endif /* __CROS_EC_DRIVER_LED_AW20198_H */
+#endif /* __CROS_EC_DRIVER_LED_AW20198_H */
diff --git a/driver/led/ds2413.c b/driver/led/ds2413.c
index b856d85671..5268e52ac0 100644
--- a/driver/led/ds2413.c
+++ b/driver/led/ds2413.c
@@ -1,4 +1,4 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
+/* Copyright 2013 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -19,12 +19,12 @@ enum led_color {
LED_RED,
LED_YELLOW,
LED_GREEN,
- LED_COLOR_COUNT /* Number of colors, not a color itself */
+ LED_COLOR_COUNT /* Number of colors, not a color itself */
};
-static const uint8_t led_masks[LED_COLOR_COUNT] = {0xff, 0xfe, 0xfc, 0xfd};
-static const char * const color_names[LED_COLOR_COUNT] = {
- "off", "red", "yellow", "green"};
+static const uint8_t led_masks[LED_COLOR_COUNT] = { 0xff, 0xfe, 0xfc, 0xfd };
+static const char *const color_names[LED_COLOR_COUNT] = { "off", "red",
+ "yellow", "green" };
/**
* Set the onewire LED GPIO controller outputs
@@ -48,9 +48,9 @@ static int led_set_mask(int mask)
/* Write and turn on the LEDs */
onewire_write(0x5a);
onewire_write(mask);
- onewire_write(~mask); /* Repeat inverted */
+ onewire_write(~mask); /* Repeat inverted */
- rv = onewire_read(); /* Confirmation byte */
+ rv = onewire_read(); /* Confirmation byte */
if (rv != 0xaa)
return EC_ERROR_UNKNOWN;
@@ -109,10 +109,10 @@ static void onewire_led_tick(void)
/* Translate charge state to LED color */
switch (charge_get_state()) {
case PWR_STATE_IDLE:
- if (chflags & CHARGE_FLAG_FORCE_IDLE)
- new_color = (tick_count & 1) ? LED_GREEN : LED_OFF;
- else
- new_color = LED_GREEN;
+ new_color = LED_GREEN;
+ break;
+ case PWR_STATE_FORCED_IDLE:
+ new_color = (tick_count & 1) ? LED_GREEN : LED_OFF;
break;
case PWR_STATE_CHARGE:
new_color = LED_YELLOW;
@@ -149,7 +149,7 @@ DECLARE_HOOK(HOOK_SECOND, onewire_led_tick, HOOK_PRIO_DEFAULT);
/*****************************************************************************/
/* Console commands */
#define CONFIG_CMD_POWERLED
-static int command_powerled(int argc, char **argv)
+static int command_powerled(int argc, const char **argv)
{
int i;
@@ -161,6 +161,5 @@ static int command_powerled(int argc, char **argv)
return EC_ERROR_PARAM1;
}
DECLARE_CONSOLE_COMMAND(powerled, command_powerled,
- "<off | red | yellow | green>",
- "Set power LED color");
+ "<off | red | yellow | green>", "Set power LED color");
#endif
diff --git a/driver/led/is31fl3733b.c b/driver/led/is31fl3733b.c
index 5b1df890f1..33004d1cec 100644
--- a/driver/led/is31fl3733b.c
+++ b/driver/led/is31fl3733b.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -14,63 +14,62 @@
#define CPRINTF(fmt, args...) cprintf(CC_RGBKBD, "RGBKBD: " fmt, ##args)
#define CPRINTS(fmt, args...) cprints(CC_RGBKBD, "RGBKBD: " fmt, ##args)
-
/* This depends on ADDR1 and ADDR2. (GND, GND) = 0x50. */
-#define IS31FL3733B_ADDR_FLAGS 0x50
+#define IS31FL3733B_ADDR_FLAGS 0x50
-#define IS31FL3733B_ROW_SIZE 16
-#define IS31FL3733B_COL_SIZE 4
-#define IS31FL3733B_GRID_SIZE (IS31FL3733B_COL_SIZE * IS31FL3733B_ROW_SIZE)
-#define IS31FL3733B_BUF_SIZE (SIZE_OF_RGB * IS31FL3733B_GRID_SIZE)
+#define IS31FL3733B_ROW_SIZE 16
+#define IS31FL3733B_COL_SIZE 4
+#define IS31FL3733B_GRID_SIZE (IS31FL3733B_COL_SIZE * IS31FL3733B_ROW_SIZE)
+#define IS31FL3733B_BUF_SIZE (SIZE_OF_RGB * IS31FL3733B_GRID_SIZE)
/* IS31FL3733B registers */
-#define IS31FL3733B_REG_COMMAND 0xFD
-#define IS31FL3733B_REG_COMMAND_WRITE_LOCK 0xFE
-#define IS31FL3733B_REG_INT_MASK 0xF0
-#define IS31FL3733B_REG_INT_STATUS 0xF1
+#define IS31FL3733B_REG_COMMAND 0xFD
+#define IS31FL3733B_REG_COMMAND_WRITE_LOCK 0xFE
+#define IS31FL3733B_REG_INT_MASK 0xF0
+#define IS31FL3733B_REG_INT_STATUS 0xF1
-#define IS31FL3733B_PAGE_CTRL 0x00
-#define IS31FL3733B_PAGE_PWM 0x01
-#define IS31FL3733B_PAGE_AUTO 0x02
-#define IS31FL3733B_PAGE_FUNC 0x03
+#define IS31FL3733B_PAGE_CTRL 0x00
+#define IS31FL3733B_PAGE_PWM 0x01
+#define IS31FL3733B_PAGE_AUTO 0x02
+#define IS31FL3733B_PAGE_FUNC 0x03
/* FEh Command Register Write Lock */
-#define IS31FL3733B_WRITE_DISABLE 0x00
-#define IS31FL3733B_WRITE_ENABLE 0xC5
-
-#define IS31FL3733B_INT_MASK_IAC BIT(3)
-#define IS31FL3733B_INT_MASK_IAB BIT(2)
-#define IS31FL3733B_INT_MASK_IS BIT(1)
-#define IS31FL3733B_INT_MASK_IO BIT(0)
-#define IS31FL3733B_INT_STATUS_ABM3 BIT(4)
-#define IS31FL3733B_INT_STATUS_ABM2 BIT(3)
-#define IS31FL3733B_INT_STATUS_ABM1 BIT(2)
-#define IS31FL3733B_INT_STATUS_SB BIT(1)
-#define IS31FL3733B_INT_STATUS_OB BIT(0)
-
-#define IS31FL3733B_FUNC_CFG 0x00
-#define IS31FL3733B_FUNC_GCC 0x01
-#define IS31FL3733B_FUNC_ABM1_1 0x02
-#define IS31FL3733B_FUNC_ABM1_2 0x03
-#define IS31FL3733B_FUNC_ABM1_3 0x04
-#define IS31FL3733B_FUNC_ABM1_4 0x05
-#define IS31FL3733B_FUNC_ABM2_1 0x06
-#define IS31FL3733B_FUNC_ABM2_2 0x07
-#define IS31FL3733B_FUNC_ABM2_3 0x08
-#define IS31FL3733B_FUNC_ABM2_4 0x09
-#define IS31FL3733B_FUNC_ABM3_1 0x0a
-#define IS31FL3733B_FUNC_ABM3_2 0x0b
-#define IS31FL3733B_FUNC_ABM3_3 0x0c
-#define IS31FL3733B_FUNC_ABM3_4 0x0d
-#define IS31FL3733B_FUNC_TUR 0x0e
-#define IS31FL3733B_FUNC_SW_PU 0x0f
-#define IS31FL3733B_FUNC_CS_PD 0x10
-#define IS31FL3733B_FUNC_RST 0x11
+#define IS31FL3733B_WRITE_DISABLE 0x00
+#define IS31FL3733B_WRITE_ENABLE 0xC5
+
+#define IS31FL3733B_INT_MASK_IAC BIT(3)
+#define IS31FL3733B_INT_MASK_IAB BIT(2)
+#define IS31FL3733B_INT_MASK_IS BIT(1)
+#define IS31FL3733B_INT_MASK_IO BIT(0)
+#define IS31FL3733B_INT_STATUS_ABM3 BIT(4)
+#define IS31FL3733B_INT_STATUS_ABM2 BIT(3)
+#define IS31FL3733B_INT_STATUS_ABM1 BIT(2)
+#define IS31FL3733B_INT_STATUS_SB BIT(1)
+#define IS31FL3733B_INT_STATUS_OB BIT(0)
+
+#define IS31FL3733B_FUNC_CFG 0x00
+#define IS31FL3733B_FUNC_GCC 0x01
+#define IS31FL3733B_FUNC_ABM1_1 0x02
+#define IS31FL3733B_FUNC_ABM1_2 0x03
+#define IS31FL3733B_FUNC_ABM1_3 0x04
+#define IS31FL3733B_FUNC_ABM1_4 0x05
+#define IS31FL3733B_FUNC_ABM2_1 0x06
+#define IS31FL3733B_FUNC_ABM2_2 0x07
+#define IS31FL3733B_FUNC_ABM2_3 0x08
+#define IS31FL3733B_FUNC_ABM2_4 0x09
+#define IS31FL3733B_FUNC_ABM3_1 0x0a
+#define IS31FL3733B_FUNC_ABM3_2 0x0b
+#define IS31FL3733B_FUNC_ABM3_3 0x0c
+#define IS31FL3733B_FUNC_ABM3_4 0x0d
+#define IS31FL3733B_FUNC_TUR 0x0e
+#define IS31FL3733B_FUNC_SW_PU 0x0f
+#define IS31FL3733B_FUNC_CS_PD 0x10
+#define IS31FL3733B_FUNC_RST 0x11
static int is31fl3733b_read(struct rgbkbd *ctx, uint8_t addr, uint8_t *value)
{
- return i2c_xfer(ctx->cfg->i2c, IS31FL3733B_ADDR_FLAGS,
- &addr, sizeof(addr), value, sizeof(*value));
+ return i2c_xfer(ctx->cfg->i2c, IS31FL3733B_ADDR_FLAGS, &addr,
+ sizeof(addr), value, sizeof(*value));
}
static int is31fl3733b_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
@@ -80,8 +79,8 @@ static int is31fl3733b_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
[1] = value,
};
- return i2c_xfer(ctx->cfg->i2c, IS31FL3733B_ADDR_FLAGS,
- buf, sizeof(buf), NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, IS31FL3733B_ADDR_FLAGS, buf, sizeof(buf),
+ NULL, 0);
}
static int is31fl3733b_set_page(struct rgbkbd *ctx, uint8_t page)
@@ -90,7 +89,7 @@ static int is31fl3733b_set_page(struct rgbkbd *ctx, uint8_t page)
/* unlock page select once */
rv = is31fl3733b_write(ctx, IS31FL3733B_REG_COMMAND_WRITE_LOCK,
- IS31FL3733B_WRITE_ENABLE);
+ IS31FL3733B_WRITE_ENABLE);
if (rv) {
return rv;
}
@@ -99,7 +98,7 @@ static int is31fl3733b_set_page(struct rgbkbd *ctx, uint8_t page)
}
static int is31fl3733b_get_config(struct rgbkbd *ctx, uint8_t addr,
- uint8_t *value)
+ uint8_t *value)
{
int rv;
@@ -112,7 +111,7 @@ static int is31fl3733b_get_config(struct rgbkbd *ctx, uint8_t addr,
}
static int is31fl3733b_set_config(struct rgbkbd *ctx, uint8_t addr,
- uint8_t value)
+ uint8_t value)
{
int rv;
@@ -150,7 +149,7 @@ static int is31fl3733b_enable(struct rgbkbd *ctx, bool enable)
}
static int is31fl3733b_set_color(struct rgbkbd *ctx, uint8_t offset,
- struct rgb_s *color, uint8_t len)
+ struct rgb_s *color, uint8_t len)
{
int led_addr, led_addr_row, led_addr_col;
int i, rv;
@@ -165,7 +164,7 @@ static int is31fl3733b_set_color(struct rgbkbd *ctx, uint8_t offset,
led_addr_col = (offset + i) / ctx->cfg->row_len;
led_addr = led_addr_row * 0x30 + led_addr_col;
- rv = is31fl3733b_write(ctx, led_addr + 0x00, color[i].r);
+ rv = is31fl3733b_write(ctx, led_addr + 0x00, color[i].r);
rv |= is31fl3733b_write(ctx, led_addr + 0x10, color[i].g);
rv |= is31fl3733b_write(ctx, led_addr + 0x20, color[i].b);
@@ -209,16 +208,13 @@ static int is31fl3733b_init(struct rgbkbd *ctx)
}
if (IS_ENABLED(CONFIG_RGB_KEYBOARD_DEBUG)) {
-
uint8_t val;
int ret;
- ret = is31fl3733b_get_config(ctx,
- IS31FL3733B_FUNC_SW_PU, &val);
+ ret = is31fl3733b_get_config(ctx, IS31FL3733B_FUNC_SW_PU, &val);
CPRINTS("SW_PU: val=0x%02x (rv=%d)", val, ret);
- ret = is31fl3733b_get_config(ctx,
- IS31FL3733B_FUNC_CS_PD, &val);
+ ret = is31fl3733b_get_config(ctx, IS31FL3733B_FUNC_CS_PD, &val);
CPRINTS("CS_PD: val=0x%02x (rv=%d)", val, ret);
}
diff --git a/driver/led/is31fl3743b.c b/driver/led/is31fl3743b.c
index a07b2f63f8..5eef21c388 100644
--- a/driver/led/is31fl3743b.c
+++ b/driver/led/is31fl3743b.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -17,30 +17,30 @@
#define SPI(id) (&(spi_devices[id]))
-#define IS31FL3743B_ROW_SIZE 6
-#define IS31FL3743B_COL_SIZE 11
-#define IS31FL3743B_GRID_SIZE (IS31FL3743B_COL_SIZE * IS31FL3743B_ROW_SIZE)
-#define IS31FL3743B_BUF_SIZE (SIZE_OF_RGB * IS31FL3743B_GRID_SIZE)
+#define IS31FL3743B_ROW_SIZE 6
+#define IS31FL3743B_COL_SIZE 11
+#define IS31FL3743B_GRID_SIZE (IS31FL3743B_COL_SIZE * IS31FL3743B_ROW_SIZE)
+#define IS31FL3743B_BUF_SIZE (SIZE_OF_RGB * IS31FL3743B_GRID_SIZE)
-#define IS31FL3743B_CMD_ID 0b101
-#define IS31FL3743B_PAGE_PWM 0
-#define IS31FL3743B_PAGE_SCALE 1
-#define IS31FL3743B_PAGE_FUNC 2
+#define IS31FL3743B_CMD_ID 0b101
+#define IS31FL3743B_PAGE_PWM 0
+#define IS31FL3743B_PAGE_SCALE 1
+#define IS31FL3743B_PAGE_FUNC 2
-#define IS31FL3743B_REG_CONFIG 0x00
-#define IS31FL3743B_REG_GCC 0x01
-#define IS31FL3743B_REG_PD_PU 0x02
-#define IS31FL3743B_REG_SPREAD_SPECTRUM 0x25
-#define IS31FL3743B_REG_RSTN 0x2f
+#define IS31FL3743B_REG_CONFIG 0x00
+#define IS31FL3743B_REG_GCC 0x01
+#define IS31FL3743B_REG_PD_PU 0x02
+#define IS31FL3743B_REG_SPREAD_SPECTRUM 0x25
+#define IS31FL3743B_REG_RSTN 0x2f
-#define IS31FL3743B_CFG_SWS_1_11 0b0000
+#define IS31FL3743B_CFG_SWS_1_11 0b0000
#define IS31FL3743B_CONFIG(sws, osde, ssd) \
((sws) << 4 | BIT(3) | (osde) << 1 | (ssd) << 0)
struct is31fl3743b_cmd {
- uint8_t page: 4;
- uint8_t id: 3;
- uint8_t read: 1;
+ uint8_t page : 4;
+ uint8_t id : 3;
+ uint8_t read : 1;
} __packed;
struct is31fl3743b_msg {
@@ -49,8 +49,8 @@ struct is31fl3743b_msg {
uint8_t payload[];
} __packed;
-__maybe_unused
-static int is31fl3743b_read(struct rgbkbd *ctx, uint8_t addr, uint8_t *value)
+__maybe_unused static int is31fl3743b_read(struct rgbkbd *ctx, uint8_t addr,
+ uint8_t *value)
{
uint8_t buf[8];
struct is31fl3743b_msg *msg = (void *)buf;
@@ -81,9 +81,9 @@ static int is31fl3743b_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
static int is31fl3743b_enable(struct rgbkbd *ctx, bool enable)
{
- uint8_t u8 = IS31FL3743B_CONFIG(IS31FL3743B_CFG_SWS_1_11, 0,
- enable ? 1 : 0);
- CPRINTS("Setting config register to 0b%pb", BINARY_VALUE(u8, 8));
+ uint8_t u8 =
+ IS31FL3743B_CONFIG(IS31FL3743B_CFG_SWS_1_11, 0, enable ? 1 : 0);
+ CPRINTS("Setting config register to 0x%x", u8);
return is31fl3743b_write(ctx, IS31FL3743B_REG_CONFIG, u8);
}
@@ -104,7 +104,7 @@ static int is31fl3743b_set_color(struct rgbkbd *ctx, uint8_t offset,
return EC_ERROR_OVERFLOW;
}
- msg->addr = frame_offset + 1; /* Register addr base is 1. */
+ msg->addr = frame_offset + 1; /* Register addr base is 1. */
for (i = 0; i < len; i++) {
msg->payload[i * SIZE_OF_RGB + 0] = color[i].r;
msg->payload[i * SIZE_OF_RGB + 1] = color[i].g;
@@ -131,7 +131,7 @@ static int is31fl3743b_set_scale(struct rgbkbd *ctx, uint8_t offset,
return EC_ERROR_OVERFLOW;
}
- msg->addr = frame_offset + 1; /* Address base is 1. */
+ msg->addr = frame_offset + 1; /* Address base is 1. */
for (i = 0; i < len; i++) {
msg->payload[i * SIZE_OF_RGB + 0] = scale.r;
msg->payload[i * SIZE_OF_RGB + 1] = scale.g;
diff --git a/driver/led/lm3509.c b/driver/led/lm3509.c
index fbd783a42e..5df604bac6 100644
--- a/driver/led/lm3509.c
+++ b/driver/led/lm3509.c
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -12,22 +12,19 @@
static inline int lm3509_write(uint8_t reg, uint8_t val)
{
- return i2c_write8(I2C_PORT_KBLIGHT, LM3509_I2C_ADDR_FLAGS,
- reg, val);
+ return i2c_write8(I2C_PORT_KBLIGHT, LM3509_I2C_ADDR_FLAGS, reg, val);
}
static inline int lm3509_read(uint8_t reg, int *val)
{
- return i2c_read8(I2C_PORT_KBLIGHT, LM3509_I2C_ADDR_FLAGS,
- reg, val);
+ return i2c_read8(I2C_PORT_KBLIGHT, LM3509_I2C_ADDR_FLAGS, reg, val);
}
/* Brightness level (0.0 to 100.0%) to brightness register conversion table */
static const uint16_t lm3509_brightness[32] = {
- 0, 1, 6, 10, 11, 13, 16, 20,
- 24, 28, 31, 37, 43, 52, 62, 75,
- 87, 100, 125, 150, 168, 187, 225, 262,
- 312, 375, 437, 525, 612, 700, 875, 1000
+ 0, 1, 6, 10, 11, 13, 16, 20, 24, 28, 31,
+ 37, 43, 52, 62, 75, 87, 100, 125, 150, 168, 187,
+ 225, 262, 312, 375, 437, 525, 612, 700, 875, 1000
};
static int brightness_to_bmain(int percent)
diff --git a/driver/led/lm3509.h b/driver/led/lm3509.h
index a7defe1fb7..1f2ace46f0 100644
--- a/driver/led/lm3509.h
+++ b/driver/led/lm3509.h
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -8,7 +8,7 @@
#ifndef __CROS_EC_LM3509_H
#define __CROS_EC_LM3509_H
-#define LM3509_I2C_ADDR_FLAGS 0x36
+#define LM3509_I2C_ADDR_FLAGS 0x36
/*
* General purpose register
@@ -18,7 +18,7 @@
* [1]= enable secondary current sink.
* [0]= enable main current sink.
*/
-#define LM3509_REG_GP 0x10
+#define LM3509_REG_GP 0x10
/*
* Brightness register
@@ -27,10 +27,10 @@
* 0x1F: 100%
* Power-on-value: 0% (0xE0)
*/
-#define LM3509_REG_BMAIN 0xA0
-#define LM3509_REG_BSUB 0xB0
+#define LM3509_REG_BMAIN 0xA0
+#define LM3509_REG_BSUB 0xB0
-#define LM3509_BMAIN_MASK 0x1F
+#define LM3509_BMAIN_MASK 0x1F
extern const struct kblight_drv kblight_lm3509;
diff --git a/driver/led/lm3630a.c b/driver/led/lm3630a.c
index e927c677a4..e3194ede45 100644
--- a/driver/led/lm3630a.c
+++ b/driver/led/lm3630a.c
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -10,14 +10,12 @@
#include "lm3630a.h"
#include "timer.h"
-
/* I2C address */
#define LM3630A_I2C_ADDR_FLAGS 0x36
static inline int lm3630a_write(uint8_t reg, uint8_t val)
{
- return i2c_write8(I2C_PORT_KBLIGHT, LM3630A_I2C_ADDR_FLAGS,
- reg, val);
+ return i2c_write8(I2C_PORT_KBLIGHT, LM3630A_I2C_ADDR_FLAGS, reg, val);
}
static void deferred_lm3630a_poweron(void)
@@ -46,23 +44,22 @@ int lm3630a_poweron(void)
/* Enable feedback and PWM for banks A. */
ret |= lm3630a_write(LM3630A_REG_CONFIG,
- LM3630A_CFG_BIT_FB_EN_A |
- LM3630A_CFG_BIT_PWM_EN_A);
+ LM3630A_CFG_BIT_FB_EN_A |
+ LM3630A_CFG_BIT_PWM_EN_A);
/* 24V, 800mA overcurrent protection, 500kHz boost frequency. */
ret |= lm3630a_write(LM3630A_REG_BOOST_CONTROL,
- LM3630A_BOOST_OVP_24V |
- LM3630A_BOOST_OCP_800MA |
- LM3630A_FMODE_500KHZ);
+ LM3630A_BOOST_OVP_24V | LM3630A_BOOST_OCP_800MA |
+ LM3630A_FMODE_500KHZ);
/* Limit current to 24.5mA */
ret |= lm3630a_write(LM3630A_REG_A_CURRENT, 0x1a);
/* Enable bank A, put in linear mode, and connect LED2 to bank A. */
ret |= lm3630a_write(LM3630A_REG_CONTROL,
- LM3630A_CTRL_BIT_LINEAR_A |
- LM3630A_CTRL_BIT_LED_EN_A |
- LM3630A_CTRL_BIT_LED2_ON_A);
+ LM3630A_CTRL_BIT_LINEAR_A |
+ LM3630A_CTRL_BIT_LED_EN_A |
+ LM3630A_CTRL_BIT_LED2_ON_A);
/*
* Only set the brightness after ~100 ms. Without this, LED may blink
diff --git a/driver/led/lm3630a.h b/driver/led/lm3630a.h
index d43304b66e..34a268c370 100644
--- a/driver/led/lm3630a.h
+++ b/driver/led/lm3630a.h
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -8,56 +8,56 @@
#ifndef __CROS_EC_LM3630A_H
#define __CROS_EC_LM3630A_H
-#define LM3630A_REG_CONTROL 0x00
-#define LM3630A_REG_CONFIG 0x01
-#define LM3630A_REG_BOOST_CONTROL 0x02
-#define LM3630A_REG_A_BRIGHTNESS 0x03
-#define LM3630A_REG_B_BRIGHTNESS 0x04
-#define LM3630A_REG_A_CURRENT 0x05
-#define LM3630A_REG_B_CURRENT 0x06
-#define LM3630A_REG_ONOFF_RAMP 0x07
-#define LM3630A_REG_RUN_RAMP 0x08
-#define LM3630A_REG_INT_STATUS 0x09
-#define LM3630A_REG_INT_ENABLE 0x0a
-#define LM3630A_REG_FAULT_STATUS 0x0b
-#define LM3630A_REG_SW_RESET 0x0f
-#define LM3630A_REG_PWM_OUT_LOW 0x12
-#define LM3630A_REG_PWM_OUT_HIGH 0x13
-#define LM3630A_REG_REVISION 0x1f
-#define LM3630A_REG_FILTER_STRENGTH 0x50
+#define LM3630A_REG_CONTROL 0x00
+#define LM3630A_REG_CONFIG 0x01
+#define LM3630A_REG_BOOST_CONTROL 0x02
+#define LM3630A_REG_A_BRIGHTNESS 0x03
+#define LM3630A_REG_B_BRIGHTNESS 0x04
+#define LM3630A_REG_A_CURRENT 0x05
+#define LM3630A_REG_B_CURRENT 0x06
+#define LM3630A_REG_ONOFF_RAMP 0x07
+#define LM3630A_REG_RUN_RAMP 0x08
+#define LM3630A_REG_INT_STATUS 0x09
+#define LM3630A_REG_INT_ENABLE 0x0a
+#define LM3630A_REG_FAULT_STATUS 0x0b
+#define LM3630A_REG_SW_RESET 0x0f
+#define LM3630A_REG_PWM_OUT_LOW 0x12
+#define LM3630A_REG_PWM_OUT_HIGH 0x13
+#define LM3630A_REG_REVISION 0x1f
+#define LM3630A_REG_FILTER_STRENGTH 0x50
/* Control register bits */
-#define LM3630A_CTRL_BIT_SLEEP_CMD BIT(7)
-#define LM3630A_CTRL_BIT_SLEEP_STAT BIT(6)
-#define LM3630A_CTRL_BIT_LINEAR_A BIT(4)
-#define LM3630A_CTRL_BIT_LINEAR_B BIT(3)
-#define LM3630A_CTRL_BIT_LED_EN_A BIT(2)
-#define LM3630A_CTRL_BIT_LED_EN_B BIT(1)
-#define LM3630A_CTRL_BIT_LED2_ON_A BIT(0)
+#define LM3630A_CTRL_BIT_SLEEP_CMD BIT(7)
+#define LM3630A_CTRL_BIT_SLEEP_STAT BIT(6)
+#define LM3630A_CTRL_BIT_LINEAR_A BIT(4)
+#define LM3630A_CTRL_BIT_LINEAR_B BIT(3)
+#define LM3630A_CTRL_BIT_LED_EN_A BIT(2)
+#define LM3630A_CTRL_BIT_LED_EN_B BIT(1)
+#define LM3630A_CTRL_BIT_LED2_ON_A BIT(0)
/* Config register bits */
-#define LM3630A_CFG_BIT_FB_EN_B BIT(4)
-#define LM3630A_CFG_BIT_FB_EN_A BIT(3)
-#define LM3630A_CFG_BIT_PWM_LOW BIT(2)
-#define LM3630A_CFG_BIT_PWM_EN_B BIT(1)
-#define LM3630A_CFG_BIT_PWM_EN_A BIT(0)
+#define LM3630A_CFG_BIT_FB_EN_B BIT(4)
+#define LM3630A_CFG_BIT_FB_EN_A BIT(3)
+#define LM3630A_CFG_BIT_PWM_LOW BIT(2)
+#define LM3630A_CFG_BIT_PWM_EN_B BIT(1)
+#define LM3630A_CFG_BIT_PWM_EN_A BIT(0)
/* Boost control register bits */
-#define LM3630A_BOOST_OVP_16V (0 << 5)
-#define LM3630A_BOOST_OVP_24V BIT(5)
-#define LM3630A_BOOST_OVP_32V (2 << 5)
-#define LM3630A_BOOST_OVP_40V (3 << 5)
-#define LM3630A_BOOST_OCP_600MA (0 << 3)
-#define LM3630A_BOOST_OCP_800MA BIT(3)
-#define LM3630A_BOOST_OCP_1000MA (2 << 3)
-#define LM3630A_BOOST_OCP_1200MA (3 << 3)
-#define LM3630A_BOOST_SLOW_START BIT(2)
-#define LM3630A_SHIFT_500KHZ (0 << 1) /* FMODE=0 */
-#define LM3630A_SHIFT_560KHZ BIT(1) /* FMODE=0 */
-#define LM3630A_SHIFT_1000KHZ (0 << 1) /* FMODE=1 */
-#define LM3630A_SHIFT_1120KHZ BIT(1) /* FMODE=1 */
-#define LM3630A_FMODE_500KHZ (0 << 0)
-#define LM3630A_FMODE_1000KHZ BIT(0)
+#define LM3630A_BOOST_OVP_16V (0 << 5)
+#define LM3630A_BOOST_OVP_24V BIT(5)
+#define LM3630A_BOOST_OVP_32V (2 << 5)
+#define LM3630A_BOOST_OVP_40V (3 << 5)
+#define LM3630A_BOOST_OCP_600MA (0 << 3)
+#define LM3630A_BOOST_OCP_800MA BIT(3)
+#define LM3630A_BOOST_OCP_1000MA (2 << 3)
+#define LM3630A_BOOST_OCP_1200MA (3 << 3)
+#define LM3630A_BOOST_SLOW_START BIT(2)
+#define LM3630A_SHIFT_500KHZ (0 << 1) /* FMODE=0 */
+#define LM3630A_SHIFT_560KHZ BIT(1) /* FMODE=0 */
+#define LM3630A_SHIFT_1000KHZ (0 << 1) /* FMODE=1 */
+#define LM3630A_SHIFT_1120KHZ BIT(1) /* FMODE=1 */
+#define LM3630A_FMODE_500KHZ (0 << 0)
+#define LM3630A_FMODE_1000KHZ BIT(0)
/* Power on and initialize LM3630A. */
int lm3630a_poweron(void);
diff --git a/driver/led/lp5562.c b/driver/led/lp5562.c
index e0758a8b91..e1766fd776 100644
--- a/driver/led/lp5562.c
+++ b/driver/led/lp5562.c
@@ -1,4 +1,4 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
+/* Copyright 2013 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -123,7 +123,7 @@ int lp5562_set_pc(int engine, int val)
/*****************************************************************************/
/* Console commands */
#ifdef CONFIG_CMD_POWERLED
-static int command_lp5562(int argc, char **argv)
+static int command_lp5562(int argc, const char **argv)
{
if (argc == 4) {
char *e;
diff --git a/driver/led/lp5562.h b/driver/led/lp5562.h
index 75e820aab7..81031ee084 100644
--- a/driver/led/lp5562.h
+++ b/driver/led/lp5562.h
@@ -1,4 +1,4 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
+/* Copyright 2013 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -8,40 +8,40 @@
#ifndef __CROS_EC_LP5562_H
#define __CROS_EC_LP5562_H
-#define LP5562_REG_ENABLE 0x00
-#define LP5562_REG_OP_MODE 0x01
-#define LP5562_REG_B_PWM 0x02
-#define LP5562_REG_G_PWM 0x03
-#define LP5562_REG_R_PWM 0x04
-#define LP5562_REG_B_CURRENT 0x05
-#define LP5562_REG_G_CURRENT 0x06
-#define LP5562_REG_R_CURRENT 0x07
-#define LP5562_REG_CONFIG 0x08
-#define LP5562_REG_ENG1_PC 0x09
-#define LP5562_REG_ENG2_PC 0x0a
-#define LP5562_REG_ENG3_PC 0x0b
-#define LP5562_REG_STATUS 0x0c
-#define LP5562_REG_RESET 0x0d
-#define LP5562_REG_W_PWM 0x0e
-#define LP5562_REG_W_CURRENT 0x0f
-#define LP5562_REG_LED_MAP 0x70
-
-#define LP5562_REG_ENG_PROG(n) (0x10 + ((n)-1) * 0x20)
+#define LP5562_REG_ENABLE 0x00
+#define LP5562_REG_OP_MODE 0x01
+#define LP5562_REG_B_PWM 0x02
+#define LP5562_REG_G_PWM 0x03
+#define LP5562_REG_R_PWM 0x04
+#define LP5562_REG_B_CURRENT 0x05
+#define LP5562_REG_G_CURRENT 0x06
+#define LP5562_REG_R_CURRENT 0x07
+#define LP5562_REG_CONFIG 0x08
+#define LP5562_REG_ENG1_PC 0x09
+#define LP5562_REG_ENG2_PC 0x0a
+#define LP5562_REG_ENG3_PC 0x0b
+#define LP5562_REG_STATUS 0x0c
+#define LP5562_REG_RESET 0x0d
+#define LP5562_REG_W_PWM 0x0e
+#define LP5562_REG_W_CURRENT 0x0f
+#define LP5562_REG_LED_MAP 0x70
+
+#define LP5562_REG_ENG_PROG(n) (0x10 + ((n)-1) * 0x20)
/* Brightness range: 0x00 - 0xff */
-#define LP5562_COLOR_NONE 0x000000
-#define LP5562_COLOR_RED(b) (0x010000 * (b))
-#define LP5562_COLOR_GREEN(b) (0x000100 * (b))
-#define LP5562_COLOR_BLUE(b) (0x000001 * (b))
-
-#define LP5562_ENG_SEL_NONE 0x0
-#define LP5562_ENG_SEL_1 0x1
-#define LP5562_ENG_SEL_2 0x2
-#define LP5562_ENG_SEL_3 0x3
-
-#define LP5562_ENG_HOLD 0x0
-#define LP5562_ENG_STEP 0x1
-#define LP5562_ENG_RUN 0x2
+#define LP5562_COLOR_NONE 0x000000
+#define LP5562_COLOR_RED(b) (0x010000 * (b))
+#define LP5562_COLOR_GREEN(b) (0x000100 * (b))
+#define LP5562_COLOR_BLUE(b) (0x000001 * (b))
+
+#define LP5562_ENG_SEL_NONE 0x0
+#define LP5562_ENG_SEL_1 0x1
+#define LP5562_ENG_SEL_2 0x2
+#define LP5562_ENG_SEL_3 0x3
+
+#define LP5562_ENG_HOLD 0x0
+#define LP5562_ENG_STEP 0x1
+#define LP5562_ENG_RUN 0x2
/* Power on and initialize LP5562. */
int lp5562_poweron(void);
diff --git a/driver/led/max695x.c b/driver/led/max695x.c
index c6155f1499..31e0799b11 100644
--- a/driver/led/max695x.c
+++ b/driver/led/max695x.c
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -13,12 +13,11 @@
#include "max695x.h"
#include "util.h"
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ##args)
static inline int max695x_i2c_write8(uint8_t offset, uint8_t data)
{
- return i2c_write8(I2C_PORT_PORT80, PORT80_I2C_ADDR,
- offset, (int)data);
+ return i2c_write8(I2C_PORT_PORT80, PORT80_I2C_ADDR, offset, (int)data);
}
static inline int max695x_i2c_write(uint8_t offset, uint8_t *data, int len)
@@ -27,8 +26,8 @@ static inline int max695x_i2c_write(uint8_t offset, uint8_t *data, int len)
* The address pointer stored in the MAX695x increments after
* each data byte is written unless the address equals 01111111
*/
- return i2c_write_block(I2C_PORT_PORT80, PORT80_I2C_ADDR,
- offset, data, len);
+ return i2c_write_block(I2C_PORT_PORT80, PORT80_I2C_ADDR, offset, data,
+ len);
}
int display_7seg_write(enum seven_seg_module_display module, uint16_t data)
@@ -84,12 +83,10 @@ int display_7seg_write(enum seven_seg_module_display module, uint16_t data)
*/
static void max695x_init(void)
{
- uint8_t buf[4] = {
- [0] = MAX695X_DECODE_MODE_HEX_DECODE,
- [1] = MAX695X_INTENSITY_MEDIUM,
- [2] = MAX695X_SCAN_LIMIT_4,
- [3] = MAX695X_CONFIG_OPR_NORMAL
- };
+ uint8_t buf[4] = { [0] = MAX695X_DECODE_MODE_HEX_DECODE,
+ [1] = MAX695X_INTENSITY_MEDIUM,
+ [2] = MAX695X_SCAN_LIMIT_4,
+ [3] = MAX695X_CONFIG_OPR_NORMAL };
max695x_i2c_write(MAX695X_REG_DECODE_MODE, buf, ARRAY_SIZE(buf));
}
DECLARE_HOOK(HOOK_INIT, max695x_init, HOOK_PRIO_DEFAULT);
@@ -97,8 +94,7 @@ DECLARE_HOOK(HOOK_CHIPSET_STARTUP, max695x_init, HOOK_PRIO_DEFAULT);
static void max695x_shutdown(void)
{
- max695x_i2c_write8(MAX695X_REG_CONFIG,
- MAX695X_CONFIG_OPR_SHUTDOWN);
+ max695x_i2c_write8(MAX695X_REG_CONFIG, MAX695X_CONFIG_OPR_SHUTDOWN);
}
DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, max695x_shutdown, HOOK_PRIO_DEFAULT);
@@ -118,7 +114,6 @@ static int console_command_max695x_write(int argc, char **argv)
return display_7seg_write(SEVEN_SEG_CONSOLE_DISPLAY, val);
}
-DECLARE_CONSOLE_COMMAND(seg, console_command_max695x_write,
- "<val>",
+DECLARE_CONSOLE_COMMAND(seg, console_command_max695x_write, "<val>",
"Write to 7 segment display in hex");
#endif
diff --git a/driver/led/max695x.h b/driver/led/max695x.h
index 5ed5d91e2f..b792237d57 100644
--- a/driver/led/max695x.h
+++ b/driver/led/max695x.h
@@ -1,4 +1,4 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+/* Copyright 2019 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -9,36 +9,36 @@
#define __CROS_EC_MAX656X_H
/* I2C interface */
-#define MAX695X_I2C_ADDR1_FLAGS 0x38
-#define MAX695X_I2C_ADDR2_FLAGS 0x39
+#define MAX695X_I2C_ADDR1_FLAGS 0x38
+#define MAX695X_I2C_ADDR2_FLAGS 0x39
/* Decode mode register */
-#define MAX695X_REG_DECODE_MODE 0x01
+#define MAX695X_REG_DECODE_MODE 0x01
/* Hexadecimal decode for digits 3–0 */
-#define MAX695X_DECODE_MODE_HEX_DECODE 0x0f
+#define MAX695X_DECODE_MODE_HEX_DECODE 0x0f
/* Intensity register */
-#define MAX695X_REG_INTENSITY 0x02
+#define MAX695X_REG_INTENSITY 0x02
/* Setting meduim intensity */
-#define MAX695X_INTENSITY_MEDIUM 0x20
+#define MAX695X_INTENSITY_MEDIUM 0x20
/* Scan limit register value */
-#define MAX695X_REG_SCAN_LIMIT 0x03
+#define MAX695X_REG_SCAN_LIMIT 0x03
/* Scanning digits 0-3 */
-#define MAX695X_SCAN_LIMIT_4 0x03
+#define MAX695X_SCAN_LIMIT_4 0x03
/* Configuration register */
-#define MAX695X_REG_CONFIG 0x04
+#define MAX695X_REG_CONFIG 0x04
/* Shutdown seven segment display */
-#define MAX695X_CONFIG_OPR_SHUTDOWN 0x00
+#define MAX695X_CONFIG_OPR_SHUTDOWN 0x00
/* Start seven segment display */
-#define MAX695X_CONFIG_OPR_NORMAL 0x01
+#define MAX695X_CONFIG_OPR_NORMAL 0x01
/* Digit addresses */
-#define MAX695X_DIGIT0_ADDR 0x20
-#define MAX695X_DIGIT1_ADDR 0x21
-#define MAX695X_DIGIT2_ADDR 0x22
-#define MAX695X_DIGIT3_ADDR 0x23
+#define MAX695X_DIGIT0_ADDR 0x20
+#define MAX695X_DIGIT1_ADDR 0x21
+#define MAX695X_DIGIT2_ADDR 0x22
+#define MAX695X_DIGIT3_ADDR 0x23
#endif /* __CROS_EC_MAX656X_H */
diff --git a/driver/led/mp3385.c b/driver/led/mp3385.c
index 278e333ae1..50ce31341a 100644
--- a/driver/led/mp3385.c
+++ b/driver/led/mp3385.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -13,10 +13,10 @@
#include "task.h"
#include "timer.h"
-#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ##args)
+#define CPRINTF(format, args...) cprintf(CC_I2C, format, ##args)
-#define I2C_ADDR_MP3385_FLAGS 0x31
+#define I2C_ADDR_MP3385_FLAGS 0x31
struct mp3385_value {
uint8_t offset;
@@ -40,36 +40,36 @@ static struct mp3385_value mp3385_conf[] = {
* Frequency selection: 300(KHz)
* Short circuit protection: 8(V)
*/
- {.offset = 1, .data = 0x43},
+ { .offset = 1, .data = 0x43 },
/*
* Register 0x02: LED current Full-Scale Register
* ISET Resistor: 127(Kohm)
* Maximum LED current: 20196/127 = 159(mA)
* Setting LED current: 62(mA)
*/
- {.offset = 2, .data = 0x65},
+ { .offset = 2, .data = 0x65 },
- /* Register 0x03: RO - ignored */
+ /* Register 0x03: RO - ignored */
/*
* Register 0x04: Internal LED Dimming Brightness Register
* SMBus PWM function: None Use
*/
- {.offset = 4, .data = 0x00},
+ { .offset = 4, .data = 0x00 },
/*
* Register 0x05: OVP, OCP Threshold Register
* Over Current Protection: 0.5(V)
* Panel LED Voltage(Max): 47.8(V)
* OVP setting: 54(V)
*/
- {.offset = 5, .data = 0x97},
+ { .offset = 5, .data = 0x97 },
/*
* Register 0x00: Dimming mode Register
* String Selection: 4(Number)
* Interface Selection: 1
* Brightness mode: 3
*/
- {.offset = 0, .data = 0xF2},
+ { .offset = 0, .data = 0xF2 },
};
static const int mp3385_conf_size = ARRAY_SIZE(mp3385_conf);
@@ -78,12 +78,12 @@ static void set_mp3385_reg(void)
int i;
for (i = 0; i < mp3385_conf_size; ++i) {
- int rv = i2c_write8(I2C_PORT_BACKLIGHT,
- I2C_ADDR_MP3385_FLAGS,
+ int rv = i2c_write8(I2C_PORT_BACKLIGHT, I2C_ADDR_MP3385_FLAGS,
mp3385_conf[i].offset, mp3385_conf[i].data);
if (rv) {
CPRINTS("Write MP3385 register %d "
- "failed rv=%d", i, rv);
+ "failed rv=%d",
+ i, rv);
return;
}
}
@@ -113,7 +113,7 @@ void mp3385_interrupt(enum gpio_signal signal)
* |- t2 -| : 1 second is enough
*/
hook_call_deferred(&mp3385_backlight_enable_deferred_data,
- MP3385_POWER_BACKLIGHT_DELAY);
+ MP3385_POWER_BACKLIGHT_DELAY);
}
int mp3385_set_config(int offset, int data)
diff --git a/driver/led/mp3385.h b/driver/led/mp3385.h
index bdb5dac0ae..733a8f76cd 100644
--- a/driver/led/mp3385.h
+++ b/driver/led/mp3385.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -27,7 +27,7 @@ void mp3385_board_init(void);
int mp3385_set_config(int offset, int data);
#ifndef MP3385_POWER_BACKLIGHT_DELAY
-#define MP3385_POWER_BACKLIGHT_DELAY (15*MSEC)
+#define MP3385_POWER_BACKLIGHT_DELAY (15 * MSEC)
#endif
void mp3385_interrupt(enum gpio_signal signal);
diff --git a/driver/led/oz554.c b/driver/led/oz554.c
index 4b661a592c..b2cbff08ba 100644
--- a/driver/led/oz554.c
+++ b/driver/led/oz554.c
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
@@ -13,10 +13,10 @@
#include "task.h"
#include "timer.h"
-#define CPRINTS(format, args...) cprints(CC_I2C, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_I2C, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_I2C, format, ##args)
+#define CPRINTF(format, args...) cprintf(CC_I2C, format, ##args)
-#define I2C_ADDR_OZ554_FLAGS 0x31
+#define I2C_ADDR_OZ554_FLAGS 0x31
struct oz554_value {
uint8_t offset;
@@ -40,38 +40,38 @@ static struct oz554_value oz554_conf[] = {
* Frequency selection: 300(KHz)
* Short circuit protection: 8(V)
*/
- {.offset = 1, .data = 0x43},
+ { .offset = 1, .data = 0x43 },
/*
* Reigster 0x02: LED current amplitude control
* ISET Resistor: 10.2(Kohm)
* Maximum LED current: 1636/10.2 = 160.4(mA)
* Setting LED current: 65(mA)
*/
- {.offset = 2, .data = 0x65},
+ { .offset = 2, .data = 0x65 },
/*
* Reigster 0x03: LED backlight Status
* Status function: Read only
*/
- {.offset = 3, .data = 0x00},
+ { .offset = 3, .data = 0x00 },
/*
* Reigster 0x04: LED current control with SMBus
* SMBus PWM function: None Use
*/
- {.offset = 4, .data = 0x00},
+ { .offset = 4, .data = 0x00 },
/*
* Reigster 0x05: OVP, OCP control
* Over Current Protection: 0.5(V)
* Panel LED Voltage(Max): 47.8(V)
* OVP setting: 54(V)
*/
- {.offset = 5, .data = 0x97},
+ { .offset = 5, .data = 0x97 },
/*
* Reigster 0x00: Dimming mode and string ON/OFF control
* String Selection: 4(Number)
* Interface Selection: 1
* Brightness mode: 3
*/
- {.offset = 0, .data = 0xF2},
+ { .offset = 0, .data = 0xF2 },
};
static const int oz554_conf_size = ARRAY_SIZE(oz554_conf);
@@ -80,11 +80,10 @@ static void set_oz554_reg(void)
int i;
for (i = 0; i < oz554_conf_size; ++i) {
- int rv = i2c_write8(I2C_PORT_BACKLIGHT,
- I2C_ADDR_OZ554_FLAGS,
+ int rv = i2c_write8(I2C_PORT_BACKLIGHT, I2C_ADDR_OZ554_FLAGS,
oz554_conf[i].offset, oz554_conf[i].data);
if (rv) {
- CPRINTS("Write OZ554 register %d failed rv=%d" , i, rv);
+ CPRINTS("Write OZ554 register %d failed rv=%d", i, rv);
return;
}
}
@@ -114,7 +113,7 @@ void oz554_interrupt(enum gpio_signal signal)
* |- t2 -| : 1 second is enough
*/
hook_call_deferred(&backlight_enable_deferred_data,
- OZ554_POWER_BACKLIGHT_DELAY);
+ OZ554_POWER_BACKLIGHT_DELAY);
}
int oz554_set_config(int offset, int data)
diff --git a/driver/led/oz554.h b/driver/led/oz554.h
index 1893900b22..c735f9f3b9 100644
--- a/driver/led/oz554.h
+++ b/driver/led/oz554.h
@@ -1,4 +1,4 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+/* Copyright 2018 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
diff --git a/driver/led/tlc59116f.c b/driver/led/tlc59116f.c
index b1c16a921b..3debdb3cfb 100644
--- a/driver/led/tlc59116f.c
+++ b/driver/led/tlc59116f.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The ChromiumOS Authors.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -14,13 +14,13 @@
#define CPRINTF(fmt, args...) cprintf(CC_RGBKBD, "TLC59116F: " fmt, ##args)
#define CPRINTS(fmt, args...) cprints(CC_RGBKBD, "TLC59116F: " fmt, ##args)
-#define TLC59116F_BUF_SIZE (SIZE_OF_RGB * TLC59116F_GRID_SIZE)
-#define TLC59116_MODE_BIT_SLEEP 4
+#define TLC59116F_BUF_SIZE (SIZE_OF_RGB * TLC59116F_GRID_SIZE)
+#define TLC59116_MODE_BIT_SLEEP 4
static int tlc59116f_read(struct rgbkbd *ctx, uint8_t addr, uint8_t *value)
{
- return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG,
- &addr, sizeof(addr), value, sizeof(*value));
+ return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG, &addr,
+ sizeof(addr), value, sizeof(*value));
}
static int tlc59116f_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
@@ -30,8 +30,8 @@ static int tlc59116f_write(struct rgbkbd *ctx, uint8_t addr, uint8_t value)
[1] = value,
};
- return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG,
- buf, sizeof(buf), NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG, buf,
+ sizeof(buf), NULL, 0);
}
static int tlc59116f_reset(struct rgbkbd *ctx)
@@ -75,7 +75,7 @@ static int tlc59116f_enable(struct rgbkbd *ctx, bool enable)
}
static int tlc59116f_set_color(struct rgbkbd *ctx, uint8_t offset,
- struct rgb_s *color, uint8_t len)
+ struct rgb_s *color, uint8_t len)
{
uint8_t buf[sizeof(offset) + TLC59116F_BUF_SIZE];
const int frame_len = len * SIZE_OF_RGB + sizeof(offset);
@@ -86,20 +86,19 @@ static int tlc59116f_set_color(struct rgbkbd *ctx, uint8_t offset,
return EC_ERROR_OVERFLOW;
}
- buf[0] = TLC59116_AI_BRIGHTNESS_ONLY |
- (frame_offset + TLC59116F_PWM0);
+ buf[0] = TLC59116_AI_BRIGHTNESS_ONLY | (frame_offset + TLC59116F_PWM0);
for (i = 0; i < len; i++) {
buf[i * SIZE_OF_RGB + 1] = color[i].r;
buf[i * SIZE_OF_RGB + 2] = color[i].g;
buf[i * SIZE_OF_RGB + 3] = color[i].b;
}
- return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG,
- buf, frame_len, NULL, 0);
+ return i2c_xfer(ctx->cfg->i2c, TLC59116F_I2C_ADDR_FLAG, buf, frame_len,
+ NULL, 0);
}
static int tlc59116f_set_scale(struct rgbkbd *ctx, uint8_t offset,
- struct rgb_s scale, uint8_t len)
+ struct rgb_s scale, uint8_t len)
{
/* tlc59116f not support scale function */
return EC_SUCCESS;
diff --git a/driver/led/tlc59116f.h b/driver/led/tlc59116f.h
index 68ce218517..2a0347f568 100644
--- a/driver/led/tlc59116f.h
+++ b/driver/led/tlc59116f.h
@@ -1,4 +1,4 @@
-/* Copyright 2022 The ChromiumOS Authors.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,68 +7,68 @@
#define __CROS_EC_DRIVER_LED_TLC59116F_H
/* TLC59116F secondary address */
-#define TLC59116F_ADDR0_FLAG 0x60
-#define TLC59116F_ADDR1_FLAG 0x61
-#define TLC59116F_ADDR2_FLAG 0x62
-#define TLC59116F_ADDR3_FLAG 0x63
-#define TLC59116F_ADDR4_FLAG 0x64
-#define TLC59116F_ADDR5_FLAG 0x65
-#define TLC59116F_ADDR6_FLAG 0x66
-#define TLC59116F_ADDR7_FLAG 0x67
-#define TLC59116F_ADDR8_FLAG 0x68
-#define TLC59116F_ADDR9_FLAG 0x69
-#define TLC59116F_ADDR10_FLAG 0x6A
-#define TLC59116F_RESET 0x6B
-#define TLC59116F_ADDR12_FLAG 0x6C
-#define TLC59116F_ADDR13_FLAG 0x6D
-#define TLC59116F_ADDR14_FLAG 0x6E
-#define TLC59116F_ADDR15_FLAG 0x6F
+#define TLC59116F_ADDR0_FLAG 0x60
+#define TLC59116F_ADDR1_FLAG 0x61
+#define TLC59116F_ADDR2_FLAG 0x62
+#define TLC59116F_ADDR3_FLAG 0x63
+#define TLC59116F_ADDR4_FLAG 0x64
+#define TLC59116F_ADDR5_FLAG 0x65
+#define TLC59116F_ADDR6_FLAG 0x66
+#define TLC59116F_ADDR7_FLAG 0x67
+#define TLC59116F_ADDR8_FLAG 0x68
+#define TLC59116F_ADDR9_FLAG 0x69
+#define TLC59116F_ADDR10_FLAG 0x6A
+#define TLC59116F_RESET 0x6B
+#define TLC59116F_ADDR12_FLAG 0x6C
+#define TLC59116F_ADDR13_FLAG 0x6D
+#define TLC59116F_ADDR14_FLAG 0x6E
+#define TLC59116F_ADDR15_FLAG 0x6F
-#define TLC59116F_ROW_SIZE 1
-#define TLC59116F_COL_SIZE 5
-#define TLC59116F_GRID_SIZE (TLC59116F_COL_SIZE * TLC59116F_ROW_SIZE)
+#define TLC59116F_ROW_SIZE 1
+#define TLC59116F_COL_SIZE 5
+#define TLC59116F_GRID_SIZE (TLC59116F_COL_SIZE * TLC59116F_ROW_SIZE)
/* TLC59116F registers */
-#define TLC59116F_MODE1 0x00
-#define TLC59116F_MODE2 0x01
-#define TLC59116F_PWM0 0x02
-#define TLC59116F_PWM1 0x03
-#define TLC59116F_PWM2 0x04
-#define TLC59116F_PWM3 0x05
-#define TLC59116F_PWM4 0x06
-#define TLC59116F_PWM5 0x07
-#define TLC59116F_PWM6 0x08
-#define TLC59116F_PWM7 0x09
-#define TLC59116F_PWM8 0x0A
-#define TLC59116F_PWM9 0x0B
-#define TLC59116F_PWM10 0x0C
-#define TLC59116F_PWM11 0x0D
-#define TLC59116F_PWM12 0x0E
-#define TLC59116F_PWM13 0x0F
-#define TLC59116F_PWM14 0x10
-#define TLC59116F_PWM15 0x11
-#define TLC59116F_GRPPWM 0x12
-#define TLC59116F_GRPFREQ 0x13
-#define TLC59116F_LEDOUT0 0x14
-#define TLC59116F_LEDOUT1 0x15
-#define TLC59116F_LEDOUT2 0x16
-#define TLC59116F_LEDOUT3 0x17
-#define TLC59116F_SUBADR1 0x18
-#define TLC59116F_SUBADR2 0x19
-#define TLC59116F_SUBADR3 0x1A
-#define TLC59116F_ALLCALLADR 0x1B
+#define TLC59116F_MODE1 0x00
+#define TLC59116F_MODE2 0x01
+#define TLC59116F_PWM0 0x02
+#define TLC59116F_PWM1 0x03
+#define TLC59116F_PWM2 0x04
+#define TLC59116F_PWM3 0x05
+#define TLC59116F_PWM4 0x06
+#define TLC59116F_PWM5 0x07
+#define TLC59116F_PWM6 0x08
+#define TLC59116F_PWM7 0x09
+#define TLC59116F_PWM8 0x0A
+#define TLC59116F_PWM9 0x0B
+#define TLC59116F_PWM10 0x0C
+#define TLC59116F_PWM11 0x0D
+#define TLC59116F_PWM12 0x0E
+#define TLC59116F_PWM13 0x0F
+#define TLC59116F_PWM14 0x10
+#define TLC59116F_PWM15 0x11
+#define TLC59116F_GRPPWM 0x12
+#define TLC59116F_GRPFREQ 0x13
+#define TLC59116F_LEDOUT0 0x14
+#define TLC59116F_LEDOUT1 0x15
+#define TLC59116F_LEDOUT2 0x16
+#define TLC59116F_LEDOUT3 0x17
+#define TLC59116F_SUBADR1 0x18
+#define TLC59116F_SUBADR2 0x19
+#define TLC59116F_SUBADR3 0x1A
+#define TLC59116F_ALLCALLADR 0x1B
-#define TLC59116_LEDOUT_OFF 0x00
-#define TLC59116_LEDOUT_ON 0x55
-#define TLC59116_LEDOUT_PWM 0xAA
-#define TLC59116_LEDOUT_GROUP 0xFF
+#define TLC59116_LEDOUT_OFF 0x00
+#define TLC59116_LEDOUT_ON 0x55
+#define TLC59116_LEDOUT_PWM 0xAA
+#define TLC59116_LEDOUT_GROUP 0xFF
/* Auto Increment flag */
-#define TLC59116_AI_NONE 0
-#define TLC59116_AI_ALL BIT(7)
-#define TLC59116_AI_BRIGHTNESS_ONLY (BIT(7) | BIT(5))
-#define TLC59116_AI_GCR_ONLY (BIT(7) | BIT(6))
+#define TLC59116_AI_NONE 0
+#define TLC59116_AI_ALL BIT(7)
+#define TLC59116_AI_BRIGHTNESS_ONLY (BIT(7) | BIT(5))
+#define TLC59116_AI_GCR_ONLY (BIT(7) | BIT(6))
extern const struct rgbkbd_drv tlc59116f_drv;
-#endif /* __CROS_EC_DRIVER_LED_TLC59116F_H */
+#endif /* __CROS_EC_DRIVER_LED_TLC59116F_H */
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