diff options
Diffstat (limited to 'driver/ppc/nx20p348x.c')
| -rw-r--r-- | driver/ppc/nx20p348x.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/driver/ppc/nx20p348x.c b/driver/ppc/nx20p348x.c index e05d7e60a7..d202898a85 100644 --- a/driver/ppc/nx20p348x.c +++ b/driver/ppc/nx20p348x.c @@ -1,4 +1,4 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. +/* Copyright 2018 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -19,8 +19,8 @@ #include "usbc_ppc.h" #include "util.h" -#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) -#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args) static atomic_t irq_pending; /* Bitmask of ports signaling an interrupt. */ @@ -37,17 +37,13 @@ static uint8_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; static int read_reg(uint8_t port, int reg, int *regval) { return i2c_read8(ppc_chips[port].i2c_port, - ppc_chips[port].i2c_addr_flags, - reg, - regval); + ppc_chips[port].i2c_addr_flags, reg, regval); } static int write_reg(uint8_t port, int reg, int regval) { return i2c_write8(ppc_chips[port].i2c_port, - ppc_chips[port].i2c_addr_flags, - reg, - regval); + ppc_chips[port].i2c_addr_flags, reg, regval); } static int nx20p348x_set_ovp_limit(int port) @@ -76,7 +72,7 @@ static int nx20p348x_is_sourcing_vbus(int port) } static int nx20p348x_set_vbus_source_current_limit(int port, - enum tcpc_rp_value rp) + enum tcpc_rp_value rp) { int regval; int status; @@ -103,7 +99,6 @@ static int nx20p348x_set_vbus_source_current_limit(int port, break; }; - return write_reg(port, NX20P348X_5V_SRC_OCP_THRESHOLD_REG, regval); } @@ -166,7 +161,8 @@ __maybe_unused static int nx20p3481_vbus_sink_enable(int port, int enable) return rv; return (status & NX20P348X_SWITCH_STATUS_HVSNK) == control ? - EC_SUCCESS : EC_ERROR_UNKNOWN; + EC_SUCCESS : + EC_ERROR_UNKNOWN; } __maybe_unused static int nx20p3481_vbus_source_enable(int port, int enable) @@ -242,7 +238,7 @@ __maybe_unused static int nx20p3483_vbus_sink_enable(int port, int enable) return rv; is_sink = (ds & NX20P3483_DEVICE_MODE_MASK) == - NX20P3483_MODE_HV_SNK; + NX20P3483_MODE_HV_SNK; if (enable == is_sink) return EC_SUCCESS; @@ -319,6 +315,10 @@ static int nx20p348x_init(int port) /* Unmask Fast Role Swap detect interrupt */ mask &= ~NX20P3481_INT1_FRS_DET; } + if (IS_ENABLED(CONFIG_USBC_NX20P348X_RCP_5VSRC_MASK_ENABLE)) { + /* Mask RCP 5V SRC */ + mask |= NX20P348X_INT1_RCP_5VSRC; + } rv = write_reg(port, NX20P348X_INTERRUPT1_MASK_REG, mask); if (rv) return rv; @@ -409,7 +409,7 @@ static void nx20p348x_handle_interrupt(int port) NX20P348X_DB_EXIT_FAIL_THRESHOLD) { ppc_prints("failed to exit DB mode", port); if (read_reg(port, NX20P348X_INTERRUPT1_MASK_REG, - &mask_reg)) { + &mask_reg)) { mask_reg |= NX20P348X_INT1_DBEXIT_ERR; write_reg(port, NX20P348X_INTERRUPT1_MASK_REG, mask_reg); @@ -502,8 +502,8 @@ static int nx20p348x_dump(int port) int rv; ccprintf("Port %d NX20P348X registers\n", port); - for (reg_addr = NX20P348X_DEVICE_ID_REG; reg_addr <= - NX20P348X_DEVICE_CONTROL_REG; reg_addr++) { + for (reg_addr = NX20P348X_DEVICE_ID_REG; + reg_addr <= NX20P348X_DEVICE_CONTROL_REG; reg_addr++) { rv = read_reg(port, reg_addr, ®); if (rv) { ccprintf("nx20p: Failed to read register 0x%x\n", |