summaryrefslogtreecommitdiff
path: root/driver/ppc/nx20p348x.h
diff options
context:
space:
mode:
Diffstat (limited to 'driver/ppc/nx20p348x.h')
-rw-r--r--driver/ppc/nx20p348x.h93
1 files changed, 47 insertions, 46 deletions
diff --git a/driver/ppc/nx20p348x.h b/driver/ppc/nx20p348x.h
index 6aad5c9881..54c6dc40b5 100644
--- a/driver/ppc/nx20p348x.h
+++ b/driver/ppc/nx20p348x.h
@@ -26,7 +26,7 @@
#define NX20P348X_SAFE_RESET_VBUS_MV 5000
/* NX20P348x register addresses */
-#define NX20P348X_DEVICE_ID_REG 0x00
+#define NX20P348X_DEVICE_ID_REG 0x00
#define NX20P348X_DEVICE_STATUS_REG 0x01
#define NX20P348X_SWITCH_CONTROL_REG 0x02
#define NX20P348X_SWITCH_STATUS_REG 0x03
@@ -39,36 +39,37 @@
#define NX20P348X_5V_SRC_OCP_THRESHOLD_REG 0x0A
#define NX20P348X_DEVICE_CONTROL_REG 0x0B
-/* Device Control Register */
-#define NX20P348X_CTRL_FRS_AT BIT(3)
-#define NX20P348X_CTRL_DB_EXIT BIT(2)
-#define NX20P348X_CTRL_VBUSDIS_EN BIT(1)
-#define NX20P348X_CTRL_LDO_SD BIT(0)
+/* Device Control Register (0x0B) */
+#define NX20P3483_CTRL_FRS_AT BIT(3)
+#define NX20P348X_CTRL_DB_EXIT BIT(2)
+#define NX20P348X_CTRL_VBUSDIS_EN BIT(1)
+#define NX20P348X_CTRL_LDO_SD BIT(0)
-/* Device Status Modes */
-#define NX20P348X_DEVICE_MODE_MASK 0x7
-#define NX20P348X_MODE_DEAD_BATTERY 0
+/* Device Status Modes (0x01) */
+#define NX20P3481_DEVICE_MODE_MASK 0x3
+#define NX20P3483_DEVICE_MODE_MASK 0x7
+#define NX20P348X_MODE_DEAD_BATTERY 0
/* After dead battery, mode values are different between 3481 and 3483 */
-#define NX20P3481_MODE_NORMAL 1
-#define NX20P3481_MODE_FRS 2
-#define NX20P3481_MODE_STANDBY 3
-
-#define NX20P3483_MODE_HV_SNK 1
-#define NX20P3483_MODE_5V_SRC 2
-#define NX20P3483_MODE_HV_SRC 3
-#define NX20P3483_MODE_STANDBY 4
-
-/* Switch Control Register */
-#define NX20P348X_SWITCH_CONTROL_HVSNK BIT(0)
-#define NX20P348X_SWITCH_CONTROL_HVSRC BIT(1)
-#define NX20P348X_SWITCH_CONTROL_5VSRC BIT(2)
-
-/* Switch Status Register */
-#define NX20P348X_HVSNK_STS BIT(0)
-#define NX20P348X_HVSRC_STS BIT(1)
-#define NX20P348X_5VSRC_STS BIT(2)
+#define NX20P3481_MODE_NORMAL 1
+#define NX20P3481_MODE_FRS 2
+#define NX20P3481_MODE_STANDBY 3
+
+#define NX20P3483_MODE_HV_SNK 1
+#define NX20P3483_MODE_5V_SRC 2
+#define NX20P3483_MODE_HV_SRC 3
+#define NX20P3483_MODE_STANDBY 4
+
+/* Switch Control Register (0x02) */
+#define NX20P3481_SWITCH_CONTROL_5VSRC BIT(2)
+#define NX20P3481_SWITCH_CONTROL_HVSRC BIT(1)
+#define NX20P3481_SWITCH_CONTROL_HVSNK BIT(0)
+
+/* Switch Status Register (0x03) */
+#define NX20P348X_SWITCH_STATUS_5VSRC BIT(2)
+#define NX20P348X_SWITCH_STATUS_HVSRC BIT(1)
+#define NX20P348X_SWITCH_STATUS_HVSNK BIT(0)
#define NX20P348X_SWITCH_STATUS_DEBOUNCE_MSEC 25
-#define NX20P348X_SWITCH_STATUS_MASK 0x7
+#define NX20P348X_SWITCH_STATUS_MASK 0x7
/* Internal 5V VBUS Switch Current Limit Settings (min) */
#define NX20P348X_ILIM_MASK 0xF
@@ -99,24 +100,24 @@
#define NX20P348X_OVLO_17_0 5
#define NX20P348X_OVLO_23_0 6
-/* Interrupt 1 Register Bits */
-#define NX20P348X_INT1_DBEXIT_ERR BIT(7)
-#define NX20P348X_INT1_FRS_DET BIT(6)
-#define NX20P348X_INT1_OV_5VSRC BIT(4)
-#define NX20P348X_INT1_RCP_5VSRC BIT(3)
-#define NX20P348X_INT1_SC_5VSRC BIT(2)
-#define NX20P348X_INT1_OC_5VSRC BIT(1)
-#define NX20P348X_INT1_OTP BIT(0)
-
-/* Interrupt 2 Register Bits */
-#define NX20P348X_INT2_EN_ERR BIT(7)
-#define NX20P348X_INT2_RCP_HVSNK BIT(6)
-#define NX20P348X_INT2_SC_HVSNK BIT(5)
-#define NX20P348X_INT2_OV_HVSNK BIT(4)
-#define NX20P348X_INT2_RCP_HVSRC BIT(3)
-#define NX20P348X_INT2_SC_HVSRC BIT(2)
-#define NX20P348X_INT2_OC_HVSRC BIT(1)
-#define NX20P348X_INT2_OV_HVSRC BIT(0)
+/* Interrupt 1 Register Bits (0x04) */
+#define NX20P348X_INT1_DBEXIT_ERR BIT(7)
+#define NX20P3481_INT1_FRS_DET BIT(6)
+#define NX20P348X_INT1_OV_5VSRC BIT(4)
+#define NX20P348X_INT1_RCP_5VSRC BIT(3)
+#define NX20P348X_INT1_SC_5VSRC BIT(2)
+#define NX20P348X_INT1_OC_5VSRC BIT(1)
+#define NX20P348X_INT1_OTP BIT(0)
+
+/* Interrupt 2 Register Bits (0x05) */
+#define NX20P348X_INT2_EN_ERR BIT(7)
+#define NX20P348X_INT2_RCP_HVSNK BIT(6)
+#define NX20P348X_INT2_SC_HVSNK BIT(5)
+#define NX20P348X_INT2_OV_HVSNK BIT(4)
+#define NX20P348X_INT2_RCP_HVSRC BIT(3)
+#define NX20P348X_INT2_SC_HVSRC BIT(2)
+#define NX20P348X_INT2_OC_HVSRC BIT(1)
+#define NX20P348X_INT2_OV_HVSRC BIT(0)
struct ppc_drv;
extern const struct ppc_drv nx20p348x_drv;