diff options
Diffstat (limited to 'driver/retimer')
-rw-r--r-- | driver/retimer/anx7491.h | 17 | ||||
-rw-r--r-- | driver/retimer/bb_retimer.c | 623 | ||||
-rw-r--r-- | driver/retimer/kb800x.c | 543 | ||||
-rw-r--r-- | driver/retimer/kb800x.h | 110 | ||||
-rw-r--r-- | driver/retimer/nb7v904m.c | 228 | ||||
-rw-r--r-- | driver/retimer/nb7v904m.h | 133 | ||||
-rw-r--r-- | driver/retimer/pi3dpx1207.c | 146 | ||||
-rw-r--r-- | driver/retimer/pi3dpx1207.h | 54 | ||||
-rw-r--r-- | driver/retimer/pi3hdx1204.c | 37 | ||||
-rw-r--r-- | driver/retimer/pi3hdx1204.h | 77 | ||||
-rw-r--r-- | driver/retimer/ps8802.c | 317 | ||||
-rw-r--r-- | driver/retimer/ps8802.h | 114 | ||||
-rw-r--r-- | driver/retimer/ps8811.c | 48 | ||||
-rw-r--r-- | driver/retimer/ps8811.h | 99 | ||||
-rw-r--r-- | driver/retimer/ps8818.c | 165 | ||||
-rw-r--r-- | driver/retimer/ps8818.h | 99 | ||||
-rw-r--r-- | driver/retimer/tdp142.c | 42 | ||||
-rw-r--r-- | driver/retimer/tdp142.h | 38 | ||||
-rw-r--r-- | driver/retimer/tusb544.c | 116 | ||||
-rw-r--r-- | driver/retimer/tusb544.h | 109 |
20 files changed, 0 insertions, 3115 deletions
diff --git a/driver/retimer/anx7491.h b/driver/retimer/anx7491.h deleted file mode 100644 index 045cf9f411..0000000000 --- a/driver/retimer/anx7491.h +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * ANX7491:10G USB 3.2 Re-timer (1-Port) - */ - -#ifndef __CROS_EC_USB_RETIMER_ANX7491_H -#define __CROS_EC_USB_RETIMER_ANX7491_H - -/* I2C interface addresses */ -#define ANX7491_I2C_ADDR0_FLAGS 0x10 -#define ANX7491_I2C_ADDR1_FLAGS 0x14 -#define ANX7491_I2C_ADDR2_FLAGS 0x16 -#define ANX7491_I2C_ADDR3_FLAGS 0x11 - -#endif /* __CROS_EC_USB_RETIMER_ANX7491_H */ diff --git a/driver/retimer/bb_retimer.c b/driver/retimer/bb_retimer.c deleted file mode 100644 index bf3da60b32..0000000000 --- a/driver/retimer/bb_retimer.c +++ /dev/null @@ -1,623 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Driver for Intel Burnside Bridge - Thunderbolt/USB/DisplayPort Retimer - */ - -#include "driver/retimer/bb_retimer.h" -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "i2c.h" -#include "task.h" -#include "timer.h" -#include "usb_pd.h" -#include "util.h" - -#define BB_RETIMER_REG_SIZE 4 -#define BB_RETIMER_READ_SIZE (BB_RETIMER_REG_SIZE + 1) -#define BB_RETIMER_WRITE_SIZE (BB_RETIMER_REG_SIZE + 2) -#define BB_RETIMER_MUX_DATA_PRESENT (USB_PD_MUX_USB_ENABLED \ - | USB_PD_MUX_DP_ENABLED \ - | USB_PD_MUX_SAFE_MODE \ - | USB_PD_MUX_TBT_COMPAT_ENABLED \ - | USB_PD_MUX_USB4_ENABLED) - -#define BB_RETIMER_MUX_USB_ALT_MODE (USB_PD_MUX_USB_ENABLED\ - | USB_PD_MUX_DP_ENABLED \ - | USB_PD_MUX_TBT_COMPAT_ENABLED \ - | USB_PD_MUX_USB4_ENABLED) - -#define BB_RETIMER_MUX_USB_DP_MODE (USB_PD_MUX_USB_ENABLED \ - | USB_PD_MUX_DP_ENABLED \ - | USB_PD_MUX_USB4_ENABLED) - -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) - -#define BB_RETIMER_I2C_RETRY 5 - -/** - * Utility functions - */ -static int bb_retimer_read(const struct usb_mux *me, - const uint8_t offset, uint32_t *data) -{ - int rv, retry = 0; - uint8_t buf[BB_RETIMER_READ_SIZE]; - - /* - * This I2C message will trigger retimer's internal read sequence - * if its a NAK, sleep and resend same I2C - */ - while (1) { - /* - * Read sequence - * Addr flags (w) - Reg offset - repeated start - Addr flags(r) - * byte[0] : Read size - * byte[1:4] : Data [LSB -> MSB] - * Stop - */ - rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, - &offset, 1, buf, BB_RETIMER_READ_SIZE); - - if (rv == EC_SUCCESS) - break; - - if (++retry >= BB_RETIMER_I2C_RETRY) { - CPRINTS("C%d: Retimer I2C read err=%d", - me->usb_port, rv); - return rv; - } - msleep(10); - } - - if (buf[0] != BB_RETIMER_REG_SIZE) - return EC_ERROR_UNKNOWN; - - *data = buf[1] | (buf[2] << 8) | (buf[3] << 16) | (buf[4] << 24); - - return EC_SUCCESS; -} - -static int bb_retimer_write(const struct usb_mux *me, - const uint8_t offset, uint32_t data) -{ - int rv, retry = 0; - uint8_t buf[BB_RETIMER_WRITE_SIZE]; - - /* - * Write sequence - * Addr flags(w) - * byte[0] : Reg offset - * byte[1] : Write Size - * byte[2:5] : Data [LSB -> MSB] - * stop - */ - buf[0] = offset; - buf[1] = BB_RETIMER_REG_SIZE; - buf[2] = data & 0xFF; - buf[3] = (data >> 8) & 0xFF; - buf[4] = (data >> 16) & 0xFF; - buf[5] = (data >> 24) & 0xFF; - - /* - * This I2C message will trigger retimer's internal write sequence - * if its a NAK, sleep and resend same I2C - */ - while (1) { - rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, buf, - BB_RETIMER_WRITE_SIZE, NULL, 0); - - if (rv == EC_SUCCESS) - break; - - if (++retry >= BB_RETIMER_I2C_RETRY) { - CPRINTS("C%d: Retimer I2C write err=%d", - me->usb_port, rv); - break; - } - msleep(10); - } - return rv; -} - -__overridable int bb_retimer_power_enable(const struct usb_mux *me, bool enable) -{ - const struct bb_usb_control *control = &bb_controls[me->usb_port]; - - /* handle retimer's power domain */ - - if (enable) { - gpio_set_level(control->usb_ls_en_gpio, 1); - /* - * Tpw, minimum time from VCC to RESET_N de-assertion is 100us. - * For boards that don't provide a load switch control, the - * retimer_init() function ensures power is up before calling - * this function. - */ - msleep(1); - gpio_set_level(control->retimer_rst_gpio, 1); - /* - * Allow 1ms time for the retimer to power up lc_domain - * which powers I2C controller within retimer - */ - msleep(1); - } else { - gpio_set_level(control->retimer_rst_gpio, 0); - msleep(1); - gpio_set_level(control->usb_ls_en_gpio, 0); - } - return EC_SUCCESS; -} - -static void retimer_set_state_dfp(int port, mux_state_t mux_state, - uint32_t *set_retimer_con) -{ - union tbt_mode_resp_cable cable_resp = { - .raw_value = pd_get_tbt_mode_vdo(port, TCPCI_MSG_SOP_PRIME) }; - union tbt_mode_resp_device dev_resp; - enum idh_ptype cable_type = get_usb_pd_cable_type(port); - - /* - * Bit 2: RE_TIMER_DRIVER - * 0 - Re-driver - * 1 - Re-timer - * - * If Alternate mode is USB/DP/USB4, RE_TIMER_DRIVER is - * set according to SOP' VDO2 response Bit 9. - * - */ - if (is_active_cable_element_retimer(port) && - (mux_state & BB_RETIMER_MUX_USB_DP_MODE)) - *set_retimer_con |= BB_RETIMER_RE_TIMER_DRIVER; - - /* - * Bit 22: ACTIVE/PASSIVE - * 0 - Passive cable - * 1 - Active cable - * - * If the mode is USB/DP/Thunderbolt_compat/USB4, ACTIVE/PASIVE is - * set according to Discover mode SOP' response. - */ - if ((mux_state & BB_RETIMER_MUX_USB_ALT_MODE) && - ((cable_type == IDH_PTYPE_ACABLE) || - cable_resp.tbt_active_passive == TBT_CABLE_ACTIVE)) - *set_retimer_con |= BB_RETIMER_ACTIVE_PASSIVE; - - if (mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED || - mux_state & USB_PD_MUX_USB4_ENABLED) { - dev_resp.raw_value = pd_get_tbt_mode_vdo(port, TCPCI_MSG_SOP); - - /* - * Bit 2: RE_TIMER_DRIVER - * 0 - Re-driver - * 1 - Re-timer - * - * If Alternate mode is Thunderbolt-Compat, RE_TIMER_DRIVER is - * set according to Discover Mode SOP' response, - * Bit 22: Retimer Type. - */ - if (cable_resp.retimer_type == USB_RETIMER) - *set_retimer_con |= BB_RETIMER_RE_TIMER_DRIVER; - - /* - * Bit 17: TBT_TYPE - * 0 - Type-C to Type-C Cable - * 1 - Type-C Legacy TBT Adapter - */ - if (dev_resp.tbt_adapter == TBT_ADAPTER_TBT2_LEGACY) - *set_retimer_con |= BB_RETIMER_TBT_TYPE; - - /* - * Bit 18: CABLE_TYPE - * 0 - Electrical cable - * 1 - Optical cable - */ - if (cable_resp.tbt_cable == TBT_CABLE_OPTICAL) - *set_retimer_con |= BB_RETIMER_TBT_CABLE_TYPE; - - /* - * Bit 19: VPO_DOCK_DETECTED_OR_DP_OVERDRIVE - * 0 - No vPro Dock.No DP Overdrive - * detected - * 1 - vPro Dock or DP Overdrive - * detected - */ - if (dev_resp.intel_spec_b0 == VENDOR_SPECIFIC_SUPPORTED || - dev_resp.vendor_spec_b1 == VENDOR_SPECIFIC_SUPPORTED) - *set_retimer_con |= BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE; - - /* - * Bit 20: TBT_ACTIVE_LINK_TRAINING - * 0 - Active with bi-directional LSRX communication - * 1 - Active with uni-directional LSRX communication - * Set to "0" when passive cable plug - */ - if ((cable_type == IDH_PTYPE_ACABLE || - cable_resp.tbt_active_passive == TBT_CABLE_ACTIVE) && - cable_resp.lsrx_comm == UNIDIR_LSRX_COMM) - *set_retimer_con |= BB_RETIMER_TBT_ACTIVE_LINK_TRAINING; - - /* - * Bit 27-25: USB4/TBT Cable speed - * 000b - No functionality - * 001b - USB3.1 Gen1 Cable - * 010b - 10Gb/s - * 011b - 10Gb/s and 20Gb/s - * 10..11b - Reserved - */ - *set_retimer_con |= BB_RETIMER_USB4_TBT_CABLE_SPEED_SUPPORT( - mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED ? - get_tbt_cable_speed(port) : - get_usb4_cable_speed(port)); - - /* - * Bits 29-28: TBT_GEN_SUPPORT - * 00b - 3rd generation TBT (10.3125 and 20.625Gb/s) - * 01b - 4th generation TBT (10.00005Gb/s, 10.3125Gb/s, - * 20.0625Gb/s, 20.000Gb/s) - * 10..11b - Reserved - */ - *set_retimer_con |= BB_RETIMER_TBT_CABLE_GENERATION( - cable_resp.tbt_rounded); - } -} - -static void retimer_set_state_ufp(int port, mux_state_t mux_state, - uint32_t *set_retimer_con) -{ - /* - * Bit 7: USB_DATA_ROLE for the Burnside Bridge side of - * connection. - * 0 - DFP - * 1 - UFP - */ - *set_retimer_con |= BB_RETIMER_USB_DATA_ROLE; - - if (!IS_ENABLED(CONFIG_USB_PD_ALT_MODE_UFP)) - return; - - /* TODO:b/168890624: Set USB4 retimer config for UFP */ - if (mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED) { - union tbt_dev_mode_enter_cmd ufp_tbt_enter_mode = { - .raw_value = pd_ufp_get_enter_mode(port)}; - /* - * Bit 2: RE_TIMER_DRIVER - * 0 - Re-driver - * 1 - Re-timer - * - * Set according to TBT3 Enter Mode bit 22. - */ - if (ufp_tbt_enter_mode.retimer_type == USB_RETIMER) - *set_retimer_con |= BB_RETIMER_RE_TIMER_DRIVER; - - /* - * Bit 18: CABLE_TYPE - * 0 - Electrical cable - * 1 - Optical cable - * - * Set according to TBT3 Enter Mode bit 21. - */ - if (ufp_tbt_enter_mode.tbt_cable == TBT_CABLE_OPTICAL) - *set_retimer_con |= BB_RETIMER_TBT_CABLE_TYPE; - - /* - * Bit 19: VPO_DOCK_DETECTED_OR_DP_OVERDRIVE - * 0 - No vPro Dock.No DP Overdrive - * detected - * 1 - vPro Dock or DP Overdrive - * detected - * - * Set according to TBT3 Enter Mode bit 26 or bit 31 - */ - if (ufp_tbt_enter_mode.intel_spec_b0 == - VENDOR_SPECIFIC_SUPPORTED || - ufp_tbt_enter_mode.vendor_spec_b1 == - VENDOR_SPECIFIC_SUPPORTED) - *set_retimer_con |= BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE; - - /* - * Bit 20: TBT_ACTIVE_LINK_TRAINING - * 0 - Active with bi-directional LSRX communication - * 1 - Active with uni-directional LSRX communication - * - * Set according to TBT3 Enter Mode bit 23 - */ - if (ufp_tbt_enter_mode.lsrx_comm == UNIDIR_LSRX_COMM) - *set_retimer_con |= BB_RETIMER_TBT_ACTIVE_LINK_TRAINING; - - /* - * Bit 22: ACTIVE/PASSIVE - * 0 - Passive cable - * 1 - Active cable - * - * Set according to TBT3 Enter Mode bit 24 - */ - if (ufp_tbt_enter_mode.cable == TBT_ENTER_ACTIVE_CABLE) - *set_retimer_con |= BB_RETIMER_ACTIVE_PASSIVE; - - /* - * Bit 27-25: TBT Cable speed - * 000b - No functionality - * 001b - USB3.1 Gen1 Cable - * 010b - 10Gb/s - * 011b - 10Gb/s and 20Gb/s - * 10..11b - Reserved - * - * Set according to TBT3 Enter Mode bit 18:16 - */ - *set_retimer_con |= BB_RETIMER_USB4_TBT_CABLE_SPEED_SUPPORT( - ufp_tbt_enter_mode.tbt_cable_speed); - /* - * Bits 29-28: TBT_GEN_SUPPORT - * 00b - 3rd generation TBT (10.3125 and 20.625Gb/s) - * 01b - 4th generation TBT (10.00005Gb/s, 10.3125Gb/s, - * 20.0625Gb/s, 20.000Gb/s) - * 10..11b - Reserved - * - * Set according to TBT3 Enter Mode bit 20:19 - */ - *set_retimer_con |= BB_RETIMER_TBT_CABLE_GENERATION( - ufp_tbt_enter_mode.tbt_rounded); - } -} - -/** - * Driver interface functions - */ -static int retimer_set_state(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - uint32_t set_retimer_con = 0; - uint8_t dp_pin_mode; - int port = me->usb_port; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - /* - * Bit 0: DATA_CONNECTION_PRESENT - * 0 - No connection present - * 1 - Connection present - */ - if (mux_state & BB_RETIMER_MUX_DATA_PRESENT) - set_retimer_con |= BB_RETIMER_DATA_CONNECTION_PRESENT; - - /* - * Bit 1: CONNECTION_ORIENTATION - * 0 - Normal - * 1 - reversed - */ - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - set_retimer_con |= BB_RETIMER_CONNECTION_ORIENTATION; - - /* - * Bit 5: USB_3_CONNECTION - * 0 - No USB3.1 Connection - * 1 - USB3.1 connection - */ - if (mux_state & USB_PD_MUX_USB_ENABLED) { - set_retimer_con |= BB_RETIMER_USB_3_CONNECTION; - - /* - * Bit 6: USB3_Speed - * 0 – USB3 is limited to Gen1 - * 1 – USB3 Gen1/Gen2 supported - */ - if (is_cable_speed_gen2_capable(port)) - set_retimer_con |= BB_RETIMER_USB_3_SPEED; - } - - /* - * Bit 8: DP_CONNECTION - * 0 – No DP connection - * 1 – DP connected - */ - if (mux_state & USB_PD_MUX_DP_ENABLED) { - set_retimer_con |= BB_RETIMER_DP_CONNECTION; - - /* - * Bit 11-10: DP_PIN_ASSIGNMENT (ignored if BIT8 = 0) - * 00 – Pin assignments E/E’ - * 01 – Pin assignments C/C’/D/D’1,2 - * 10, 11 - reserved - */ - dp_pin_mode = get_dp_pin_mode(port); - if (dp_pin_mode == MODE_DP_PIN_C || - dp_pin_mode == MODE_DP_PIN_D) - set_retimer_con |= BB_RETIMER_DP_PIN_ASSIGNMENT; - - /* - * Bit 14: IRQ_HPD (ignored if BIT8 = 0) - * 0 - No IRQ_HPD - * 1 - IRQ_HPD received - */ - if (mux_state & USB_PD_MUX_HPD_IRQ) - set_retimer_con |= BB_RETIMER_IRQ_HPD; - - /* - * Bit 15: HPD_LVL (ignored if BIT8 = 0) - * 0 - HPD_State Low - * 1 - HPD_State High - */ - if (mux_state & USB_PD_MUX_HPD_LVL) - set_retimer_con |= BB_RETIMER_HPD_LVL; - } - - /* - * Bit 16: TBT_CONNECTION - * 0 - TBT not configured - * 1 - TBT configured - */ - if (mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED) - set_retimer_con |= BB_RETIMER_TBT_CONNECTION; - - /* - * Bit 23: USB4_CONNECTION - * 0 - USB4 not configured - * 1 - USB4 Configured - */ - if (mux_state & USB_PD_MUX_USB4_ENABLED) - set_retimer_con |= BB_RETIMER_USB4_ENABLED; - - if (pd_get_data_role(port) == PD_ROLE_DFP) - retimer_set_state_dfp(port, mux_state, &set_retimer_con); - else - retimer_set_state_ufp(port, mux_state, &set_retimer_con); - - /* Writing the register4 */ - return bb_retimer_write(me, BB_RETIMER_REG_CONNECTION_STATE, - set_retimer_con); -} - -void bb_retimer_hpd_update(const struct usb_mux *me, mux_state_t mux_state) -{ - uint32_t retimer_con_reg = 0; - - if (bb_retimer_read(me, BB_RETIMER_REG_CONNECTION_STATE, - &retimer_con_reg) != EC_SUCCESS) - return; - - /* - * Bit 14: IRQ_HPD (ignored if BIT8 = 0) - * 0 - No IRQ_HPD - * 1 - IRQ_HPD received - */ - if (mux_state & USB_PD_MUX_HPD_IRQ) - retimer_con_reg |= BB_RETIMER_IRQ_HPD; - else - retimer_con_reg &= ~BB_RETIMER_IRQ_HPD; - - /* - * Bit 15: HPD_LVL (ignored if BIT8 = 0) - * 0 - HPD_State Low - * 1 - HPD_State High - */ - if (mux_state & USB_PD_MUX_HPD_LVL) - retimer_con_reg |= BB_RETIMER_HPD_LVL; - else - retimer_con_reg &= ~BB_RETIMER_HPD_LVL; - - /* Writing the register4 */ - bb_retimer_write(me, BB_RETIMER_REG_CONNECTION_STATE, retimer_con_reg); -} - -static int retimer_low_power_mode(const struct usb_mux *me) -{ - return bb_retimer_power_enable(me, false); -} - -static bool is_retimer_fw_update_capable(void) -{ - return true; -} - -static int retimer_init(const struct usb_mux *me) -{ - int rv; - uint32_t data; - - /* Burnside Bridge is powered by main AP rail */ - if (chipset_in_or_transitioning_to_state(CHIPSET_STATE_ANY_OFF)) { - /* Ensure reset is asserted while chip is not powered */ - bb_retimer_power_enable(me, false); - return EC_ERROR_NOT_POWERED; - } - - rv = bb_retimer_power_enable(me, true); - if (rv != EC_SUCCESS) - return rv; - - rv = bb_retimer_read(me, BB_RETIMER_REG_VENDOR_ID, &data); - if (rv != EC_SUCCESS) - return rv; - if ((data != BB_RETIMER_VENDOR_ID_1) && - data != BB_RETIMER_VENDOR_ID_2) - return EC_ERROR_INVAL; - - rv = bb_retimer_read(me, BB_RETIMER_REG_DEVICE_ID, &data); - if (rv != EC_SUCCESS) - return rv; - if (data != BB_RETIMER_DEVICE_ID) - return EC_ERROR_INVAL; - - return EC_SUCCESS; -} - -const struct usb_mux_driver bb_usb_retimer = { - .init = retimer_init, - .set = retimer_set_state, - .enter_low_power_mode = retimer_low_power_mode, - .is_retimer_fw_update_capable = is_retimer_fw_update_capable, -}; - -#ifdef CONFIG_CMD_RETIMER -static int console_command_bb_retimer(int argc, char **argv) -{ - char rw, *e; - int port, reg, data, val = 0; - int rv = EC_SUCCESS; - const struct usb_mux *mux; - - if (argc < 4) - return EC_ERROR_PARAM_COUNT; - - /* Get port number */ - port = strtoi(argv[1], &e, 0); - if (*e || !board_is_usb_pd_port_present(port)) - return EC_ERROR_PARAM1; - - mux = &usb_muxes[port]; - while (mux) { - if (mux->driver == &bb_usb_retimer) - break; - mux = mux->next_mux; - } - - if (!mux) - return EC_ERROR_PARAM1; - - /* Validate r/w selection */ - rw = argv[2][0]; - if (rw != 'w' && rw != 'r') - return EC_ERROR_PARAM2; - - /* Get register address */ - reg = strtoi(argv[3], &e, 0); - if (*e || reg < 0) - return EC_ERROR_PARAM3; - - /* Get value to be written */ - if (rw == 'w') { - val = strtoi(argv[4], &e, 0); - if (*e || val < 0) - return EC_ERROR_PARAM4; - } - - for (; mux != NULL; mux = mux->next_mux) { - if (mux->driver == &bb_usb_retimer) { - if (rw == 'r') - rv = bb_retimer_read(mux, reg, &data); - else { - rv = bb_retimer_write(mux, reg, val); - if (rv == EC_SUCCESS) { - rv = bb_retimer_read( - mux, reg, &data); - if (rv == EC_SUCCESS && data != val) - rv = EC_ERROR_UNKNOWN; - } - } - if (rv == EC_SUCCESS) - CPRINTS("Addr 0x%x register %d = 0x%x", - mux->i2c_addr_flags, reg, data); - } - } - - return rv; -} -DECLARE_CONSOLE_COMMAND(bb, console_command_bb_retimer, - "<port> <r/w> <reg> | <val>", - "Read or write to BB retimer register"); -#endif /* CONFIG_CMD_RETIMER */ diff --git a/driver/retimer/kb800x.c b/driver/retimer/kb800x.c deleted file mode 100644 index 48e47404c2..0000000000 --- a/driver/retimer/kb800x.c +++ /dev/null @@ -1,543 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Driver for Kandou KB800x USB-C 40 Gb/s multiprotocol switch. - */ - -#include "common.h" -#include "console.h" -#include "i2c.h" -#include "kb800x.h" -#include "time.h" - -/* Time between load switch enable and the reset being de-asserted */ -#define KB800X_POWER_ON_DELAY_MS 20 - -static mux_state_t cached_mux_state[CONFIG_USB_PD_PORT_MAX_COUNT]; - -static int kb800x_write(const struct usb_mux *me, uint16_t address, - uint8_t data) -{ - uint8_t kb800x_config[3] = { 0x00, 0x00, 0x00 }; - - kb800x_config[0] = (address >> 8) & 0xff; - kb800x_config[1] = address & 0xff; - kb800x_config[2] = data; - return i2c_xfer(me->i2c_port, me->i2c_addr_flags, kb800x_config, - sizeof(kb800x_config), NULL, 0); -} - -static int kb800x_read(const struct usb_mux *me, uint16_t address, - uint8_t *data) -{ - uint8_t kb800x_config[2] = { 0x00, 0x00 }; - - kb800x_config[0] = (address >> 8) & 0xff; - kb800x_config[1] = address & 0xff; - return i2c_xfer(me->i2c_port, me->i2c_addr_flags, kb800x_config, - sizeof(kb800x_config), data, 1); -} - -#ifdef CONFIG_KB800X_CUSTOM_XBAR - -/* These lookup tables are derived from the KB8001 EVB GUI register map */ - -/* Map elastic buffer (EB) to register field for TX configuration. */ -static const uint8_t tx_eb_to_field_ab[] = { - [KB800X_EB1] = 4, [KB800X_EB2] = 0, [KB800X_EB3] = 0, - [KB800X_EB4] = 1, [KB800X_EB5] = 2, [KB800X_EB6] = 3 -}; -static const uint8_t tx_eb_to_field_cd[] = { - [KB800X_EB1] = 1, [KB800X_EB2] = 2, [KB800X_EB3] = 3, - [KB800X_EB4] = 4, [KB800X_EB5] = 0, [KB800X_EB6] = 0 -}; -/* Map phy lane to register field for RX configuration */ -static const uint8_t rx_phy_lane_to_field[] = { - [KB800X_A0] = 1, [KB800X_A1] = 2, [KB800X_B0] = 5, [KB800X_B1] = 6, - [KB800X_C0] = 1, [KB800X_C1] = 2, [KB800X_D0] = 5, [KB800X_D1] = 6 -}; -/* Map EB to address for RX configuration */ -static const uint16_t rx_eb_to_address[] = { - [KB800X_EB1] = KB800X_REG_XBAR_EB1SEL, - [KB800X_EB2] = KB800X_REG_XBAR_EB23SEL, - [KB800X_EB3] = KB800X_REG_XBAR_EB23SEL, - [KB800X_EB4] = KB800X_REG_XBAR_EB4SEL, - [KB800X_EB5] = KB800X_REG_XBAR_EB56SEL, - [KB800X_EB6] = KB800X_REG_XBAR_EB56SEL -}; -/* Map SS lane to EB for DP or USB/CIO protocols */ -static const uint8_t dp_ss_lane_to_eb[] = { [KB800X_TX0] = KB800X_EB4, - [KB800X_TX1] = KB800X_EB5, - [KB800X_RX0] = KB800X_EB6, - [KB800X_RX1] = KB800X_EB1 }; -static const uint8_t usb_ss_lane_to_eb[] = { [KB800X_TX0] = KB800X_EB4, - [KB800X_TX1] = KB800X_EB5, - [KB800X_RX0] = KB800X_EB1, - [KB800X_RX1] = KB800X_EB2 }; - -/* Assign a phy TX to an elastic buffer */ -static int kb800x_assign_tx_to_eb(const struct usb_mux *me, - enum kb800x_phy_lane phy_lane, enum kb800x_eb eb) -{ - uint8_t field_value = 0; - uint8_t regval; - int rv; - - field_value = KB800X_PHY_IS_AB(phy_lane) ? tx_eb_to_field_ab[eb] : - tx_eb_to_field_cd[eb]; - - /* For lane1 of each PHY, shift by 3 bits */ - field_value <<= 3 * KB800X_LANE_NUMBER_FROM_PHY(phy_lane); - - rv = kb800x_read(me, KB800X_REG_TXSEL_FROM_PHY(phy_lane), ®val); - if (rv) - return rv; - return kb800x_write(me, KB800X_REG_TXSEL_FROM_PHY(phy_lane), - regval | field_value); -} - - -/* Assign a phy RX to an elastic buffer */ -static int kb800x_assign_rx_to_eb(const struct usb_mux *me, - enum kb800x_phy_lane phy_lane, enum kb800x_eb eb) -{ - uint16_t address = 0; - uint8_t field_value = 0; - uint8_t regval = 0; - int rv; - - - field_value = rx_phy_lane_to_field[phy_lane]; - address = rx_eb_to_address[eb]; - - /* - * need to shift by 4 for reverse EB or 3rd EB in set based on the - * register definition from the KB8001 EVB register map - */ - switch (eb) { - case KB800X_EB1: - if (!KB800X_PHY_IS_AB(phy_lane)) - field_value <<= 4; - break; - case KB800X_EB4: - if (KB800X_PHY_IS_AB(phy_lane)) - field_value <<= 4; - break; - case KB800X_EB3: - case KB800X_EB6: - field_value <<= 4; - break; - default: - break; - } - - rv = kb800x_read(me, address, ®val); - if (rv) - return rv; - return kb800x_write(me, address, regval | field_value); -} - -static bool kb800x_in_dpmf(const struct usb_mux *me) -{ - if ((cached_mux_state[me->usb_port] & USB_PD_MUX_DP_ENABLED) && - (cached_mux_state[me->usb_port] & USB_PD_MUX_USB_ENABLED)) - return true; - else - return false; -} - -static bool kb800x_is_dp_lane(const struct usb_mux *me, - enum kb800x_ss_lane ss_lane) -{ - if (cached_mux_state[me->usb_port] & USB_PD_MUX_DP_ENABLED) { - /* DP ALT mode */ - if (kb800x_in_dpmf(me)) { - /* DPMF pin configuration */ - if ((ss_lane == KB800X_TX1) || - (ss_lane == KB800X_RX1)) { - return true; /* ML0 or ML1 */ - } - } else { - /* Pure, 4-lane DP mode */ - return true; - } - } - /* Not a DP mode or ML2/3 while in DPMF */ - return false; -} - -/* Assigning this PHY to this SS lane means it should be RX */ -static bool kb800x_phy_ss_lane_is_rx(enum kb800x_phy_lane phy_lane, - enum kb800x_ss_lane ss_lane) -{ - bool rx; - - switch (ss_lane) { - case KB800X_TX0: - case KB800X_TX1: - rx = false; - break; - case KB800X_RX0: - case KB800X_RX1: - rx = true; - break; - } - /* invert for C/D (host side), since it is receiving the TX signal*/ - if (!KB800X_PHY_IS_AB(phy_lane)) - return !rx; - return rx; -} - -/* Assign SS lane to PHY. Assumes A/B is connector-side, and C/D is host-side */ -static int kb800x_assign_lane(const struct usb_mux *me, - enum kb800x_phy_lane phy_lane, - enum kb800x_ss_lane ss_lane) -{ - enum kb800x_eb eb = 0; - - /* - * Easiest way to handle flipping is to just swap lane 1/0. This assumes - * lanes are flipped in the AP. If they are not, they shouldn't be - * flipped for the AP-side lanes, but should for connector-side - */ - if (cached_mux_state[me->usb_port] & USB_PD_MUX_POLARITY_INVERTED) - ss_lane = KB800X_FLIP_SS_LANE(ss_lane); - - if (kb800x_is_dp_lane(me, ss_lane)) { - if (kb800x_in_dpmf(me)) { - /* Route USB3 RX/TX to EB1/4, and ML0/1 to EB5/6 */ - switch (ss_lane) { - case KB800X_TX1: /* ML1 */ - eb = KB800X_EB6; - break; - case KB800X_RX1: /* ML0 */ - eb = KB800X_EB5; - break; - default: - break; - } - } else { - /* Route ML0/1/2/3 through EB1/5/4/6 */ - eb = dp_ss_lane_to_eb[ss_lane]; - } - - /* For DP lanes, always DFP so A/B is TX, C/D is RX */ - if (KB800X_PHY_IS_AB(phy_lane)) - return kb800x_assign_tx_to_eb(me, phy_lane, eb); - else - return kb800x_assign_rx_to_eb(me, phy_lane, eb); - } - - /* Lane is either USB3 or CIO */ - if (kb800x_phy_ss_lane_is_rx(phy_lane, ss_lane)) - return kb800x_assign_rx_to_eb(me, phy_lane, - usb_ss_lane_to_eb[ss_lane]); - else - return kb800x_assign_tx_to_eb(me, phy_lane, - usb_ss_lane_to_eb[ss_lane]); -} - -static int kb800x_xbar_override(const struct usb_mux *me) -{ - int rv; - int i; - - for (i = KB800X_A0; i < KB800X_PHY_LANE_COUNT; ++i) { - rv = kb800x_assign_lane( - me, i, - kb800x_control[me->usb_port].ss_lanes[i]); - if (rv) - return rv; - } - return kb800x_write(me, KB800X_REG_XBAR_OVR, - KB800X_XBAR_OVR_EN); -} -#endif /* CONFIG_KB800X_CUSTOM_XBAR */ - -/* - * The initialization writes for each protocol can be found in the KB8001/KB8002 - * Programming Guidelines - */ -static const uint16_t global_init_addresses[] = { - 0x5058, 0x5059, 0xFF63, 0xF021, 0xF022, 0xF057, 0xF058, - 0x8194, 0xF0C9, 0xF0CA, 0xF0CB, 0xF0CC, 0xF0CD, 0xF0CE, - 0xF0DF, 0xF0E0, 0xF0E1, 0x8198, 0x8191 -}; -static const uint8_t global_init_values[] = { 0x12, 0x12, 0x3C, 0x02, 0x02, - 0x02, 0x02, 0x37, 0x0C, 0x0B, - 0x0A, 0x09, 0x08, 0x07, 0x57, - 0x66, 0x66, 0x33, 0x00 }; -static const uint16_t usb3_init_addresses[] = { 0xF020, 0xF056 }; -static const uint8_t usb3_init_values[] = { 0x2f, 0x2f }; -static const uint16_t dp_init_addresses[] = { 0xF2CB, 0x0011 }; -static const uint8_t dp_init_values[] = { 0x30, 0x00 }; -/* - * The first 2 CIO writes apply an SBRX pullup to the host side (C/D) - * This is required when the CPU doesn't apply a pullup. - */ -static const uint16_t cio_init_addresses[] = { 0x81fd, 0x81fe, 0xF26B, 0xF26E }; -static const uint8_t cio_init_values[] = { 0x08, 0x80, 0x01, 0x19 }; - -static int kb800x_bulk_write(const struct usb_mux *me, - const uint16_t *addresses, const uint8_t *values, - const uint8_t size) -{ - int i; - int rv; - - for (i = 0; i < size; ++i) { - rv = kb800x_write(me, addresses[i], values[i]); - if (rv != EC_SUCCESS) - return rv; - } - - return EC_SUCCESS; -} - -static int kb800x_global_init(const struct usb_mux *me) -{ - return kb800x_bulk_write(me, global_init_addresses, global_init_values, - sizeof(global_init_values)); -} - -static int kb800x_dp_init(const struct usb_mux *me, mux_state_t mux_state) -{ - int rv; - - rv = kb800x_bulk_write(me, dp_init_addresses, dp_init_values, - sizeof(dp_init_values)); - if (rv) - return rv; - return kb800x_write( - me, KB800X_REG_ORIENTATION, - KB800X_ORIENTATION_DP_DFP | - ((mux_state & USB_PD_MUX_POLARITY_INVERTED) ? - KB800X_ORIENTATION_POLARITY : - 0x0)); -} - -static int kb800x_usb3_init(const struct usb_mux *me, mux_state_t mux_state) -{ - int rv; - - rv = kb800x_bulk_write(me, usb3_init_addresses, usb3_init_values, - sizeof(usb3_init_values)); - if (rv) - return rv; - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - /* This will be overwritten in the DPMF case */ - return kb800x_write(me, KB800X_REG_ORIENTATION, - KB800X_ORIENTATION_POLARITY); - return EC_SUCCESS; -} - -static int kb800x_cio_init(const struct usb_mux *me, mux_state_t mux_state) -{ - uint8_t orientation = 0x0; - int rv; - - enum idh_ptype cable_type = get_usb_pd_cable_type(me->usb_port); - union tbt_mode_resp_cable cable_resp = { - .raw_value = - pd_get_tbt_mode_vdo(me->usb_port, TCPCI_MSG_SOP_PRIME) - }; - - rv = kb800x_bulk_write(me, cio_init_addresses, cio_init_values, - sizeof(cio_init_values)); - if (rv) - return rv; - - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - orientation = KB800X_ORIENTATION_CIO_LANE_SWAP | - KB800X_ORIENTATION_POLARITY; - - if (!(mux_state & USB_PD_MUX_USB4_ENABLED)) { - /* Special configuration only for legacy mode */ - if (cable_type == IDH_PTYPE_ACABLE || - cable_resp.tbt_active_passive == TBT_CABLE_ACTIVE) { - /* Active cable */ - if (cable_resp.lsrx_comm == UNIDIR_LSRX_COMM) { - orientation |= - KB800X_ORIENTATION_CIO_LEGACY_UNIDIR; - } else { - /* 'Pre-Coding on a TBT3-Compatible Link' ECN */ - rv = kb800x_write(me, 0x8194, 0x31); - if (rv) - return rv; - orientation |= - KB800X_ORIENTATION_CIO_LEGACY_BIDIR; - } - } else { - /* Passive Cable */ - orientation |= KB800X_ORIENTATION_CIO_LEGACY_PASSIVE; - } - } - return kb800x_write(me, KB800X_REG_ORIENTATION, orientation); -} - -static int kb800x_set_state(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int rv; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - cached_mux_state[me->usb_port] = mux_state; - rv = kb800x_write(me, KB800X_REG_RESET, KB800X_RESET_MASK); - if (rv) - return rv; - /* Release memory map reset */ - rv = kb800x_write(me, KB800X_REG_RESET, - KB800X_RESET_MASK & ~KB800X_RESET_MM); - if (rv) - return rv; - - /* Already in reset, nothing to do */ - if ((mux_state == USB_PD_MUX_NONE) || - (mux_state & USB_PD_MUX_SAFE_MODE)) - return EC_SUCCESS; - - rv = kb800x_global_init(me); - if (rv) - return rv; - - /* CIO mode (USB4/TBT) */ - if (mux_state & - (USB_PD_MUX_USB4_ENABLED | USB_PD_MUX_TBT_COMPAT_ENABLED)) { - rv = kb800x_cio_init(me, mux_state); - if (rv) - return rv; - rv = kb800x_write(me, KB800X_REG_PROTOCOL, KB800X_PROTOCOL_CIO); - } else { - /* USB3 enabled (USB3-only or DPMF) */ - if (mux_state & USB_PD_MUX_USB_ENABLED) { - rv = kb800x_usb3_init(me, mux_state); - if (rv) - return rv; - /* USB3-only is the default KB800X_REG_PROTOCOL value */ - } - - /* DP alt modes (DP-only or DPMF) */ - if (mux_state & USB_PD_MUX_DP_ENABLED) { - rv = kb800x_dp_init(me, mux_state); - if (rv) - return rv; - if (mux_state & USB_PD_MUX_USB_ENABLED) - rv = kb800x_write(me, KB800X_REG_PROTOCOL, - KB800X_PROTOCOL_DPMF); - else - rv = kb800x_write(me, KB800X_REG_PROTOCOL, - KB800X_PROTOCOL_DP); - } - } - if (rv) - return rv; - -#ifdef CONFIG_KB800X_CUSTOM_XBAR - rv = kb800x_xbar_override(me); - if (rv) - return rv; -#endif /* CONFIG_KB800X_CUSTOM_XBAR */ - - return kb800x_write(me, KB800X_REG_RESET, 0x00); -} - -static int kb800x_init(const struct usb_mux *me) -{ - gpio_set_level(kb800x_control[me->usb_port].usb_ls_en_gpio, 1); - gpio_set_level(kb800x_control[me->usb_port].retimer_rst_gpio, 1); - - /* - * Delay after enabling power and releasing the reset to allow the power - * to come up and the reset to be released by the power sequencing - * logic. If after the delay, the reset is still held low - return an - * error. - */ - msleep(KB800X_POWER_ON_DELAY_MS); - if (!gpio_get_level(kb800x_control[me->usb_port].retimer_rst_gpio)) - return EC_ERROR_NOT_POWERED; - - return kb800x_set_state(me, USB_PD_MUX_NONE); -} - -static int kb800x_enter_low_power_mode(const struct usb_mux *me) -{ - gpio_set_level(kb800x_control[me->usb_port].retimer_rst_gpio, 0); - /* Power-down sequencing must be handled in HW */ - gpio_set_level(kb800x_control[me->usb_port].usb_ls_en_gpio, 0); - - return EC_SUCCESS; -} - -#ifdef CONFIG_CMD_RETIMER - -static int console_command_kb800x_xfer(int argc, char **argv) -{ - char rw, *e; - int rv, port, reg, val; - uint8_t data; - const struct usb_mux *mux; - - if (argc < 4) - return EC_ERROR_PARAM_COUNT; - - /* Get port number */ - port = strtoi(argv[1], &e, 0); - if (*e || !board_is_usb_pd_port_present(port)) - return EC_ERROR_PARAM1; - - mux = &usb_muxes[port]; - while (mux) { - if (mux->driver == &kb800x_usb_mux_driver) - break; - mux = mux->next_mux; - } - - if (!mux) - return EC_ERROR_PARAM1; - - /* Validate r/w selection */ - rw = argv[2][0]; - if (rw != 'w' && rw != 'r') - return EC_ERROR_PARAM2; - - /* Get register address */ - reg = strtoi(argv[3], &e, 0); - if (*e || reg < 0) - return EC_ERROR_PARAM3; - rv = EC_SUCCESS; - if (rw == 'r') - rv = kb800x_read(mux, reg, &data); - else { - if (argc < 5) - return EC_ERROR_PARAM_COUNT; - /* Get value to be written */ - val = strtoi(argv[4], &e, 0); - if (*e || val < 0) - return EC_ERROR_PARAM4; - rv = kb800x_write(mux, reg, val); - if (rv == EC_SUCCESS) { - rv = kb800x_read(mux, reg, &data); - if (rv == EC_SUCCESS && data != val) - rv = EC_ERROR_UNKNOWN; - } - } - - if (rv == EC_SUCCESS) - ccprintf("register 0x%x [%d] = 0x%x [%d]\n", reg, reg, data, - data); - - return rv; -} -DECLARE_CONSOLE_COMMAND(kbxfer, console_command_kb800x_xfer, - "<port> <r/w> <reg> | <val>", - "Read or write to KB retimer register"); -#endif /* CONFIG_CMD_RETIMER */ - -const struct usb_mux_driver kb800x_usb_mux_driver = { - .init = kb800x_init, - .set = kb800x_set_state, - .enter_low_power_mode = kb800x_enter_low_power_mode, -}; diff --git a/driver/retimer/kb800x.h b/driver/retimer/kb800x.h deleted file mode 100644 index 5f8cf2810d..0000000000 --- a/driver/retimer/kb800x.h +++ /dev/null @@ -1,110 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Driver for Kandou KB8001 USB-C 40 Gb/s multiprotocol switch. - */ - -#ifndef __CROS_EC_KB800X_H -#define __CROS_EC_KB800X_H - -#include "compile_time_macros.h" -#include "gpio_signal.h" -#include "usb_mux.h" - -#define KB800X_I2C_ADDR0_FLAGS 0x08 -#define KB800X_I2C_ADDR1_FLAGS 0x0C - -extern const struct usb_mux_driver kb800x_usb_mux_driver; - -/* Set the protocol */ -#define KB800X_REG_PROTOCOL 0x0001 -#define KB800X_PROTOCOL_USB3 0x0 -#define KB800X_PROTOCOL_DPMF 0x1 -#define KB800X_PROTOCOL_DP 0x2 -#define KB800X_PROTOCOL_CIO 0x3 - -/* Configure the lane orientaitons */ -#define KB800X_REG_ORIENTATION 0x0002 -#define KB800X_ORIENTATION_POLARITY 0x1 -#define KB800X_ORIENTATION_DP_UFP 0x4 -#define KB800X_ORIENTATION_DP_DFP 0x6 -#define KB800X_ORIENTATION_CIO_LANE_SWAP 0x8 -/* Select one, 0x0 for non-legacy */ -#define KB800X_ORIENTATION_CIO_LEGACY_PASSIVE (0x1 << 4) -#define KB800X_ORIENTATION_CIO_LEGACY_UNIDIR (0x2 << 4) -#define KB800X_ORIENTATION_CIO_LEGACY_BIDIR (0x3 << 4) - -#define KB800X_REG_RESET 0x0006 -#define KB800X_RESET_FSM BIT(0) -#define KB800X_RESET_MM BIT(1) -#define KB800X_RESET_SERDES BIT(2) -#define KB800X_RESET_COM BIT(3) -#define KB800X_RESET_MASK GENMASK(3, 0) - -#define KB800X_REG_XBAR_OVR 0x5040 -#define KB800X_XBAR_OVR_EN BIT(6) - -/* Registers to configure the elastic buffer input connection */ -#define KB800X_REG_XBAR_EB1SEL 0x5044 -#define KB800X_REG_XBAR_EB23SEL 0x5045 -#define KB800X_REG_XBAR_EB4SEL 0x5046 -#define KB800X_REG_XBAR_EB56SEL 0x5047 - -/* Registers to configure the elastic buffer output connection (x=0-7) */ -#define KB800X_REG_TXSEL_FROM_PHY(x) (0x5048+((x)/2)) - -enum kb800x_ss_lane { - KB800X_TX0 = 0, - KB800X_TX1, - KB800X_RX0, - KB800X_RX1 -}; - -enum kb800x_phy_lane { - KB800X_A0 = 0, - KB800X_A1, - KB800X_B0, - KB800X_B1, - KB800X_C0, - KB800X_C1, - KB800X_D0, - KB800X_D1, - KB800X_PHY_LANE_COUNT -}; - -enum kb800x_eb { - KB800X_EB1 = 0, - KB800X_EB2, - KB800X_EB3, - KB800X_EB4, - KB800X_EB5, - KB800X_EB6 -}; - -#define KB800X_FLIP_SS_LANE(x) ((x) + 1 - 2*((x) & 0x1)) -#define KB800X_LANE_NUMBER_FROM_PHY(x) ((x) & 0x1) -#define KB800X_PHY_IS_AB(x) ((x) <= KB800X_B1) - -struct kb800x_control_t { - enum gpio_signal retimer_rst_gpio; - enum gpio_signal usb_ls_en_gpio; -#ifdef CONFIG_KB800X_CUSTOM_XBAR - enum kb800x_ss_lane ss_lanes[KB800X_PHY_LANE_COUNT]; -#endif /* CONFIG_KB800X_CUSTOM_XBAR */ -}; - -/* - * Default 'example' lane mapping. With this mapping, CONFIG_KB800X_CUSTOM_XBAR - * can be undefined, since a custom xbar mapping is not needed. - * ss_lanes = { - * [KB800X_A0] = KB800X_TX0, [KB800X_A1] = KB800X_RX0, - * [KB800X_B0] = KB800X_RX1, [KB800X_B1] = KB800X_TX1, - * [KB800X_C0] = KB800X_RX0, [KB800X_C1] = KB800X_TX0, - * [KB800X_D0] = KB800X_TX1, [KB800X_D1] = KB800X_RX1,} - */ - -extern struct kb800x_control_t kb800x_control[]; - - -#endif /* __CROS_EC_KB800X_H */ diff --git a/driver/retimer/nb7v904m.c b/driver/retimer/nb7v904m.c deleted file mode 100644 index 94e96230b2..0000000000 --- a/driver/retimer/nb7v904m.c +++ /dev/null @@ -1,228 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * ON Semiconductor NB7V904M USB Type-C DisplayPort Alt Mode Redriver - */ -#include <stdbool.h> -#include "common.h" -#include "console.h" -#include "ec_commands.h" -#include "i2c.h" -#include "nb7v904m.h" -#include "usb_mux.h" - -#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) - -#ifdef CONFIG_NB7V904M_LPM_OVERRIDE -int nb7v904m_lpm_disable = 0; -#endif - -static int nb7v904m_write(const struct usb_mux *me, int offset, int data) -{ - return i2c_write8(me->i2c_port, - me->i2c_addr_flags, - offset, data); - -} - -static int nb7v904m_read(const struct usb_mux *me, int offset, int *regval) -{ - return i2c_read8(me->i2c_port, - me->i2c_addr_flags, - offset, regval); - -} - -static int set_low_power_mode(const struct usb_mux *me, bool enable) -{ - int regval; - int rv; - - rv = nb7v904m_read(me, NB7V904M_REG_GEN_DEV_SETTINGS, ®val); - if (rv) - return rv; -#ifdef CONFIG_NB7V904M_LPM_OVERRIDE - if (nb7v904m_lpm_disable) - enable = 0; -#endif - - if (enable) - regval &= ~NB7V904M_CHIP_EN; - else - regval |= NB7V904M_CHIP_EN; - - return nb7v904m_write(me, NB7V904M_REG_GEN_DEV_SETTINGS, regval); -} - -static int nb7v904m_enter_low_power_mode(const struct usb_mux *me) -{ - int rv = set_low_power_mode(me, 1); - - if (rv) - CPRINTS("C%d: NB7V904M: Failed to enter low power mode!", - me->usb_port); - return rv; -} - -/* Tune USB Eq All: This must be called on board_init context */ -int nb7v904m_tune_usb_set_eq(const struct usb_mux *me, uint8_t eq_a, - uint8_t eq_b, uint8_t eq_c, uint8_t eq_d) -{ - int rv = EC_SUCCESS; - - if (eq_a != NB7V904M_CH_ALL_SKIP_EQ) - rv = nb7v904m_write(me, NB7V904M_REG_CH_A_EQ_SETTINGS, eq_a); - - if (eq_b != NB7V904M_CH_ALL_SKIP_EQ) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_B_EQ_SETTINGS, eq_b); - - if (eq_c != NB7V904M_CH_ALL_SKIP_EQ) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_C_EQ_SETTINGS, eq_c); - - if (eq_d != NB7V904M_CH_ALL_SKIP_EQ) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_D_EQ_SETTINGS, eq_d); - - return rv; -} - -/* Tune USB Flat Gain: This must be called on board_init context */ -int nb7v904m_tune_usb_flat_gain(const struct usb_mux *me, uint8_t gain_a, - uint8_t gain_b, uint8_t gain_c, uint8_t gain_d) -{ - int rv = EC_SUCCESS; - - if (gain_a != NB7V904M_CH_ALL_SKIP_GAIN) - rv = nb7v904m_write(me, NB7V904M_REG_CH_A_FLAT_GAIN, gain_a); - - if (gain_b != NB7V904M_CH_ALL_SKIP_GAIN) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_B_FLAT_GAIN, gain_b); - - if (gain_c != NB7V904M_CH_ALL_SKIP_GAIN) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_C_FLAT_GAIN, gain_c); - - if (gain_d != NB7V904M_CH_ALL_SKIP_GAIN) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_D_FLAT_GAIN, gain_d); - - return rv; -} - -/* Set Loss Profile Matching : This must be called on board_init context */ -int nb7v904m_set_loss_profile_match(const struct usb_mux *me, uint8_t loss_a, - uint8_t loss_b, uint8_t loss_c, uint8_t loss_d) -{ - int rv = EC_SUCCESS; - - if (loss_a != NB7V904M_CH_ALL_SKIP_LOSS) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_A_LOSS_CTRL, loss_a); - - if (loss_b != NB7V904M_CH_ALL_SKIP_LOSS) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_B_LOSS_CTRL, loss_b); - - if (loss_c != NB7V904M_CH_ALL_SKIP_LOSS) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_C_LOSS_CTRL, loss_c); - - if (loss_d != NB7V904M_CH_ALL_SKIP_LOSS) - rv |= nb7v904m_write(me, NB7V904M_REG_CH_D_LOSS_CTRL, loss_d); - - return rv; -} - -/* Set AUX control switch */ -int nb7v904m_set_aux_ch_switch(const struct usb_mux *me, uint8_t aux_ch) -{ - int rv = EC_SUCCESS; - - rv = nb7v904m_write(me, NB7V904M_REG_AUX_CH_CTRL, aux_ch); - return rv; -} - -static int nb7v904m_init(const struct usb_mux *me) -{ - int rv = set_low_power_mode(me, 0); - - if (rv) - CPRINTS("C%d: NB7V904M: init failed!", me->usb_port); - return rv; -} - -static int nb7v904m_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int rv = EC_SUCCESS; - int regval; - int flipped = !!(mux_state & USB_PD_MUX_POLARITY_INVERTED); - - /* This driver does not use host command ACKs */ - *ack_required = false; - - /* Turn off redriver if it's not needed at all. */ - if (mux_state == USB_PD_MUX_NONE) - return nb7v904m_enter_low_power_mode(me); - - rv = nb7v904m_init(me); - if (rv) - return rv; - - /* Clear operation mode field */ - rv = nb7v904m_read(me, NB7V904M_REG_GEN_DEV_SETTINGS, ®val); - if (rv) { - CPRINTS("C%d %s: Failed to obtain dev settings!", - me->usb_port, __func__); - return rv; - } - regval &= ~NB7V904M_OP_MODE_MASK; - - if (mux_state & USB_PD_MUX_USB_ENABLED) { - /* USB with DP */ - if (mux_state & USB_PD_MUX_DP_ENABLED) { - if (flipped) - regval |= NB7V904M_USB_DP_FLIPPED; - else - regval |= NB7V904M_USB_DP_NORMAL; - } else { - /* USB only */ - regval |= NB7V904M_USB_ONLY; - } - - } else if (mux_state & USB_PD_MUX_DP_ENABLED) { - /* 4 lanes DP */ - regval |= NB7V904M_DP_ONLY; - } - - if (mux_state & USB_PD_MUX_DP_ENABLED) { - /* Connect AUX */ - rv = nb7v904m_write(me, NB7V904M_REG_AUX_CH_CTRL, flipped ? - NB7V904M_AUX_CH_FLIPPED : - NB7V904M_AUX_CH_NORMAL); - /* Enable all channels for DP */ - regval |= NB7V904M_CH_EN_MASK; - } else { - /* Disconnect AUX since it's not being used. */ - rv = nb7v904m_write(me, NB7V904M_REG_AUX_CH_CTRL, - NB7V904M_AUX_CH_HI_Z); - - /* Disable the unused channels to save power */ - regval &= ~NB7V904M_CH_EN_MASK; - if (flipped) { - /* Only enable channels A & B */ - regval |= NB7V904M_CH_A_EN | NB7V904M_CH_B_EN; - } else { - /* Only enable channels C & D */ - regval |= NB7V904M_CH_C_EN | NB7V904M_CH_D_EN; - } - } - - rv |= nb7v904m_write(me, NB7V904M_REG_GEN_DEV_SETTINGS, regval); - if (rv) - CPRINTS("C%d: %s failed!", me->usb_port, __func__); - - return rv; -} - -const struct usb_mux_driver nb7v904m_usb_redriver_drv = { - .enter_low_power_mode = &nb7v904m_enter_low_power_mode, - .init = &nb7v904m_init, - .set = &nb7v904m_set_mux, -}; diff --git a/driver/retimer/nb7v904m.h b/driver/retimer/nb7v904m.h deleted file mode 100644 index d19602153c..0000000000 --- a/driver/retimer/nb7v904m.h +++ /dev/null @@ -1,133 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * ON Semiconductor NB7V904M USB Type-C DisplayPort Alt Mode Redriver - */ - -#ifndef __CROS_EC_USB_REDRIVER_NB7V904M_H -#define __CROS_EC_USB_REDRIVER_NB7V904M_H - -#include "compile_time_macros.h" -#include "usb_mux.h" - -#define NB7V904M_I2C_ADDR0 0x19 -#define NB7V904M_I2C_ADDR1 0x1A -#define NB7V904M_I2C_ADDR2 0x1C - -/* Registers */ -#define NB7V904M_REG_GEN_DEV_SETTINGS 0x00 -#define NB7V904M_REG_CH_A_EQ_SETTINGS 0x01 -#define NB7V904M_REG_CH_B_EQ_SETTINGS 0x03 -#define NB7V904M_REG_CH_C_EQ_SETTINGS 0x05 -#define NB7V904M_REG_CH_D_EQ_SETTINGS 0x07 -#define NB7V904M_REG_AUX_CH_CTRL 0x09 -#define NB7V904M_REG_CH_A_FLAT_GAIN 0x18 -#define NB7V904M_REG_CH_A_LOSS_CTRL 0x19 -#define NB7V904M_REG_CH_B_FLAT_GAIN 0x1a -#define NB7V904M_REG_CH_B_LOSS_CTRL 0x1b -#define NB7V904M_REG_CH_C_FLAT_GAIN 0x1c -#define NB7V904M_REG_CH_C_LOSS_CTRL 0x1d -#define NB7V904M_REG_CH_D_FLAT_GAIN 0x1e -#define NB7V904M_REG_CH_D_LOSS_CTRL 0x1f - -/* 0x00 - General Device Settings */ -#define NB7V904M_CHIP_EN BIT(0) -#define NB7V904M_USB_DP_NORMAL BIT(1) -#define NB7V904M_USB_DP_FLIPPED 0 -#define NB7V904M_DP_ONLY BIT(2) -#define NB7V904M_USB_ONLY (BIT(3) | BIT(1)) -#define NB7V904M_OP_MODE_MASK GENMASK(3, 1) -#define NB7V904M_CH_A_EN BIT(4) -#define NB7V904M_CH_B_EN BIT(5) -#define NB7V904M_CH_C_EN BIT(6) -#define NB7V904M_CH_D_EN BIT(7) -#define NB7V904M_CH_EN_MASK GENMASK(7, 4) - -/* 0x01 - Channel A Equalization Settings */ -#define NB7V904M_CH_A_EQ_0_DB 0x0a -#define NB7V904M_CH_A_EQ_2_DB 0x08 -#define NB7V904M_CH_A_EQ_4_DB 0x0e -#define NB7V904M_CH_A_EQ_6_DB 0x0c -#define NB7V904M_CH_A_EQ_8_DB 0x02 -#define NB7V904M_CH_A_EQ_10_DB 0x00 - -/* 0x03 - Channel B Equalization Settings */ -#define NB7V904M_CH_B_EQ_0_DB 0x0e -#define NB7V904M_CH_B_EQ_2_DB 0x0c -#define NB7V904M_CH_B_EQ_4_DB 0x0a -#define NB7V904M_CH_B_EQ_6_DB 0x08 -#define NB7V904M_CH_B_EQ_8_DB 0x06 -#define NB7V904M_CH_B_EQ_10_DB 0x00 - -/* 0x05 - Channel C Equalization Settings */ -#define NB7V904M_CH_C_EQ_0_DB 0x0e -#define NB7V904M_CH_C_EQ_2_DB 0x0c -#define NB7V904M_CH_C_EQ_4_DB 0x0a -#define NB7V904M_CH_C_EQ_6_DB 0x08 -#define NB7V904M_CH_C_EQ_8_DB 0x06 -#define NB7V904M_CH_C_EQ_10_DB 0x00 - -/* 0x07 - Channel D Equalization Settings */ -#define NB7V904M_CH_D_EQ_0_DB 0x0a -#define NB7V904M_CH_D_EQ_2_DB 0x08 -#define NB7V904M_CH_D_EQ_4_DB 0x0e -#define NB7V904M_CH_D_EQ_6_DB 0x0c -#define NB7V904M_CH_D_EQ_8_DB 0x02 -#define NB7V904M_CH_D_EQ_10_DB 0x00 - -/* 0x09 - Auxiliary Channel Control */ -#define NB7V904M_AUX_CH_NORMAL 0 -#define NB7V904M_AUX_CH_FLIPPED BIT(0) -#define NB7V904M_AUX_CH_HI_Z BIT(1) - -/* 0x18 - Channel A Flag Gain */ -#define NB7V904M_CH_A_GAIN_0_DB 0x00 -#define NB7V904M_CH_A_GAIN_1P5_DB 0x02 -#define NB7V904M_CH_A_GAIN_3P5_DB 0x03 - -/* 0x1a - Channel B Flag Gain */ -#define NB7V904M_CH_B_GAIN_0_DB 0x03 -#define NB7V904M_CH_B_GAIN_1P5_DB 0x01 -#define NB7V904M_CH_B_GAIN_3P5_DB 0x00 - -/* 0x1c - Channel C Flag Gain */ -#define NB7V904M_CH_C_GAIN_0_DB 0x03 -#define NB7V904M_CH_C_GAIN_1P5_DB 0x01 -#define NB7V904M_CH_C_GAIN_3P5_DB 0x00 - -/* 0x1e - Channel D Flag Gain */ -#define NB7V904M_CH_D_GAIN_0_DB 0x00 -#define NB7V904M_CH_D_GAIN_1P5_DB 0x02 -#define NB7V904M_CH_D_GAIN_3P5_DB 0x03 - -/* 0x19 - Channel A Loss Profile Matching Control */ -/* 0x1b - Channel B Loss Profile Matching Control */ -/* 0x1d - Channel C Loss Profile Matching Control */ -/* 0x1f - Channel D Loss Profile Matching Control */ -#define NB7V904M_LOSS_PROFILE_A 0x00 -#define NB7V904M_LOSS_PROFILE_B 0x01 -#define NB7V904M_LOSS_PROFILE_C 0x02 -#define NB7V904M_LOSS_PROFILE_D 0x03 - -extern const struct usb_mux_driver nb7v904m_usb_redriver_drv; -#ifdef CONFIG_NB7V904M_LPM_OVERRIDE -extern int nb7v904m_lpm_disable; -#endif - -/* Use this value if tuning eq wants to be skipped */ -#define NB7V904M_CH_ALL_SKIP_EQ 0xff -int nb7v904m_tune_usb_set_eq(const struct usb_mux *me, uint8_t eq_a, - uint8_t eq_b, uint8_t eq_c, uint8_t eq_d); -/* Use this value if tuning gain wants to be skipped */ -#define NB7V904M_CH_ALL_SKIP_GAIN 0xff -int nb7v904m_tune_usb_flat_gain(const struct usb_mux *me, uint8_t gain_a, - uint8_t gain_b, uint8_t gain_c, uint8_t gain_d); -/* Use this value if loss profile control wants to be skipped */ -#define NB7V904M_CH_ALL_SKIP_LOSS 0xff -/* Control channel Loss Profile Matching */ -int nb7v904m_set_loss_profile_match(const struct usb_mux *me, uint8_t loss_a, - uint8_t loss_b, uint8_t loss_c, uint8_t loss_d); -/* Control mapping between AUX and SBU */ -int nb7v904m_set_aux_ch_switch(const struct usb_mux *me, uint8_t aux_ch); -#endif /* __CROS_EC_USB_REDRIVER_NB7V904M_H */ diff --git a/driver/retimer/pi3dpx1207.c b/driver/retimer/pi3dpx1207.c deleted file mode 100644 index 8829c508a1..0000000000 --- a/driver/retimer/pi3dpx1207.c +++ /dev/null @@ -1,146 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PI3DPX1207 retimer. - */ - -#include "pi3dpx1207.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "i2c.h" -#include "ioexpander.h" -#include "usb_mux.h" - -#define I2C_MAX_RETRIES 2 - -/* Stack space is limited, so put the buffer somewhere else */ -static uint8_t buf[PI3DPX1207_NUM_REGISTERS]; - -/** - * Local utility functions - */ -static int pi3dpx1207_i2c_write(const struct usb_mux *me, - uint8_t offset, - uint8_t val) -{ - int rv = EC_SUCCESS; - int attempt; - - if (offset >= PI3DPX1207_NUM_REGISTERS) - return EC_ERROR_INVAL; - - /* - * PI3DPX1207 does not support device register offset in - * the typical I2C sense. Have to read the values starting - * from 0, modify the byte and then write the block. - * - * NOTE: The device may not respond correctly if it was - * just powered or has gone to sleep. Allow for retries - * in case this happens. - */ - if (offset > 0) { - attempt = 0; - do { - attempt++; - rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, - NULL, 0, buf, offset); - } while ((rv != EC_SUCCESS) && (attempt < I2C_MAX_RETRIES)); - } - - if (rv == EC_SUCCESS) { - buf[offset] = val; - - attempt = 0; - do { - attempt++; - rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, - buf, offset + 1, NULL, 0); - } while ((rv != EC_SUCCESS) && (attempt < I2C_MAX_RETRIES)); - } - return rv; -} - -static void pi3dpx1207_shutoff_power(const struct usb_mux *me) -{ - const int port = me->usb_port; - const int gpio_enable = pi3dpx1207_controls[port].enable_gpio; - const int gpio_dp_enable = pi3dpx1207_controls[port].dp_enable_gpio; - - gpio_or_ioex_set_level(gpio_enable, 0); - gpio_or_ioex_set_level(gpio_dp_enable, 0); -} - -/** - * Driver interface code - */ -static int pi3dpx1207_init(const struct usb_mux *me) -{ - const int port = me->usb_port; - const int gpio_enable = pi3dpx1207_controls[port].enable_gpio; - - gpio_or_ioex_set_level(gpio_enable, 1); - return EC_SUCCESS; -} - -static int pi3dpx1207_enter_low_power_mode(const struct usb_mux *me) -{ - pi3dpx1207_shutoff_power(me); - return EC_SUCCESS; -} - -static int pi3dpx1207_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int rv = EC_SUCCESS; - uint8_t mode_val = PI3DPX1207_MODE_WATCHDOG_EN; - const int port = me->usb_port; - const int gpio_enable = pi3dpx1207_controls[port].enable_gpio; - const int gpio_dp_enable = pi3dpx1207_controls[port].dp_enable_gpio; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - /* USB */ - if (mux_state & USB_PD_MUX_USB_ENABLED) { - gpio_or_ioex_set_level(gpio_enable, 1); - /* USB with DP */ - if (mux_state & USB_PD_MUX_DP_ENABLED) { - gpio_or_ioex_set_level(gpio_dp_enable, 1); - mode_val |= (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? PI3DPX1207_MODE_CONF_USB_DP_FLIP - : PI3DPX1207_MODE_CONF_USB_DP; - } - /* USB without DP */ - else { - gpio_or_ioex_set_level(gpio_dp_enable, 0); - mode_val |= (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? PI3DPX1207_MODE_CONF_USB_FLIP - : PI3DPX1207_MODE_CONF_USB; - } - } - /* DP without USB */ - else if (mux_state & USB_PD_MUX_DP_ENABLED) { - gpio_or_ioex_set_level(gpio_enable, 1); - gpio_or_ioex_set_level(gpio_dp_enable, 1); - mode_val |= (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? PI3DPX1207_MODE_CONF_DP_FLIP - : PI3DPX1207_MODE_CONF_DP; - } - /* Nothing enabled, power down the retimer */ - else { - pi3dpx1207_shutoff_power(me); - return EC_SUCCESS; - } - - /* Write the retimer config byte */ - rv = pi3dpx1207_i2c_write(me, PI3DPX1207_MODE_OFFSET, mode_val); - return rv; -} - -const struct usb_mux_driver pi3dpx1207_usb_retimer = { - .init = pi3dpx1207_init, - .set = pi3dpx1207_set_mux, - .enter_low_power_mode = pi3dpx1207_enter_low_power_mode, -}; diff --git a/driver/retimer/pi3dpx1207.h b/driver/retimer/pi3dpx1207.h deleted file mode 100644 index 2e3405d1aa..0000000000 --- a/driver/retimer/pi3dpx1207.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PI3DPX1207 retimer. - */ -#include "gpio.h" - -#ifndef __CROS_EC_USB_RETIMER_PI3PDX1207_H -#define __CROS_EC_USB_RETIMER_PI3PDX1207_H - -#define PI3DPX1207_I2C_ADDR_FLAGS 0x57 -#define PI3DPX1207_NUM_REGISTERS 32 - -/* Register Offset 0 - Revision and Vendor ID */ -#define PI3DPX1207_VID_OFFSET 0 - -#define PI3DPX1207B_VID 0x03 -#define PI3DPX1207C_VID 0x13 - -/* Register Offset 1 - Device Type/ID */ -#define PI3DPX1207_DID_OFFSET 1 - -#define PI3DPX1207_DID_ACTIVE_MUX 0x11 - -/* Register Offset 3 - Mode Control */ -#define PI3DPX1207_MODE_OFFSET 3 - -#define PI3DPX1207_MODE_WATCHDOG_EN 0x02 - -#define PI3DPX1207B_MODE_GEN_APP_EN 0x08 - -#define PI3DPX1207_MODE_CONF_SAFE 0x00 -#define PI3DPX1207_MODE_CONF_DP 0x20 -#define PI3DPX1207_MODE_CONF_DP_FLIP 0x30 -#define PI3DPX1207_MODE_CONF_USB 0x40 -#define PI3DPX1207_MODE_CONF_USB_FLIP 0x50 -#define PI3DPX1207_MODE_CONF_USB_DP 0x60 -#define PI3DPX1207_MODE_CONF_USB_DP_FLIP 0x70 -#define PI3DPX1207_MODE_CONF_USB_SUPER 0xC0 - -/* Supported USB retimer drivers */ -extern const struct usb_mux_driver pi3dpx1207_usb_retimer; - -/* Retimer driver hardware specific controls */ -struct pi3dpx1207_usb_control { - /* Retimer enable */ - const enum gpio_signal enable_gpio; - /* DP Mode enable */ - const enum gpio_signal dp_enable_gpio; -}; -extern const struct pi3dpx1207_usb_control pi3dpx1207_controls[]; - -#endif /* __CROS_EC_USB_RETIMER_PI3PDX1207_H */ diff --git a/driver/retimer/pi3hdx1204.c b/driver/retimer/pi3hdx1204.c deleted file mode 100644 index 3b0d80609f..0000000000 --- a/driver/retimer/pi3hdx1204.c +++ /dev/null @@ -1,37 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PI3HDX1204 retimer. - */ - -#include "i2c.h" -#include "pi3hdx1204.h" - -int pi3hdx1204_enable(const int i2c_port, - const uint16_t i2c_addr_flags, - const int enable) -{ - const uint8_t buf[PI3HDX1204_DE_OFFSET + 1] = { - [PI3HDX1204_ACTIVITY_OFFSET] = 0, /* Read Only */ - [PI3HDX1204_NOT_USED_OFFSET] = 0, /* Read Only */ - [PI3HDX1204_ENABLE_OFFSET] = - enable ? PI3HDX1204_ENABLE_ALL_CHANNELS : 0, - [PI3HDX1204_EQ_CH0_CH1_OFFSET] = - pi3hdx1204_tuning.eq_ch0_ch1_offset, - [PI3HDX1204_EQ_CH2_CH3_OFFSET] = - pi3hdx1204_tuning.eq_ch2_ch3_offset, - [PI3HDX1204_VOD_OFFSET] = pi3hdx1204_tuning.vod_offset, - [PI3HDX1204_DE_OFFSET] = pi3hdx1204_tuning.de_offset, - }; - int rv; - - rv = i2c_xfer(i2c_port, i2c_addr_flags, - buf, PI3HDX1204_DE_OFFSET + 1, - NULL, 0); - - if (rv) - ccprints("pi3hdx1204 enable failed: %d", rv); - - return rv; -} diff --git a/driver/retimer/pi3hdx1204.h b/driver/retimer/pi3hdx1204.h deleted file mode 100644 index 825f502602..0000000000 --- a/driver/retimer/pi3hdx1204.h +++ /dev/null @@ -1,77 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PI3HDX1204 retimer. - */ - -#ifndef __CROS_EC_USB_RETIMER_PI3HDX1204_H -#define __CROS_EC_USB_RETIMER_PI3HDX1204_H - -#define PI3HDX1204_I2C_ADDR_FLAGS 0x60 - -/* Register Offset 0 - Activity */ -#define PI3HDX1204_ACTIVITY_OFFSET 0 - -/* Register Offset 1 - Not Used */ -#define PI3HDX1204_NOT_USED_OFFSET 1 - -/* Register Offset 2 - Enable */ -#define PI3HDX1204_ENABLE_OFFSET 2 -#define PI3HDX1204_ENABLE_ALL_CHANNELS 0xF0 - -/* Register Offset 3 - EQ setting BIT7-4:CH1, BIT3-0:CH0 */ -#define PI3HDX1204_EQ_CH0_CH1_OFFSET 3 - -/* Register Offset 4 - EQ setting BIT7-4:CH3, BIT3-0:CH2 */ -#define PI3HDX1204_EQ_CH2_CH3_OFFSET 4 - -/* EQ setting for two channel */ -#define PI3HDX1204_EQ_DB25 0x00 -#define PI3HDX1204_EQ_DB80 0x11 -#define PI3HDX1204_EQ_DB110 0x22 -#define PI3HDX1204_EQ_DB220 0x33 -#define PI3HDX1204_EQ_DB410 0x44 -#define PI3HDX1204_EQ_DB710 0x55 -#define PI3HDX1204_EQ_DB900 0x66 -#define PI3HDX1204_EQ_DB1030 0x77 -#define PI3HDX1204_EQ_DB1180 0x88 -#define PI3HDX1204_EQ_DB1390 0x99 -#define PI3HDX1204_EQ_DB1530 0xAA -#define PI3HDX1204_EQ_DB1690 0xBB -#define PI3HDX1204_EQ_DB1790 0xCC -#define PI3HDX1204_EQ_DB1920 0xDD -#define PI3HDX1204_EQ_DB2050 0xEE -#define PI3HDX1204_EQ_DB2220 0xFF - -/* Register Offset 5 - Output Voltage Swing Setting */ -#define PI3HDX1204_VOD_OFFSET 5 -#define PI3HDX1204_VOD_80_ALL_CHANNELS 0x00 -#define PI3HDX1204_VOD_95_ALL_CHANNELS 0x55 -#define PI3HDX1204_VOD_115_ALL_CHANNELS 0xAA -#define PI3HDX1204_VOD_130_ALL_CHANNELS 0xFF - -/* Register Offset 6 - Output De-emphasis Setting */ -#define PI3HDX1204_DE_OFFSET 6 -#define PI3HDX1204_DE_DB_0 0x00 -#define PI3HDX1204_DE_DB_MINUS5 0x55 -#define PI3HDX1204_DE_DB_MINUS7 0xAA -#define PI3HDX1204_DE_DB_MINUS10 0xFF - -/* Delay for I2C to be ready after power on. */ -#define PI3HDX1204_POWER_ON_DELAY_MS 2 - -/* Enable or disable the PI3HDX1204. */ -int pi3hdx1204_enable(const int i2c_port, - const uint16_t i2c_addr_flags, - const int enable); - -struct pi3hdx1204_tuning { - uint8_t eq_ch0_ch1_offset; - uint8_t eq_ch2_ch3_offset; - uint8_t vod_offset; - uint8_t de_offset; -}; -extern const struct pi3hdx1204_tuning pi3hdx1204_tuning; - -#endif /* __CROS_EC_USB_RETIMER_PI3HDX1204_H */ diff --git a/driver/retimer/ps8802.c b/driver/retimer/ps8802.c deleted file mode 100644 index 9738123ace..0000000000 --- a/driver/retimer/ps8802.c +++ /dev/null @@ -1,317 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8802 retimer. - */ - -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "i2c.h" -#include "ps8802.h" -#include "timer.h" -#include "usb_mux.h" - -#define PS8802_DEBUG 0 -#define PS8802_I2C_WAKE_DELAY 500 - -#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) - -int ps8802_i2c_read(const struct usb_mux *me, int page, int offset, int *data) -{ - int rv; - - rv = i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - if (PS8802_DEBUG) - ccprintf("%s(%d:0x%02X, 0x%02X) =>0x%02X\n", __func__, - me->i2c_port, - me->i2c_addr_flags + page, - offset, *data); - - return rv; -} - -int ps8802_i2c_write(const struct usb_mux *me, int page, int offset, int data) -{ - int rv; - int pre_val, post_val; - - if (PS8802_DEBUG) - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_write8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - if (PS8802_DEBUG) { - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%02X) " - "0x%02X=>0x%02X\n", - __func__, - me->i2c_port, - me->i2c_addr_flags + page, - offset, data, - pre_val, post_val); - } - - return rv; -} - -int ps8802_i2c_write16(const struct usb_mux *me, int page, int offset, - int data) -{ - int rv; - int pre_val, post_val; - - if (PS8802_DEBUG) - i2c_read16(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_write16(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - if (PS8802_DEBUG) { - i2c_read16(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%04X) " - "0x%04X=>0x%04X\n", - __func__, - me->i2c_port, - me->i2c_addr_flags + page, - offset, data, - pre_val, post_val); - } - - return rv; -} - -int ps8802_i2c_field_update8(const struct usb_mux *me, int page, int offset, - uint8_t field_mask, uint8_t set_value) -{ - int rv; - int pre_val, post_val; - - if (PS8802_DEBUG) - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_field_update8(me->i2c_port, - me->i2c_addr_flags + page, - offset, - field_mask, - set_value); - - if (PS8802_DEBUG) { - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%02X, 0x%02X) " - "0x%02X=>0x%02X\n", - __func__, - me->i2c_port, - me->i2c_addr_flags + page, - offset, field_mask, set_value, - pre_val, post_val); - } - - return rv; -} - -int ps8802_i2c_field_update16(const struct usb_mux *me, int page, int offset, - uint16_t field_mask, uint16_t set_value) -{ - int rv; - int pre_val, post_val; - - if (PS8802_DEBUG) - i2c_read16(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_field_update16(me->i2c_port, - me->i2c_addr_flags + page, - offset, - field_mask, - set_value); - - if (PS8802_DEBUG) { - i2c_read16(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%02X, 0x%04X) " - "0x%04X=>0x%04X\n", - __func__, - me->i2c_port, - me->i2c_addr_flags + page, - offset, field_mask, set_value, - pre_val, post_val); - } - - return rv; -} - -/* - * If PS8802 is in I2C standby mode, wake it up by reading PS8802_REG_MODE. - * From Application Note: 1) Activate by reading any Page 2 register. 2) Wait - * 500 microseconds. 3) After 5 seconds idle, PS8802 will return to standby. - */ -int ps8802_i2c_wake(const struct usb_mux *me) -{ - int data; - int rv = EC_ERROR_UNKNOWN; - - /* If in standby, first read will fail, second should succeed. */ - for (int i = 0; i < 2; i++) { - rv = ps8802_i2c_read(me, - PS8802_REG_PAGE2, - PS8802_REG2_MODE, - &data); - if (rv == EC_SUCCESS) - return rv; - - usleep(PS8802_I2C_WAKE_DELAY); - } - - return rv; -} - -/* - * Setting operation mode to standby mode - */ -static int ps8802_enter_low_power_mode(const struct usb_mux *me) -{ - int rv; - - rv = ps8802_i2c_write(me, PS8802_REG_PAGE2, PS8802_REG2_MODE, - PS8802_MODE_STANDBY_MODE); - - if (rv) - CPRINTS("C%d: PS8802: Failed to enter low power mode!", - me->usb_port); - - return rv; -} - -static int ps8802_init(const struct usb_mux *me) -{ - ps8802_enter_low_power_mode(me); - return EC_SUCCESS; -} - -static int ps8802_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int val; - int rv; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - return (mux_state == USB_PD_MUX_NONE) ? EC_SUCCESS - : EC_ERROR_NOT_POWERED; - - /* Make sure the PS8802 is awake */ - rv = ps8802_i2c_wake(me); - if (rv) - return rv; - - if (PS8802_DEBUG) - ccprintf("%s(%d, 0x%02X) %s %s %s\n", - __func__, me->usb_port, mux_state, - (mux_state & USB_PD_MUX_USB_ENABLED) ? "USB" : "", - (mux_state & USB_PD_MUX_DP_ENABLED) ? "DP" : "", - (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? "FLIP" : ""); - - /* Set the mode and flip */ - val = (PS8802_MODE_DP_REG_CONTROL | - PS8802_MODE_USB_REG_CONTROL | - PS8802_MODE_FLIP_REG_CONTROL | - PS8802_MODE_IN_HPD_REG_CONTROL); - - if (mux_state & USB_PD_MUX_USB_ENABLED) - val |= PS8802_MODE_USB_ENABLE; - if (mux_state & USB_PD_MUX_DP_ENABLED) - val |= PS8802_MODE_DP_ENABLE | PS8802_MODE_IN_HPD_ENABLE; - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - val |= PS8802_MODE_FLIP_ENABLE; - - rv = ps8802_i2c_write(me, - PS8802_REG_PAGE2, - PS8802_REG2_MODE, - val); - - return rv; -} - -static int ps8802_get_mux(const struct usb_mux *me, mux_state_t *mux_state) -{ - int rv; - int val; - - *mux_state = USB_PD_MUX_NONE; - - if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - return EC_ERROR_NOT_POWERED; - - rv = ps8802_i2c_wake(me); - if (rv) - return rv; - - rv = ps8802_i2c_read(me, - PS8802_REG_PAGE2, - PS8802_REG2_MODE, - &val); - if (rv) - return rv; - - if (val & PS8802_MODE_USB_ENABLE) - *mux_state |= USB_PD_MUX_USB_ENABLED; - if (val & PS8802_MODE_DP_ENABLE) - *mux_state |= USB_PD_MUX_DP_ENABLED; - if (val & PS8802_MODE_FLIP_ENABLE) - *mux_state |= USB_PD_MUX_POLARITY_INVERTED; - - return rv; -} - -const struct usb_mux_driver ps8802_usb_mux_driver = { - .init = ps8802_init, - .set = ps8802_set_mux, - .get = ps8802_get_mux, - .enter_low_power_mode = &ps8802_enter_low_power_mode, -}; - -/* - * If PS8802 I2c address was conflicted, change - * the I2c address in page 0x0A, offset 0xB0 - * switch to 0x50 8-bit address - */ -int ps8802_chg_i2c_addr(int i2c_port) -{ - int rv; - - rv = i2c_write8(i2c_port, - PS8802_P1_ADDR, PS8802_ADDR_CFG, - PS8802_I2C_ADDR_FLAGS_ALT); - - return rv; -} diff --git a/driver/retimer/ps8802.h b/driver/retimer/ps8802.h deleted file mode 100644 index 858b83bfc7..0000000000 --- a/driver/retimer/ps8802.h +++ /dev/null @@ -1,114 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8802 retimer. - */ -#include "usb_mux.h" - -#ifndef __CROS_EC_USB_RETIMER_PS8802_H -#define __CROS_EC_USB_RETIMER_PS8802_H - -/* - * PS8802 uses 7-bit I2C addresses 0x08 to 0x17 (ADDR=L). - * Page 0 = 0x08, Page 1 = 0x09, Page 2 = 0x0A. - */ -#define PS8802_I2C_ADDR_FLAGS 0x08 - -/* - * PS8802 uses 7-bit I2C addresses 0x28 to 0x37. - * Page 0 = 0x028, Page 1 = 0x29, Page 2 = 0x2A. - */ -#define PS8802_I2C_ADDR_FLAGS_CUSTOM 0x28 - -/* - * PAGE 0 Register Definitions - */ -#define PS8802_REG_PAGE0 0x00 - -#define PS8802_REG0_TX_STATUS 0x72 -#define PS8802_REG0_RX_STATUS 0x76 -#define PS8802_STATUS_NORMAL_OPERATION BIT(7) -#define PS8802_STATUS_10_GBPS BIT(5) - -/* - * PAGE 1 Register Definitions - */ -#define PS8802_REG_PAGE1 0x01 - -#define PS8802_800MV_LEVEL_TUNING 0x8A -#define PS8802_EXTRA_SWING_LEVEL_P0_DEFAULT 0X00 -#define PS8802_EXTRA_SWING_LEVEL_P0_DOWN_1 0X01 -#define PS8802_EXTRA_SWING_LEVEL_P0_DOWN_2 0X02 -#define PS8802_EXTRA_SWING_LEVEL_P0_DOWN_3 0X03 -#define PS8802_EXTRA_SWING_LEVEL_P0_DOWN_4 0X04 -#define PS8802_EXTRA_SWING_LEVEL_P0_UP_1 0X05 -#define PS8802_EXTRA_SWING_LEVEL_P0_UP_2 0X06 -#define PS8802_EXTRA_SWING_LEVEL_P0_UP_3 0X07 -#define PS8802_EXTRA_SWING_LEVEL_P0_MASK 0X07 - -/* - * PAGE 2 Register Definitions - */ -#define PS8802_REG_PAGE2 0x02 - -#define PS8802_REG2_USB_SSEQ_LEVEL 0x02 -#define PS8802_REG2_USB_CEQ_LEVEL 0x04 -#define PS8802_USBEQ_LEVEL_UP_12DB (0x0000 | 0x0003) -#define PS8802_USBEQ_LEVEL_UP_13DB (0x0400 | 0x0007) -#define PS8802_USBEQ_LEVEL_UP_16DB (0x0C00 | 0x000F) -#define PS8802_USBEQ_LEVEL_UP_17DB (0x1C00 | 0x001F) -#define PS8802_USBEQ_LEVEL_UP_18DB (0x3C00 | 0x003F) -#define PS8802_USBEQ_LEVEL_UP_19DB (0x7C00 | 0x007F) -#define PS8802_USBEQ_LEVEL_UP_20DB (0xFC00 | 0x00FF) -#define PS8802_USBEQ_LEVEL_UP_23DB (0xFD00 | 0x01FF) -#define PS8802_USBEQ_LEVEL_UP_MASK 0xFDFF - -#define PS8802_REG2_MODE 0x06 -#define PS8802_MODE_DP_REG_CONTROL BIT(7) -#define PS8802_MODE_DP_ENABLE BIT(6) -#define PS8802_MODE_USB_REG_CONTROL BIT(5) -#define PS8802_MODE_USB_ENABLE BIT(4) -#define PS8802_MODE_FLIP_REG_CONTROL BIT(3) -#define PS8802_MODE_FLIP_ENABLE BIT(2) -#define PS8802_MODE_IN_HPD_REG_CONTROL BIT(1) -#define PS8802_MODE_IN_HPD_ENABLE BIT(0) - -/* - * Support power saving mode, Bit7 Disable - * CE_DP, Bit5 Disable CE_USB, Bit3 Disable - * FLIP pin, Bit1 Display IN_HPD pin, [Bit6 Bit4] - * 00: I2C standy by mode. - */ -#define PS8802_MODE_STANDBY_MODE 0xAA - -#define PS8802_REG2_DPEQ_LEVEL 0x07 -#define PS8802_DPEQ_LEVEL_UP_9DB 0x00 -#define PS8802_DPEQ_LEVEL_UP_11DB 0x01 -#define PS8802_DPEQ_LEVEL_UP_12DB 0x02 -#define PS8802_DPEQ_LEVEL_UP_14DB 0x03 -#define PS8802_DPEQ_LEVEL_UP_17DB 0x04 -#define PS8802_DPEQ_LEVEL_UP_18DB 0x05 -#define PS8802_DPEQ_LEVEL_UP_19DB 0x06 -#define PS8802_DPEQ_LEVEL_UP_20DB 0x07 -#define PS8802_DPEQ_LEVEL_UP_21DB 0x08 -#define PS8802_DPEQ_LEVEL_UP_MASK 0x0F - -#define PS8802_P1_ADDR 0x0A -#define PS8802_ADDR_CFG 0xB0 -#define PS8802_I2C_ADDR_FLAGS_ALT 0x50 - -extern const struct usb_mux_driver ps8802_usb_mux_driver; - -int ps8802_i2c_wake(const struct usb_mux *me); -int ps8802_i2c_read(const struct usb_mux *me, int page, int offset, int *data); -int ps8802_i2c_write(const struct usb_mux *me, int page, int offset, int data); -int ps8802_i2c_write16(const struct usb_mux *me, int page, int offset, - int data); -int ps8802_i2c_field_update8(const struct usb_mux *me, int page, int offset, - uint8_t field_mask, uint8_t set_value); -int ps8802_i2c_field_update16(const struct usb_mux *me, int page, int offset, - uint16_t field_mask, uint16_t set_value); -int ps8802_chg_i2c_addr(int i2c_port); - -#endif /* __CROS_EC_USB_RETIMER_PS8802_H */ diff --git a/driver/retimer/ps8811.c b/driver/retimer/ps8811.c deleted file mode 100644 index 6a66248d38..0000000000 --- a/driver/retimer/ps8811.c +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8811 retimer. - */ - -#include "common.h" -#include "console.h" -#include "i2c.h" -#include "ps8811.h" -#include "usb_mux.h" - -int ps8811_i2c_read(const struct usb_mux *me, int page, int offset, int *data) -{ - int rv; - - rv = i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - return rv; -} - -int ps8811_i2c_write(const struct usb_mux *me, int page, int offset, int data) -{ - int rv; - - rv = i2c_write8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - return rv; -} - -int ps8811_i2c_field_update(const struct usb_mux *me, int page, int offset, - uint8_t field_mask, uint8_t set_value) -{ - int rv; - - rv = i2c_field_update8(me->i2c_port, - me->i2c_addr_flags + page, - offset, - field_mask, - set_value); - - return rv; -} diff --git a/driver/retimer/ps8811.h b/driver/retimer/ps8811.h deleted file mode 100644 index c3a98c1660..0000000000 --- a/driver/retimer/ps8811.h +++ /dev/null @@ -1,99 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8811 retimer. - */ - -#include "usb_mux.h" - -#ifndef __CROS_EC_USB_RETIMER_PS8811_H -#define __CROS_EC_USB_RETIMER_PS8811_H - -/* - * PS8811 uses 7-bit I2C addresses 0x28 to 0x29 (ADDR=LL). - * Page 0 = 0x28, Page 1 = 0x29. - * PS8811 uses 7-bit I2C addresses 0x2A to 0x2B (ADDR=LH). - * Page 0 = 0x2A, Page 1 = 0x2B. - * PS8811 uses 7-bit I2C addresses 0x70 to 0x71 (ADDR=HL). - * Page 0 = 0x70, Page 1 = 0x71. - * PS8811 uses 7-bit I2C addresses 0x72 to 0x73 (ADDR=HH). - * Page 0 = 0x72, Page 1 = 0x73. - */ -#define PS8811_I2C_ADDR_FLAGS0 0x28 -#define PS8811_I2C_ADDR_FLAGS1 0x2A -#define PS8811_I2C_ADDR_FLAGS2 0x70 -#define PS8811_I2C_ADDR_FLAGS3 0x72 - -/* - * PAGE 1 Register Definitions - */ -#define PS8811_REG_PAGE1 0x01 - -#define PS8811_REG1_USB_BEQ_LEVEL 0x05 -#define PS8811_BEQ_PIN_LEVEL_UP_9DB 0x00 -#define PS8811_BEQ_PIN_LEVEL_UP_10_5DB 0x01 -#define PS8811_BEQ_PIN_LEVEL_UP_12DB 0x02 -#define PS8811_BEQ_PIN_LEVEL_UP_13DB 0x03 -#define PS8811_BEQ_PIN_LEVEL_UP_16DB 0x04 -#define PS8811_BEQ_PIN_LEVEL_UP_17DB 0x05 -#define PS8811_BEQ_PIN_LEVEL_UP_18DB 0x06 -#define PS8811_BEQ_PIN_LEVEL_UP_19DB 0x07 -#define PS8811_BEQ_PIN_LEVEL_UP_20DB 0x08 -#define PS8811_BEQ_PIN_LEVEL_UP_21DB 0x09 -#define PS8811_BEQ_PIN_LEVEL_UP_23DB 0x0A -#define PS8811_BEQ_I2C_LEVEL_UP_9DB 0x00 -#define PS8811_BEQ_I2C_LEVEL_UP_10_5DB 0x10 -#define PS8811_BEQ_I2C_LEVEL_UP_12DB 0x20 -#define PS8811_BEQ_I2C_LEVEL_UP_13DB 0x30 -#define PS8811_BEQ_I2C_LEVEL_UP_16DB 0x40 -#define PS8811_BEQ_I2C_LEVEL_UP_17DB 0x50 -#define PS8811_BEQ_I2C_LEVEL_UP_18DB 0x60 -#define PS8811_BEQ_I2C_LEVEL_UP_19DB 0x70 -#define PS8811_BEQ_I2C_LEVEL_UP_20DB 0x80 -#define PS8811_BEQ_I2C_LEVEL_UP_21DB 0x90 -#define PS8811_BEQ_I2C_LEVEL_UP_23DB 0xA0 - -#define PS8811_REG1_USB_BEQ_CONFIG 0x06 -#define PS8811_BEQ_CONFIG_REG_ENABLE BIT(0) - -#define PS8811_REG1_USB_CHAN_A_SWING 0x66 -#define PS8811_CHAN_A_SWING_MASK GENMASK(6, 4) -#define PS8811_CHAN_A_SWING_SHIFT 4 - -#define PS8811_REG1_USB_CHAN_B_SWING 0xA4 -#define PS8811_CHAN_B_SWING_MASK GENMASK(2, 0) -#define PS8811_CHAN_B_SWING_SHIFT 0 - -/* De-emphasis -2.2 dB, Pre-shoot 1.2 dB */ -#define PS8811_CHAN_B_DE_2_2_PS_1_2_LSB 0x1 -#define PS8811_CHAN_B_DE_2_2_PS_1_2_MSB 0x13 - -/* De-emphasis -3.5 dB, Pre-shoot 0 dB */ -#define PS8811_CHAN_B_DE_3_5_PS_0_LSB 0x0 -#define PS8811_CHAN_B_DE_3_5_PS_0_MSB 0x5 - -/* De-emphasis -4.5 dB, Pre-shoot 0 dB */ -#define PS8811_CHAN_B_DE_4_5_PS_0_LSB 0x0 -#define PS8811_CHAN_B_DE_4_5_PS_0_MSB 0x6 - -/* De-emphasis -6 dB, Pre-shoot 1.5 dB */ -#define PS8811_CHAN_B_DE_6_PS_1_5_LSB 0x2 -#define PS8811_CHAN_B_DE_6_PS_1_5_MSB 0x16 - -/* De-emphasis -6 dB, Pre-shoot 3 dB */ -#define PS8811_CHAN_B_DE_6_PS_3_LSB 0x4 -#define PS8811_CHAN_B_DE_6_PS_3_MSB 0x16 - -#define PS8811_REG1_USB_CHAN_B_DE_PS_LSB 0xA5 -#define PS8811_CHAN_B_DE_PS_LSB_MASK GENMASK(2, 0) - -#define PS8811_REG1_USB_CHAN_B_DE_PS_MSB 0xA6 -#define PS8811_CHAN_B_DE_PS_MSB_MASK GENMASK(5, 0) - -int ps8811_i2c_read(const struct usb_mux *me, int page, int offset, int *data); -int ps8811_i2c_write(const struct usb_mux *me, int page, int offset, int data); -int ps8811_i2c_field_update(const struct usb_mux *me, int page, int offset, - uint8_t field_mask, uint8_t set_value); - -#endif /* __CROS_EC_USB_RETIMER_PS8802_H */ diff --git a/driver/retimer/ps8818.c b/driver/retimer/ps8818.c deleted file mode 100644 index 2f8e353099..0000000000 --- a/driver/retimer/ps8818.c +++ /dev/null @@ -1,165 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8818 retimer. - */ - -#include "chipset.h" -#include "common.h" -#include "console.h" -#include "gpio.h" -#include "i2c.h" -#include "ioexpander.h" -#include "ps8818.h" -#include "usb_mux.h" - -#define PS8818_DEBUG 0 - -int ps8818_i2c_read(const struct usb_mux *me, int page, int offset, int *data) -{ - int rv; - - rv = i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - if (PS8818_DEBUG) - ccprintf("%s(%d:0x%02X, 0x%02X) =>0x%02X\n", __func__, - me->usb_port, - me->i2c_addr_flags + page, - offset, *data); - - return rv; -} - -int ps8818_i2c_write(const struct usb_mux *me, int page, int offset, int data) -{ - int rv; - int pre_val, post_val; - - if (PS8818_DEBUG) - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_write8(me->i2c_port, - me->i2c_addr_flags + page, - offset, data); - - if (PS8818_DEBUG) { - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%02X) " - "0x%02X=>0x%02X\n", - __func__, - me->usb_port, - me->i2c_addr_flags + page, - offset, data, - pre_val, post_val); - } - - return rv; -} - -int ps8818_i2c_field_update8(const struct usb_mux *me, int page, int offset, - uint8_t field_mask, uint8_t set_value) -{ - int rv; - int pre_val, post_val; - - if (PS8818_DEBUG) - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &pre_val); - - rv = i2c_field_update8(me->i2c_port, - me->i2c_addr_flags + page, - offset, - field_mask, - set_value); - - if (PS8818_DEBUG) { - i2c_read8(me->i2c_port, - me->i2c_addr_flags + page, - offset, &post_val); - - ccprintf("%s(%d:0x%02X, 0x%02X, 0x%02X, 0x%02X) " - "0x%02X=>0x%02X\n", - __func__, - me->usb_port, - me->i2c_addr_flags + page, - offset, field_mask, set_value, - pre_val, post_val); - } - - return rv; -} - -static int ps8818_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int rv; - int val = 0; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - return (mux_state == USB_PD_MUX_NONE) ? EC_SUCCESS - : EC_ERROR_NOT_POWERED; - - if (PS8818_DEBUG) - ccprintf("%s(%d, 0x%02X) %s %s %s\n", - __func__, me->usb_port, mux_state, - (mux_state & USB_PD_MUX_USB_ENABLED) ? "USB" : "", - (mux_state & USB_PD_MUX_DP_ENABLED) ? "DP" : "", - (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? "FLIP" : ""); - - /* Set the mode */ - if (mux_state & USB_PD_MUX_USB_ENABLED) - val |= PS8818_MODE_USB_ENABLE; - if (mux_state & USB_PD_MUX_DP_ENABLED) - val |= PS8818_MODE_DP_ENABLE; - - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE0, - PS8818_REG0_MODE, - PS8818_MODE_NON_RESERVED_MASK, - val); - if (rv) - return rv; - - /* Set the flip */ - val = 0; - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - val |= PS8818_FLIP_CONFIG; - - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE0, - PS8818_REG0_FLIP, - PS8818_FLIP_NON_RESERVED_MASK, - val); - if (rv) - return rv; - - /* Set the IN_HPD */ - val = PS8818_DPHPD_CONFIG_INHPD_DISABLE; - if (mux_state & USB_PD_MUX_DP_ENABLED) - val |= PS8818_DPHPD_PLUGGED; - - rv = ps8818_i2c_field_update8(me, - PS8818_REG_PAGE0, - PS8818_REG0_DPHPD_CONFIG, - PS8818_DPHPD_NON_RESERVED_MASK, - val); - - return rv; -} - -const struct usb_mux_driver ps8818_usb_retimer_driver = { - .set = ps8818_set_mux, -}; diff --git a/driver/retimer/ps8818.h b/driver/retimer/ps8818.h deleted file mode 100644 index b56df4b411..0000000000 --- a/driver/retimer/ps8818.h +++ /dev/null @@ -1,99 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * PS8818 retimer. - */ -#include "usb_mux.h" - -#ifndef __CROS_EC_USB_RETIMER_PS8818_H -#define __CROS_EC_USB_RETIMER_PS8818_H - -#define PS8818_I2C_ADDR_FLAGS 0x28 - -/* - * PAGE 0 Register Definitions - */ -#define PS8818_REG_PAGE0 0x00 - -#define PS8818_REG0_FLIP 0x00 -#define PS8818_FLIP_CONFIG BIT(7) -#define PS8818_FLIP_NON_RESERVED_MASK 0xE0 - -#define PS8818_REG0_MODE 0x01 -#define PS8818_MODE_DP_ENABLE BIT(7) -#define PS8818_MODE_USB_ENABLE BIT(6) -#define PS8818_MODE_NON_RESERVED_MASK 0xC0 - -#define PS8818_REG0_DPHPD_CONFIG 0x02 -#define PS8818_DPHPD_CONFIG_INHPD_DISABLE BIT(7) -#define PS8818_DPHPD_PLUGGED BIT(6) -#define PS8818_DPHPD_NON_RESERVED_MASK 0xFC - -/* - * PAGE 1 Register Definitions - */ -#define PS8818_REG_PAGE1 0x01 - -#define PS8818_REG1_APTX1EQ_10G_LEVEL 0x00 -#define PS8818_REG1_APTX2EQ_10G_LEVEL 0x02 -#define PS8818_REG1_CRX1EQ_10G_LEVEL 0x08 -#define PS8818_REG1_CRX2EQ_10G_LEVEL 0x0A -#define PS8818_REG1_APRX1_DE_LEVEL 0x0C -#define PS8818_REG1_APTX1EQ_5G_LEVEL 0x70 -#define PS8818_REG1_APTX2EQ_5G_LEVEL 0x72 -#define PS8818_REG1_CRX1EQ_5G_LEVEL 0x78 -#define PS8818_REG1_CRX2EQ_5G_LEVEL 0x7A -#define PS8818_EQ_LEVEL_UP_9DB (0) -#define PS8818_EQ_LEVEL_UP_10DB (1) -#define PS8818_EQ_LEVEL_UP_12DB (2) -#define PS8818_EQ_LEVEL_UP_13DB (3) -#define PS8818_EQ_LEVEL_UP_16DB (4) -#define PS8818_EQ_LEVEL_UP_17DB (5) -#define PS8818_EQ_LEVEL_UP_18DB (6) -#define PS8818_EQ_LEVEL_UP_19DB (7) -#define PS8818_EQ_LEVEL_UP_20DB (8) -#define PS8818_EQ_LEVEL_UP_21DB (9) -#define PS8818_EQ_LEVEL_UP_MASK (0x0F) - -#define PS8818_REG1_RX_PHY 0x6D -#define PS8818_RX_INPUT_TERM_112_OHM (0 << 6) -#define PS8818_RX_INPUT_TERM_104_OHM (1 << 6) -#define PS8818_RX_INPUT_TERM_96_OHM (2 << 6) -#define PS8818_RX_INPUT_TERM_85_OHM (3 << 6) -#define PS8818_RX_INPUT_TERM_MASK (3 << 6) - -#define PS8818_REG1_DPEQ_LEVEL 0xB6 -#define PS8818_DPEQ_LEVEL_UP_9DB (0 << 3) -#define PS8818_DPEQ_LEVEL_UP_10DB (1 << 3) -#define PS8818_DPEQ_LEVEL_UP_12DB (2 << 3) -#define PS8818_DPEQ_LEVEL_UP_13DB (3 << 3) -#define PS8818_DPEQ_LEVEL_UP_16DB (4 << 3) -#define PS8818_DPEQ_LEVEL_UP_17DB (5 << 3) -#define PS8818_DPEQ_LEVEL_UP_18DB (6 << 3) -#define PS8818_DPEQ_LEVEL_UP_19DB (7 << 3) -#define PS8818_DPEQ_LEVEL_UP_20DB (8 << 3) -#define PS8818_DPEQ_LEVEL_UP_21DB (9 << 3) -#define PS8818_DPEQ_LEVEL_UP_MASK (0x0F << 3) - -/* - * PAGE 2 Register Definitions - */ -#define PS8818_REG_PAGE2 0x02 - -#define PS8818_REG2_TX_STATUS 0x42 -#define PS8818_REG2_RX_STATUS 0x46 -#define PS8818_STATUS_NORMAL_OPERATION BIT(7) -#define PS8818_STATUS_10_GBPS BIT(5) - -extern const struct usb_mux_driver ps8818_usb_retimer_driver; - -int ps8818_i2c_read(const struct usb_mux *me, - int page, int offset, int *data); -int ps8818_i2c_write(const struct usb_mux *me, - int page, int offset, int data); -int ps8818_i2c_field_update8(const struct usb_mux *me, - int page, int offset, - uint8_t field_mask, uint8_t set_value); - -#endif /* __CROS_EC_USB_RETIMER_PS8818_H */ diff --git a/driver/retimer/tdp142.c b/driver/retimer/tdp142.c deleted file mode 100644 index e1632150d0..0000000000 --- a/driver/retimer/tdp142.c +++ /dev/null @@ -1,42 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Texas Instruments TDP142 DisplayPort Linear Redriver - */ - -#include "common.h" -#include "ec_commands.h" -#include "i2c.h" -#include "tdp142.h" - -static enum ec_error_list tdp142_write(int offset, int data) -{ - return i2c_write8(TDP142_I2C_PORT, - TDP142_I2C_ADDR, - offset, data); - -} - -static enum ec_error_list tdp142_read(int offset, int *regval) -{ - return i2c_read8(TDP142_I2C_PORT, - TDP142_I2C_ADDR, - offset, regval); - -} - -enum ec_error_list tdp142_set_ctlsel(enum tdp142_ctlsel selection) -{ - int regval; - enum ec_error_list rv; - - rv = tdp142_read(TDP142_REG_GENERAL, ®val); - if (rv) - return rv; - - regval &= ~TDP142_GENERAL_CTLSEL; - regval |= selection; - - return tdp142_write(TDP142_REG_GENERAL, regval); -} diff --git a/driver/retimer/tdp142.h b/driver/retimer/tdp142.h deleted file mode 100644 index 8346a233a5..0000000000 --- a/driver/retimer/tdp142.h +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Texas Instruments TDP142 DisplayPort Linear Redriver - */ - -#ifndef __CROS_EC_REDRIVER_TDP142_H -#define __CROS_EC_REDRIVER_TDP142_H - -#include "compile_time_macros.h" - -/* - * Note: Since DP redrivers do not have a standard EC structure, define a - * TDP142_I2C_PORT and TDP142_I2C_ADDR in board.h - */ -#define TDP142_I2C_ADDR0 0x44 -#define TDP142_I2C_ADDR1 0x47 -#define TDP142_I2C_ADDR2 0x0C -#define TDP142_I2C_ADDR3 0x0F - -/* Registers */ -#define TDP142_REG_GENERAL 0x0A -#define TDP142_GENERAL_CTLSEL GENMASK(1, 0) -#define TDP142_GENERAL_HPDIN_OVRRIDE BIT(3) -#define TDP142_GENERAL_EQ_OVERRIDE BIT(4) -#define TDP142_GENERAL_SWAP_HPDIN BIT(5) - -enum tdp142_ctlsel { - TDP142_CTLSEL_SHUTDOWN, - TDP142_CTLSEL_DISABLED, - TDP142_CTLSEL_ENABLED, -}; - -/* Control redriver enable */ -enum ec_error_list tdp142_set_ctlsel(enum tdp142_ctlsel selection); - -#endif /* __CROS_EC_REDRIVER_TDP142_H */ diff --git a/driver/retimer/tusb544.c b/driver/retimer/tusb544.c deleted file mode 100644 index 9de543fd42..0000000000 --- a/driver/retimer/tusb544.c +++ /dev/null @@ -1,116 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * TI TUSB544 USB Type-C Multi-Protocol Linear Redriver - */ -#include "i2c.h" -#include "tusb544.h" -#include "usb_mux.h" - -static int tusb544_write(const struct usb_mux *me, int offset, int data) -{ - return i2c_write8(me->i2c_port, - me->i2c_addr_flags, - offset, data); -} - -static int tusb544_read(const struct usb_mux *me, int offset, int *data) -{ - return i2c_read8(me->i2c_port, - me->i2c_addr_flags, - offset, data); -} - -int tusb544_i2c_field_update8(const struct usb_mux *me, int offset, - uint8_t field_mask, uint8_t set_value) -{ - int rv; - - rv = i2c_field_update8(me->i2c_port, - me->i2c_addr_flags, - offset, - field_mask, - set_value); - - return rv; -} - -static int tusb544_enter_low_power_mode(const struct usb_mux *me) -{ - int reg; - int rv; - - rv = tusb544_read(me, TUSB544_REG_GENERAL4, ®); - if (rv) - return rv; - - /* Setting CTL_SEL[0,1] to 0 powers down, per Table 5 */ - reg &= ~TUSB544_GEN4_CTL_SEL; - /* Clear HPD */ - reg &= ~TUSB544_GEN4_HPDIN; - - return tusb544_write(me, TUSB544_REG_GENERAL4, reg); -} - -static int tusb544_init(const struct usb_mux *me) -{ - return EC_SUCCESS; -} - -static int tusb544_set_mux(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required) -{ - int reg; - int rv; - - /* This driver does not use host command ACKs */ - *ack_required = false; - - if (mux_state == USB_PD_MUX_NONE) - return tusb544_enter_low_power_mode(me); - - rv = tusb544_read(me, TUSB544_REG_GENERAL4, ®); - if (rv) - return rv; - - if (mux_state & USB_PD_MUX_POLARITY_INVERTED) - reg |= TUSB544_GEN4_FLIP_SEL; - else - reg &= ~TUSB544_GEN4_FLIP_SEL; - - reg &= ~TUSB544_GEN4_CTL_SEL; - - if (IS_ENABLED(CONFIG_TUSB544_EQ_BY_REGISTER)) - reg |= TUSB544_GEN4_EQ_OVRD; - - if ((mux_state & USB_PD_MUX_USB_ENABLED) && - (mux_state & USB_PD_MUX_DP_ENABLED)) { - reg |= TUSB544_CTL_SEL_DP_USB; - reg |= TUSB544_GEN4_HPDIN; - } else if (mux_state & USB_PD_MUX_DP_ENABLED) { - reg |= TUSB544_CTL_SEL_DP_ONLY; - reg |= TUSB544_GEN4_HPDIN; - } else if (mux_state & USB_PD_MUX_USB_ENABLED) - reg |= TUSB544_CTL_SEL_USB_ONLY; - - rv = tusb544_write(me, TUSB544_REG_GENERAL4, reg); - if (rv) - return rv; - - rv = tusb544_read(me, TUSB544_REG_GENERAL6, ®); - if (rv) - return rv; - - reg &= ~TUSB544_GEN6_DIR_SEL; - /* All chromebooks are DP SRC */ - reg |= TUSB544_DIR_SEL_USB_DP_SRC; - - return tusb544_write(me, TUSB544_REG_GENERAL6, reg); -} - -const struct usb_mux_driver tusb544_drv = { - .enter_low_power_mode = &tusb544_enter_low_power_mode, - .init = &tusb544_init, - .set = &tusb544_set_mux, -}; diff --git a/driver/retimer/tusb544.h b/driver/retimer/tusb544.h deleted file mode 100644 index e1599c78ca..0000000000 --- a/driver/retimer/tusb544.h +++ /dev/null @@ -1,109 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * TI TUSB544 USB Type-C Multi-Protocol Linear Redriver - */ -#include "usb_mux.h" - -#ifndef __CROS_EC_USB_REDRIVER_TUSB544_H -#define __CROS_EC_USB_REDRIVER_TUSB544_H - - -#define TUSB544_I2C_ADDR_FLAGS0 0x44 - -#define TUSB544_REG_GENERAL4 0x0A -#define TUSB544_GEN4_CTL_SEL GENMASK(1, 0) -#define TUSB544_GEN4_FLIP_SEL BIT(2) -#define TUSB544_GEN4_HPDIN BIT(3) -#define TUSB544_GEN4_EQ_OVRD BIT(4) -#define TUSB544_GEN4_SWAP_SEL BIT(5) - -#define TUSB544_REG_DISPLAYPORT_1 0x10 -#define TUSB544_REG_DISPLAYPORT_2 0x11 -#define TUSB544_REG_USB3_1_1 0x20 -#define TUSB544_REG_USB3_1_2 0x21 -#define TUSB544_EQ_RX_DFP_MINUS14_UFP_MINUS33 (0) -#define TUSB544_EQ_RX_DFP_04_UFP_MINUS15 (1) -#define TUSB544_EQ_RX_DFP_17_UFP_0 (2) -#define TUSB544_EQ_RX_DFP_32_UFP_14 (3) -#define TUSB544_EQ_RX_DFP_41_UFP_24 (4) -#define TUSB544_EQ_RX_DFP_52_UFP_35 (5) -#define TUSB544_EQ_RX_DFP_61_UFP_43 (6) -#define TUSB544_EQ_RX_DFP_69_UFP_52 (7) -#define TUSB544_EQ_RX_DFP_77_UFP_60 (8) -#define TUSB544_EQ_RX_DFP_83_UFP_66 (9) -#define TUSB544_EQ_RX_DFP_88_UFP_72 (10) -#define TUSB544_EQ_RX_DFP_94_UFP_77 (11) -#define TUSB544_EQ_RX_DFP_98_UFP_81 (12) -#define TUSB544_EQ_RX_DFP_103_UFP_86 (13) -#define TUSB544_EQ_RX_DFP_106_UFP_90 (14) -#define TUSB544_EQ_RX_DFP_110_UFP_94 (15) -#define TUSB544_EQ_RX_MASK (0x0F) - -#define TUSB544_EQ_TX_DFP_MINUS14_UFP_MINUS33 (0 << 4) -#define TUSB544_EQ_TX_DFP_04_UFP_MINUS15 (1 << 4) -#define TUSB544_EQ_TX_DFP_17_UFP_0 (2 << 4) -#define TUSB544_EQ_TX_DFP_32_UFP_14 (3 << 4) -#define TUSB544_EQ_TX_DFP_41_UFP_24 (4 << 4) -#define TUSB544_EQ_TX_DFP_52_UFP_35 (5 << 4) -#define TUSB544_EQ_TX_DFP_61_UFP_43 (6 << 4) -#define TUSB544_EQ_TX_DFP_69_UFP_52 (7 << 4) -#define TUSB544_EQ_TX_DFP_77_UFP_60 (8 << 4) -#define TUSB544_EQ_TX_DFP_83_UFP_66 (9 << 4) -#define TUSB544_EQ_TX_DFP_88_UFP_72 (10 << 4) -#define TUSB544_EQ_TX_DFP_94_UFP_77 (11 << 4) -#define TUSB544_EQ_TX_DFP_98_UFP_81 (12 << 4) -#define TUSB544_EQ_TX_DFP_103_UFP_86 (13 << 4) -#define TUSB544_EQ_TX_DFP_106_UFP_90 (14 << 4) -#define TUSB544_EQ_TX_DFP_110_UFP_94 (15 << 4) -#define TUSB544_EQ_TX_MASK (0xF0) - -enum tusb544_ct_sel { - TUSB544_CTL_SEL_DISABLED, - TUSB544_CTL_SEL_USB_ONLY, - TUSB544_CTL_SEL_DP_ONLY, - TUSB544_CTL_SEL_DP_USB, -}; - -#define TUSB544_REG_GENERAL6 0x0C -#define TUSB544_GEN6_DIR_SEL GENMASK(1, 0) -#define TUSB544_VOD_DCGAIN_SEL GENMASK(5, 2) -#define TUSB544_VOD_DCGAIN_OVERRIDE BIT(6) - -enum tusb544_dir_sel { - TUSB544_DIR_SEL_USB_DP_SRC, - TUSB544_DIR_SEL_USB_DP_SNK, - TUSB544_DIR_SEL_CUSTOM_SRC, - TUSB544_DIS_SEL_CUSTOM_SNK, -}; - -enum tusb544_vod_dcgain_sel { - TUSB544_VOD_DCGAIN_SETTING_1, - TUSB544_VOD_DCGAIN_SETTING_2, - TUSB544_VOD_DCGAIN_SETTING_3, - TUSB544_VOD_DCGAIN_SETTING_4, - TUSB544_VOD_DCGAIN_SETTING_5, - TUSB544_VOD_DCGAIN_SETTING_6, - TUSB544_VOD_DCGAIN_SETTING_7, - TUSB544_VOD_DCGAIN_SETTING_8, -}; - -/* - * Note: TUSB544 automatically snoops DP lanes to enable, but may be manually - * directed which lanes to turn on when snoop is disabled - */ -#define TUSB544_REG_DP4 0x13 -#define TUSB544_DP4_DP0_DISABLE BIT(0) -#define TUSB544_DP4_DP1_DISABLE BIT(1) -#define TUSB544_DP4_DP2_DISABLE BIT(2) -#define TUSB544_DP4_DP3_DISABLE BIT(3) -#define TUSB544_DP4_AUX_SBU_OVR GENMASK(5, 4) -#define TUSB544_DP4_AUX_SNOOP_DISABLE BIT(7) - -extern const struct usb_mux_driver tusb544_drv; - -int tusb544_i2c_field_update8(const struct usb_mux *me, int offset, - uint8_t field_mask, uint8_t set_value); - -#endif |