diff options
Diffstat (limited to 'driver/usb_mux')
| -rw-r--r-- | driver/usb_mux/amd_fp5.c | 46 | ||||
| -rw-r--r-- | driver/usb_mux/amd_fp5.h | 18 | ||||
| -rw-r--r-- | driver/usb_mux/amd_fp6.c | 20 | ||||
| -rw-r--r-- | driver/usb_mux/amd_fp6.h | 32 | ||||
| -rw-r--r-- | driver/usb_mux/anx3443.c | 27 | ||||
| -rw-r--r-- | driver/usb_mux/anx3443.h | 40 | ||||
| -rw-r--r-- | driver/usb_mux/anx7440.c | 17 | ||||
| -rw-r--r-- | driver/usb_mux/anx7440.h | 34 | ||||
| -rw-r--r-- | driver/usb_mux/anx7451.c | 17 | ||||
| -rw-r--r-- | driver/usb_mux/anx7451.h | 36 | ||||
| -rw-r--r-- | driver/usb_mux/it5205.c | 40 | ||||
| -rw-r--r-- | driver/usb_mux/it5205.h | 47 | ||||
| -rw-r--r-- | driver/usb_mux/pi3usb3x532.c | 27 | ||||
| -rw-r--r-- | driver/usb_mux/pi3usb3x532.h | 6 | ||||
| -rw-r--r-- | driver/usb_mux/ps8740.c | 14 | ||||
| -rw-r--r-- | driver/usb_mux/ps8740.h | 72 | ||||
| -rw-r--r-- | driver/usb_mux/ps8743.c | 32 | ||||
| -rw-r--r-- | driver/usb_mux/ps8743.h | 32 | ||||
| -rw-r--r-- | driver/usb_mux/ps8822.c | 22 | ||||
| -rw-r--r-- | driver/usb_mux/ps8822.h | 66 | ||||
| -rw-r--r-- | driver/usb_mux/tusb1064.c | 22 | ||||
| -rw-r--r-- | driver/usb_mux/tusb1064.h | 69 | ||||
| -rw-r--r-- | driver/usb_mux/usb_mux.c | 212 | ||||
| -rw-r--r-- | driver/usb_mux/virtual.c | 19 |
24 files changed, 495 insertions, 472 deletions
diff --git a/driver/usb_mux/amd_fp5.c b/driver/usb_mux/amd_fp5.c index c32e6992c2..ca042b0fa0 100644 --- a/driver/usb_mux/amd_fp5.c +++ b/driver/usb_mux/amd_fp5.c @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -22,8 +22,7 @@ static inline int amd_fp5_mux_read(const struct usb_mux *me, uint8_t *val) uint8_t buf[3] = { 0 }; int rv; - rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, - NULL, 0, buf, 3); + rv = i2c_xfer(me->i2c_port, me->i2c_addr_flags, NULL, 0, buf, 3); if (rv) return rv; @@ -34,8 +33,7 @@ static inline int amd_fp5_mux_read(const struct usb_mux *me, uint8_t *val) static inline int amd_fp5_mux_write(const struct usb_mux *me, uint8_t val) { - return i2c_write8(me->i2c_port, me->i2c_addr_flags, - me->usb_port, val); + return i2c_write8(me->i2c_port, me->i2c_addr_flags, me->usb_port, val); } static int amd_fp5_init(const struct usb_mux *me) @@ -51,6 +49,10 @@ static int amd_fp5_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + saved_mux_state[me->usb_port] = mux_state; /* @@ -60,20 +62,22 @@ static int amd_fp5_set_mux(const struct usb_mux *me, mux_state_t mux_state, * it because a powered down MUX is off. */ if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - return (mux_state == USB_PD_MUX_NONE) - ? EC_SUCCESS - : EC_ERROR_NOT_POWERED; + return (mux_state == USB_PD_MUX_NONE) ? EC_SUCCESS : + EC_ERROR_NOT_POWERED; if ((mux_state & USB_PD_MUX_USB_ENABLED) && - (mux_state & USB_PD_MUX_DP_ENABLED)) - val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? AMD_FP5_MUX_DOCK_INVERTED : AMD_FP5_MUX_DOCK; + (mux_state & USB_PD_MUX_DP_ENABLED)) + val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) ? + AMD_FP5_MUX_DOCK_INVERTED : + AMD_FP5_MUX_DOCK; else if (mux_state & USB_PD_MUX_USB_ENABLED) - val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? AMD_FP5_MUX_USB_INVERTED : AMD_FP5_MUX_USB; + val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) ? + AMD_FP5_MUX_USB_INVERTED : + AMD_FP5_MUX_USB; else if (mux_state & USB_PD_MUX_DP_ENABLED) - val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) - ? AMD_FP5_MUX_DP_INVERTED : AMD_FP5_MUX_DP; + val = (mux_state & USB_PD_MUX_POLARITY_INVERTED) ? + AMD_FP5_MUX_DP_INVERTED : + AMD_FP5_MUX_DP; return amd_fp5_mux_write(me, val); } @@ -101,21 +105,21 @@ static int amd_fp5_get_mux(const struct usb_mux *me, mux_state_t *mux_state) break; case AMD_FP5_MUX_USB_INVERTED: *mux_state = USB_PD_MUX_USB_ENABLED | - USB_PD_MUX_POLARITY_INVERTED; + USB_PD_MUX_POLARITY_INVERTED; break; case AMD_FP5_MUX_DOCK: *mux_state = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED; break; case AMD_FP5_MUX_DOCK_INVERTED: - *mux_state = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED - | USB_PD_MUX_POLARITY_INVERTED; + *mux_state = USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | + USB_PD_MUX_POLARITY_INVERTED; break; case AMD_FP5_MUX_DP: *mux_state = USB_PD_MUX_DP_ENABLED; break; case AMD_FP5_MUX_DP_INVERTED: *mux_state = USB_PD_MUX_DP_ENABLED | - USB_PD_MUX_POLARITY_INVERTED; + USB_PD_MUX_POLARITY_INVERTED; break; case AMD_FP5_MUX_SAFE: default: @@ -126,8 +130,8 @@ static int amd_fp5_get_mux(const struct usb_mux *me, mux_state_t *mux_state) return EC_SUCCESS; } -static struct queue const chipset_reset_queue - = QUEUE_NULL(CONFIG_USB_PD_PORT_MAX_COUNT, struct usb_mux *); +static struct queue const chipset_reset_queue = + QUEUE_NULL(CONFIG_USB_PD_PORT_MAX_COUNT, struct usb_mux *); static void amd_fp5_chipset_reset_delay(void) { diff --git a/driver/usb_mux/amd_fp5.h b/driver/usb_mux/amd_fp5.h index 7534ea0d8a..9a23cf57b0 100644 --- a/driver/usb_mux/amd_fp5.h +++ b/driver/usb_mux/amd_fp5.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -8,14 +8,14 @@ #ifndef __CROS_EC_USB_MUX_AMD_FP5_H #define __CROS_EC_USB_MUX_AMD_FP5_H -#define AMD_FP5_MUX_I2C_ADDR_FLAGS 0x5C +#define AMD_FP5_MUX_I2C_ADDR_FLAGS 0x5C -#define AMD_FP5_MUX_SAFE 0x00 -#define AMD_FP5_MUX_USB 0x02 -#define AMD_FP5_MUX_USB_INVERTED 0x11 -#define AMD_FP5_MUX_DOCK 0x06 -#define AMD_FP5_MUX_DOCK_INVERTED 0x19 -#define AMD_FP5_MUX_DP 0x0C -#define AMD_FP5_MUX_DP_INVERTED 0x1C +#define AMD_FP5_MUX_SAFE 0x00 +#define AMD_FP5_MUX_USB 0x02 +#define AMD_FP5_MUX_USB_INVERTED 0x11 +#define AMD_FP5_MUX_DOCK 0x06 +#define AMD_FP5_MUX_DOCK_INVERTED 0x19 +#define AMD_FP5_MUX_DP 0x0C +#define AMD_FP5_MUX_DP_INVERTED 0x1C #endif /* __CROS_EC_USB_MUX_AMD_FP5_H */ diff --git a/driver/usb_mux/amd_fp6.c b/driver/usb_mux/amd_fp6.c index 4f31fae186..a776a696f7 100644 --- a/driver/usb_mux/amd_fp6.c +++ b/driver/usb_mux/amd_fp6.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -15,8 +15,8 @@ #include "timer.h" #include "usb_mux.h" -#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) /* * The recommendation from "3.3.2 Command Timeout" is 250ms, @@ -50,8 +50,8 @@ static int amd_fp6_mux_port0_read(const struct usb_mux *me, uint8_t *val) * payload[1]: Port 0 Control/Status * payload[2]: Port 1 Control/Status (unused on FP6) */ - mux_ready = !!((payload[0] >> AMD_FP6_MUX_PD_STATUS_OFFSET) - & AMD_FP6_MUX_PD_STATUS_READY); + mux_ready = !!((payload[0] >> AMD_FP6_MUX_PD_STATUS_OFFSET) & + AMD_FP6_MUX_PD_STATUS_READY); if (!mux_ready) return EC_ERROR_BUSY; @@ -80,7 +80,6 @@ static int amd_fp6_mux_port0_write(const struct usb_mux *me, uint8_t write_val) */ start = get_time(); while (time_since32(start) < WRITE_CMD_TIMEOUT_MS * MSEC) { - RETURN_ERROR(amd_fp6_mux_port0_read(me, &read_val)); port_status = read_val >> AMD_FP6_MUX_PORT_STATUS_OFFSET; @@ -134,7 +133,6 @@ static void amd_fp6_set_mux_retry(void) CMD_RETRY_INTERVAL_MS * MSEC); } - static int amd_fp6_set_mux(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { @@ -143,6 +141,10 @@ static int amd_fp6_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + if (mux_state == USB_PD_MUX_NONE) /* * LOW_POWER must be set when connection mode is @@ -170,8 +172,8 @@ static int amd_fp6_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* Mux is not powered in Z1 */ if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) - return (mux_state == USB_PD_MUX_NONE) ? EC_SUCCESS - : EC_ERROR_NOT_POWERED; + return (mux_state == USB_PD_MUX_NONE) ? EC_SUCCESS : + EC_ERROR_NOT_POWERED; saved_mux_state[me->usb_port].write_pending = true; amd_fp6_set_mux_retry(); diff --git a/driver/usb_mux/amd_fp6.h b/driver/usb_mux/amd_fp6.h index 913903e4c4..ba2b791ba5 100644 --- a/driver/usb_mux/amd_fp6.h +++ b/driver/usb_mux/amd_fp6.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -8,24 +8,24 @@ #ifndef __CROS_EC_USB_MUX_AMD_FP6_H #define __CROS_EC_USB_MUX_AMD_FP6_H -#define AMD_FP6_C0_MUX_I2C_ADDR 0x5C -#define AMD_FP6_C4_MUX_I2C_ADDR 0x52 +#define AMD_FP6_C0_MUX_I2C_ADDR 0x5C +#define AMD_FP6_C4_MUX_I2C_ADDR 0x52 -#define AMD_FP6_MUX_MODE_SAFE 0x0 -#define AMD_FP6_MUX_MODE_USB 0x1 -#define AMD_FP6_MUX_MODE_DP 0x2 -#define AMD_FP6_MUX_MODE_DOCK 0x3 -#define AMD_FP6_MUX_MODE_MASK GENMASK(1, 0) +#define AMD_FP6_MUX_MODE_SAFE 0x0 +#define AMD_FP6_MUX_MODE_USB 0x1 +#define AMD_FP6_MUX_MODE_DP 0x2 +#define AMD_FP6_MUX_MODE_DOCK 0x3 +#define AMD_FP6_MUX_MODE_MASK GENMASK(1, 0) -#define AMD_FP6_MUX_ORIENTATION BIT(4) -#define AMD_FP6_MUX_LOW_POWER BIT(5) +#define AMD_FP6_MUX_ORIENTATION BIT(4) +#define AMD_FP6_MUX_LOW_POWER BIT(5) -#define AMD_FP6_MUX_PORT_STATUS_OFFSET 6 -#define AMD_FP6_MUX_PORT_CMD_BUSY 0x0 -#define AMD_FP6_MUX_PORT_CMD_COMPLETE 0x1 -#define AMD_FP6_MUX_PORT_CMD_TIMEOUT 0x2 +#define AMD_FP6_MUX_PORT_STATUS_OFFSET 6 +#define AMD_FP6_MUX_PORT_CMD_BUSY 0x0 +#define AMD_FP6_MUX_PORT_CMD_COMPLETE 0x1 +#define AMD_FP6_MUX_PORT_CMD_TIMEOUT 0x2 -#define AMD_FP6_MUX_PD_STATUS_READY BIT(5) -#define AMD_FP6_MUX_PD_STATUS_OFFSET 1 +#define AMD_FP6_MUX_PD_STATUS_READY BIT(5) +#define AMD_FP6_MUX_PD_STATUS_OFFSET 1 #endif /* __CROS_EC_USB_MUX_AMD_FP6_H */ diff --git a/driver/usb_mux/anx3443.c b/driver/usb_mux/anx3443.c index c7158b645c..f3b0b08afd 100644 --- a/driver/usb_mux/anx3443.c +++ b/driver/usb_mux/anx3443.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -23,22 +23,21 @@ #define ANX3443_I2C_WAKE_TIMEOUT_MS 20 #define ANX3443_I2C_WAKE_RETRY_DELAY_US 500 -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) static struct { mux_state_t mux_state; bool awake; } saved_mux_state[CONFIG_USB_PD_PORT_MAX_COUNT]; -static inline int anx3443_read(const struct usb_mux *me, - uint8_t reg, int *val) +static inline int anx3443_read(const struct usb_mux *me, uint8_t reg, int *val) { return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); } -static inline int anx3443_write(const struct usb_mux *me, - uint8_t reg, uint8_t val) +static inline int anx3443_write(const struct usb_mux *me, uint8_t reg, + uint8_t val) { return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); } @@ -97,6 +96,10 @@ static int anx3443_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + saved_mux_state[me->usb_port].mux_state = mux_state; /* To disable both DP and USB the mux must be powered off. */ @@ -195,7 +198,7 @@ static bool anx3443_port_is_usb2_only(const struct usb_mux *me) static void anx3443_suspend(void) { for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - const struct usb_mux *mux = &usb_muxes[i]; + const struct usb_mux *mux = usb_muxes[i].mux; if (mux->driver != &anx3443_usb_mux_driver) continue; @@ -209,14 +212,14 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, anx3443_suspend, HOOK_PRIO_DEFAULT); static void anx3443_resume(void) { for (int i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - int port = usb_muxes[i].usb_port; + int port = usb_muxes[i].mux->usb_port; bool ack_required; - if (usb_muxes[i].driver != &anx3443_usb_mux_driver) + if (usb_muxes[i].mux->driver != &anx3443_usb_mux_driver) continue; - anx3443_set_mux(&usb_muxes[i], saved_mux_state[port].mux_state, - &ack_required); + anx3443_set_mux(usb_muxes[i].mux, + saved_mux_state[port].mux_state, &ack_required); } } DECLARE_HOOK(HOOK_CHIPSET_RESUME, anx3443_resume, HOOK_PRIO_DEFAULT); diff --git a/driver/usb_mux/anx3443.h b/driver/usb_mux/anx3443.h index a8e84d5e5e..bd2dc2bf45 100644 --- a/driver/usb_mux/anx3443.h +++ b/driver/usb_mux/anx3443.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -9,36 +9,36 @@ #ifndef __CROS_EC_USB_MUX_ANX3443_H #define __CROS_EC_USB_MUX_ANX3443_H -#define ANX3443_I2C_READY_DELAY (30 * MSEC) +#define ANX3443_I2C_READY_DELAY (30 * MSEC) /* I2C interface addresses */ -#define ANX3443_I2C_ADDR0_FLAGS 0x10 -#define ANX3443_I2C_ADDR1_FLAGS 0x14 -#define ANX3443_I2C_ADDR2_FLAGS 0x16 -#define ANX3443_I2C_ADDR3_FLAGS 0x11 +#define ANX3443_I2C_ADDR0_FLAGS 0x10 +#define ANX3443_I2C_ADDR1_FLAGS 0x14 +#define ANX3443_I2C_ADDR2_FLAGS 0x16 +#define ANX3443_I2C_ADDR3_FLAGS 0x11 /* This register is not documented in datasheet. */ -#define ANX3443_REG_POWER_CNTRL 0x2B -#define ANX3443_POWER_CNTRL_OFF 0xFF +#define ANX3443_REG_POWER_CNTRL 0x2B +#define ANX3443_POWER_CNTRL_OFF 0xFF -#define ANX3443_REG_USB_STATUS 0xD7 +#define ANX3443_REG_USB_STATUS 0xD7 /* status of downstream RX term */ -#define ANX3443_DN_EN_RTERM_ST BIT(7) +#define ANX3443_DN_EN_RTERM_ST BIT(7) /* status of upstream RX term */ -#define ANX3443_UP_EN_RTERM_ST BIT(6) +#define ANX3443_UP_EN_RTERM_ST BIT(6) /* Ultra low power control register */ -#define ANX3443_REG_ULTRA_LOW_POWER 0xE6 -#define ANX3443_ULTRA_LOW_POWER_EN 0x06 -#define ANX3443_ULTRA_LOW_POWER_DIS 0x00 +#define ANX3443_REG_ULTRA_LOW_POWER 0xE6 +#define ANX3443_ULTRA_LOW_POWER_EN 0x06 +#define ANX3443_ULTRA_LOW_POWER_DIS 0x00 /* Mux control register */ -#define ANX3443_REG_ULP_CFG_MODE 0xF8 -#define ANX3443_ULP_CFG_MODE_EN BIT(4) -#define ANX3443_ULP_CFG_MODE_SWAP BIT(3) -#define ANX3443_ULP_CFG_MODE_FLIP BIT(2) -#define ANX3443_ULP_CFG_MODE_DP_EN BIT(1) -#define ANX3443_ULP_CFG_MODE_USB_EN BIT(0) +#define ANX3443_REG_ULP_CFG_MODE 0xF8 +#define ANX3443_ULP_CFG_MODE_EN BIT(4) +#define ANX3443_ULP_CFG_MODE_SWAP BIT(3) +#define ANX3443_ULP_CFG_MODE_FLIP BIT(2) +#define ANX3443_ULP_CFG_MODE_DP_EN BIT(1) +#define ANX3443_ULP_CFG_MODE_USB_EN BIT(0) extern const struct usb_mux_driver anx3443_usb_mux_driver; diff --git a/driver/usb_mux/anx7440.c b/driver/usb_mux/anx7440.c index 89e593217d..456eaaa407 100644 --- a/driver/usb_mux/anx7440.c +++ b/driver/usb_mux/anx7440.c @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -13,17 +13,16 @@ #include "usb_mux.h" #include "util.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) -static inline int anx7440_read(const struct usb_mux *me, - uint8_t reg, int *val) +static inline int anx7440_read(const struct usb_mux *me, uint8_t reg, int *val) { return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); } -static inline int anx7440_write(const struct usb_mux *me, - uint8_t reg, uint8_t val) +static inline int anx7440_write(const struct usb_mux *me, uint8_t reg, + uint8_t val) { return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); } @@ -69,6 +68,10 @@ static int anx7440_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + res = anx7440_read(me, ANX7440_REG_CHIP_CTRL, ®); if (res) return res; diff --git a/driver/usb_mux/anx7440.h b/driver/usb_mux/anx7440.h index 2147e3146a..3849837cd2 100644 --- a/driver/usb_mux/anx7440.h +++ b/driver/usb_mux/anx7440.h @@ -1,4 +1,4 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. +/* Copyright 2019 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -16,25 +16,25 @@ #define I2C_ADDR_USB_MUX1_FLAGS ANX7440_I2C_ADDR2_FLAGS /* Vendor / Device Id registers and expected fused values */ -#define ANX7440_REG_VENDOR_ID_L 0x00 -#define ANX7440_VENDOR_ID_L 0xaa -#define ANX7440_REG_VENDOR_ID_H 0x01 -#define ANX7440_VENDOR_ID_H 0xaa -#define ANX7440_REG_DEVICE_ID_L 0x02 -#define ANX7440_DEVICE_ID_L 0x40 -#define ANX7440_REG_DEVICE_ID_H 0x03 -#define ANX7440_DEVICE_ID_H 0x74 +#define ANX7440_REG_VENDOR_ID_L 0x00 +#define ANX7440_VENDOR_ID_L 0xaa +#define ANX7440_REG_VENDOR_ID_H 0x01 +#define ANX7440_VENDOR_ID_H 0xaa +#define ANX7440_REG_DEVICE_ID_L 0x02 +#define ANX7440_DEVICE_ID_L 0x40 +#define ANX7440_REG_DEVICE_ID_H 0x03 +#define ANX7440_DEVICE_ID_H 0x74 #define ANX7440_REG_DEVICE_VERSION 0x04 -#define ANX7440_DEVICE_VERSION 0xCB +#define ANX7440_DEVICE_VERSION 0xCB /* Chip control register for checking mux state */ -#define ANX7440_REG_CHIP_CTRL 0x05 -#define ANX7440_CHIP_CTRL_FINAL_FLIP BIT(6) -#define ANX7440_CHIP_CTRL_OP_MODE_FINAL_DP BIT(5) +#define ANX7440_REG_CHIP_CTRL 0x05 +#define ANX7440_CHIP_CTRL_FINAL_FLIP BIT(6) +#define ANX7440_CHIP_CTRL_OP_MODE_FINAL_DP BIT(5) #define ANX7440_CHIP_CTRL_OP_MODE_FINAL_USB BIT(4) -#define ANX7440_CHIP_CTRL_SW_FLIP BIT(2) -#define ANX7440_CHIP_CTRL_SW_OP_MODE_DP BIT(1) -#define ANX7440_CHIP_CTRL_SW_OP_MODE_USB BIT(0) -#define ANX7440_CHIP_CTRL_SW_OP_MODE_CLEAR 0x7 +#define ANX7440_CHIP_CTRL_SW_FLIP BIT(2) +#define ANX7440_CHIP_CTRL_SW_OP_MODE_DP BIT(1) +#define ANX7440_CHIP_CTRL_SW_OP_MODE_USB BIT(0) +#define ANX7440_CHIP_CTRL_SW_OP_MODE_CLEAR 0x7 #endif /* __CROS_EC_USB_MUX_ANX7440_H */ diff --git a/driver/usb_mux/anx7451.c b/driver/usb_mux/anx7451.c index db56457bb8..b974128740 100644 --- a/driver/usb_mux/anx7451.c +++ b/driver/usb_mux/anx7451.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -22,17 +22,16 @@ #define ANX7451_I2C_WAKE_TIMEOUT_MS 20 #define ANX7451_I2C_WAKE_RETRY_DELAY_US 500 -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) -static inline int anx7451_read(const struct usb_mux *me, - uint8_t reg, int *val) +static inline int anx7451_read(const struct usb_mux *me, uint8_t reg, int *val) { return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); } -static inline int anx7451_write(const struct usb_mux *me, - uint8_t reg, uint8_t val) +static inline int anx7451_write(const struct usb_mux *me, uint8_t reg, + uint8_t val) { return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); } @@ -97,6 +96,10 @@ static int anx7451_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + /* * Mux is not powered in Z1, and will start up in USB mode. Ensure any * mux sets when off get run again so we don't leave the retimer on with diff --git a/driver/usb_mux/anx7451.h b/driver/usb_mux/anx7451.h index 7eefb6e79e..4b63d513fd 100644 --- a/driver/usb_mux/anx7451.h +++ b/driver/usb_mux/anx7451.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -12,38 +12,38 @@ #include "usb_mux.h" /* I2C interface addresses */ -#define ANX7451_I2C_ADDR0_FLAGS 0x10 -#define ANX7451_I2C_ADDR1_FLAGS 0x14 -#define ANX7451_I2C_ADDR2_FLAGS 0x16 -#define ANX7451_I2C_ADDR3_FLAGS 0x11 +#define ANX7451_I2C_ADDR0_FLAGS 0x10 +#define ANX7451_I2C_ADDR1_FLAGS 0x14 +#define ANX7451_I2C_ADDR2_FLAGS 0x16 +#define ANX7451_I2C_ADDR3_FLAGS 0x11 /* This register is not documented in datasheet. */ -#define ANX7451_REG_POWER_CNTRL 0x2B -#define ANX7451_POWER_CNTRL_OFF 0xFF +#define ANX7451_REG_POWER_CNTRL 0x2B +#define ANX7451_POWER_CNTRL_OFF 0xFF /* * Ultra low power control register. * On ANX7451, this register should always be 0 (disabled). * See figure 2-2 in family programming guide. */ -#define ANX7451_REG_ULTRA_LOW_POWER 0xE6 +#define ANX7451_REG_ULTRA_LOW_POWER 0xE6 /* #define ANX7451_ULTRA_LOW_POWER_EN 0x06 */ -#define ANX7451_ULTRA_LOW_POWER_DIS 0x00 +#define ANX7451_ULTRA_LOW_POWER_DIS 0x00 /* Mux control register */ -#define ANX7451_REG_ULP_CFG_MODE 0xF8 -#define ANX7451_ULP_CFG_MODE_EN BIT(4) -#define ANX7451_ULP_CFG_MODE_SWAP BIT(3) -#define ANX7451_ULP_CFG_MODE_FLIP BIT(2) -#define ANX7451_ULP_CFG_MODE_DP_EN BIT(1) -#define ANX7451_ULP_CFG_MODE_USB_EN BIT(0) +#define ANX7451_REG_ULP_CFG_MODE 0xF8 +#define ANX7451_ULP_CFG_MODE_EN BIT(4) +#define ANX7451_ULP_CFG_MODE_SWAP BIT(3) +#define ANX7451_ULP_CFG_MODE_FLIP BIT(2) +#define ANX7451_ULP_CFG_MODE_DP_EN BIT(1) +#define ANX7451_ULP_CFG_MODE_USB_EN BIT(0) /* Register to set USB I2C address, defaults to 0x29 (7-bit) */ -#define ANX7451_REG_USB_I2C_ADDR 0x38 +#define ANX7451_REG_USB_I2C_ADDR 0x38 /* ANX7451 AUX FLIP control */ -#define ANX7451_REG_USB_AUX_FLIP_CTRL 0xA4 -#define ANX7451_USB_AUX_FLIP_EN 0x20 +#define ANX7451_REG_USB_AUX_FLIP_CTRL 0xA4 +#define ANX7451_USB_AUX_FLIP_EN 0x20 extern const struct usb_mux_driver anx7451_usb_mux_driver; diff --git a/driver/usb_mux/it5205.c b/driver/usb_mux/it5205.c index 0cfecdeda0..de3d950c86 100644 --- a/driver/usb_mux/it5205.c +++ b/driver/usb_mux/it5205.c @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -25,15 +25,15 @@ static int it5205_write(const struct usb_mux *me, uint8_t reg, uint8_t val) static int it5205h_sbu_update(const struct usb_mux *me, uint8_t reg, uint8_t mask, enum mask_update_action action) { - return i2c_update8(me->i2c_port, IT5205H_SBU_I2C_ADDR_FLAGS, - reg, mask, action); + return i2c_update8(me->i2c_port, IT5205H_SBU_I2C_ADDR_FLAGS, reg, mask, + action); } static int it5205h_sbu_field_update(const struct usb_mux *me, uint8_t reg, uint8_t field_mask, uint8_t set_value) { - return i2c_field_update8(me->i2c_port, IT5205H_SBU_I2C_ADDR_FLAGS, - reg, field_mask, set_value); + return i2c_field_update8(me->i2c_port, IT5205H_SBU_I2C_ADDR_FLAGS, reg, + field_mask, set_value); } struct mux_chip_id_t { @@ -42,10 +42,10 @@ struct mux_chip_id_t { }; static const struct mux_chip_id_t mux_chip_id_verify[] = { - { '5', IT5205_REG_CHIP_ID3}, - { '2', IT5205_REG_CHIP_ID2}, - { '0', IT5205_REG_CHIP_ID1}, - { '5', IT5205_REG_CHIP_ID0}, + { '5', IT5205_REG_CHIP_ID3 }, + { '2', IT5205_REG_CHIP_ID2 }, + { '0', IT5205_REG_CHIP_ID1 }, + { '5', IT5205_REG_CHIP_ID0 }, }; static int it5205_init(const struct usb_mux *me) @@ -67,16 +67,16 @@ static int it5205_init(const struct usb_mux *me) } if (IS_ENABLED(CONFIG_USB_MUX_IT5205H_SBU_OVP)) { - RETURN_ERROR(it5205h_sbu_field_update(me, IT5205H_REG_VSR, - IT5205H_VREF_SELECT_MASK, - IT5205H_VREF_SELECT_3_3V)); + RETURN_ERROR(it5205h_sbu_field_update( + me, IT5205H_REG_VSR, IT5205H_VREF_SELECT_MASK, + IT5205H_VREF_SELECT_3_3V)); RETURN_ERROR(it5205h_sbu_field_update(me, IT5205H_REG_CSBUOVPSR, - IT5205H_OVP_SELECT_MASK, - IT5205H_OVP_3_68V)); + IT5205H_OVP_SELECT_MASK, + IT5205H_OVP_3_68V)); - RETURN_ERROR(it5205h_sbu_update(me, IT5205H_REG_ISR, - IT5205H_ISR_CSBU_MASK, MASK_CLR)); + RETURN_ERROR(it5205h_sbu_update( + me, IT5205H_REG_ISR, IT5205H_ISR_CSBU_MASK, MASK_CLR)); RETURN_ERROR(it5205h_enable_csbu_switch(me, true)); } @@ -86,8 +86,8 @@ static int it5205_init(const struct usb_mux *me) enum ec_error_list it5205h_enable_csbu_switch(const struct usb_mux *me, bool en) { - return it5205h_sbu_update(me, IT5205H_REG_CSBUSR, - IT5205H_CSBUSR_SWITCH, en ? MASK_SET : MASK_CLR); + return it5205h_sbu_update(me, IT5205H_REG_CSBUSR, IT5205H_CSBUSR_SWITCH, + en ? MASK_SET : MASK_CLR); } /* Writes control register to set switch mode */ @@ -99,6 +99,10 @@ static int it5205_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + switch (mux_state & MUX_STATE_DP_USB_MASK) { case USB_PD_MUX_USB_ENABLED: reg = IT5205_USB; diff --git a/driver/usb_mux/it5205.h b/driver/usb_mux/it5205.h index 0fb9f009f6..6a8fc2bb24 100644 --- a/driver/usb_mux/it5205.h +++ b/driver/usb_mux/it5205.h @@ -1,4 +1,4 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. +/* Copyright 2017 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -19,18 +19,17 @@ #define IT5205_REG_CHIP_ID0 0x7 /* MUX power down register */ -#define IT5205_REG_MUXPDR 0x10 -#define IT5205_MUX_POWER_DOWN BIT(0) +#define IT5205_REG_MUXPDR 0x10 +#define IT5205_MUX_POWER_DOWN BIT(0) /* MUX control register */ -#define IT5205_REG_MUXCR 0x11 +#define IT5205_REG_MUXCR 0x11 #define IT5205_POLARITY_INVERTED BIT(4) -#define IT5205_DP_USB_CTRL_MASK 0x0f -#define IT5205_DP 0x0f -#define IT5205_DP_USB 0x03 -#define IT5205_USB 0x07 - +#define IT5205_DP_USB_CTRL_MASK 0x0f +#define IT5205_DP 0x0f +#define IT5205_DP_USB 0x03 +#define IT5205_USB 0x07 /* IT5205-H SBU module */ @@ -38,27 +37,27 @@ #define IT5205H_SBU_I2C_ADDR_FLAGS 0x6a /* Vref Select Register */ -#define IT5205H_REG_VSR 0x10 -#define IT5205H_VREF_SELECT_MASK 0x30 -#define IT5205H_VREF_SELECT_3_3V 0x00 -#define IT5205H_VREF_SELECT_OFF 0x20 +#define IT5205H_REG_VSR 0x10 +#define IT5205H_VREF_SELECT_MASK 0x30 +#define IT5205H_VREF_SELECT_3_3V 0x00 +#define IT5205H_VREF_SELECT_OFF 0x20 /* CSBU OVP Select Register */ -#define IT5205H_REG_CSBUOVPSR 0x1e -#define IT5205H_OVP_SELECT_MASK 0x30 -#define IT5205H_OVP_3_90V 0x00 -#define IT5205H_OVP_3_68V 0x10 -#define IT5205H_OVP_3_62V 0x20 -#define IT5205H_OVP_3_57V 0x30 +#define IT5205H_REG_CSBUOVPSR 0x1e +#define IT5205H_OVP_SELECT_MASK 0x30 +#define IT5205H_OVP_3_90V 0x00 +#define IT5205H_OVP_3_68V 0x10 +#define IT5205H_OVP_3_62V 0x20 +#define IT5205H_OVP_3_57V 0x30 /* CSBU Switch Register */ -#define IT5205H_REG_CSBUSR 0x22 -#define IT5205H_CSBUSR_SWITCH BIT(0) +#define IT5205H_REG_CSBUSR 0x22 +#define IT5205H_CSBUSR_SWITCH BIT(0) /* Interrupt Switch Register */ -#define IT5205H_REG_ISR 0x25 -#define IT5205H_ISR_CSBU_MASK BIT(4) -#define IT5205H_ISR_CSBU_OVP BIT(0) +#define IT5205H_REG_ISR 0x25 +#define IT5205H_ISR_CSBU_MASK BIT(4) +#define IT5205H_ISR_CSBU_OVP BIT(0) enum ec_error_list it5205h_enable_csbu_switch(const struct usb_mux *me, bool en); diff --git a/driver/usb_mux/pi3usb3x532.c b/driver/usb_mux/pi3usb3x532.c index 2435157967..54eff928b7 100644 --- a/driver/usb_mux/pi3usb3x532.c +++ b/driver/usb_mux/pi3usb3x532.c @@ -1,4 +1,4 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. +/* Copyright 2015 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,8 +11,7 @@ #include "usb_mux.h" #include "util.h" -static int pi3usb3x532_read(const struct usb_mux *me, - uint8_t reg, uint8_t *val) +static int pi3usb3x532_read(const struct usb_mux *me, uint8_t reg, uint8_t *val) { int read, res; @@ -33,8 +32,7 @@ static int pi3usb3x532_read(const struct usb_mux *me, return EC_SUCCESS; } -static int pi3usb3x532_write(const struct usb_mux *me, - uint8_t reg, uint8_t val) +static int pi3usb3x532_write(const struct usb_mux *me, uint8_t reg, uint8_t val) { if (reg != PI3USB3X532_REG_CONTROL) return EC_ERROR_UNKNOWN; @@ -58,11 +56,10 @@ int pi3usb3x532_check_vendor(const struct usb_mux *me, int *val) static int pi3usb3x532_reset(const struct usb_mux *me) { - return pi3usb3x532_write( - me, - PI3USB3X532_REG_CONTROL, - (PI3USB3X532_MODE_POWERDOWN & PI3USB3X532_CTRL_MASK) | - PI3USB3X532_CTRL_RSVD); + return pi3usb3x532_write(me, PI3USB3X532_REG_CONTROL, + (PI3USB3X532_MODE_POWERDOWN & + PI3USB3X532_CTRL_MASK) | + PI3USB3X532_CTRL_RSVD); } static int pi3usb3x532_init(const struct usb_mux *me) @@ -83,8 +80,7 @@ static int pi3usb3x532_init(const struct usb_mux *me) } /* Writes control register to set switch mode */ -static int pi3usb3x532_set_mux(const struct usb_mux *me, - mux_state_t mux_state, +static int pi3usb3x532_set_mux(const struct usb_mux *me, mux_state_t mux_state, bool *ack_required) { uint8_t reg = 0; @@ -92,6 +88,10 @@ static int pi3usb3x532_set_mux(const struct usb_mux *me, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + if (mux_state & USB_PD_MUX_USB_ENABLED) reg |= PI3USB3X532_MODE_USB; if (mux_state & USB_PD_MUX_DP_ENABLED) @@ -104,8 +104,7 @@ static int pi3usb3x532_set_mux(const struct usb_mux *me, } /* Reads control register and updates mux_state accordingly */ -static int pi3usb3x532_get_mux(const struct usb_mux *me, - mux_state_t *mux_state) +static int pi3usb3x532_get_mux(const struct usb_mux *me, mux_state_t *mux_state) { uint8_t reg = 0; uint8_t res; diff --git a/driver/usb_mux/pi3usb3x532.h b/driver/usb_mux/pi3usb3x532.h index 6b398fdace..9214d349f0 100644 --- a/driver/usb_mux/pi3usb3x532.h +++ b/driver/usb_mux/pi3usb3x532.h @@ -1,4 +1,4 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. +/* Copyright 2015 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -70,8 +70,8 @@ * dp0-1 : rx1, tx1 * hpd+/-: rfu2, rfu1 */ -#define PI3USB3X532_MODE_DP_USB_SWAP (PI3USB3X532_MODE_DP_USB | \ - PI3USB3X532_BIT_SWAP) +#define PI3USB3X532_MODE_DP_USB_SWAP \ + (PI3USB3X532_MODE_DP_USB | PI3USB3X532_BIT_SWAP) /* Get Vendor ID */ int pi3usb3x532_check_vendor(const struct usb_mux *me, int *val); diff --git a/driver/usb_mux/ps8740.c b/driver/usb_mux/ps8740.c index 618c74cd65..557c4f1976 100644 --- a/driver/usb_mux/ps8740.c +++ b/driver/usb_mux/ps8740.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -14,14 +14,12 @@ int ps8740_read(const struct usb_mux *me, uint8_t reg, int *val) { - return i2c_read8(me->i2c_port, me->i2c_addr_flags, - reg, val); + return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); } int ps8740_write(const struct usb_mux *me, uint8_t reg, uint8_t val) { - return i2c_write8(me->i2c_port, me->i2c_addr_flags, - reg, val); + return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); } static int ps8740_init(const struct usb_mux *me) @@ -42,7 +40,7 @@ static int ps8740_init(const struct usb_mux *me) if (res) return res; - res = ps8740_read(me, PS8740_REG_CHIP_ID2, &id2); + res = ps8740_read(me, PS8740_REG_CHIP_ID2, &id2); if (res) return res; @@ -78,6 +76,10 @@ static int ps8740_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + if (mux_state & USB_PD_MUX_USB_ENABLED) reg |= PS8740_MODE_USB_ENABLED; if (mux_state & USB_PD_MUX_DP_ENABLED) diff --git a/driver/usb_mux/ps8740.h b/driver/usb_mux/ps8740.h index 3a669b5ad9..0b29a80cf1 100644 --- a/driver/usb_mux/ps8740.h +++ b/driver/usb_mux/ps8740.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,67 +11,67 @@ #include "usb_mux.h" -#define PS8740_I2C_ADDR0_FLAG 0x10 -#define PS8740_I2C_ADDR1_FLAG 0x11 -#define PS8740_I2C_ADDR2_FLAG 0x19 -#define PS8740_I2C_ADDR3_FLAG 0x1a +#define PS8740_I2C_ADDR0_FLAG 0x10 +#define PS8740_I2C_ADDR1_FLAG 0x11 +#define PS8740_I2C_ADDR2_FLAG 0x19 +#define PS8740_I2C_ADDR3_FLAG 0x1a /* Mode register for setting mux */ #define PS8740_REG_MODE 0x00 #define PS8740_MODE_POLARITY_INVERTED BIT(4) -#define PS8740_MODE_USB_ENABLED BIT(5) -#define PS8740_MODE_DP_ENABLED BIT(6) +#define PS8740_MODE_USB_ENABLED BIT(5) +#define PS8740_MODE_DP_ENABLED BIT(6) #ifdef CONFIG_USB_MUX_PS8740 - #define PS8740_MODE_POWER_DOWN BIT(7) +#define PS8740_MODE_POWER_DOWN BIT(7) #elif defined(CONFIG_USB_MUX_PS8742) - #define PS8740_MODE_CE_DP_ENABLED BIT(7) - /* To reset the state machine to default */ - #define PS8740_MODE_POWER_DOWN 0 +#define PS8740_MODE_CE_DP_ENABLED BIT(7) +/* To reset the state machine to default */ +#define PS8740_MODE_POWER_DOWN 0 #endif /* Status register for checking mux state */ #define PS8740_REG_STATUS 0x09 #define PS8740_STATUS_POLARITY_INVERTED BIT(2) -#define PS8740_STATUS_USB_ENABLED BIT(3) -#define PS8740_STATUS_DP_ENABLED BIT(4) -#define PS8740_STATUS_HPD_ASSERTED BIT(7) +#define PS8740_STATUS_USB_ENABLED BIT(3) +#define PS8740_STATUS_DP_ENABLED BIT(4) +#define PS8740_STATUS_HPD_ASSERTED BIT(7) /* Chip ID / revision registers and expected fused values */ #define PS8740_REG_REVISION_ID1 0xf0 #define PS8740_REG_REVISION_ID2 0xf1 -#define PS8740_REG_CHIP_ID1 0xf2 -#define PS8740_REG_CHIP_ID2 0xf3 +#define PS8740_REG_CHIP_ID1 0xf2 +#define PS8740_REG_CHIP_ID2 0xf3 #ifdef CONFIG_USB_MUX_PS8740 - #define PS8740_REVISION_ID1 0x00 - #define PS8740_REVISION_ID2_0 0x0a - #define PS8740_REVISION_ID2_1 0x0b - #define PS8740_CHIP_ID1 0x40 +#define PS8740_REVISION_ID1 0x00 +#define PS8740_REVISION_ID2_0 0x0a +#define PS8740_REVISION_ID2_1 0x0b +#define PS8740_CHIP_ID1 0x40 #elif defined(CONFIG_USB_MUX_PS8742) - #define PS8740_REVISION_ID1 0x01 - #define PS8740_REVISION_ID2_0 0x0a - #define PS8740_REVISION_ID2_1 0x0a - #define PS8740_CHIP_ID1 0x42 +#define PS8740_REVISION_ID1 0x01 +#define PS8740_REVISION_ID2_0 0x0a +#define PS8740_REVISION_ID2_1 0x0a +#define PS8740_CHIP_ID1 0x42 #endif -#define PS8740_CHIP_ID2 0x87 +#define PS8740_CHIP_ID2 0x87 /* USB equalization settings for Host to Mux */ -#define PS8740_REG_USB_EQ_TX 0x32 +#define PS8740_REG_USB_EQ_TX 0x32 #define PS8740_USB_EQ_TX_10_1_DB 0x00 #define PS8740_USB_EQ_TX_14_3_DB 0x20 -#define PS8740_USB_EQ_TX_8_5_DB 0x40 -#define PS8740_USB_EQ_TX_6_5_DB 0x60 +#define PS8740_USB_EQ_TX_8_5_DB 0x40 +#define PS8740_USB_EQ_TX_6_5_DB 0x60 #define PS8740_USB_EQ_TX_11_5_DB 0x80 -#define PS8740_USB_EQ_TX_9_5_DB 0xc0 -#define PS8740_USB_EQ_TX_7_5_DB 0xe0 +#define PS8740_USB_EQ_TX_9_5_DB 0xc0 +#define PS8740_USB_EQ_TX_7_5_DB 0xe0 #define PS8740_USB_EQ_TERM_100_OHM (0 << 2) -#define PS8740_USB_EQ_TERM_85_OHM BIT(2) +#define PS8740_USB_EQ_TERM_85_OHM BIT(2) /* USB equalization settings for Connector to Mux */ -#define PS8740_REG_USB_EQ_RX 0x3b -#define PS8740_USB_EQ_RX_4_4_DB 0x00 -#define PS8740_USB_EQ_RX_7_0_DB 0x10 -#define PS8740_USB_EQ_RX_8_2_DB 0x20 -#define PS8740_USB_EQ_RX_9_4_DB 0x30 +#define PS8740_REG_USB_EQ_RX 0x3b +#define PS8740_USB_EQ_RX_4_4_DB 0x00 +#define PS8740_USB_EQ_RX_7_0_DB 0x10 +#define PS8740_USB_EQ_RX_8_2_DB 0x20 +#define PS8740_USB_EQ_RX_9_4_DB 0x30 #define PS8740_USB_EQ_RX_10_2_DB 0x40 #define PS8740_USB_EQ_RX_11_4_DB 0x50 #define PS8740_USB_EQ_RX_14_3_DB 0x60 diff --git a/driver/usb_mux/ps8743.c b/driver/usb_mux/ps8743.c index 28ad5e9546..86f0a7f9b2 100644 --- a/driver/usb_mux/ps8743.c +++ b/driver/usb_mux/ps8743.c @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -25,24 +25,21 @@ static enum usb_conn_status saved_usb_conn_status[CONFIG_USB_PD_PORT_MAX_COUNT]; int ps8743_read(const struct usb_mux *me, uint8_t reg, int *val) { - return i2c_read8(me->i2c_port, me->i2c_addr_flags, - reg, val); + return i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val); } int ps8743_write(const struct usb_mux *me, uint8_t reg, uint8_t val) { - return i2c_write8(me->i2c_port, me->i2c_addr_flags, - reg, val); + return i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val); } int ps8743_field_update(const struct usb_mux *me, uint8_t reg, uint8_t mask, uint8_t val) { - return i2c_field_update8(me->i2c_port, me->i2c_addr_flags, - reg, mask, val); + return i2c_field_update8(me->i2c_port, me->i2c_addr_flags, reg, mask, + val); } - int ps8743_check_chip_id(const struct usb_mux *me, int *val) { int id1; @@ -56,7 +53,7 @@ int ps8743_check_chip_id(const struct usb_mux *me, int *val) if (res) return res; - res = ps8743_read(me, PS8743_REG_CHIP_ID2, &id2); + res = ps8743_read(me, PS8743_REG_CHIP_ID2, &id2); if (res) return res; @@ -83,7 +80,7 @@ static int ps8743_init(const struct usb_mux *me) if (res) return res; - res = ps8743_read(me, PS8743_REG_CHIP_ID2, &id2); + res = ps8743_read(me, PS8743_REG_CHIP_ID2, &id2); if (res) return res; @@ -121,14 +118,17 @@ static int ps8743_set_mux(const struct usb_mux *me, mux_state_t mux_state, * For CE_DP, CE_USB, and FLIP, disable pin control and enable I2C * control. */ - uint8_t reg = (PS8743_MODE_IN_HPD_CONTROL | - PS8743_MODE_DP_REG_CONTROL | - PS8743_MODE_USB_REG_CONTROL | - PS8743_MODE_FLIP_REG_CONTROL); + uint8_t reg = + (PS8743_MODE_IN_HPD_CONTROL | PS8743_MODE_DP_REG_CONTROL | + PS8743_MODE_USB_REG_CONTROL | PS8743_MODE_FLIP_REG_CONTROL); /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + if (mux_state & USB_PD_MUX_USB_ENABLED) reg |= PS8743_MODE_USB_ENABLE; else @@ -214,7 +214,7 @@ static enum usb_conn_status ps8743_get_usb_conn_status(const struct usb_mux *me) static void ps8743_suspend(void) { for (int i = 0; i < board_get_usb_pd_port_count(); i++) { - const struct usb_mux *mux = &usb_muxes[i]; + const struct usb_mux *mux = usb_muxes[i].mux; if (mux->driver != &ps8743_usb_mux_driver) continue; @@ -233,7 +233,7 @@ DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, ps8743_suspend, HOOK_PRIO_DEFAULT); static void ps8743_resume(void) { for (int i = 0; i < board_get_usb_pd_port_count(); i++) { - const struct usb_mux *mux = &usb_muxes[i]; + const struct usb_mux *mux = usb_muxes[i].mux; if (mux->driver != &ps8743_usb_mux_driver) continue; diff --git a/driver/usb_mux/ps8743.h b/driver/usb_mux/ps8743.h index 8e3a9d9b4c..e34d4f93e4 100644 --- a/driver/usb_mux/ps8743.h +++ b/driver/usb_mux/ps8743.h @@ -1,4 +1,4 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. +/* Copyright 2020 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -14,30 +14,30 @@ /* Status register for checking mux state */ #define PS8743_REG_STATUS 0x09 #define PS8743_STATUS_POLARITY_INVERTED BIT(2) -#define PS8743_STATUS_USB_ENABLED BIT(3) -#define PS8743_STATUS_DP_ENABLED BIT(4) -#define PS8743_STATUS_HPD_ASSERTED BIT(7) +#define PS8743_STATUS_USB_ENABLED BIT(3) +#define PS8743_STATUS_DP_ENABLED BIT(4) +#define PS8743_STATUS_HPD_ASSERTED BIT(7) /* Chip ID / revision registers and expected fused values */ #define PS8743_REG_REVISION_ID1 0xf0 #define PS8743_REG_REVISION_ID2 0xf1 -#define PS8743_REG_CHIP_ID1 0xf2 -#define PS8743_REG_CHIP_ID2 0xf3 -#define PS8743_REVISION_ID1_0 0x00 -#define PS8743_REVISION_ID1_1 0x01 -#define PS8743_REVISION_ID2 0x0b -#define PS8743_CHIP_ID1 0x41 -#define PS8743_CHIP_ID2 0x87 +#define PS8743_REG_CHIP_ID1 0xf2 +#define PS8743_REG_CHIP_ID2 0xf3 +#define PS8743_REVISION_ID1_0 0x00 +#define PS8743_REVISION_ID1_1 0x01 +#define PS8743_REVISION_ID2 0x0b +#define PS8743_CHIP_ID1 0x41 +#define PS8743_CHIP_ID2 0x87 /* Misc register for checking DCI / SS pair mode status */ -#define PS8743_MISC_DCI_SS_MODES 0x42 +#define PS8743_MISC_DCI_SS_MODES 0x42 #define PS8743_SSTX_NORMAL_OPERATION_MODE BIT(4) -#define PS8743_SSTX_POWER_SAVING_MODE BIT(5) -#define PS8743_SSTX_SUSPEND_MODE BIT(6) +#define PS8743_SSTX_POWER_SAVING_MODE BIT(5) +#define PS8743_SSTX_SUSPEND_MODE BIT(6) /* Misc resiger for checking HPD / DP / USB / FLIP mode status */ #define PS8743_MISC_HPD_DP_USB_FLIP 0x09 -#define PS8743_USB_MODE_STATUS BIT(3) -#define PS8743_DP_MODE_STATUS BIT(4) +#define PS8743_USB_MODE_STATUS BIT(3) +#define PS8743_DP_MODE_STATUS BIT(4) #endif /* __CROS_EC_PS8743_H */ diff --git a/driver/usb_mux/ps8822.c b/driver/usb_mux/ps8822.c index 7f25db37f4..d3ea76965d 100644 --- a/driver/usb_mux/ps8822.c +++ b/driver/usb_mux/ps8822.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -15,15 +15,13 @@ static int ps8822_read(const struct usb_mux *me, int page, uint8_t reg, int *val) { - return i2c_read8(me->i2c_port, me->i2c_addr_flags + page, - reg, val); + return i2c_read8(me->i2c_port, me->i2c_addr_flags + page, reg, val); } static int ps8822_write(const struct usb_mux *me, int page, uint8_t reg, int val) { - return i2c_write8(me->i2c_port, me->i2c_addr_flags + page, - reg, val); + return i2c_write8(me->i2c_port, me->i2c_addr_flags + page, reg, val); } int ps8822_set_dp_rx_eq(const struct usb_mux *me, int db) @@ -32,8 +30,7 @@ int ps8822_set_dp_rx_eq(const struct usb_mux *me, int db) int rv; /* Read DP EQ register */ - rv = ps8822_read(me, PS8822_REG_PAGE1, PS8822_REG_DP_EQ, - &dpeq_reg); + rv = ps8822_read(me, PS8822_REG_PAGE1, PS8822_REG_DP_EQ, &dpeq_reg); if (rv) return rv; @@ -44,13 +41,11 @@ int ps8822_set_dp_rx_eq(const struct usb_mux *me, int db) dpeq_reg &= ~PS8822_DP_EQ_AUTO_EN; /* Set gain to the requested value */ - dpeq_reg &= ~(PS8822_DPEQ_LEVEL_UP_MASK << - PS8822_REG_DP_EQ_SHIFT); + dpeq_reg &= ~(PS8822_DPEQ_LEVEL_UP_MASK << PS8822_REG_DP_EQ_SHIFT); dpeq_reg |= (db << PS8822_REG_DP_EQ_SHIFT); /* Apply new EQ setting */ - return ps8822_write(me, PS8822_REG_PAGE1, PS8822_REG_DP_EQ, - dpeq_reg); + return ps8822_write(me, PS8822_REG_PAGE1, PS8822_REG_DP_EQ, dpeq_reg); } static int ps8822_init(const struct usb_mux *me) @@ -88,6 +83,10 @@ static int ps8822_set_mux(const struct usb_mux *me, mux_state_t mux_state, /* This driver does not use host command ACKs */ *ack_required = false; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + rv = ps8822_read(me, PS8822_REG_PAGE0, PS8822_REG_MODE, ®); if (rv) return rv; @@ -126,7 +125,6 @@ static int ps8822_get_mux(const struct usb_mux *me, mux_state_t *mux_state) return EC_SUCCESS; } - const struct usb_mux_driver ps8822_usb_mux_driver = { .init = ps8822_init, .set = ps8822_set_mux, diff --git a/driver/usb_mux/ps8822.h b/driver/usb_mux/ps8822.h index 86b911db70..4f7503b21b 100644 --- a/driver/usb_mux/ps8822.h +++ b/driver/usb_mux/ps8822.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -11,48 +11,48 @@ #include "usb_mux.h" -#define PS8822_I2C_ADDR0_FLAG 0x10 -#define PS8822_I2C_ADDR1_FLAG 0x18 -#define PS8822_I2C_ADDR2_FLAG 0x58 -#define PS8822_I2C_ADDR3_FLAG 0x60 +#define PS8822_I2C_ADDR0_FLAG 0x10 +#define PS8822_I2C_ADDR1_FLAG 0x18 +#define PS8822_I2C_ADDR2_FLAG 0x58 +#define PS8822_I2C_ADDR3_FLAG 0x60 -#define PS8822_REG_PAGE0 0x00 +#define PS8822_REG_PAGE0 0x00 /* Mode register for setting mux */ -#define PS8822_REG_MODE 0x01 -#define PS8822_MODE_ALT_DP_EN BIT(7) -#define PS8822_MODE_USB_EN BIT(6) -#define PS8822_MODE_FLIP BIT(5) -#define PS8822_MODE_PIN_E BIT(4) +#define PS8822_REG_MODE 0x01 +#define PS8822_MODE_ALT_DP_EN BIT(7) +#define PS8822_MODE_USB_EN BIT(6) +#define PS8822_MODE_FLIP BIT(5) +#define PS8822_MODE_PIN_E BIT(4) -#define PS8822_REG_CONFIG 0x02 +#define PS8822_REG_CONFIG 0x02 #define PS8822_CONFIG_HPD_IN_DIS BIT(7) -#define PS8822_CONFIG_DP_PLUG BIT(6) +#define PS8822_CONFIG_DP_PLUG BIT(6) -#define PS8822_REG_DEV_ID1 0x06 -#define PS8822_REG_DEV_ID2 0x07 -#define PS8822_REG_DEV_ID3 0x08 -#define PS8822_REG_DEV_ID4 0x09 -#define PS8822_REG_DEV_ID5 0x0A -#define PS8822_REG_DEV_ID6 0x0B +#define PS8822_REG_DEV_ID1 0x06 +#define PS8822_REG_DEV_ID2 0x07 +#define PS8822_REG_DEV_ID3 0x08 +#define PS8822_REG_DEV_ID4 0x09 +#define PS8822_REG_DEV_ID5 0x0A +#define PS8822_REG_DEV_ID6 0x0B #define PS8822_ID_LEN 6 -#define PS8822_REG_PAGE1 0x01 -#define PS8822_REG_DP_EQ 0xB6 -#define PS8822_DP_EQ_AUTO_EN BIT(7) +#define PS8822_REG_PAGE1 0x01 +#define PS8822_REG_DP_EQ 0xB6 +#define PS8822_DP_EQ_AUTO_EN BIT(7) -#define PS8822_DPEQ_LEVEL_UP_9DB 0x00 -#define PS8822_DPEQ_LEVEL_UP_11DB 0x01 -#define PS8822_DPEQ_LEVEL_UP_12DB 0x02 -#define PS8822_DPEQ_LEVEL_UP_14DB 0x03 -#define PS8822_DPEQ_LEVEL_UP_17DB 0x04 -#define PS8822_DPEQ_LEVEL_UP_18DB 0x05 -#define PS8822_DPEQ_LEVEL_UP_19DB 0x06 -#define PS8822_DPEQ_LEVEL_UP_20DB 0x07 -#define PS8822_DPEQ_LEVEL_UP_21DB 0x08 -#define PS8822_DPEQ_LEVEL_UP_MASK 0x0F -#define PS8822_REG_DP_EQ_SHIFT 3 +#define PS8822_DPEQ_LEVEL_UP_9DB 0x00 +#define PS8822_DPEQ_LEVEL_UP_11DB 0x01 +#define PS8822_DPEQ_LEVEL_UP_12DB 0x02 +#define PS8822_DPEQ_LEVEL_UP_14DB 0x03 +#define PS8822_DPEQ_LEVEL_UP_17DB 0x04 +#define PS8822_DPEQ_LEVEL_UP_18DB 0x05 +#define PS8822_DPEQ_LEVEL_UP_19DB 0x06 +#define PS8822_DPEQ_LEVEL_UP_20DB 0x07 +#define PS8822_DPEQ_LEVEL_UP_21DB 0x08 +#define PS8822_DPEQ_LEVEL_UP_MASK 0x0F +#define PS8822_REG_DP_EQ_SHIFT 3 /** * Set DP Rx Equalization value diff --git a/driver/usb_mux/tusb1064.c b/driver/usb_mux/tusb1064.c index 0d48725d40..7fd6cfe561 100644 --- a/driver/usb_mux/tusb1064.c +++ b/driver/usb_mux/tusb1064.c @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -7,27 +7,27 @@ #include "tusb1064.h" #include "usb_mux.h" -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) #if defined(CONFIG_USB_MUX_TUSB1044) + defined(CONFIG_USB_MUX_TUSB1064) + \ - defined(CONFIG_USB_MUX_TUSB546) != 1 + defined(CONFIG_USB_MUX_TUSB546) != \ + 1 #error "Must choose exactly one of CONFIG_USB_MUX_TUSB{546,1044,1064}" #endif static int tusb1064_read(const struct usb_mux *me, uint8_t reg, uint8_t *val) { int buffer = 0xee; - int res = i2c_read8(me->i2c_port, me->i2c_addr_flags, - (int)reg, &buffer); + int res = + i2c_read8(me->i2c_port, me->i2c_addr_flags, (int)reg, &buffer); *val = buffer; return res; } static int tusb1064_write(const struct usb_mux *me, uint8_t reg, uint8_t val) { - return i2c_write8(me->i2c_port, me->i2c_addr_flags, - (int)reg, (int)val); + return i2c_write8(me->i2c_port, me->i2c_addr_flags, (int)reg, (int)val); } #if defined(CONFIG_USB_MUX_TUSB1044) @@ -96,13 +96,17 @@ static int tusb1064_set_mux(const struct usb_mux *me, mux_state_t mux_state, int rv; int mask; + /* This driver treats safe mode as none */ + if (mux_state == USB_PD_MUX_SAFE_MODE) + mux_state = USB_PD_MUX_NONE; + rv = tusb1064_read(me, TUSB1064_REG_GENERAL, ®); if (rv) return rv; /* Mask bits that may be set in this function */ mask = REG_GENERAL_CTLSEL_USB3 | REG_GENERAL_CTLSEL_ANYDP | - REG_GENERAL_FLIPSEL; + REG_GENERAL_FLIPSEL; #if defined(CONFIG_USB_MUX_TUSB1044) || defined(CONFIG_USB_MUX_TUSB546) mask |= REG_GENERAL_HPDIN_OVERRIDE; #endif diff --git a/driver/usb_mux/tusb1064.h b/driver/usb_mux/tusb1064.h index d6eb649532..1a38290174 100644 --- a/driver/usb_mux/tusb1064.h +++ b/driver/usb_mux/tusb1064.h @@ -1,4 +1,4 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. +/* Copyright 2021 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -17,43 +17,43 @@ * F -> floating * 1 -> tied to VCC */ -#define TUSB1064_I2C_ADDR0_FLAGS 0x44 -#define TUSB1064_I2C_ADDR1_FLAGS 0x45 -#define TUSB1064_I2C_ADDR2_FLAGS 0x46 -#define TUSB1064_I2C_ADDR3_FLAGS 0x47 -#define TUSB1064_I2C_ADDR4_FLAGS 0x20 -#define TUSB1064_I2C_ADDR5_FLAGS 0x21 -#define TUSB1064_I2C_ADDR6_FLAGS 0x22 -#define TUSB1064_I2C_ADDR7_FLAGS 0x23 -#define TUSB1064_I2C_ADDR8_FLAGS 0x10 -#define TUSB1064_I2C_ADDR9_FLAGS 0x11 -#define TUSB1064_I2C_ADDR10_FLAGS 0x12 -#define TUSB1064_I2C_ADDR11_FLAGS 0x13 -#define TUSB1064_I2C_ADDR12_FLAGS 0x0C -#define TUSB1064_I2C_ADDR13_FLAGS 0x0D -#define TUSB1064_I2C_ADDR14_FLAGS 0x0E -#define TUSB1064_I2C_ADDR15_FLAGS 0x0F +#define TUSB1064_I2C_ADDR0_FLAGS 0x44 +#define TUSB1064_I2C_ADDR1_FLAGS 0x45 +#define TUSB1064_I2C_ADDR2_FLAGS 0x46 +#define TUSB1064_I2C_ADDR3_FLAGS 0x47 +#define TUSB1064_I2C_ADDR4_FLAGS 0x20 +#define TUSB1064_I2C_ADDR5_FLAGS 0x21 +#define TUSB1064_I2C_ADDR6_FLAGS 0x22 +#define TUSB1064_I2C_ADDR7_FLAGS 0x23 +#define TUSB1064_I2C_ADDR8_FLAGS 0x10 +#define TUSB1064_I2C_ADDR9_FLAGS 0x11 +#define TUSB1064_I2C_ADDR10_FLAGS 0x12 +#define TUSB1064_I2C_ADDR11_FLAGS 0x13 +#define TUSB1064_I2C_ADDR12_FLAGS 0x0C +#define TUSB1064_I2C_ADDR13_FLAGS 0x0D +#define TUSB1064_I2C_ADDR14_FLAGS 0x0E +#define TUSB1064_I2C_ADDR15_FLAGS 0x0F /* TUSB1064 General Register */ -#define TUSB1064_REG_GENERAL 0x0a -#define REG_GENERAL_CTLSEL_USB3 BIT(0) -#define REG_GENERAL_CTLSEL_ANYDP BIT(1) -#define REG_GENERAL_FLIPSEL BIT(2) +#define TUSB1064_REG_GENERAL 0x0a +#define REG_GENERAL_CTLSEL_USB3 BIT(0) +#define REG_GENERAL_CTLSEL_ANYDP BIT(1) +#define REG_GENERAL_FLIPSEL BIT(2) #if defined(CONFIG_USB_MUX_TUSB1044) || defined(CONFIG_USB_MUX_TUSB546) -#define REG_GENERAL_HPDIN_OVERRIDE BIT(3) +#define REG_GENERAL_HPDIN_OVERRIDE BIT(3) #else -#define REG_GENERAL_DP_EN_CTRL BIT(3) +#define REG_GENERAL_DP_EN_CTRL BIT(3) #endif -#define REG_GENERAL_EQ_OVERRIDE BIT(4) +#define REG_GENERAL_EQ_OVERRIDE BIT(4) /* AUX and DP Lane Control Register */ -#define TUSB1064_REG_AUXDPCTRL 0x13 +#define TUSB1064_REG_AUXDPCTRL 0x13 #define TUSB1064_AUXDPCTRL_AUX_SNOOP_DISABLE BIT(7) -#define TUSB1064_AUXDPCTRL_AUX_SBU_OVR 0x30 -#define TUSB1064_AUXDPCTRL_DP3_DISABLE BIT(3) -#define TUSB1064_AUXDPCTRL_DP2_DISABLE BIT(2) -#define TUSB1064_AUXDPCTRL_DP1_DISABLE BIT(1) -#define TUSB1064_AUXDPCTRL_DP0_DISABLE BIT(0) +#define TUSB1064_AUXDPCTRL_AUX_SBU_OVR 0x30 +#define TUSB1064_AUXDPCTRL_DP3_DISABLE BIT(3) +#define TUSB1064_AUXDPCTRL_DP2_DISABLE BIT(2) +#define TUSB1064_AUXDPCTRL_DP1_DISABLE BIT(1) +#define TUSB1064_AUXDPCTRL_DP0_DISABLE BIT(0) /* Receiver Equalization GPIO Control */ #define TUSB1064_REG_DP1DP3EQ_SEL 0x10 @@ -78,19 +78,18 @@ #define TUSB1064_DP_EQ_RX_12_1_DB 0xF #ifndef TUSB1064_DP1EQ -#define TUSB1064_DP1EQ(nr) ((nr) << 4) +#define TUSB1064_DP1EQ(nr) ((nr) << 4) #endif #ifndef TUSB1064_DP3EQ -#define TUSB1064_DP3EQ(nr) ((nr) << 0) +#define TUSB1064_DP3EQ(nr) ((nr) << 0) #endif #ifndef TUSB1064_DP0EQ -#define TUSB1064_DP0EQ(nr) ((nr) << 4) +#define TUSB1064_DP0EQ(nr) ((nr) << 4) #endif #ifndef TUSB1064_DP2EQ -#define TUSB1064_DP2EQ(nr) ((nr) << 0) +#define TUSB1064_DP2EQ(nr) ((nr) << 0) #endif - /* TUSB1064 Receiver Equalization GPIO Control */ #define TUSB1064_REG_SSRX2RX1EQ_SEL 0x20 #define TUSB1064_REG_SSTXEQ_SEL 0x21 diff --git a/driver/usb_mux/usb_mux.c b/driver/usb_mux/usb_mux.c index 1dea4b8d29..1edcf25179 100644 --- a/driver/usb_mux/usb_mux.c +++ b/driver/usb_mux/usb_mux.c @@ -1,4 +1,4 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. +/* Copyright 2015 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,9 +6,11 @@ /* USB mux high-level driver. */ #include "atomic.h" +#include "builtin/assert.h" #include "common.h" #include "console.h" #include "chipset.h" +#include "ec_commands.h" #include "hooks.h" #include "host_command.h" #include "queue.h" @@ -19,8 +21,8 @@ #include "util.h" #ifdef CONFIG_COMMON_RUNTIME -#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) -#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) #else #define CPRINTS(format, args...) #define CPRINTF(format, args...) @@ -35,17 +37,18 @@ static int enable_debug_prints; static atomic_t flags[CONFIG_USB_PD_PORT_MAX_COUNT]; /* Device is in low power mode. */ -#define USB_MUX_FLAG_IN_LPM BIT(0) +#define USB_MUX_FLAG_IN_LPM BIT(0) /* Device initialized at least once */ -#define USB_MUX_FLAG_INIT BIT(1) +#define USB_MUX_FLAG_INIT BIT(1) /* Coordinate mux accesses by-port among the tasks */ static mutex_t mux_lock[CONFIG_USB_PD_PORT_MAX_COUNT]; /* Coordinate which task requires an ACK event */ static task_id_t ack_task[CONFIG_USB_PD_PORT_MAX_COUNT] = { - [0 ... CONFIG_USB_PD_PORT_MAX_COUNT - 1] = TASK_ID_INVALID }; + [0 ... CONFIG_USB_PD_PORT_MAX_COUNT - 1] = TASK_ID_INVALID +}; static void perform_mux_set(int port, int index, mux_state_t mux_mode, enum usb_switch usb_mode, int polarity); @@ -60,9 +63,6 @@ enum mux_config_type { USB_MUX_HPD_UPDATE, }; -/* Set all muxes for this board's port */ -#define USB_MUX_ALL_CHIPS -1 - /* Define a USB mux task ID for the purpose of linking */ #ifndef HAS_TASK_USB_MUX #define TASK_ID_USB_MUX TASK_ID_INVALID @@ -79,7 +79,7 @@ enum mux_config_type { * Depth must be a power of 2, which is normally enforced by the queue init * code, but must be manually enforced here. */ -#define MUX_QUEUE_DEPTH 4 +#define MUX_QUEUE_DEPTH 4 BUILD_ASSERT(POWER_OF_TWO(MUX_QUEUE_DEPTH)); /* Define in order to enable debug info about how long the queue takes */ @@ -87,10 +87,10 @@ BUILD_ASSERT(POWER_OF_TWO(MUX_QUEUE_DEPTH)); struct mux_queue_entry { enum mux_config_type type; - int index; /* Index to set, or USB_MUX_ALL_CHIPS */ - mux_state_t mux_mode; /* For both HPD and mux set */ - enum usb_switch usb_config; /* Set only */ - int polarity; /* Set only */ + int index; /* Index to set, or TYPEC_USB_MUX_SET_ALL_CHIPS */ + mux_state_t mux_mode; /* For both HPD and mux set */ + enum usb_switch usb_config; /* Set only */ + int polarity; /* Set only */ #ifdef DEBUG_MUX_QUEUE_TIME timestamp_t enqueued_time; #endif @@ -108,10 +108,9 @@ struct mux_queue_entry { */ static struct queue mux_queue[CONFIG_USB_PD_PORT_MAX_COUNT]; __maybe_unused static struct queue_state - queue_states[CONFIG_USB_PD_PORT_MAX_COUNT]; + queue_states[CONFIG_USB_PD_PORT_MAX_COUNT]; __maybe_unused static struct mux_queue_entry - queue_buffers[CONFIG_USB_PD_PORT_MAX_COUNT] - [MUX_QUEUE_DEPTH]; + queue_buffers[CONFIG_USB_PD_PORT_MAX_COUNT][MUX_QUEUE_DEPTH]; static mutex_t queue_lock[CONFIG_USB_PD_PORT_MAX_COUNT]; #else extern struct queue const mux_queue[]; @@ -136,11 +135,9 @@ static int init_mux_mutex(const struct device *dev) SYS_INIT(init_mux_mutex, POST_KERNEL, 50); #endif /* CONFIG_ZEPHYR */ -__maybe_unused static void mux_task_enqueue(int port, int index, - enum mux_config_type type, - mux_state_t mux_mode, - enum usb_switch usb_config, - int polarity) +__maybe_unused static void +mux_task_enqueue(int port, int index, enum mux_config_type type, + mux_state_t mux_mode, enum usb_switch usb_config, int polarity) { struct mux_queue_entry new_entry; @@ -177,7 +174,7 @@ static void init_queue_structs(void) mux_queue[i].buffer_units = MUX_QUEUE_DEPTH; mux_queue[i].buffer_units_mask = MUX_QUEUE_DEPTH - 1; mux_queue[i].unit_bytes = sizeof(struct mux_queue_entry); - mux_queue[i].buffer = (uint8_t *) &queue_buffers[i][0]; + mux_queue[i].buffer = (uint8_t *)&queue_buffers[i][0]; } } DECLARE_HOOK(HOOK_INIT, init_queue_structs, HOOK_PRIO_FIRST); @@ -227,7 +224,8 @@ __maybe_unused void usb_mux_task(void *u) next.mux_mode); else CPRINTS("Error: Unknown mux task type:" - "%d", next.type); + "%d", + next.type); #ifdef DEBUG_MUX_QUEUE_TIME CPRINTS("C%d: Completed mux set queued %d " @@ -254,16 +252,14 @@ __maybe_unused void usb_mux_task(void *u) } /* Configure the MUX */ -static int configure_mux(int port, int index, - enum mux_config_type config, +static int configure_mux(int port, int index, enum mux_config_type config, mux_state_t *mux_state) { int rv = EC_SUCCESS; - const struct usb_mux *mux_ptr; + const struct usb_mux_chain *mux_chain; int chip = 0; - if (config == USB_MUX_SET_MODE || - config == USB_MUX_GET_MODE) { + if (config == USB_MUX_SET_MODE || config == USB_MUX_GET_MODE) { if (mux_state == NULL) return EC_ERROR_INVAL; @@ -276,14 +272,15 @@ static int configure_mux(int port, int index, * MUXes. So when we change one, we traverse the whole list * to make sure they are all updated appropriately. */ - for (mux_ptr = &usb_muxes[port]; - rv == EC_SUCCESS && mux_ptr != NULL; - mux_ptr = mux_ptr->next_mux, chip++) { + for (mux_chain = &usb_muxes[port]; + rv == EC_SUCCESS && mux_chain != NULL && mux_chain->mux != NULL; + mux_chain = mux_chain->next, chip++) { mux_state_t lcl_state; + const struct usb_mux *mux_ptr = mux_chain->mux; const struct usb_mux_driver *drv = mux_ptr->driver; bool ack_required = false; - if (index != USB_MUX_ALL_CHIPS && index != chip) + if (index != TYPEC_USB_MUX_SET_ALL_CHIPS && index != chip) continue; /* Action time! Lock this mux */ @@ -321,6 +318,10 @@ static int configure_mux(int port, int index, if (mux_ptr->flags & USB_MUX_FLAG_SET_WITHOUT_FLIP) lcl_state &= ~USB_PD_MUX_POLARITY_INVERTED; + if ((lcl_state != USB_PD_MUX_NONE) && + (mux_ptr->flags & USB_MUX_FLAG_POLARITY_INVERTED)) + lcl_state ^= USB_PD_MUX_POLARITY_INVERTED; + if (drv && drv->set) { rv = drv->set(mux_ptr, lcl_state, &ack_required); @@ -335,10 +336,12 @@ static int configure_mux(int port, int index, /* Inform the AP its selected mux is set */ if (IS_ENABLED(CONFIG_USB_MUX_AP_CONTROL)) { if (chip == 0) - pd_notify_event(port, + pd_notify_event( + port, PD_STATUS_EVENT_MUX_0_SET_DONE); else if (chip == 1) - pd_notify_event(port, + pd_notify_event( + port, PD_STATUS_EVENT_MUX_1_SET_DONE); } @@ -363,7 +366,6 @@ static int configure_mux(int port, int index, if (mux_ptr->hpd_update) mux_ptr->hpd_update(mux_ptr, *mux_state, &ack_required); - } /* Unlock before any host command waits */ @@ -380,10 +382,10 @@ static int configure_mux(int port, int index, assert(task_get_current() == TASK_ID_USB_MUX); } else { #if defined(CONFIG_ZEPHYR) && defined(TEST_BUILD) - assert(port == - TASK_ID_TO_PD_PORT(task_get_current()) || + assert(port == TASK_ID_TO_PD_PORT( + task_get_current()) || task_get_current() == - TASK_ID_TEST_RUNNER); + TASK_ID_TEST_RUNNER); #else assert(port == TASK_ID_TO_PD_PORT(task_get_current())); @@ -397,7 +399,7 @@ static int configure_mux(int port, int index, * mux, but could be made configurable for other * purposes. */ - task_wait_event_mask(PD_EVENT_AP_MUX_DONE, 100*MSEC); + task_wait_event_mask(PD_EVENT_AP_MUX_DONE, 100 * MSEC); ack_task[port] = TASK_ID_INVALID; usleep(12.5 * MSEC); @@ -405,8 +407,7 @@ static int configure_mux(int port, int index, } if (rv) - CPRINTS("mux config:%d, port:%d, rv:%d", - config, port, rv); + CPRINTS("mux config:%d, port:%d, rv:%d", config, port, rv); return rv; } @@ -421,7 +422,8 @@ static void enter_low_power_mode(int port) atomic_or(&flags[port], USB_MUX_FLAG_IN_LPM); /* Apply any low power customization if present */ - configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_LOW_POWER, NULL); + configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, USB_MUX_LOW_POWER, + NULL); } static int exit_low_power_mode(int port) @@ -453,7 +455,8 @@ void usb_mux_init(int port) return; } - rv = configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_INIT, NULL); + rv = configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, USB_MUX_INIT, + NULL); if (rv == EC_SUCCESS) atomic_or(&flags[port], USB_MUX_FLAG_INIT); @@ -474,7 +477,7 @@ static void perform_mux_set(int port, int index, mux_state_t mux_mode, mux_state_t mux_state; const int should_enter_low_power_mode = (mux_mode == USB_PD_MUX_NONE && - usb_mode == USB_SWITCH_DISCONNECT); + usb_mode == USB_SWITCH_DISCONNECT); /* Perform initialization if not initialized yet */ if (!(flags[port] & USB_MUX_FLAG_INIT)) @@ -496,17 +499,16 @@ static void perform_mux_set(int port, int index, mux_state_t mux_mode, return; /* Configure superspeed lanes */ - mux_state = ((mux_mode != USB_PD_MUX_NONE) && polarity) - ? mux_mode | USB_PD_MUX_POLARITY_INVERTED - : mux_mode; + mux_state = ((mux_mode != USB_PD_MUX_NONE) && polarity) ? + mux_mode | USB_PD_MUX_POLARITY_INVERTED : + mux_mode; if (configure_mux(port, index, USB_MUX_SET_MODE, &mux_state)) return; if (enable_debug_prints) - CPRINTS( - "usb/dp mux: port(%d) typec_mux(%d) usb2(%d) polarity(%d)", - port, mux_mode, usb_mode, polarity); + CPRINTS("usb/dp mux: port(%d) typec_mux(%d) usb2(%d) polarity(%d)", + port, mux_mode, usb_mode, polarity); /* * If we are completely disconnecting the mux, then we should put it in @@ -516,20 +518,20 @@ static void perform_mux_set(int port, int index, mux_state_t mux_mode, enter_low_power_mode(port); } -void usb_mux_set(int port, mux_state_t mux_mode, - enum usb_switch usb_mode, int polarity) +void usb_mux_set(int port, mux_state_t mux_mode, enum usb_switch usb_mode, + int polarity) { if (port >= board_get_usb_pd_port_count()) return; /* Block if we have no mux task, but otherwise queue it up and return */ if (IS_ENABLED(HAS_TASK_USB_MUX)) - mux_task_enqueue(port, USB_MUX_ALL_CHIPS, - USB_MUX_SET_MODE, mux_mode, - usb_mode, polarity); + mux_task_enqueue(port, TYPEC_USB_MUX_SET_ALL_CHIPS, + USB_MUX_SET_MODE, mux_mode, usb_mode, + polarity); else - perform_mux_set(port, USB_MUX_ALL_CHIPS, - mux_mode, usb_mode, polarity); + perform_mux_set(port, TYPEC_USB_MUX_SET_ALL_CHIPS, mux_mode, + usb_mode, polarity); } void usb_mux_set_single(int port, int index, mux_state_t mux_mode, @@ -540,12 +542,10 @@ void usb_mux_set_single(int port, int index, mux_state_t mux_mode, /* Block if we have no mux task, but otherwise queue it up and return */ if (IS_ENABLED(HAS_TASK_USB_MUX)) - mux_task_enqueue(port, index, - USB_MUX_SET_MODE, mux_mode, + mux_task_enqueue(port, index, USB_MUX_SET_MODE, mux_mode, usb_mode, polarity); else - perform_mux_set(port, index, - mux_mode, usb_mode, polarity); + perform_mux_set(port, index, mux_mode, usb_mode, polarity); } bool usb_mux_set_completed(int port) @@ -561,9 +561,9 @@ bool usb_mux_set_completed(int port) mutex_lock(&queue_lock[port]); for (queue_begin(&mux_queue[port], &it); it.ptr != NULL; - queue_next(&mux_queue[port], &it)) { + queue_next(&mux_queue[port], &it)) { const struct mux_queue_entry *check = - (struct mux_queue_entry *) it.ptr; + (struct mux_queue_entry *)it.ptr; if (check->type == USB_MUX_SET_MODE) { sets_pending = true; @@ -590,8 +590,8 @@ static enum ec_error_list try_usb_mux_get(int port, mux_state_t *mux_state) return EC_SUCCESS; } - return configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_GET_MODE, - mux_state); + return configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, + USB_MUX_GET_MODE, mux_state); } mux_state_t usb_mux_get(int port) @@ -619,7 +619,7 @@ void usb_mux_flip(int port) if (exit_low_power_mode(port) != EC_SUCCESS) return; - if (configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_GET_MODE, + if (configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, USB_MUX_GET_MODE, &mux_state)) return; @@ -628,7 +628,8 @@ void usb_mux_flip(int port) else mux_state |= USB_PD_MUX_POLARITY_INVERTED; - configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_SET_MODE, &mux_state); + configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, USB_MUX_SET_MODE, + &mux_state); } static void perform_mux_hpd_update(int port, int index, mux_state_t hpd_state) @@ -650,10 +651,11 @@ void usb_mux_hpd_update(int port, mux_state_t hpd_state) /* Send to the mux task if present to maintain sequencing with sets */ if (IS_ENABLED(HAS_TASK_USB_MUX)) - mux_task_enqueue(port, USB_MUX_ALL_CHIPS, USB_MUX_HPD_UPDATE, - hpd_state, 0, 0); + mux_task_enqueue(port, TYPEC_USB_MUX_SET_ALL_CHIPS, + USB_MUX_HPD_UPDATE, hpd_state, 0, 0); else - perform_mux_hpd_update(port, USB_MUX_ALL_CHIPS, hpd_state); + perform_mux_hpd_update(port, TYPEC_USB_MUX_SET_ALL_CHIPS, + hpd_state); } int usb_mux_retimer_fw_update_port_info(void) @@ -661,15 +663,17 @@ int usb_mux_retimer_fw_update_port_info(void) int i; int port_info = 0; const struct usb_mux *mux_ptr; + const struct usb_mux_chain *mux_chain; for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { - mux_ptr = &usb_muxes[i]; - while (mux_ptr) { + mux_chain = &usb_muxes[i]; + while (mux_chain && mux_chain->mux) { + mux_ptr = mux_chain->mux; if (mux_ptr->driver && - mux_ptr->driver->is_retimer_fw_update_capable && - mux_ptr->driver->is_retimer_fw_update_capable()) + mux_ptr->driver->is_retimer_fw_update_capable && + mux_ptr->driver->is_retimer_fw_update_capable()) port_info |= BIT(i); - mux_ptr = mux_ptr->next_mux; + mux_chain = mux_chain->next; } } return port_info; @@ -680,8 +684,8 @@ static void mux_chipset_reset(void) int port; for (port = 0; port < board_get_usb_pd_port_count(); ++port) - configure_mux(port, USB_MUX_ALL_CHIPS, USB_MUX_CHIPSET_RESET, - NULL); + configure_mux(port, TYPEC_USB_MUX_SET_ALL_CHIPS, + USB_MUX_CHIPSET_RESET, NULL); } DECLARE_HOOK(HOOK_CHIPSET_RESET, mux_chipset_reset, HOOK_PRIO_DEFAULT); @@ -693,26 +697,28 @@ static void usb_mux_reset_in_g3(void) { int port; const struct usb_mux *mux_ptr; + const struct usb_mux_chain *mux_chain; for (port = 0; port < board_get_usb_pd_port_count(); port++) { - mux_ptr = &usb_muxes[port]; + mux_chain = &usb_muxes[port]; - while (mux_ptr) { + while (mux_chain && mux_chain->mux) { + mux_ptr = mux_chain->mux; if (mux_ptr->flags & USB_MUX_FLAG_RESETS_IN_G3) { atomic_clear_bits(&flags[port], USB_MUX_FLAG_INIT | - USB_MUX_FLAG_IN_LPM); + USB_MUX_FLAG_IN_LPM); } - mux_ptr = mux_ptr->next_mux; + mux_chain = mux_chain->next; } } } DECLARE_HOOK(HOOK_CHIPSET_HARD_OFF, usb_mux_reset_in_g3, HOOK_PRIO_DEFAULT); #ifdef CONFIG_CMD_TYPEC -static int command_typec(int argc, char **argv) +static int command_typec(int argc, const char **argv) { - const char * const mux_name[] = {"none", "usb", "dp", "dock"}; + const char *const mux_name[] = { "none", "usb", "dp", "dock" }; char *e; int port; mux_state_t mux = USB_PD_MUX_NONE; @@ -735,16 +741,16 @@ static int command_typec(int argc, char **argv) mux_state = usb_mux_get(port); ccprintf("Port %d: USB=%d DP=%d POLARITY=%s HPD_IRQ=%d " - "HPD_LVL=%d SAFE=%d TBT=%d USB4=%d\n", port, - !!(mux_state & USB_PD_MUX_USB_ENABLED), - !!(mux_state & USB_PD_MUX_DP_ENABLED), - mux_state & USB_PD_MUX_POLARITY_INVERTED ? - "INVERTED" : "NORMAL", - !!(mux_state & USB_PD_MUX_HPD_IRQ), - !!(mux_state & USB_PD_MUX_HPD_LVL), - !!(mux_state & USB_PD_MUX_SAFE_MODE), - !!(mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED), - !!(mux_state & USB_PD_MUX_USB4_ENABLED)); + "HPD_LVL=%d SAFE=%d TBT=%d USB4=%d\n", + port, !!(mux_state & USB_PD_MUX_USB_ENABLED), + !!(mux_state & USB_PD_MUX_DP_ENABLED), + mux_state & USB_PD_MUX_POLARITY_INVERTED ? "INVERTED" : + "NORMAL", + !!(mux_state & USB_PD_MUX_HPD_IRQ), + !!(mux_state & USB_PD_MUX_HPD_LVL), + !!(mux_state & USB_PD_MUX_SAFE_MODE), + !!(mux_state & USB_PD_MUX_TBT_COMPAT_ENABLED), + !!(mux_state & USB_PD_MUX_USB4_ENABLED)); return EC_SUCCESS; } @@ -752,14 +758,13 @@ static int command_typec(int argc, char **argv) for (i = 0; i < ARRAY_SIZE(mux_name); i++) if (!strcasecmp(argv[2], mux_name[i])) mux = i; - usb_mux_set(port, mux, mux == USB_PD_MUX_NONE ? - USB_SWITCH_DISCONNECT : - USB_SWITCH_CONNECT, - polarity_rm_dts(pd_get_polarity(port))); + usb_mux_set(port, mux, + mux == USB_PD_MUX_NONE ? USB_SWITCH_DISCONNECT : + USB_SWITCH_CONNECT, + polarity_rm_dts(pd_get_polarity(port))); return EC_SUCCESS; } -DECLARE_CONSOLE_COMMAND(typec, command_typec, - "[port|debug] [none|usb|dp|dock]", +DECLARE_CONSOLE_COMMAND(typec, command_typec, "[port|debug] [none|usb|dp|dock]", "Control type-C connector muxing"); #endif @@ -786,8 +791,7 @@ static enum ec_status hc_usb_pd_mux_info(struct host_cmd_handler_args *args) args->response_size = sizeof(*r); return EC_RES_SUCCESS; } -DECLARE_HOST_COMMAND(EC_CMD_USB_PD_MUX_INFO, - hc_usb_pd_mux_info, +DECLARE_HOST_COMMAND(EC_CMD_USB_PD_MUX_INFO, hc_usb_pd_mux_info, EC_VER_MASK(0)); static enum ec_status hc_usb_pd_mux_ack(struct host_cmd_handler_args *args) @@ -802,6 +806,4 @@ static enum ec_status hc_usb_pd_mux_ack(struct host_cmd_handler_args *args) return EC_RES_SUCCESS; } -DECLARE_HOST_COMMAND(EC_CMD_USB_PD_MUX_ACK, - hc_usb_pd_mux_ack, - EC_VER_MASK(0)); +DECLARE_HOST_COMMAND(EC_CMD_USB_PD_MUX_ACK, hc_usb_pd_mux_ack, EC_VER_MASK(0)); diff --git a/driver/usb_mux/virtual.c b/driver/usb_mux/virtual.c index 23987fd676..417a48c577 100644 --- a/driver/usb_mux/virtual.c +++ b/driver/usb_mux/virtual.c @@ -1,4 +1,4 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. * @@ -18,11 +18,11 @@ * configures the HPD mux state. Both states are independent of each other * may differ when the PD role changes when in dock mode. */ -#define USB_PD_MUX_HPD_STATE (USB_PD_MUX_HPD_LVL | USB_PD_MUX_HPD_IRQ) -#define USB_PD_MUX_USB_DP_STATE (USB_PD_MUX_USB_ENABLED | \ - USB_PD_MUX_DP_ENABLED | USB_PD_MUX_POLARITY_INVERTED | \ - USB_PD_MUX_SAFE_MODE | USB_PD_MUX_TBT_COMPAT_ENABLED | \ - USB_PD_MUX_USB4_ENABLED) +#define USB_PD_MUX_HPD_STATE (USB_PD_MUX_HPD_LVL | USB_PD_MUX_HPD_IRQ) +#define USB_PD_MUX_USB_DP_STATE \ + (USB_PD_MUX_USB_ENABLED | USB_PD_MUX_DP_ENABLED | \ + USB_PD_MUX_POLARITY_INVERTED | USB_PD_MUX_SAFE_MODE | \ + USB_PD_MUX_TBT_COMPAT_ENABLED | USB_PD_MUX_USB4_ENABLED) static mux_state_t virtual_mux_state[CONFIG_USB_PD_PORT_MAX_COUNT]; @@ -82,7 +82,8 @@ static int virtual_set_mux(const struct usb_mux *me, mux_state_t mux_state, * is still active. Otherwise, don't preserve HPD state. */ if (mux_state & USB_PD_MUX_DP_ENABLED) - new_mux_state = (mux_state & ~USB_PD_MUX_HPD_STATE) | + new_mux_state = + (mux_state & ~USB_PD_MUX_HPD_STATE) | (virtual_mux_state[port] & USB_PD_MUX_HPD_STATE); else new_mux_state = mux_state; @@ -112,8 +113,8 @@ void virtual_hpd_update(const struct usb_mux *me, mux_state_t mux_state, int port = me->usb_port; /* Current HPD related mux status + existing USB & DP mux status */ - mux_state_t new_mux_state = mux_state | - (virtual_mux_state[port] & USB_PD_MUX_USB_DP_STATE); + mux_state_t new_mux_state = + mux_state | (virtual_mux_state[port] & USB_PD_MUX_USB_DP_STATE); virtual_mux_update_state(port, new_mux_state, ack_required); } |