diff options
Diffstat (limited to 'include/driver/tcpm')
| -rw-r--r-- | include/driver/tcpm/it8xxx2_pd_public.h | 12 | ||||
| -rw-r--r-- | include/driver/tcpm/ps8xxx_public.h | 96 | ||||
| -rw-r--r-- | include/driver/tcpm/rt1715_public.h | 18 | ||||
| -rw-r--r-- | include/driver/tcpm/tcpci.h | 300 | ||||
| -rw-r--r-- | include/driver/tcpm/tcpm.h | 599 | ||||
| -rw-r--r-- | include/driver/tcpm/tusb422_public.h | 16 |
6 files changed, 0 insertions, 1041 deletions
diff --git a/include/driver/tcpm/it8xxx2_pd_public.h b/include/driver/tcpm/it8xxx2_pd_public.h deleted file mode 100644 index 6ad11a9555..0000000000 --- a/include/driver/tcpm/it8xxx2_pd_public.h +++ /dev/null @@ -1,12 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H - -extern const struct tcpm_drv it83xx_tcpm_drv; -extern const struct tcpm_drv it8xxx2_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H */ diff --git a/include/driver/tcpm/ps8xxx_public.h b/include/driver/tcpm/ps8xxx_public.h deleted file mode 100644 index 0e200cb395..0000000000 --- a/include/driver/tcpm/ps8xxx_public.h +++ /dev/null @@ -1,96 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Parade Tech Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H - -#include "usb_mux.h" - -struct usb_mux; - -/* I2C interface */ -#define PS8751_I2C_ADDR1_P1_FLAGS 0x09 -#define PS8751_I2C_ADDR1_P2_FLAGS 0x0A -#define PS8751_I2C_ADDR1_FLAGS 0x0B /* P3 */ -#define PS8751_I2C_ADDR2_FLAGS 0x1B -#define PS8751_I2C_ADDR3_FLAGS 0x2B -#define PS8751_I2C_ADDR4_FLAGS 0x4B - -#define PS8XXX_VENDOR_ID 0x1DA0 - -/* Minimum Delay for reset assertion */ -#define PS8XXX_RESET_DELAY_MS 1 - -/* Delay between releasing reset and the first I2C read */ -#define PS8805_FW_INIT_DELAY_MS 10 - -/* Delay from power on to reset de-asserted */ -#define PS8815_PWR_H_RST_H_DELAY_MS 20 - -/* - * Add delay of writing TCPC_REG_POWER_CTRL makes - * CC status being judged correctly when disable VCONN. - * This may be a PS8XXX firmware issue, Parade is still trying. - * https://partnerissuetracker.corp.google.com/issues/185202064 - */ -#define PS8XXX_VCONN_TURN_OFF_DELAY_US 10 - -/* - * Delay between releasing reset and the first I2C read - * - * If the delay is too short, I2C fails. - * If the delay is marginal I2C reads return garbage. - * - * With firmware 0x03: - * 10ms is too short - * 20ms is marginal - * 25ms is OK - */ -#define PS8815_FW_INIT_DELAY_MS 50 - -/* NOTE: The Product ID will read as 0x8803 if the firmware has malfunctioned in - * 8705, 8755 and 8805. - */ -#define PS8705_PRODUCT_ID 0x8705 -#define PS8751_PRODUCT_ID 0x8751 -#define PS8755_PRODUCT_ID 0x8755 -#define PS8805_PRODUCT_ID 0x8805 -#define PS8815_PRODUCT_ID 0x8815 - -extern const struct tcpm_drv ps8xxx_tcpm_drv; - -/** - * Board-specific callback to judge and provide which chip source of PS8XXX - * series supported by this driver per specific port. - * - * If the board supports only one single source then there is no nencessary to - * provide the __override version. - * - * If board supports two sources or above (with CONFIG_USB_PD_TCPM_MULTI_PS8XXX) - * then the __override version is mandatory. - * - * @param port TCPC port number. - */ -__override_proto -uint16_t board_get_ps8xxx_product_id(int port); - -void ps8xxx_tcpc_update_hpd_status(const struct usb_mux *me, - mux_state_t mux_state); - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC -extern struct i2c_stress_test_dev ps8xxx_i2c_stress_test_dev; -#endif /* defined(CONFIG_CMD_I2C_STRESS_TEST_TCPC) */ - -/* - * This driver was designed to use Low Power Mode on PS8751 TCPC/MUX chip - * when running as MUX only (CC lines are not connected, eg. Ampton). - * To achieve this RP on CC lines is set when device should enter LPM and - * RD when mux should work. - */ -extern const struct usb_mux_driver ps8xxx_usb_mux_driver; - -#endif /* __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H */ diff --git a/include/driver/tcpm/rt1715_public.h b/include/driver/tcpm/rt1715_public.h deleted file mode 100644 index 14fa9495e8..0000000000 --- a/include/driver/tcpm/rt1715_public.h +++ /dev/null @@ -1,18 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Richtek RT1715 Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H - -/* I2C interface */ -#define RT1715_I2C_ADDR_FLAGS 0x4E - -#define RT1715_VENDOR_ID 0x29CF - -extern const struct tcpm_drv rt1715_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H */ diff --git a/include/driver/tcpm/tcpci.h b/include/driver/tcpm/tcpci.h deleted file mode 100644 index 53a6a4e65e..0000000000 --- a/include/driver/tcpm/tcpci.h +++ /dev/null @@ -1,300 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery port management */ - -#ifndef __CROS_EC_USB_PD_TCPM_TCPCI_H -#define __CROS_EC_USB_PD_TCPM_TCPCI_H - -#include "config.h" -#include "ec_commands.h" -#include "tcpm/tcpm.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" - -#define TCPC_REG_VENDOR_ID 0x0 -#define TCPC_REG_PRODUCT_ID 0x2 -#define TCPC_REG_BCD_DEV 0x4 -#define TCPC_REG_TC_REV 0x6 -#define TCPC_REG_PD_REV 0x8 -#define TCPC_REG_PD_INT_REV 0xa - -#define TCPC_REG_ALERT 0x10 -#define TCPC_REG_ALERT_NONE 0x0000 -#define TCPC_REG_ALERT_MASK_ALL 0xffff -#define TCPC_REG_ALERT_VENDOR_DEF BIT(15) -#define TCPC_REG_ALERT_ALERT_EXT BIT(14) -#define TCPC_REG_ALERT_EXT_STATUS BIT(13) -#define TCPC_REG_ALERT_VBUS_DISCNCT BIT(11) -#define TCPC_REG_ALERT_RX_BUF_OVF BIT(10) -#define TCPC_REG_ALERT_FAULT BIT(9) -#define TCPC_REG_ALERT_V_ALARM_LO BIT(8) -#define TCPC_REG_ALERT_V_ALARM_HI BIT(7) -#define TCPC_REG_ALERT_TX_SUCCESS BIT(6) -#define TCPC_REG_ALERT_TX_DISCARDED BIT(5) -#define TCPC_REG_ALERT_TX_FAILED BIT(4) -#define TCPC_REG_ALERT_RX_HARD_RST BIT(3) -#define TCPC_REG_ALERT_RX_STATUS BIT(2) -#define TCPC_REG_ALERT_POWER_STATUS BIT(1) -#define TCPC_REG_ALERT_CC_STATUS BIT(0) -#define TCPC_REG_ALERT_TX_COMPLETE (TCPC_REG_ALERT_TX_SUCCESS | \ - TCPC_REG_ALERT_TX_DISCARDED | \ - TCPC_REG_ALERT_TX_FAILED) - -#define TCPC_REG_ALERT_MASK 0x12 -#define TCPC_REG_ALERT_MASK_VENDOR_DEF BIT(15) - -#define TCPC_REG_POWER_STATUS_MASK 0x14 -#define TCPC_REG_FAULT_STATUS_MASK 0x15 -#define TCPC_REG_EXT_STATUS_MASK 0x16 -#define TCPC_REG_ALERT_EXTENDED_MASK 0x17 - -#define TCPC_REG_CONFIG_STD_OUTPUT 0x18 -#define TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N BIT(6) -#define TCPC_REG_CONFIG_STD_OUTPUT_AUDIO_CONN_N BIT(5) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK (3 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_NONE (0 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB BIT(2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP (2 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED BIT(0) - -#define TCPC_REG_TCPC_CTRL 0x19 -#define TCPC_REG_TCPC_CTRL_SET(polarity) (polarity) -#define TCPC_REG_TCPC_CTRL_POLARITY(reg) ((reg) & 0x1) -/* - * In TCPCI Rev 2.0, this bit must be set this to generate CC status alerts when - * a connection is found. - */ -#define TCPC_REG_TCPC_CTRL_EN_LOOK4CONNECTION_ALERT BIT(6) -#define TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL BIT(4) -#define TCPC_REG_TCPC_CTRL_BIST_TEST_MODE BIT(1) - -#define TCPC_REG_ROLE_CTRL 0x1a -#define TCPC_REG_ROLE_CTRL_DRP_MASK BIT(6) -#define TCPC_REG_ROLE_CTRL_RP_MASK (BIT(5)|BIT(4)) -#define TCPC_REG_ROLE_CTRL_CC2_MASK (BIT(3)|BIT(2)) -#define TCPC_REG_ROLE_CTRL_CC1_MASK (BIT(1)|BIT(0)) -#define TCPC_REG_ROLE_CTRL_SET(drp, rp, cc1, cc2) \ - ((((drp) << 6) & TCPC_REG_ROLE_CTRL_DRP_MASK) | \ - (((rp) << 4) & TCPC_REG_ROLE_CTRL_RP_MASK) | \ - (((cc2) << 2) & TCPC_REG_ROLE_CTRL_CC2_MASK) | \ - ((cc1) & TCPC_REG_ROLE_CTRL_CC1_MASK)) -#define TCPC_REG_ROLE_CTRL_DRP(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_DRP_MASK) >> 6) -#define TCPC_REG_ROLE_CTRL_RP(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_RP_MASK) >> 4) -#define TCPC_REG_ROLE_CTRL_CC2(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_CC2_MASK) >> 2) -#define TCPC_REG_ROLE_CTRL_CC1(reg) \ - ((reg) & TCPC_REG_ROLE_CTRL_CC1_MASK) - -#define TCPC_REG_FAULT_CTRL 0x1b -#define TCPC_REG_FAULT_CTRL_VBUS_OVP_FAULT_DIS BIT(1) -#define TCPC_REG_FAULT_CTRL_VBUS_OCP_FAULT_DIS BIT(0) - -#define TCPC_REG_POWER_CTRL 0x1c -#define TCPC_REG_POWER_CTRL_FRS_ENABLE BIT(7) -#define TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS BIT(6) -#define TCPC_REG_POWER_CTRL_VOLT_ALARM_DIS BIT(5) -#define TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT BIT(4) -#define TCPC_REG_POWER_CTRL_FORCE_DISCHARGE BIT(2) -#define TCPC_REG_POWER_CTRL_SET(vconn) (vconn) -#define TCPC_REG_POWER_CTRL_VCONN(reg) ((reg) & 0x1) - -#define TCPC_REG_CC_STATUS 0x1d -#define TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK BIT(5) -#define TCPC_REG_CC_STATUS_CONNECT_RESULT_MASK BIT(4) -#define TCPC_REG_CC_STATUS_CC2_STATE_MASK (BIT(3)|BIT(2)) -#define TCPC_REG_CC_STATUS_CC1_STATE_MASK (BIT(1)|BIT(0)) -#define TCPC_REG_CC_STATUS_SET(term, cc1, cc2) \ - ((term) << 4 | ((cc2) & 0x3) << 2 | ((cc1) & 0x3)) -#define TCPC_REG_CC_STATUS_LOOK4CONNECTION(reg) \ - ((reg & TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK) >> 5) -#define TCPC_REG_CC_STATUS_TERM(reg) \ - (((reg) & TCPC_REG_CC_STATUS_CONNECT_RESULT_MASK) >> 4) -#define TCPC_REG_CC_STATUS_CC2(reg) \ - (((reg) & TCPC_REG_CC_STATUS_CC2_STATE_MASK) >> 2) -#define TCPC_REG_CC_STATUS_CC1(reg) \ - ((reg) & TCPC_REG_CC_STATUS_CC1_STATE_MASK) - -#define TCPC_REG_POWER_STATUS 0x1e -#define TCPC_REG_POWER_STATUS_MASK_ALL 0xff -#define TCPC_REG_POWER_STATUS_DEBUG_ACC_CON BIT(7) -#define TCPC_REG_POWER_STATUS_UNINIT BIT(6) -#define TCPC_REG_POWER_STATUS_SOURCING_VBUS BIT(4) -#define TCPC_REG_POWER_STATUS_VBUS_DET BIT(3) -#define TCPC_REG_POWER_STATUS_VBUS_PRES BIT(2) -#define TCPC_REG_POWER_STATUS_SINKING_VBUS BIT(0) - -#define TCPC_REG_FAULT_STATUS 0x1f -#define TCPC_REG_FAULT_STATUS_ALL_REGS_RESET BIT(7) -#define TCPC_REG_FAULT_STATUS_FORCE_OFF_VBUS BIT(6) -#define TCPC_REG_FAULT_STATUS_AUTO_DISCHARGE_FAIL BIT(5) -#define TCPC_REG_FAULT_STATUS_FORCE_DISCHARGE_FAIL BIT(4) -#define TCPC_REG_FAULT_STATUS_VBUS_OVER_CURRENT BIT(3) -#define TCPC_REG_FAULT_STATUS_VBUS_OVER_VOLTAGE BIT(2) -#define TCPC_REG_FAULT_STATUS_VCONN_OVER_CURRENT BIT(1) -#define TCPC_REG_FAULT_STATUS_I2C_INTERFACE_ERR BIT(0) - -#define TCPC_REG_EXT_STATUS 0x20 -#define TCPC_REG_EXT_STATUS_SAFE0V BIT(0) - -#define TCPC_REG_ALERT_EXT 0x21 -#define TCPC_REG_ALERT_EXT_TIMER_EXPIRED BIT(2) -#define TCPC_REG_ALERT_EXT_SRC_FRS BIT(1) -#define TCPC_REG_ALERT_EXT_SNK_FRS BIT(0) - -#define TCPC_REG_COMMAND 0x23 -#define TCPC_REG_COMMAND_ENABLE_VBUS_DETECT 0x33 -#define TCPC_REG_COMMAND_SNK_CTRL_LOW 0x44 -#define TCPC_REG_COMMAND_SNK_CTRL_HIGH 0x55 -#define TCPC_REG_COMMAND_SRC_CTRL_LOW 0x66 -#define TCPC_REG_COMMAND_SRC_CTRL_HIGH 0x77 -#define TCPC_REG_COMMAND_LOOK4CONNECTION 0x99 -#define TCPC_REG_COMMAND_I2CIDLE 0xFF - -#define TCPC_REG_DEV_CAP_1 0x24 -#define TCPC_REG_DEV_CAP_1_VBUS_NONDEFAULT_TARGET BIT(15) -#define TCPC_REG_DEV_CAP_1_VBUS_OCP_REPORTING BIT(14) -#define TCPC_REG_DEV_CAP_1_VBUS_OVP_REPORTING BIT(13) -#define TCPC_REG_DEV_CAP_1_BLEED_DISCHARGE BIT(12) -#define TCPC_REG_DEV_CAP_1_FORCE_DISCHARGE BIT(11) -#define TCPC_REG_DEV_CAP_1_VBUS_MEASURE_ALARM_CAPABLE BIT(10) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_MASK (BIT(8)|BIT(9)) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_DEF (0 << 8) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_1P5_DEF (1 << 8) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_3P0_1P5_DEF (2 << 8) -#define TCPC_REG_DEV_CAP_1_PWRROLE_MASK (BIT(5)|BIT(6)|BIT(7)) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_OR_SNK (0 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC (1 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SNK (2 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SNK_ACC (3 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_DRP (4 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP_ADPT_CBL (5 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP (6 << 5) -#define TCPC_REG_DEV_CAP_1_ALL_SOP_STAR_MSGS_SUPPORTED BIT(4) -#define TCPC_REG_DEV_CAP_1_SOURCE_VCONN BIT(3) -#define TCPC_REG_DEV_CAP_1_SINK_VBUS BIT(2) -#define TCPC_REG_DEV_CAP_1_SOURCE_NONDEFAULT_VBUS BIT(1) -#define TCPC_REG_DEV_CAP_1_SOURCE_VBUS BIT(0) - -#define TCPC_REG_DEV_CAP_2 0x26 -#define TCPC_REG_DEV_CAP_2_SNK_FR_SWAP BIT(9) - -#define TCPC_REG_STD_INPUT_CAP 0x28 -#define TCPC_REG_STD_OUTPUT_CAP 0x29 - -#define TCPC_REG_CONFIG_EXT_1 0x2A -#define TCPC_REG_CONFIG_EXT_1_FR_SWAP_SNK_DIR BIT(1) - -#define TCPC_REG_MSG_HDR_INFO 0x2e -#define TCPC_REG_MSG_HDR_INFO_SET(drole, prole) \ - ((drole) << 3 | (PD_REV20 << 1) | (prole)) -#define TCPC_REG_MSG_HDR_INFO_DROLE(reg) (((reg) & 0x8) >> 3) -#define TCPC_REG_MSG_HDR_INFO_PROLE(reg) ((reg) & 0x1) - -#define TCPC_REG_RX_DETECT 0x2f -#define TCPC_REG_RX_DETECT_SOP_HRST_MASK 0x21 -#define TCPC_REG_RX_DETECT_SOP_SOPP_SOPPP_HRST_MASK 0x27 - -/* TCPCI Rev 1.0 receive registers */ -#define TCPC_REG_RX_BYTE_CNT 0x30 -#define TCPC_REG_RX_BUF_FRAME_TYPE 0x31 -#define TCPC_REG_RX_HDR 0x32 -#define TCPC_REG_RX_DATA 0x34 /* through 0x4f */ - -/* - * In TCPCI Rev 2.0, the RECEIVE_BUFFER is comprised of three sets of registers: - * READABLE_BYTE_COUNT, RX_BUF_FRAME_TYPE and RX_BUF_BYTE_x. These registers can - * only be accessed by reading at a common register address 30h. - */ -#define TCPC_REG_RX_BUFFER 0x30 - -#define TCPC_REG_TRANSMIT 0x50 -#define TCPC_REG_TRANSMIT_SET_WITH_RETRY(retries, type) \ - ((retries) << 4 | (type)) -#define TCPC_REG_TRANSMIT_SET_WITHOUT_RETRY(type) (type) -#define TCPC_REG_TRANSMIT_RETRY(reg) (((reg) & 0x30) >> 4) -#define TCPC_REG_TRANSMIT_TYPE(reg) ((reg) & 0x7) - -/* TCPCI Rev 1.0 transmit registers */ -#define TCPC_REG_TX_BYTE_CNT 0x51 -#define TCPC_REG_TX_HDR 0x52 -#define TCPC_REG_TX_DATA 0x54 /* through 0x6f */ - -/* - * In TCPCI Rev 2.0, the TRANSMIT_BUFFER holds the I2C_WRITE_BYTE_COUNT and the - * portion of the SOP* USB PD message payload (including the header and/or the - * data bytes) most recently written by the TCPM in TX_BUF_BYTE_x. TX_BUF_BYTE_x - * is “hidden” and can only be accessed by writing to register address 51h - */ -#define TCPC_REG_TX_BUFFER 0x51 - -#define TCPC_REG_VBUS_VOLTAGE 0x70 - -#define TCPC_REG_VBUS_SINK_DISCONNECT_THRESH 0x72 -#define TCPC_REG_VBUS_SINK_DISCONNECT_THRESH_DEFAULT 0x008C /* 3.5 V */ - -#define TCPC_REG_VBUS_STOP_DISCHARGE_THRESH 0x74 -#define TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG 0x76 -#define TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG 0x78 - -extern const struct tcpm_drv tcpci_tcpm_drv; -extern const struct usb_mux_driver tcpci_tcpm_usb_mux_driver; - -void tcpci_set_cached_rp(int port, int rp); -int tcpci_get_cached_rp(int port); -void tcpci_set_cached_pull(int port, enum tcpc_cc_pull pull); -enum tcpc_cc_pull tcpci_get_cached_pull(int port); - -void tcpci_tcpc_alert(int port); -int tcpci_tcpm_init(int port); -int tcpci_tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2); -bool tcpci_tcpm_check_vbus_level(int port, enum vbus_level level); -int tcpci_tcpm_select_rp_value(int port, int rp); -int tcpci_tcpm_set_cc(int port, int pull); -int tcpci_tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity); -int tcpci_tcpm_sop_prime_enable(int port, bool enable); -int tcpci_tcpm_set_vconn(int port, int enable); -int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role); -int tcpci_tcpm_set_rx_enable(int port, int enable); -int tcpci_tcpm_get_message_raw(int port, uint32_t *payload, int *head); -int tcpci_tcpm_transmit(int port, enum tcpci_msg_type type, - uint16_t header, const uint32_t *data); -int tcpci_tcpm_release(int port); -#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -int tcpci_set_role_ctrl(int port, enum tcpc_drp drp, enum tcpc_rp_value rp, - enum tcpc_cc_pull pull); -int tcpci_tcpc_drp_toggle(int port); -#endif -#ifdef CONFIG_USB_PD_TCPC_LOW_POWER -int tcpci_enter_low_power_mode(int port); -#endif -enum ec_error_list tcpci_set_bist_test_mode(const int port, - const bool enable); -#ifdef CONFIG_USB_PD_DISCHARGE_TCPC -void tcpci_tcpc_discharge_vbus(int port, int enable); -#endif -void tcpci_tcpc_enable_auto_discharge_disconnect(int port, int enable); -int tcpci_tcpc_debug_accessory(int port, bool enable); - -int tcpci_tcpm_mux_init(const struct usb_mux *me); -int tcpci_tcpm_mux_set(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required); -int tcpci_tcpm_mux_get(const struct usb_mux *me, mux_state_t *mux_state); -int tcpci_tcpm_mux_enter_low_power(const struct usb_mux *me); -int tcpci_get_chip_info(int port, int live, - struct ec_response_pd_chip_info_v1 *chip_info); -#ifdef CONFIG_USBC_PPC -bool tcpci_tcpm_get_snk_ctrl(int port); -int tcpci_tcpm_set_snk_ctrl(int port, int enable); -bool tcpci_tcpm_get_src_ctrl(int port); -int tcpci_tcpm_set_src_ctrl(int port, int enable); -#endif - -int tcpci_tcpc_fast_role_swap_enable(int port, int enable); - -#endif /* __CROS_EC_USB_PD_TCPM_TCPCI_H */ diff --git a/include/driver/tcpm/tcpm.h b/include/driver/tcpm/tcpm.h deleted file mode 100644 index fb63e5504f..0000000000 --- a/include/driver/tcpm/tcpm.h +++ /dev/null @@ -1,599 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery port management - common header for TCPM drivers */ - -#ifndef __CROS_EC_USB_PD_TCPM_TCPM_H -#define __CROS_EC_USB_PD_TCPM_TCPM_H - -#include "common.h" -#include "ec_commands.h" -#include "i2c.h" -#include "usb_pd_tcpm.h" -#include "util.h" - -#if defined(CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE) && \ - !defined(CONFIG_USB_PD_DUAL_ROLE) -#error "DRP auto toggle requires board to have DRP support" -#error "Please upgrade your board configuration" -#endif - -#ifndef CONFIG_USB_PD_TCPC - -/* I2C wrapper functions - get I2C port / peripheral addr from config struct. */ -#ifndef CONFIG_USB_PD_TCPC_LOW_POWER -static inline int tcpc_addr_write(int port, int i2c_addr, int reg, int val) -{ - return i2c_write8(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_write16(int port, int i2c_addr, int reg, int val) -{ - return i2c_write16(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_read(int port, int i2c_addr, int reg, int *val) -{ - return i2c_read8(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_read16(int port, int i2c_addr, int reg, int *val) -{ - return i2c_read16(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -/* - * The *_no_lpm_exit() routines are intende to be used where the TCPC - * needs to be accessed without being being taken out of LPM. The main - * use case is to check the alert register to determine if a TCPC is the - * source of an interrupt in a shared interrupt implementation. If the - * TCPC is taken out of LPM, it may generate a new alert which can lead - * to successive unintended interrupts. The TCPC is placed back into the - * idle state after the LPM timer expires similar to other tcpc_*() - * routines. - * - * The caller must guarantee that the chip responds to I2C as expected: - * - some TCPCs wake up when they alert and do not need special handing - * - some TCPCs wake up on I2C and respond as expected - * - some TCPCs wake up on I2C and throw away the transaction - these - * need an explicit by the caller. - */ - -static inline int tcpc_addr_read16_no_lpm_exit(int port, int i2c_addr, - int reg, int *val) -{ - return tcpc_addr_read16(port, i2c_addr, reg, val); -} - -static inline int tcpc_xfer(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size) -{ - return i2c_xfer(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - out, out_size, in, in_size); -} - -static inline int tcpc_xfer_unlocked(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size, int flags) -{ - return i2c_xfer_unlocked(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - out, out_size, in, in_size, flags); -} - -static inline int tcpc_read_block(int port, int reg, uint8_t *in, int size) -{ - return i2c_read_block(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, in, size); -} - -static inline int tcpc_write_block(int port, int reg, - const uint8_t *out, int size) -{ - return i2c_write_block(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, out, size); -} - -static inline int tcpc_update8(int port, int reg, - uint8_t mask, - enum mask_update_action action) -{ - return i2c_update8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, mask, action); -} - -static inline int tcpc_update16(int port, int reg, - uint16_t mask, - enum mask_update_action action) -{ - return i2c_update16(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, mask, action); -} - -#else /* !CONFIG_USB_PD_TCPC_LOW_POWER */ -int tcpc_addr_write(int port, int i2c_addr, int reg, int val); -int tcpc_addr_write16(int port, int i2c_addr, int reg, int val); -int tcpc_addr_read(int port, int i2c_addr, int reg, int *val); -int tcpc_addr_read16(int port, int i2c_addr, int reg, int *val); -int tcpc_addr_read16_no_lpm_exit(int port, int i2c_addr, int reg, int *val); -int tcpc_read_block(int port, int reg, uint8_t *in, int size); -int tcpc_write_block(int port, int reg, const uint8_t *out, int size); -int tcpc_xfer(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size); -int tcpc_xfer_unlocked(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size, int flags); - -int tcpc_update8(int port, int reg, - uint8_t mask, enum mask_update_action action); -int tcpc_update16(int port, int reg, - uint16_t mask, enum mask_update_action action); - -#endif /* CONFIG_USB_PD_TCPC_LOW_POWER */ - -static inline int tcpc_write(int port, int reg, int val) -{ - return tcpc_addr_write(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_write16(int port, int reg, int val) -{ - return tcpc_addr_write16(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_read(int port, int reg, int *val) -{ - return tcpc_addr_read(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_read16(int port, int reg, int *val) -{ - return tcpc_addr_read16(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline void tcpc_lock(int port, int lock) -{ - i2c_lock(tcpc_config[port].i2c_info.port, lock); -} - -/* TCPM driver wrapper function */ -static inline int tcpm_init(int port) -{ - int rv; - - rv = tcpc_config[port].drv->init(port); - if (rv) - return rv; - - /* Board specific post TCPC init */ - if (board_tcpc_post_init) - rv = board_tcpc_post_init(port); - - return rv; -} - -static inline int tcpm_release(int port) -{ - return tcpc_config[port].drv->release(port); -} - -static inline int tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2) -{ - return tcpc_config[port].drv->get_cc(port, cc1, cc2); -} - -static inline bool tcpm_check_vbus_level(int port, enum vbus_level level) -{ - return tcpc_config[port].drv->check_vbus_level(port, level); -} - -static inline int tcpm_select_rp_value(int port, int rp) -{ - return tcpc_config[port].drv->select_rp_value(port, rp); -} - -static inline int tcpm_set_cc(int port, int pull) -{ - return tcpc_config[port].drv->set_cc(port, pull); -} - -static inline int tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity) -{ - return tcpc_config[port].drv->set_polarity(port, polarity); -} - -static inline int tcpm_sop_prime_enable(int port, bool enable) -{ -#ifdef CONFIG_USB_PD_DECODE_SOP - return tcpc_config[port].drv->sop_prime_enable(port, enable); -#else - return EC_SUCCESS; -#endif -} - -static inline int tcpm_set_vconn(int port, int enable) -{ -#ifdef CONFIG_USB_PD_TCPC_VCONN - int rv; - - rv = tcpc_config[port].drv->set_vconn(port, enable); - if (rv) - return rv; -#endif - - return tcpm_sop_prime_enable(port, enable); -} - -static inline int tcpm_set_msg_header(int port, int power_role, int data_role) -{ - return tcpc_config[port].drv->set_msg_header(port, power_role, - data_role); -} - -static inline int tcpm_set_rx_enable(int port, int enable) -{ - return tcpc_config[port].drv->set_rx_enable(port, enable); -} - -static inline void tcpm_enable_auto_discharge_disconnect(int port, int enable) -{ - const struct tcpm_drv *tcpc = tcpc_config[port].drv; - - if (tcpc->tcpc_enable_auto_discharge_disconnect) - tcpc->tcpc_enable_auto_discharge_disconnect(port, enable); -} - -static inline int tcpm_reset_bist_type_2(int port) -{ - if (tcpc_config[port].drv->reset_bist_type_2 != NULL) - return tcpc_config[port].drv->reset_bist_type_2(port); - else - return EC_SUCCESS; -} - -/** - * Reads a message using get_message_raw driver method and puts it into EC's - * cache. - */ -int tcpm_enqueue_message(int port); - -static inline int tcpm_transmit(int port, enum tcpci_msg_type type, - uint16_t header, const uint32_t *data) -{ - return tcpc_config[port].drv->transmit(port, type, header, data); -} - -#ifdef CONFIG_USB_PD_PPC -static inline bool tcpm_get_snk_ctrl(int port) -{ - return tcpc_config[port].drv->get_snk_ctrl ? - tcpc_config[port].drv->get_snk_ctrl(port) : false; -} -static inline int tcpm_set_snk_ctrl(int port, int enable) -{ - if (tcpc_config[port].drv->set_snk_ctrl != NULL) - return tcpc_config[port].drv->set_snk_ctrl(port, enable); - else - return EC_ERROR_UNIMPLEMENTED; -} - -static inline bool tcpm_get_src_ctrl(int port) -{ - - return tcpc_config[port].drv->get_src_ctrl ? - tcpc_config[port].drv->get_src_ctrl(port) : false; -} -static inline int tcpm_set_src_ctrl(int port, int enable) -{ - if (tcpc_config[port].drv->set_src_ctrl != NULL) - return tcpc_config[port].drv->set_src_ctrl(port, enable); - else - return EC_ERROR_UNIMPLEMENTED; -} -#endif - -static inline void tcpc_alert(int port) -{ - tcpc_config[port].drv->tcpc_alert(port); -} - -static inline void tcpc_discharge_vbus(int port, int enable) -{ - tcpc_config[port].drv->tcpc_discharge_vbus(port, enable); -} - -#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -static inline int tcpm_auto_toggle_supported(int port) -{ - return !!tcpc_config[port].drv->drp_toggle; -} - -static inline int tcpm_enable_drp_toggle(int port) -{ - return tcpc_config[port].drv->drp_toggle(port); -} -#else -static inline int tcpm_auto_toggle_supported(int port) -{ - return false; -} -int tcpm_enable_drp_toggle(int port); -#endif - -static inline int tcpm_debug_accessory(int port, bool enable) -{ - if (tcpc_config[port].drv->debug_accessory) - return tcpc_config[port].drv->debug_accessory(port, enable); - return EC_SUCCESS; -} - -static inline int tcpm_debug_detach(int port) -{ - if (tcpc_config[port].drv->debug_detach) - return tcpc_config[port].drv->debug_detach(port); - - /* No special handling for debug disconnections? Success! */ - return EC_SUCCESS; -} - -#ifdef CONFIG_USB_PD_TCPC_LOW_POWER -static inline int tcpm_enter_low_power_mode(int port) -{ - return tcpc_config[port].drv->enter_low_power_mode(port); -} -#else -int tcpm_enter_low_power_mode(int port); -#endif - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC -static inline int tcpc_i2c_read(const int port, const uint16_t addr_flags, - const int reg, int *data) -{ - return tcpc_read(port, reg, data); -} - -static inline int tcpc_i2c_write(const int port, const uint16_t addr_flags, - const int reg, int data) -{ - return tcpc_write(port, reg, data); -} -#endif - -static inline int tcpm_get_chip_info(int port, int live, - struct ec_response_pd_chip_info_v1 *info) -{ - if (tcpc_config[port].drv->get_chip_info) - return tcpc_config[port].drv->get_chip_info(port, live, info); - return EC_ERROR_UNIMPLEMENTED; -} - -static inline enum ec_error_list tcpc_set_bist_test_mode(int port, bool enable) -{ - const struct tcpm_drv *tcpc; - int rv = EC_SUCCESS; - - tcpc = tcpc_config[port].drv; - if (tcpc->set_bist_test_mode) - rv = tcpc->set_bist_test_mode(port, enable); - return rv; -} - -#ifdef CONFIG_USB_PD_FRS_TCPC -static inline int tcpm_set_frs_enable(int port, int enable) -{ - const struct tcpm_drv *tcpc; - int rv = EC_SUCCESS; - - /* - * set_frs_enable will be set to tcpci_tcp_fast_role_swap_enable - * if it is handled by the tcpci for the tcpc chipset - */ - tcpc = tcpc_config[port].drv; - if (tcpc->set_frs_enable) - rv = tcpc->set_frs_enable(port, enable); - return rv; -} -#endif /* defined(CONFIG_USB_PD_FRS_TCPC) */ - -#else /* CONFIG_USB_PD_TCPC */ - -/** - * Initialize TCPM driver and wait for TCPC readiness. - * - * @param port Type-C port number - * - * @return EC_SUCCESS or error - */ -int tcpm_init(int port); - -/** - * Read the CC line status. - * - * @param port Type-C port number - * @param cc1 pointer to CC status for CC1 - * @param cc2 pointer to CC status for CC2 - * - * @return EC_SUCCESS or error - */ -int tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2); - -/** - * Check VBUS level - * - * @param port Type-C port number - * @param level safe level voltage to check against - * - * @return False => VBUS not at level, True => VBUS at level - */ -bool tcpm_check_vbus_level(int port, enum vbus_level level); - -/** - * Set the value of the CC pull-up used when we are a source. - * - * @param port Type-C port number - * @param rp One of enum tcpc_rp_value - * - * @return EC_SUCCESS or error - */ -int tcpm_select_rp_value(int port, int rp); - -/** - * Set the CC pull resistor. This sets our role as either source or sink. - * - * @param port Type-C port number - * @param pull One of enum tcpc_cc_pull - * - * @return EC_SUCCESS or error - */ -int tcpm_set_cc(int port, int pull); - -/** - * Set polarity - * - * @param port Type-C port number - * @param polarity port polarity - * - * @return EC_SUCCESS or error - */ -int tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity); - -/** - * Enable SOP' message transmit/receive. - * - * @param port Type-C port number - * @param enable Enable/Disable SOP' and SOP'' messages - * - * @return EC_SUCCESS or error - */ -int tcpm_sop_prime_enable(int port, int enable); - -/** - * Set Vconn. - * - * @param port Type-C port number - * @param enable Enable/Disable Vconn - * - * @return EC_SUCCESS or error - */ -int tcpm_set_vconn(int port, int enable); - -/** - * Set PD message header to use for goodCRC - * - * @param port Type-C port number - * @param power_role Power role to use in header - * @param data_role Data role to use in header - * - * @return EC_SUCCESS or error - */ -int tcpm_set_msg_header(int port, int power_role, int data_role); - -/** - * Set RX enable flag - * - * @param port Type-C port number - * @enable true for enable, false for disable - * - * @return EC_SUCCESS or error - */ -int tcpm_set_rx_enable(int port, int enable); - -/** - * Enable Auto Discharge Disconnect - * - * @param port Type-C port number - * @param enable true for enable, false for disable - */ -void tcpm_enable_auto_discharge_disconnect(int port, int enable); - -/** - * Transmit PD message - * - * @param port Type-C port number - * @param type Transmit type - * @param header Packet header - * @param cnt Number of bytes in payload - * @param data Payload - * - * @return EC_SUCCESS or error - */ -int tcpm_transmit(int port, enum tcpci_msg_type type, uint16_t header, - const uint32_t *data); - -/** - * TCPC is asserting alert - * - * @param port Type-C port number - */ -void tcpc_alert(int port); - -#endif /* CONFIG_USB_PD_TCPC */ - -/** - * Gets the next waiting RX message. - * - * @param port Type-C port number - * @param payload Pointer to location to copy payload of PD message - * @param header The header of PD message - * - * @return EC_SUCCESS or error - */ -int tcpm_dequeue_message(int port, uint32_t *payload, int *header); - -/** - * Returns true if the tcpm has RX messages waiting to be consumed. - */ -int tcpm_has_pending_message(int port); - -/** - * Clear any pending messages in the RX queue. This function must be - * called from the same context as the caller of tcpm_dequeue_message to avoid - * race conditions. - */ -void tcpm_clear_pending_messages(int port); - -/** - * Enable/Disable TCPC Fast Role Swap detection - * - * @param port Type-C port number - * @param enable FRS enable (true) disable (false) - * @return EC_SUCCESS on success, or an error - */ -int tcpm_set_frs_enable(int port, int enable); - -#ifdef CONFIG_CMD_TCPC_DUMP -static inline void tcpm_dump_registers(int port) -{ - const struct tcpm_drv *tcpc = tcpc_config[port].drv; - - if (tcpc->dump_registers) - tcpc->dump_registers(port); - else - tcpc_dump_std_registers(port); -} -#endif /* defined(CONFIG_CMD_TCPC_DUMP) */ - -/** - * Disable BIST type-2 mode - * - * @param port Type-C port number - * @return EC_SUCCESS on success, or an error - */ -int tcpm_reset_bist_type_2(int port); - -#endif diff --git a/include/driver/tcpm/tusb422_public.h b/include/driver/tcpm/tusb422_public.h deleted file mode 100644 index 8756d9b362..0000000000 --- a/include/driver/tcpm/tusb422_public.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TI TUSB422 Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H - -/* I2C interface */ -#define TUSB422_I2C_ADDR_FLAGS 0x20 - -extern const struct tcpm_drv tusb422_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H */ |