diff options
Diffstat (limited to 'include')
178 files changed, 0 insertions, 19108 deletions
diff --git a/include/accel_cal.h b/include/accel_cal.h deleted file mode 100644 index 80f0161a04..0000000000 --- a/include/accel_cal.h +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Online accelerometer calibration */ - -#ifndef __CROS_EC_ACCEL_CAL_H -#define __CROS_EC_ACCEL_CAL_H - -#include "common.h" -#include "kasa.h" -#include "newton_fit.h" -#include "stdbool.h" -#include "stillness_detector.h" - -struct accel_cal_algo { - struct kasa_fit kasa_fit; - struct newton_fit newton_fit; -}; - -struct accel_cal { - struct still_det still_det; - struct accel_cal_algo *algos; - uint8_t num_temp_windows; - fpv3_t bias; -}; - -/** - * Reset the accelerometer calibration object. This should only be called - * once. The struct will reset automatically in accel_cal_accumulate when - * a new calibration is computed. - * - * @param cal Pointer to the accel_cal struct to reset. - */ -void accel_cal_reset(struct accel_cal *cal); - -/** - * Add new reading to the accelerometer calibration. - * - * @param cal Pointer to the accel_cal struct to update. - * @param sample_time The timestamp when the sample was taken. - * @param x X component of the new reading. - * @param y Y component of the new reading. - * @param z Z component of the new reading. - * @param temp The sensor's internal temperature in degrees C. - * @return True if a new bias is available. - */ -bool accel_cal_accumulate(struct accel_cal *cal, uint32_t sample_time, fp_t x, - fp_t y, fp_t z, fp_t temp); - -#endif /* __CROS_EC_ACCEL_CAL_H */ diff --git a/include/adc.h b/include/adc.h deleted file mode 100644 index 8342bc1fb6..0000000000 --- a/include/adc.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* ADC interface for Chrome EC */ - -#ifndef __CROS_EC_ADC_H -#define __CROS_EC_ADC_H - -#include "adc_chip.h" -#include "common.h" - -#define ADC_READ_ERROR -1 /* Value returned by adc_read_channel() on error */ - -#ifdef CONFIG_ZEPHYR -#include <zephyr_adc.h> -#endif /* CONFIG_ZEPHYR */ - -/* - * Boards must provide this list of ADC channel definitions. This must match - * the enum adc_channel list provided by the board. - */ -#ifndef CONFIG_ADC_CHANNELS_RUNTIME_CONFIG -extern const struct adc_t adc_channels[]; -#else -extern struct adc_t adc_channels[]; -#endif - -/* - * Boards which use the ADC interface must provide enum adc_channel in the - * board.h file. See chip/$CHIP/adc_chip.h for additional chip-specific - * requirements. - */ - -/** - * Read an ADC channel. - * - * @param ch Channel to read - * - * @return The scaled ADC value, or ADC_READ_ERROR if error. - */ -int adc_read_channel(enum adc_channel ch); - -/** - * Enable ADC watchdog. Note that interrupts might come in repeatedly very - * quickly when ADC output goes out of the accepted range. - * - * @param ain_id The AIN to be watched by the watchdog. - * @param high The high threshold that the watchdog would trigger - * an interrupt when exceeded. - * @param low The low threshold. - * - * @return EC_SUCCESS, or non-zero if any error. - */ -int adc_enable_watchdog(int ain_id, int high, int low); - -/** - * Disable ADC watchdog. - * - * @return EC_SUCCESS, or non-zero if any error. - */ -int adc_disable_watchdog(void); - -/** - * Set the delay between ADC watchdog samples. This can be used as a trade-off - * of power consumption and performance. - * - * @param delay_ms The delay in milliseconds between two ADC watchdog - * samples. - * - * @return EC_SUCCESS, or non-zero if any error or not supported. - */ -int adc_set_watchdog_delay(int delay_ms); - -#endif /* __CROS_EC_ADC_H */ diff --git a/include/aes-gcm.h b/include/aes-gcm.h deleted file mode 120000 index ba62939792..0000000000 --- a/include/aes-gcm.h +++ /dev/null @@ -1 +0,0 @@ -../third_party/boringssl/include/aes-gcm.h
\ No newline at end of file diff --git a/include/aes.h b/include/aes.h deleted file mode 120000 index b30c680a6a..0000000000 --- a/include/aes.h +++ /dev/null @@ -1 +0,0 @@ -../third_party/boringssl/include/aes.h
\ No newline at end of file diff --git a/include/als.h b/include/als.h deleted file mode 100644 index 4ff3fcdb4f..0000000000 --- a/include/als.h +++ /dev/null @@ -1,37 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_ALS_H -#define __CROS_EC_ALS_H - -#include "common.h" - -/* Priority for ALS HOOK int */ -#define HOOK_PRIO_ALS_INIT (HOOK_PRIO_DEFAULT + 1) - -/* Defined in board.h */ -enum als_id; - -/* Initialized in board.c */ -struct als_t { - const char *const name; - int (*init)(void); - int (*read)(int *lux, int af); - int attenuation_factor; -}; - -extern struct als_t als[]; - -/** - * Read an ALS - * - * @param id Which one? - * @param lux Put value here - * - * @return EC_SUCCESS, or non-zero if error. - */ -int als_read(enum als_id id, int *lux); - -#endif /* __CROS_EC_ALS_H */ diff --git a/include/audio_codec.h b/include/audio_codec.h deleted file mode 100644 index b80d1c0f57..0000000000 --- a/include/audio_codec.h +++ /dev/null @@ -1,259 +0,0 @@ -/* - * Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_AUDIO_CODEC_H -#define __CROS_EC_AUDIO_CODEC_H - -#include "stdint.h" - -/* - * Common abstract layer - */ - -/* - * Checks capability of audio codec. - * - * @cap is an integer from enum ec_codec_cap. Note that it represents a - * bit field in a 32-bit integer. The valid range is [0, 31]. - * - * Returns: - * 1 if audio codec capabilities include cap passed as parameter. - * 0 if not capable. - */ -int audio_codec_capable(uint8_t cap); - -/* - * Registers shared memory (SHM). - * - * @shm_id is a SHM identifier from enum ec_codec_shm_id. - * @cap is an integer from enum ec_codec_cap. - * @addr is the address pointer to the SHM. - * @len is the maximum length of the SHM. - * @type is an integer from enum ec_codec_shm_type. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal errors. - * EC_ERROR_INVAL if invalid shm_id. - * EC_ERROR_INVAL if invalid cap. - * EC_ERROR_BUSY if the shm_id has been registered. - */ -int audio_codec_register_shm(uint8_t shm_id, uint8_t cap, - uintptr_t *addr, uint32_t len, uint8_t type); - -/* - * Translates the physical address from AP to EC's memory space. Required if - * wants to use AP SHM. - * - * @ap_addr is physical address from AP. - * @ec_addr is the translation destination. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal errors. - * EC_ERROR_UNIMPLEMENTED if no concrete implementation. - */ -int audio_codec_memmap_ap_to_ec(uintptr_t ap_addr, uintptr_t *ec_addr); - -/* - * Scales a S16_LE sample by multiplying scalar. - */ -int16_t audio_codec_s16_scale_and_clip(int16_t orig, uint8_t scalar); - - -/* - * DMIC abstract layer - */ - -/* - * Gets the maximum possible gain value. All channels share the same maximum - * gain value [0, max]. - * - * The gain has no unit and should fit in a scale to represent relative dB. - * - * For example, suppose maximum possible gain value is 4, one could define a - * mapping: - * - 0 => -10 dB - * - 1 => -5 dB - * - 2 => 0 dB - * - 3 => 5 dB - * - 4 => 10 dB - * - * @max_gain is the destination address to put the gain value. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - */ -int audio_codec_dmic_get_max_gain(uint8_t *max_gain); - -/* - * Sets the microphone gain for the specified channel. - * - * @channel is an integer from enum ec_codec_dmic_channel. The valid range - * is [0, 7]. - * @gain is the target gain for the specified channel. The valid range - * is [0, max_gain]. See also audio_codec_dmic_get_max_gain. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_INVAL if channel does not look good. - * EC_ERROR_INVAL if gain does not look good. - */ -int audio_codec_dmic_set_gain_idx(uint8_t channel, uint8_t gain); - -/* - * Gets the microphone gain of the specified channel. - * - * @channel is an integer from enum ec_codec_dmic_channel. The valid range - * is [0, 7]. - * @gain is the destination address to put the gain value of the channel. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_INVAL if channel does not look good. - */ -int audio_codec_dmic_get_gain_idx(uint8_t channel, uint8_t *gain); - - -/* - * I2S RX abstract layer - */ - -/* - * Enables I2S RX. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has enabled. - */ -int audio_codec_i2s_rx_enable(void); - -/* - * Disables I2S RX. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has not enabled. - */ -int audio_codec_i2s_rx_disable(void); - -/* - * Sets I2S RX sample depth. - * - * @depth is an integer from enum ec_codec_i2s_rx_sample_depth. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_INVAL if depth does not look good. - */ -int audio_codec_i2s_rx_set_sample_depth(uint8_t depth); - -/* - * Sets I2S RX DAI format. - * - * @daifmt is an integer from enum ec_codec_i2s_rx_daifmt. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_INVAL if daifmt does not look good. - */ -int audio_codec_i2s_rx_set_daifmt(uint8_t daifmt); - -/* - * Sets I2S RX BCLK. - * - * @bclk is an integer to represent the bit clock rate. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_INVAL if bclk does not look good. - */ -int audio_codec_i2s_rx_set_bclk(uint32_t bclk); - - -/* - * WoV abstract layer - */ - -/* - * Enables WoV. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has enabled. - */ -int audio_codec_wov_enable(void); - -/* - * Disables WoV. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has not enabled. - */ -int audio_codec_wov_disable(void); - -/* - * Reads the WoV audio data from chip. - * - * @buf is the target pointer to put the data. - * @count is the maximum number of bytes to read. - * - * Returns: - * -1 if any errors. - * 0 if no data. - * >0 if success. The returned value denotes number of bytes read. - */ -int32_t audio_codec_wov_read(void *buf, uint32_t count); - -/* - * Enables notification if WoV audio data is available. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has enabled. - * EC_ERROR_ACCESS_DENIED if the notifiee has not set. - */ -int audio_codec_wov_enable_notifier(void); - -/* - * Disables WoV data notification. - * - * Returns: - * EC_SUCCESS if success. - * EC_ERROR_UNKNOWN if internal error. - * EC_ERROR_BUSY if has not enabled. - * EC_ERROR_ACCESS_DENIED if the notifiee has not set. - */ -int audio_codec_wov_disable_notifier(void); - -/* - * Audio buffer for 2 seconds S16_LE, 16kHz, mono. - */ -extern uintptr_t audio_codec_wov_audio_buf_addr; - -/* - * Language model buffer for speech-micro. At least 67KB. - */ -extern uintptr_t audio_codec_wov_lang_buf_addr; - -/* - * Task for running WoV. - */ -void audio_codec_wov_task(void *arg); - -#endif diff --git a/include/backlight.h b/include/backlight.h deleted file mode 100644 index 1bfafbdd2c..0000000000 --- a/include/backlight.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Backlight API for Chrome EC */ - -#ifndef __CROS_EC_BACKLIGHT_H -#define __CROS_EC_BACKLIGHT_H - -#include "common.h" -#include "gpio.h" - -/** - * Interrupt handler for backlight. - * - * @param signal Signal which triggered the interrupt. - */ -#ifdef CONFIG_BACKLIGHT_REQ_GPIO -void backlight_interrupt(enum gpio_signal signal); -#else -static inline void backlight_interrupt(enum gpio_signal signal) { } -#endif /* !CONFIG_BACKLIGHT_REQ_GPIO */ - -/** - * Activate/Deactivate the backlight GPIO pin considering active high or low. - */ -void enable_backlight(int enabled); - -#endif /* __CROS_EC_BACKLIGHT_H */ diff --git a/include/base32.h b/include/base32.h deleted file mode 100644 index ac04ce9c70..0000000000 --- a/include/base32.h +++ /dev/null @@ -1,73 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Base-32 encoding/decoding, designed for manual operator entry. */ - -#ifndef __CROS_EC_BASE32_H -#define __CROS_EC_BASE32_H - -/* Symbol map for base32 encoding */ -extern const char base32_map[33]; - -/** - * CRC-5-USB Initially created for USB Token Packets. It uses - * the generator polynomial X^5 + X^2 + X^0 and is 5-bits. - * - * @param sym New symbol to update CRC with - * @param previous_crc Existing CRC value - * @return The updated CRC. - */ -uint8_t crc5_sym(uint8_t sym, uint8_t previous_crc); - -/** - * base32-encode data into a null-terminated string - * - * Uses A-Z0-9 encoding, skipping I,O,0,1 since they're easy to get mixed up. - * - * @param dest Destination buffer; set to empty string on - * error - * @param destlen_chars Length of destination buffer in characters - * @param src Source binary data - * @param srclen_bits Length of source *in bits*. If this is not a - * multiple of 8, the *most significant* bits of - * the last byte will be used. If this is not a - * multiple of 5, the least significant bits of - * the last symbol will be padded with 0 bits. - * @param add_crc_every If non-zero, add a CRC symbol after each group - * of this many symbols. There must be an exact - * number of groups; that is, ceil(srclen_bits/5) - * must be a multiple of add_crc_every. - * @return EC_SUCCESS, or non-zero error code. - */ -int base32_encode(char *dest, int destlen_chars, - const void *srcbits, int srclen_bits, - int add_crc_every); - -/** - * base32-decode data from a null-terminated string - * - * Ignores whitespace and '-' dashes in the source string. - * - * If the destination is smaller than the decoded bitstream, only that many - * bits will be decoded. This is useful for decoding the first part of a - * bitstream to look for a struct version. - * - * If the destination is larger than the decoded bitstream, check the return - * value to determine how many bits were decoded from the source. Note that if - * padding was added by base32_encode (that is, the input length was not a - * multiple of 5 bits), the padding will be included in the count. - * - * @param dest Destination; must be at least - * ceil(destlen_bits/8) bytes. - * @param destlen_bits Length of destination *in bits*. - * @param src Source string (null-terminated) - * @param crc_after_every If non-zero, expect CRC symbol after every - * group of this many symbols. - * @return Number of decoded *bits*, or -1 if error. - */ -int base32_decode(uint8_t *dest, int destlen_bits, const char *src, - int crc_after_every); - -#endif diff --git a/include/base_state.h b/include/base_state.h deleted file mode 100644 index d8c72e5663..0000000000 --- a/include/base_state.h +++ /dev/null @@ -1,24 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "ec_commands.h" - -/** - * Return 1 if base attached, 0 otherwise. - */ -int base_get_state(void); - -/** - * Sets the current state of the base, with 0 meaning detached, - * and non-zero meaning attached. - */ -void base_set_state(int state); - -/** - * Call board specific base_force_state function. - * Force the current state of the base, with 0 meaning detached, - * 1 meaning attached and 2 meaning reset to the original state. - */ -void base_force_state(enum ec_set_base_state_cmd state); diff --git a/include/battery_bq27621_g1.h b/include/battery_bq27621_g1.h deleted file mode 100644 index 0c388d8a52..0000000000 --- a/include/battery_bq27621_g1.h +++ /dev/null @@ -1,19 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery driver for BQ27621-G1 - */ - -/* Sets percent to the battery life as a percentage (0-100) - * - * Returns EC_SUCCESS on success. - */ -int bq27621_state_of_charge(int *percent); - -/* Initializes the fuel gauge with the constants for the battery. - * - * Returns EC_SUCCESS on success. - */ -int bq27621_init(void); - diff --git a/include/battery_fuel_gauge.h b/include/battery_fuel_gauge.h deleted file mode 100644 index eb54b64c53..0000000000 --- a/include/battery_fuel_gauge.h +++ /dev/null @@ -1,117 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Battery fuel gauge parameters - */ - -#ifndef __CROS_EC_BATTERY_FUEL_GAUGE_H -#define __CROS_EC_BATTERY_FUEL_GAUGE_H - -#include "battery.h" -#include <stdbool.h> - -/* Number of writes needed to invoke battery cutoff command */ -#define SHIP_MODE_WRITES 2 - -struct ship_mode_info { - /* - * Write Block Support. If wb_support is true, then we use a i2c write - * block command instead of a 16-bit write. The effective difference is - * that the i2c transaction will prefix the length (2) when wb_support - * is enabled. - */ - const uint8_t wb_support; - const uint8_t reg_addr; - const uint16_t reg_data[SHIP_MODE_WRITES]; -}; - -struct sleep_mode_info { - const bool sleep_supported; - const uint8_t reg_addr; - const uint16_t reg_data; -}; - -struct fet_info { - const int mfgacc_support; - const uint8_t reg_addr; - const uint16_t reg_mask; - const uint16_t disconnect_val; - const uint16_t cfet_mask; /* CHG FET status mask */ - const uint16_t cfet_off_val; -}; - -struct fuel_gauge_info { - const char *manuf_name; - const char *device_name; - const uint8_t override_nil; - const struct ship_mode_info ship_mode; - const struct sleep_mode_info sleep_mode; - const struct fet_info fet; - -#ifdef CONFIG_BATTERY_MEASURE_IMBALANCE - /* See battery_*_imbalance_mv() for functions which are suitable. */ - int (*imbalance_mv)(void); -#endif -}; - -struct board_batt_params { - const struct fuel_gauge_info fuel_gauge; - const struct battery_info batt_info; -}; - -/* Forward declare board specific data used by common code */ -extern const struct board_batt_params board_battery_info[]; -extern const enum battery_type DEFAULT_BATTERY_TYPE; - - -#ifdef CONFIG_BATTERY_MEASURE_IMBALANCE -/** - * Report the absolute difference between the highest and lowest cell voltage in - * the battery pack, in millivolts. On error or unimplemented, returns '0'. - */ -int battery_default_imbalance_mv(void); - -#ifdef CONFIG_BATTERY_BQ4050 -int battery_bq4050_imbalance_mv(void); -#endif - -#endif - -/** - * Return the board-specific default battery type. - * - * @return a value of `enum battery_type`. - */ -__override_proto int board_get_default_battery_type(void); - -/** - * Return 1 if CFET is disabled, 0 if enabled. -1 if an error was encountered. - * If the CFET mask is not defined, it will return 0. - */ -int battery_is_charge_fet_disabled(void); - -/** - * Battery cut off command via SMBus write block. - * - * @param ship_mode Battery ship mode information - * @return non-zero if error - */ -int cut_off_battery_block_write(const struct ship_mode_info *ship_mode); - -/** - * Battery cut off command via SMBus write word. - * - * @param ship_mode Battery ship mode information - * @return non-zero if error - */ -int cut_off_battery_sb_write(const struct ship_mode_info *ship_mode); - -/** - * Send the fuel gauge sleep command through SMBus. - * - * @return 0 if successful, non-zero if error occurred - */ -enum ec_error_list battery_sleep_fuel_gauge(void); - -#endif /* __CROS_EC_BATTERY_FUEL_GAUGE_H */ diff --git a/include/bluetooth_le.h b/include/bluetooth_le.h deleted file mode 100644 index 286653dda6..0000000000 --- a/include/bluetooth_le.h +++ /dev/null @@ -1,392 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Bluetooth LE packet formats, etc. */ - -/* - * Since the fields are all little endian, - * - * uint16_t two_octets; - * - * is used in place of - * - * uint8_t two_single_octets[2]; - * - * in many places. - */ - -#ifndef __CROS_EC_BLE_H -#define __CROS_EC_BLE_H - -#include "common.h" -#include "util.h" - -#define BLUETOOTH_ADDR_OCTETS 6 - -/* - * GAP assigned numbers - * https://www.bluetooth.org/en-us/specification/ - * assigned-numbers/generic-access-profile - */ -#define GAP_FLAGS 0x01 -#define GAP_INCOMP_16_BIT_UUID 0x02 -#define GAP_COMP_16_BIT_UUID 0x03 -#define GAP_INCOMP_32_BIT_UUID 0x04 -#define GAP_COMP_32_BIT_UUID 0x05 -#define GAP_INCOMP_128_BIT_UUID 0x06 -#define GAP_COMP_128_BIT_UUID 0x07 -#define GAP_SHORT_NAME 0x08 -#define GAP_COMPLETE_NAME 0x09 -#define GAP_TX_POWER_LEVEL 0x0A -#define GAP_CLASS_OF_DEVICE 0x0D -#define GAP_SIMPLE_PAIRING_HASH 0x0E -#define GAP_SIMPLE_PAIRING_HASH_192 0x0E -#define GAP_SIMPLE_PAIRING_RAND 0x0F -#define GAP_SIMPLE_PAIRING_RAND_192 0x0F -#define GAP_DEVICE_ID 0x10 -#define GAP_SECURITY_MANAGER_TK 0x10 -#define GAP_SECURITY_MANAGER_OOB_FLAGS 0x11 -#define GAP_SLAVE_CONNECTION_INTERVAL_RANGE 0x12 -#define GAP_SERVICE_SOLICITATION_UUID_16 0x14 -#define GAP_SERVICE_SOLICITATION_UUID_32 0x1F -#define GAP_SERVICE_SOLICITATION_UUID_128 0x15 -#define GAP_SERVICE_DATA 0x16 -#define GAP_SERVICE_DATA_UUID_16 0x16 -#define GAP_SERVICE_DATA_UUID_32 0x20 -#define GAP_SERVICE_DATA_UUID_128 0x21 -#define GAP_LE_SECURE_CONNECTIONS_CONFIRMATION 0x22 -#define GAP_LE_SECURE_CONNECTIONS_RAND 0x23 -#define GAP_PUBLIC_TARGET_ADDRESS 0x17 -#define GAP_RANDOM_TARGET_ADDRESS 0x18 -#define GAP_APPEARANCE 0x19 -#define GAP_ADVERTISING_INTERVAL 0x1A -#define GAP_LE_BLUETOOTH_DEVICE_ADDRESS 0x1B -#define GAP_LE_ROLE 0x1C -#define GAP_SIMPLE_PAIRING_HASH_256 0x1D -#define GAP_SIMPLE_PAIRING_RAND_256 0x1E -#define GAP_3D_INFORMATION_DATA 0x3D -#define GAP_MANUFACTURER_SPECIFIC_DATA 0xFF - - -/* org.bluetooth.characteristic.gap.appearance.xml */ -#define GAP_APPEARANCE_HID_KEYBOARD 961 - -/* org.bluetooth.service.human_interface_device.xml */ -#define GATT_SERVICE_HID_UUID 0x1812 - -/* Bluetooth Core Supplement v5 */ - -/* Bluetooth Core Supplement v5 1.3 */ -#define GAP_FLAGS_LE_LIM_DISC 0x01 -#define GAP_FLAGS_LE_GEN_DISC 0x02 -#define GAP_FLAGS_LE_NO_BR_EDR 0x04 - -/* Bluetooth Core Supplement v5 1.3 */ - - -/* BLE 4.1 Vol 6 section 2.3 pg 38+ */ - -/* Advertising PDU Header - * 16 Bits: - * 4 bit type - * 1 bit TxAddr - * 1 bit RxAddr - * 6 bit length (length of the payload in bytes) - */ - -struct ble_adv_header { - uint8_t type; - uint8_t txaddr; - uint8_t rxaddr; - uint8_t length; -}; - -#define BLE_ADV_HEADER_PDU_TYPE_SHIFT 0 -#define BLE_ADV_HEADER_TXADD_SHIFT 6 -#define BLE_ADV_HEADER_RXADD_SHIFT 7 -#define BLE_ADV_HEADER_LENGTH_SHIFT 8 - -#define BLE_ADV_HEADER(type, tx, rx, length) \ - ((uint16_t) \ - ((((length) & 0x3f) << BLE_ADV_HEADER_LENGTH_SHIFT) | \ - (((rx) & 0x1) << BLE_ADV_HEADER_RXADD_SHIFT) | \ - (((tx) & 0x1) << BLE_ADV_HEADER_TXADD_SHIFT) | \ - (((type) & 0xf) << BLE_ADV_HEADER_PDU_TYPE_SHIFT))) - -#define BLE_ADV_HEADER_PDU_TYPE_ADV_IND 0 -#define BLE_ADV_HEADER_PDU_TYPE_ADV_DIRECT_IND 1 -#define BLE_ADV_HEADER_PDU_TYPE_ADV_NONCONN_IND 2 -#define BLE_ADV_HEADER_PDU_TYPE_SCAN_REQ 3 -#define BLE_ADV_HEADER_PDU_TYPE_SCAN_RSP 4 -#define BLE_ADV_HEADER_PDU_TYPE_CONNECT_REQ 5 -#define BLE_ADV_HEADER_PDU_TYPE_ADV_SCAN_IND 6 - -#define BLE_ADV_HEADER_PUBLIC_ADDR 0 -#define BLE_ADV_HEADER_RANDOM_ADDR 1 - -/* BLE 4.1 Vol 3 Part C 10.8 */ -#define BLE_RANDOM_ADDR_MSBS_PRIVATE 0x00 -#define BLE_RANDOM_ADDR_MSBS_RESOLVABLE_PRIVATE 0x40 -#define BLE_RANDOM_ADDR_MSBS_RFU 0x80 -#define BLE_RANDOM_ADDR_MSBS_STATIC 0xC0 - -#define BLE_ADV_ACCESS_ADDRESS 0x8E89BED6 -#define BLE_ADV_CRCINIT 0x555555 - -#define BLE_MAX_ADV_PAYLOAD_OCTETS 37 - -/* LL SCA Values. They are shifted left 5 bits for Hop values */ -#define BLE_LL_SCA_251_PPM_TO_500_PPM (0 << 5) -#define BLE_LL_SCA_151_PPM_TO_250_PPM BIT(5) -#define BLE_LL_SCA_101_PPM_TO_150_PPM (2 << 5) -#define BLE_LL_SCA_076_PPM_TO_100_PPM (3 << 5) -#define BLE_LL_SCA_051_PPM_TO_075_PPM (4 << 5) -#define BLE_LL_SCA_031_PPM_TO_050_PPM (5 << 5) -#define BLE_LL_SCA_021_PPM_TO_030_PPM (6 << 5) -#define BLE_LL_SCA_000_PPM_TO_020_PPM (7 << 5) - -/* BLE 4.1 Vol 6 section 2.4 pg 45 */ - -/* Data PDU Header - * 16 Bits: - * 2 bit LLID ( Control or Data ) - * 1 bit NESN ( Next expected sequence number ) - * 1 bit SN ( Sequence Number ) - * 1 bit MD ( More Data ) - * 5 bit length ( length of the payload + MIC in bytes ) - * - * This struct isn't packed, since it isn't sent to the radio. - * - */ - -struct ble_data_header { - uint8_t llid; - uint8_t nesn; - uint8_t sn; - uint8_t md; - uint8_t length; -}; - -#define BLE_DATA_HEADER_LLID_SHIFT 0 -#define BLE_DATA_HEADER_NESN_SHIFT 2 -#define BLE_DATA_HEADER_SN_SHIFT 3 -#define BLE_DATA_HEADER_MD_SHIFT 4 -#define BLE_DATA_HEADER_LENGTH_SHIFT 8 - -#define BLE_DATA_HEADER_LLID_DATANOSTART 1 -#define BLE_DATA_HEADER_LLID_DATASTART 2 -#define BLE_DATA_HEADER_LLID_CONTROL 3 - -#define BLE_DATA_HEADER(llid, nesn, sn, md, length) \ - ((uint16_t) \ - ((((length) & 0x1f) << BLE_DATA_HEADER_LENGTH_SHIFT) | \ - (((MD) & 0x1) << BLE_DATA_HEADER_MD_SHIFT) | \ - (((SN) & 0x1) << BLE_DATA_HEADER_SN_SHIFT) | \ - (((NESN) & 0x1) << BLE_DATA_HEADER_NESN_SHIFT) | \ - (((llid) & 0x3) << BLE_DATA_HEADER_LLID_SHIFT))) - -#define BLE_MAX_DATA_PAYLOAD_OCTETS 31 -#define BLE_MAX_PAYLOAD_OCTETS BLE_MAX_ADV_PAYLOAD_OCTETS - -union ble_header { - struct ble_adv_header adv; - struct ble_data_header data; -}; - -struct ble_pdu { - union ble_header header; - uint8_t header_type_adv; - uint8_t payload[BLE_MAX_PAYLOAD_OCTETS]; - uint32_t mic; /* Only included in PDUs with encrypted payloads. */ -}; - -struct ble_packet { - /* uint8_t preamble; */ - uint32_t access_address; - struct ble_pdu pdu; - /* uint32_t crc; */ -}; - -/* LL Control PDU Opcodes BLE 4.1 Vol 6 2.4.2 */ -#define BLE_LL_CONNECTION_UPDATE_REQ 0x00 -#define BLE_LL_CHANNEL_MAP_REQ 0x01 -#define BLE_LL_TERMINATE_IND 0x02 -#define BLE_LL_ENC_REQ 0x03 -#define BLE_LL_ENC_RSP 0x04 -#define BLE_LL_START_ENC_REQ 0x05 -#define BLE_LL_START_ENC_RSP 0x06 -#define BLE_LL_UNKNOWN_RSP 0x07 -#define BLE_LL_FEATURE_REQ 0x08 -#define BLE_LL_FEATURE_RSP 0x09 -#define BLE_LL_PAUSE_ENC_REQ 0x0A -#define BLE_LL_PAUSE_ENC_RSP 0x0B -#define BLE_LL_VERSION_IND 0x0C -#define BLE_LL_REJECT_IND 0x0D -#define BLE_LL_SLAVE_FEATURE_REQ 0x0E -#define BLE_LL_CONNECTION_PARAM_REQ 0x0F -#define BLE_LL_CONNECTION_PARAM_RSP 0x10 -#define BLE_LL_REJECT_IND_EXT 0x11 -#define BLE_LL_PING_REQ 0x12 -#define BLE_LL_PING_RSP 0x13 -#define BLE_LL_RFU 0x14 - -/* BLE 4.1 Vol 6 4.6 Table 4.3 */ -#define BLE_LL_FEATURE_LE_ENCRYPTION 0x00 -#define BLE_LL_FEATURE_CONN_PARAMS_REQ 0x01 -#define BLE_LL_FEATURE_EXT_REJ_IND 0x02 -#define BLE_LL_FEATURE_SLAVE_FEAT_EXCHG 0x03 -#define BLE_LL_FEATURE_LE_PING 0x04 - -struct ble_ll_connection_update_req { - uint8_t win_size; - uint16_t win_offset; - uint16_t interval; - uint16_t latency; - uint16_t timeout; - uint16_t instant; -} __packed; - -struct ble_ll_channel_map_req { - uint8_t map[5]; - uint16_t instant; -} __packed; - -/* ble_ll_terminate_ind: single-byte error code */ - -struct ble_ll_enc_req { - uint8_t rand[8]; - uint16_t ediv; - uint8_t skdm[8]; - uint8_t ivm[4]; -} __packed; - -struct ble_ll_enc_rsp { - uint8_t skds[8]; - uint8_t ivs[4]; -} __packed; - -/* ble_ll_start_enc_req has no CtrData field */ - -/* ble_ll_start_enc_rsp has no CtrData field */ - -/* ble_ll_unknown_rsp: single-byte error code */ - -struct ble_ll_feature_req { - uint8_t feature_set[8]; -} __packed; - -struct ble_ll_feature_rsp { - uint8_t feature_set[8]; -} __packed; - -/* ble_ll_pause_enc_req has no CtrData field */ - -/* ble_ll_pause_enc_rsp has no CtrData field */ - -#define BLE_LL_VERS_NR_4_0 6 -#define BLE_LL_VERS_NR_4_1 7 - -struct ble_ll_version_ind { - uint8_t vers_nr; /* Version Number */ - uint16_t comp_id; /* Company ID */ - uint16_t sub_vers_nr; /* Subversion Number */ -} __packed; - -/* ble_ll_reject_ind: single-byte error code */ - -struct ble_ll_slave_feature_req { - uint8_t feature_set[8]; -} __packed; - -/* ble_ll_connection_param (req and rsp) */ - -struct ble_ll_connection_param { - uint16_t interval_min; /* times 1.25 ms */ - uint16_t interval_max; /* times 1.25 ms */ - uint16_t latency; /* connection events */ - uint16_t timeout; /* times 10 ms */ - uint8_t preferred_periodicity; /* times 1.25 ms */ - uint16_t reference_conn_event_count; /* base for offsets*/ - uint16_t offset0; /* Anchor offset from reference (preferred) */ - uint16_t offset1; - uint16_t offset2; - uint16_t offset3; - uint16_t offset4; - uint16_t offset5; /* least preferred */ -} __packed; - -struct ble_ll_reject_ind_ext { - uint8_t reject_opcode; - uint8_t error_code; -} __packed; - -/* ble_ll_ping_req has no CtrData field */ - -/* ble_ll_ping_rsp has no CtrData field */ - -/* BLE 4.1 Vol 6 4.5.8 */ -struct remapping_table { - uint8_t remapping_index[37]; - uint8_t map[5]; - int num_used_channels; - int hop_increment; - int last_unmapped_channel; -}; - -/* BLE 4.1 Vol 6 4.5.9 */ -struct connection_data { - int transmit_seq_num; - int next_expected_seq_num; - struct remapping_table rt; - /* Add timing information */ -}; - -/* BLE 4.1 Vol 6 1.4.1 */ -int chan2freq(int channel); - -/* BLE 4.1 Vol 6 2.3.3.1 */ -void fill_remapping_table(struct remapping_table *rt, uint8_t map[5], - int hop_increment); - -void ble_tx(struct ble_pdu *pdu); - -/** - * Receive a packet into pdu if one comes before the timeout - * - * @param pdu Where the received data is to be stored - * @param timeout Number of microseconds allowed before timeout - * @param adv Set to 1 if receiving in advertising state; else set to 0 - * @returns EC_SUCCESS on packet reception, else returns error - */ -int ble_rx(struct ble_pdu *pdu, int timeout, int adv); - -int ble_radio_init(uint32_t access_address, uint32_t crc_init_val); - -/* - * Uses the algorithm defined in the BLE core specifcation - * 4.1 Vol 6 4.5.8 to select the next data channel - */ -uint8_t get_next_data_channel(struct remapping_table *rt); - -/* BLE 4.1 Vol 3 Part C 11 */ -uint8_t *pack_adv(uint8_t *dest, int length, int type, const uint8_t *data); -uint8_t *pack_adv_int(uint8_t *dest, int length, int type, int data); -uint8_t *pack_adv_addr(uint8_t *dest, uint64_t addr); - -const uint8_t *unpack_adv(const uint8_t *src, int *length, int *type, - const uint8_t **data); - -void dump_ble_addr(uint8_t *mem, char *name); - -void dump_ble_packet(struct ble_pdu *ble_p); - -/* Radio-specific allow list handling */ -int ble_radio_clear_allow_list(void); -int ble_radio_read_allow_list_size(uint8_t *ret_size); -int ble_radio_add_device_to_allow_list(const uint8_t *addr_ptr, uint8_t rand); -int ble_radio_remove_device_from_allow_list(const uint8_t *addr_ptr, - uint8_t rand); - -#endif /* __CROS_EC_BLE_H */ diff --git a/include/bluetooth_le_ll.h b/include/bluetooth_le_ll.h deleted file mode 100644 index 9f540102da..0000000000 --- a/include/bluetooth_le_ll.h +++ /dev/null @@ -1,155 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "btle_hci_int.h" - -enum ll_state_t { - UNINITIALIZED, - STANDBY, - SCANNING, - ADVERTISING, - INITIATING, - CONNECTION, - TEST_RX, - TEST_TX, -}; - -#define LL_ADV_INTERVAL_UNIT_US 625 -#define LL_ADV_TIMEOUT_UNIT_US 1000000 - -#define LL_ADV_DIRECT_INTERVAL_US 3750 /* 3.75 ms */ -#define LL_ADV_DIRECT_TIMEOUT_US 1280000 /* 1.28 s */ - -#define LL_MAX_DATA_PACKET_LENGTH 27 -#define LL_MAX_DATA_PACKETS 4 - -/* BTLE Spec 4.0: Vol 6, Part B, Section 4.5.3 */ -#define TRANSMIT_WINDOW_OFFSET_CONSTANT 1250 - -#define LL_MAX_BUFFER_SIZE (LL_MAX_DATA_PACKET_LENGTH * LL_MAX_DATA_PACKETS) - -#define LL_SUPPORTED_FEATURES (HCI_LE_FTR_ENCRYPTION | \ - HCI_LE_FTR_CONNECTION_PARAMETERS_REQUEST | \ - HCI_LE_FTR_EXTENDED_REJECT_INDICATION | \ - HCI_LE_FTR_SLAVE_INITIATED_FEATURES_EXCHANGE) - -#define LL_SUPPORTED_STATES (HCI_LE_STATE_NONCON_ADV | \ - HCI_LE_STATE_SCANNABLE_ADV | \ - HCI_LE_STATE_CONNECTABLE_ADV | \ - HCI_LE_STATE_DIRECT_ADV | \ - HCI_LE_STATE_PASSIVE_SCAN | \ - HCI_LE_STATE_ACTIVE_SCAN | \ - HCI_LE_STATE_INITIATE | \ - HCI_LE_STATE_SLAVE) - -/* - * 4.6.1 LE Encryption - * A controller that supports LE Encryption shall support the following sections - * within this document: - * - LL_ENC_REQ (Section 2.4.2.4) - * - LL_ENC_RSP (Section 2.4.2.5) - * - LL_START_ENC_REQ (Section 2.4.2.6) - * - LL_START_ENC_RSP (Section 2.4.2.7) - * - LL_PAUSE_ENC_REQ (Section 2.4.2.11) - * - LL_PAUSE_ENC_RSP (Section 2.4.2.12) - * - Encryption Start Procedure (Section 5.1.3.1) - * - Encryption Pause Procedure (Section 5.1.3.2) - */ - -/*Link Layer Control PDU Opcodes */ -#define LL_CONNECTION_UPDATE_REQ 0x00 -#define LL_CHANNEL_MAP_REQ 0x01 -#define LL_TERMINATE_IND 0x02 -#define LL_ENC_REQ 0x03 -#define LL_ENC_RSP 0x04 -#define LL_START_ENC_REQ 0x05 -#define LL_START_ENC_RSP 0x06 -#define LL_UNKNOWN_RSP 0x07 -#define LL_FEATURE_REQ 0x08 -#define LL_FEATURE_RSP 0x09 -#define LL_PAUSE_ENC_REQ 0x0A -#define LL_PAUSE_ENC_RSP 0x0B -#define LL_VERSION_IND 0x0C -#define LL_REJECT_IND 0x0D -#define LL_SLAVE_FEATURE_REQ 0x0E -#define LL_CONNECTION_PARAM_REQ 0x0F -#define LL_CONNECTION_PARAM_RSP 0x10 -#define LL_REJECT_IND_EXT 0x11 -#define LL_PING_REQ 0x12 -#define LL_PING_RSP 0x13 - -/* BLE 4.1 Vol 6 2.3.3.1 Connection information */ -#define CONNECT_REQ_INITA_LEN 6 -#define CONNECT_REQ_ADVA_LEN 6 -#define CONNECT_REQ_ACCESS_ADDR_LEN 4 -#define CONNECT_REQ_CRC_INIT_VAL_LEN 3 -#define CONNECT_REQ_WIN_SIZE_LEN 1 -#define CONNECT_REQ_WIN_OFFSET_LEN 2 -#define CONNECT_REQ_INTERVAL_LEN 2 -#define CONNECT_REQ_LATENCY_LEN 2 -#define CONNECT_REQ_TIMEOUT_LEN 2 -#define CONNECT_REQ_CHANNEL_MAP_LEN 5 -#define CONNECT_REQ_HOP_INCREMENT_AND_SCA_LEN 1 -struct ble_connection_params { - uint8_t init_a[CONNECT_REQ_INITA_LEN]; - uint8_t adv_a[CONNECT_REQ_ADVA_LEN]; - uint32_t access_addr; - uint32_t crc_init_val; - uint8_t win_size; - uint16_t win_offset; - uint16_t interval; - uint16_t latency; - uint16_t timeout; - uint64_t channel_map; - uint8_t hop_increment; - uint8_t sleep_clock_accuracy; - uint32_t transmitWindowOffset; - uint32_t transmitWindowSize; - uint32_t connInterval; - uint16_t connLatency; - uint32_t connSupervisionTimeout; -}; - -uint8_t ll_reset(void); - -uint8_t ll_set_tx_power(uint8_t *params); - - -/* LE Information */ -uint8_t ll_read_buffer_size(uint8_t *return_params); -uint8_t ll_read_local_supported_features(uint8_t *return_params); -uint8_t ll_read_supported_states(uint8_t *return_params); -uint8_t ll_set_host_channel_classification(uint8_t *params); - -/* Advertising */ -uint8_t ll_set_advertising_params(uint8_t *params); -uint8_t ll_read_tx_power(void); -uint8_t ll_set_adv_data(uint8_t *params); -uint8_t ll_set_scan_response_data(uint8_t *params); -uint8_t ll_set_advertising_enable(uint8_t *params); - -uint8_t ll_set_random_address(uint8_t *params); - -/* Scanning */ -uint8_t ll_set_scan_enable(uint8_t *params); -uint8_t ll_set_scan_params(uint8_t *params); - -/* Allow List */ -uint8_t ll_clear_allow_list(void); -uint8_t ll_read_allow_list_size(uint8_t *return_params); -uint8_t ll_add_device_to_allow_list(uint8_t *params); -uint8_t ll_remove_device_from_allow_list(uint8_t *params); - -/* Connections */ -uint8_t ll_read_remote_used_features(uint8_t *params); - -/* RF Phy Testing */ -uint8_t ll_receiver_test(uint8_t *params); -uint8_t ll_transmitter_test(uint8_t *params); -uint8_t ll_test_end(uint8_t *return_params); - -void ll_ble_test_rx(void); -void ll_ble_test_rx(void); diff --git a/include/btle_hci2.h b/include/btle_hci2.h deleted file mode 100644 index 0b30a0dc48..0000000000 --- a/include/btle_hci2.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Copied from NewBlue hci.c with permission from Dmitry Grinberg, the original - * author. - */ - -#include "btle_hci_int.h" - -struct hciCmdHdr { - uint16_t opcode; - uint8_t paramLen; -} __packed; -#define CMD_MAKE_OPCODE(ogf, ocf) ((((uint16_t)((ogf) & 0x3f)) << 10) | ((ocf) & 0x03ff)) -#define CMD_GET_OGF(opcode) (((opcode) >> 10) & 0x3f) -#define CMD_GET_OCF(opcode) ((opcode) & 0x03ff) - - -struct hciAclHdr { - uint16_t hdr; - uint16_t len; -} __packed; -#define ACL_HDR_MASK_CONN_ID 0x0FFF -#define ACL_HDR_MASK_PB 0x3000 -#define ACL_HDR_MASK_BC 0xC000 -#define ACL_HDR_PB_FIRST_NONAUTO 0x0000 -#define ACL_HDR_PB_CONTINUED 0x1000 -#define ACL_HDR_PB_FIRST_AUTO 0x2000 -#define ACL_HDR_PB_COMPLETE 0x3000 - -struct hciScoHdr { - uint16_t hdr; - uint8_t len; -} __packed; -#define SCO_HDR_MASK_CONN_ID 0x0FFF -#define SCO_HDR_MASK_STATUS 0x3000 -#define SCO_STATUS_ALL_OK 0x0000 -#define SCO_STATUS_UNKNOWN 0x1000 -#define SCO_STATUS_NO_DATA 0x2000 -#define SCO_STATUS_SOME_DATA 0x3000 - -struct hciEvtHdr { - uint8_t code; - uint8_t len; -} __packed; - - -void hci_cmd(uint8_t *hciCmdbuf); -void hci_acl_to_host(uint8_t *data, uint16_t hdr, uint16_t len); -void hci_acl_from_host(uint8_t *hciAclbuf); -void hci_event(uint8_t event_code, uint8_t len, uint8_t *params); - diff --git a/include/btle_hci_int.h b/include/btle_hci_int.h deleted file mode 100644 index ba0b3e6041..0000000000 --- a/include/btle_hci_int.h +++ /dev/null @@ -1,3156 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Copied from NewBlue hci_int.h with permission from Dmitry Grinberg, the - * original author. - */ - - -#ifndef _HCI_INT_H_ -#define _HCI_INT_H_ - -#include "util.h" -#define HCI_DEV_NAME_LEN 248 - -#define HCI_INQUIRY_LENGTH_UNIT 1280 /* msec */ -#define HCI_INQUIRY_LENGTH_MAX 48 /* units */ - -#define HCI_LAP_Unlimited_Inquiry 0x9E8B33 -#define HCI_LAP_Limited_Inquiry 0x9E8B00 - -#define HCI_CLOCK_OFST_VALID 0x8000 - -#define HCI_PKT_TYP_NO_2_DH1 0x0002 /* BT 2.1+ */ -#define HCI_PKT_TYP_NO_3_DH1 0x0004 /* BT 2.1+ */ -#define HCI_PKT_TYP_DM1 0x0008 /* BT 1.1+ */ -#define HCI_PKT_TYP_DH1 0x0010 /* BT 1.1+ */ -#define HCI_PKT_TYP_NO_2_DH3 0x0100 /* BT 2.1+ */ -#define HCI_PKT_TYP_NO_3_DH3 0x0200 /* BT 2.1+ */ -#define HCI_PKT_TYP_DM3 0x0400 /* BT 1.1+ */ -#define HCI_PKT_TYP_DH3 0x0800 /* BT 1.1+ */ -#define HCI_PKT_TYP_NO_2_DH5 0x1000 /* BT 2.1+ */ -#define HCI_PKT_TYP_NO_3_DH5 0x1000 /* BT 2.1+ */ -#define HCI_PKT_TYP_DM5 0x4000 /* BT 1.1+ */ -#define HCI_PKT_TYP_DH5 0x8000 /* BT 1.1+ */ -#define HCI_PKT_TYP_DEFAULT 0xCC18 - -#define HCI_PKT_TYP_SCO_HV1 0x0001 /* BT 1.1+ */ -#define HCI_PKT_TYP_SCO_HV2 0x0002 /* BT 1.1+ */ -#define HCI_PKT_TYP_SCO_HV3 0x0004 /* BT 1.1+ */ -#define HCI_PKT_TYP_SCO_EV3 0x0008 /* BT 1.2+ */ -#define HCI_PKT_TYP_SCO_EV4 0x0010 /* BT 1.2+ */ -#define HCI_PKT_TYP_SCO_EV5 0x0020 /* BT 1.2+ */ -#define HCI_PKT_TYP_SCO_NO_2_EV3 0x0040 /* BT 2.1+ */ -#define HCI_PKT_TYP_SCO_NO_3_EV3 0x0080 /* BT 2.1+ */ -#define HCI_PKT_TYP_SCO_NO_2_EV5 0x0100 /* BT 2.1+ */ -#define HCI_PKT_TYP_SCO_NO_3_EV5 0x0200 /* BT 2.1+ */ - -#define HCI_LINK_POLICY_DISABLE_ALL_LM_MODES 0x0000 -#define HCI_LINK_POLICY_ENABLE_ROLESWITCH 0x0001 -#define HCI_LINK_POLICY_ENABLE_HOLD_MODE 0x0002 -#define HCI_LINK_POLICY_ENABLE_SNIFF_MODE 0x0004 -#define HCI_LINK_POLICY_ENABLE_PARK_MODE 0x0008 - -#define HCI_FILTER_TYPE_CLEAR_ALL 0x00 /* no subtypes, no data */ -#define HCI_FILTER_INQUIRY_RESULT 0x01 /* below subtypes */ -#define HCI_FILTER_COND_TYPE_RETURN_ALL_DEVS 0x00 /* no data */ -#define HCI_FILTER_COND_TYPE_SPECIFIC_DEV_CLS 0x01 /* uint24_t wanted_class, uint24_t wanted_mask (only set bits are compared to wanted_class) */ -#define HCI_FILTER_COND_TYPE_SPECIFIC_ADDR 0x02 /* uint8_t mac[6] */ -#define HCI_FILTER_CONNECTION_SETUP 0x02 /* below subtypes */ -#define HCI_FILTER_COND_TYPE_ALLOW_CONNS_FROM_ALL_DEVS 0x00 /* uint8_t auto_accept_type: 1 - no, 2 - yes w/ no roleswitch, 3 - yes w/ roleswitch */ -#define HCI_FILTER_COND_TYPE_ALLOW_CONNS_FROM_SPECIFIC_DEV_CLS 0x01 /* uint24_t wanted_class, uint24_t wanted_mask (only set bits are compared to wanted_class), auto_accept flag same as above */ -#define HCI_FILTER_COND_TYPE_ALLOW_CONNS_FROM_SPECIFIC_ADDR 0x02 /* uint8_t mac[6], auto_accept flag same as above */ - -#define HCI_SCAN_ENABLE_INQUIRY 0x01 /* discoverable */ -#define HCI_SCAN_ENABLE_PAGE 0x02 /* connectable */ - -#define HCI_HOLD_MODE_SUSPEND_PAGE_SCAN 0x01 -#define HCI_HOLD_MODE_SUSPEND_INQUIRY_SCAN 0x02 -#define HCI_HOLD_MODE_SUSPEND_PERIODIC_INQUIRIES 0x04 - -#define HCI_TO_HOST_FLOW_CTRL_ACL 0x01 -#define HCI_TO_HOST_FLOW_CTRL_SCO 0x02 - -#define HCI_INQ_MODE_STD 0 /* normal mode @ BT 1.1+ */ -#define HCI_INQ_MODE_RSSI 1 /* with RSSI @ BT 1.2+ */ -#define HCI_INQ_MODE_EIR 2 /* with EIR @ BT 2.1+ */ - -#define HCI_SSP_KEY_ENTRY_STARTED 0 -#define HCI_SSP_KEY_ENTRY_DIGIT_ENTERED 1 -#define HCI_SSP_KEY_ENTRY_DIGIT_ERASED 2 -#define HCI_SSP_KEY_ENTRY_CLEARED 3 -#define HCI_SSP_KEY_ENTRY_COMPLETED 4 - -#define HCI_LOCATION_DOMAIN_OPTION_NONE 0x20 /* ' ' */ -#define HCI_LOCATION_DOMAIN_OPTION_OUTDOORS_ONLY 0x4F /* 'O' */ -#define HCI_LOCATION_DOMAIN_OPTION_INDOORS_ONLY 0x49 /* 'I' */ -#define HCI_LOCATION_DOMAIN_OPTION_NON_COUNTRY_ENTITY 0x58 /* 'X' */ - -#define HCI_PERIOD_TYPE_DOWNLINK 0x00 -#define HCI_PERIOD_TYPE_UPLINK 0x01 -#define HCI_PERIOD_TYPE_BIDIRECTIONAL 0x02 -#define HCI_PERIOD_TYPE_GUARD_PERIOD 0x03 - -#define HCI_MWS_INTERVAL_TYPE_NO_RX_NO_TX 0x00 -#define HCI_MWS_INTERVAL_TYPE_TX_ALLOWED 0x01 -#define HCI_MWS_INTERVAL_TYPE_RX_ALLOWED 0x02 -#define HCI_MWS_INTERVAL_TYPE_TX_RX_ALLOWED 0x03 -#define HCI_MWS_INTERVAL_TYPE_FRAME 0x04 /* type defined by Set External Frame Configuration command */ - -#define HCI_CONNLESS_FRAG_TYPE_CONT 0x00 /* continuation fragment */ -#define HCI_CONNLESS_FRAG_TYPE_START 0x01 /* first fragment */ -#define HCI_CONNLESS_FRAG_TYPE_END 0x02 /* last fragment */ -#define HCI_CONNLESS_FRAG_TYPE_COMPLETE 0x03 /* complete fragment - no fragmentation */ - -#define HCI_CUR_MODE_ACTIVE 0x00 -#define HCI_CUR_MODE_HOLD 0x01 -#define HCI_CUR_MODE_SNIFF 0x02 -#define HCI_CUR_MODE_PARK 0x03 - -#define HCI_SCO_LINK_TYPE_SCO 0x00 -#define HCI_SCO_LINK_TYPE_ESCO 0x02 - -#define HCI_SCO_AIR_MODE_MULAW 0x00 -#define HCI_SCO_AIR_MODE_ALAW 0x01 -#define HCI_SCO_AIR_MODE_CVSD 0x02 -#define HCI_SCO_AIR_MODE_TRANSPARENT 0x03 - -#define HCI_MCA_500_PPM 0x00 -#define HCI_MCA_250_PPM 0x01 -#define HCI_MCA_150_PPM 0x02 -#define HCI_MCA_100_PPM 0x03 -#define HCI_MCA_75_PPM 0x04 -#define HCI_MCA_50_PPM 0x05 -#define HCI_MCA_30_PPM 0x06 -#define HCI_MCA_20_PPM 0x07 - -#define HCI_EDR_LINK_KEY_COMBO 0x00 -#define HCI_EDR_LINK_KEY_LOCAL 0x01 -#define HCI_EDR_LINK_KEY_REMOTE 0x02 -#define HCI_EDR_LINK_KEY_DEBUG 0x03 -#define HCI_EDR_LINK_KEY_UNAUTH_COMBO 0x04 -#define HCI_EDR_LINK_KEY_AUTH_COMBO 0x05 -#define HCI_EDR_LINK_KEY_CHANGED 0x06 - -#define HCI_VERSION_1_0_B 0 /* BT 1.0b */ -#define HCI_VERSION_1_1 1 /* BT 1.1 */ -#define HCI_VERSION_1_2 2 /* BT 1.2 */ -#define HCI_VERSION_2_0 4 /* BT 2.0 */ -#define HCI_VERSION_2_1 3 /* BT 2.1 */ -#define HCI_VERSION_3_0 4 /* BT 3.0 */ -#define HCI_VERSION_4_0 6 /* BT 4.0 */ -#define HCI_VERSION_4_1 7 /* BT 4.1 */ - -#define HCI_LE_STATE_NONCON_ADV 0x0000000000000001ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV 0x0000000000000002ULL /* BT 4.0+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV 0x0000000000000004ULL /* BT 4.0+ */ -#define HCI_LE_STATE_DIRECT_ADV 0x0000000000000008ULL /* BT 4.0+ */ -#define HCI_LE_STATE_PASSIVE_SCAN 0x0000000000000010ULL /* BT 4.0+ */ -#define HCI_LE_STATE_ACTIVE_SCAN 0x0000000000000020ULL /* BT 4.0+ */ -#define HCI_LE_STATE_INITIATE 0x0000000000000040ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SLAVE 0x0000000000000080ULL /* BT 4.0+ */ -#define HCI_LE_STATE_NONCON_ADV_w_PASSIVE_SCAN 0x0000000000000100ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV_w_PASSIVE_SCAN 0x0000000000000200ULL /* BT 4.0+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV_w_PASSIVE_SCAN 0x0000000000000400ULL /* BT 4.0+ */ -#define HCI_LE_STATE_DIRECT_ADV_w_PASSIVE_SCAN 0x0000000000000800ULL /* BT 4.0+ */ -#define HCI_LE_STATE_NONCON_ADV_w_ACTIVE_SCAN 0x0000000000001000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV_w_ACTIVE_SCAN 0x0000000000002000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV_w_ACTIVE_SCAN 0x0000000000004000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_DIRECT_ADV_w_ACTIVE_SCAN 0x0000000000008000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_NONCON_ADV_w_INITIATING 0x0000000000010000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV_w_INITIATING 0x0000000000020000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_NONCON_ADV_w_MASTER 0x0000000000040000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV_w_MASTER 0x0000000000080000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_NONCON_ADV_w_SLAVE 0x0000000000100000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_SCANNABLE_ADV_w_SLAVE 0x0000000000200000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_PASSIVE_SCAN_w_INITIATING 0x0000000000400000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_ACTIVE_SCAN_w_INITIATING 0x0000000000800000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_PASSIVE_SCAN_w_MASTER 0x0000000001000000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_ACTIVE_SCAN_w_MASTER 0x0000000002000000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_PASSIVE_SCAN_w_SLAVE 0x0000000004000000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_ACTIVE_SCAN_w_SLAVE 0x0000000008000000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_INTIATING_w_MASTER 0x0000000010000000ULL /* BT 4.0+ */ -#define HCI_LE_STATE_LOW_DUTY_CYCLE_DIRECT_ADV 0x0000000020000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_PASSIVE_SCAN_w_LOW_DUTY_CYCLE_DIRECT_ADV 0x0000000040000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_ACTIVE_SCAN_w_LOW_DUTY_CYCLE_DIRECT_ADV 0x0000000080000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV_w_INITIATING 0x0000000100000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_DIRECT_ADV_w_INITIATING 0x0000000200000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_LOW_DUTY_CYCLE_DIRECT_ADV_w_INITIATING 0x0000000400000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV_w_MASTER 0x0000000800000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_DIRECT_ADV_w_MASTER 0x0000001000000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_LOW_DUTY_CYCLE_DIRECT_ADV_w_MASTER 0x0000002000000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_CONNECTABLE_ADV_w_SLAVE 0x0000004000000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_DIRECT_ADV_w_SLAVE 0x0000008000000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_LOW_DUTY_CYCLE_DIRECT_ADV_w_SLAVE 0x0000010000000000ULL /* BT 4.1+ */ -#define HCI_LE_STATE_INITIATING_w_SLAVE 0x0000020000000000ULL /* BT 4.1+ */ - -#define HCI_LMP_FTR_3_SLOT_PACKETS 0x0000000000000001ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_5_SLOT_PACKETS 0x0000000000000002ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_ENCRYPTION 0x0000000000000004ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_SLOT_OFFSET 0x0000000000000008ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_TIMING_ACCURACY 0x0000000000000010ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_SWITCH 0x0000000000000020ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_HOLD_MODE 0x0000000000000040ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_SNIFF_MODE 0x0000000000000080ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_PARK_MODE 0x0000000000000100ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_RSSI 0x0000000000000200ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_CHANNEL_QUALITY_DRIVEN_DATA_RATE 0x0000000000000400ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_SCO_LINKS 0x0000000000000800ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_HV2_PACKETS 0x0000000000001000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_HV3_PACKETS 0x0000000000002000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_MU_LAW 0x0000000000004000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_A_LAW 0x0000000000008000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_CVSD 0x0000000000010000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_PAGING_SCHEME 0x0000000000020000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_POWER_CONTROL 0x0000000000040000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_TRANSPARENT_SCO_DATA 0x0000000000080000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_FLOW_CONTROL_LAG_B0 0x0000000000100000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_FLOW_CONTROL_LAG_B1 0x0000000000200000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_FLOW_CONTROL_LAG_B2 0x0000000000400000ULL /* BT 1.1+ */ -#define HCI_LMP_FTR_BROADCAST_ENCRYPTION 0x0000000000800000ULL /* BT 1.2+ */ -#define HCI_LMP_FTR_ACL_2MBPS 0x0000000002000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ACL_3MBPS 0x0000000004000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ENHANCED_INQUIRY_SCAN 0x0000000008000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_INTERLACED_INQUIRY_SCAN 0x0000000010000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_INTERLACED_PAGE_SCAN 0x0000000020000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_RSSI_WITH_INQUIRY_RESULTS 0x0000000040000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_EXTENDED_SCO_LINK 0x0000000080000000ULL /* BT 2.1+ */ /* EV3 packets */ -#define HCI_LMP_FTR_EV4_PACKETS 0x0000000100000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_EV5_PACKETS 0x0000000200000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_AFH_CAPABLE_SLAVE 0x0000000800000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_AFH_CLASSIFICATION_SLAVE 0x0000001000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_BR_EDR_NOT_SUPPORTED 0x0000002000000000ULL /* BT 4.0+ */ -#define HCI_LMP_FTR_LE_SUPPORTED_CONTROLLER 0x0000004000000000ULL /* BT 4.0+ */ -#define HCI_LMP_FTR_3_SLOT_ACL_PACKETS 0x0000008000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_5_SLOT_ACL_PACKETS 0x0000010000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_SNIFF_SUBRATING 0x0000020000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_PAUSE_ENCRYPTION 0x0000040000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_AFH_CAPABLE_MASTER 0x0000080000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_AFH_CLASSIFICATION_MASTER 0x0000100000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ESCO_2MBPS 0x0000200000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ESCO_3MBPS 0x0000400000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_3_SLOT_ESCO 0x0000800000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_EXTENDED_INQUIRY_RESPONSE 0x0001000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_SSP 0x0008000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ENCAPSULATED_PDU 0x0010000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ERRONEOUS_DATA_REPORTING 0x0020000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_NON_FLUSHABLE_PACKET_BOUNDARY_FLAG 0x0040000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_LINK_SUPERVISION_TIMEOUT_CHANGED_EVENT 0x0100000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_INQUIRY_RESPONSE_TX_POWER_LEVEL 0x0200000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_EXTENDED_FEATURES 0x8000000000000000ULL /* BT 2.1+ */ -#define HCI_LMP_FTR_ENHANCED_POWER_CONTROL 0x0400000000000000ULL /* BT 3.0+ */ -#define HCI_LMP_FTR_SIMUL_LE_EDR_CAPABLE_CONTROLLER 0x0002000000000000ULL /* BT 4.0+ */ - -#define HCI_LMP_EXT_FTR_P1_SSP_HOST_SUPPORT 0x0000000000000001ULL /* BT 2.1+ */ -#define HCI_LMP_EXT_FTR_P1_LE_HOST_SUPPORT 0x0000000000000002ULL /* BT 4.0+ */ -#define HCI_LMP_EXT_FTR_P1_SIMUL_LE_EDR_HOST_SUPPORT 0x0000000000000004ULL /* BT 4.0+ */ -#define HCI_LMP_EXT_FTR_P1_SECURE_CONNECTIONS_HOST_SUPPORT 0x0000000000000008ULL /* BT 4.1+ */ - -#define HCI_LMP_EXT_FTR_P2_CONNLESS_SLAVE_BROADCAST_MASTER 0x0000000000000001ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_CONNLESS_SLAVE_BROADCAST_SLAVE 0x0000000000000002ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_SYNCHRONIZATION_TRAIN 0x0000000000000004ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_SYNCHRONIZATION_SCAN 0x0000000000000008ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_INQUIRY_RESPONSE_NOTIFICATION_EVT 0x0000000000000010ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_GENERALIZED_INTERLACED_SCAN 0x0000000000000020ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_COARSE_CLOCK_ADJUSTMENT 0x0000000000000040ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_SECURE_CONNECTIONS_CAPABLE_CONTROLLER 0x0000000000000100ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_PING 0x0000000000000200ULL /* BT 4.1+ */ -#define HCI_LMP_EXT_FTR_P2_TRAIN_NUDGING 0x0000000000000800ULL /* BT 4.1+ */ - -#define HCI_EVENT_INQUIRY_COMPLETE 0x0000000000000001ULL /* BT 1.1+ */ -#define HCI_EVENT_INQUIRY_RESULT 0x0000000000000002ULL /* BT 1.1+ */ -#define HCI_EVENT_CONN_COMPLETE 0x0000000000000004ULL /* BT 1.1+ */ -#define HCI_EVENT_CONN_REQUEST 0x0000000000000008ULL /* BT 1.1+ */ -#define HCI_EVENT_DISCONNECTION_COMPLETE 0x0000000000000010ULL /* BT 1.1+ */ -#define HCI_EVENT_AUTH_COMPLETE 0x0000000000000020ULL /* BT 1.1+ */ -#define HCI_EVENT_REMOTE_NAME_REQUEST_COMPLETE 0x0000000000000040ULL /* BT 1.1+ */ -#define HCI_EVENT_ENCR_CHANGE 0x0000000000000080ULL /* BT 1.1+ */ -#define HCI_EVENT_CHANGE_CONN_LINK_KEY_COMPLETE 0x0000000000000100ULL /* BT 1.1+ */ -#define HCI_EVENT_MASTER_LINK_KEY_COMPLETE 0x0000000000000200ULL /* BT 1.1+ */ -#define HCI_EVENT_READ_REMOTE_SUPPORTED_FEATURES_COMPLETE 0x0000000000000400ULL /* BT 1.1+ */ -#define HCI_EVENT_READ_REMOTE_VERSION_INFO_COMPLETE 0x0000000000000800ULL /* BT 1.1+ */ -#define HCI_EVENT_QOS_SETUP_COMPLETE 0x0000000000001000ULL /* BT 1.1+ */ -#define HCI_EVENT_HARDWARE_ERROR 0x0000000000008000ULL /* BT 1.1+ */ -#define HCI_EVENT_FLUSH_OCCURRED 0x0000000000010000ULL /* BT 1.1+ */ -#define HCI_EVENT_ROLE_CHANGE 0x0000000000020000ULL /* BT 1.1+ */ -#define HCI_EVENT_MODE_CHANGE 0x0000000000080000ULL /* BT 1.1+ */ -#define HCI_EVENT_RETURN_LINK_KEYS 0x0000000000100000ULL /* BT 1.1+ */ -#define HCI_EVENT_PIN_CODE_REQUEST 0x0000000000200000ULL /* BT 1.1+ */ -#define HCI_EVENT_LINK_KEY_REQUEST 0x0000000000400000ULL /* BT 1.1+ */ -#define HCI_EVENT_LINK_KEY_NOTIFICATION 0x0000000000800000ULL /* BT 1.1+ */ -#define HCI_EVENT_LOOPBACK_COMMAND 0x0000000001000000ULL /* BT 1.1+ */ -#define HCI_EVENT_DATA_BUFFER_OVERFLOW 0x0000000002000000ULL /* BT 1.1+ */ -#define HCI_EVENT_MAX_SLOTS_CHANGE 0x0000000004000000ULL /* BT 1.1+ */ -#define HCI_EVENT_READ_CLOCK_OFFSET_COMPLETE 0x0000000008000000ULL /* BT 1.1+ */ -#define HCI_EVENT_CONN_PACKET_TYPE_CHANGED 0x0000000010000000ULL /* BT 1.1+ */ -#define HCI_EVENT_QOS_VIOLATION 0x0000000020000000ULL /* BT 1.1+ */ -#define HCI_EVENT_PAGE_SCAN_MODE_CHANGE 0x0000000040000000ULL /* BT 1.1+, obsolete @ BT1.2+ */ -#define HCI_EVENT_PAGE_SCAN_REPETITION_MODE_CHANGE 0x0000000080000000ULL /* BT 1.1+ */ -#define HCI_EVENT_ALL_BT_1_1 0x00000000FFFFFFFFULL /* also the default for BT 1.1 */ -#define HCI_EVENT_FLOW_SPEC_COMPLETE 0x0000000100000000ULL /* BT 1.2+ */ -#define HCI_EVENT_INQUIRY_RESULT_WITH_RSSI 0x0000000200000000ULL /* BT 1.2+ */ -#define HCI_EVENT_READ_REMOTE_EXTENDED_FEATURES_COMPLETE 0x0000000400000000ULL /* BT 1.2+ */ -#define HCI_EVENT_SYNC_CONN_COMPLETE 0x0000080000000000ULL /* BT 1.2+ */ -#define HCI_EVENT_SYNC_CONN_CHANGED 0x0000100000000000ULL /* BT 1.2+ */ -#define HCI_EVENT_ALL_BT_1_2 0x00001FFFFFFFFFFFULL /* also the default for BT 1.2+ */ -#define HCI_EVENT_SNIFF_SUBRATING 0x0000200000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_EXTENDED_INQUIRY_RESULT 0x0000400000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_ENCR_KEY_REFRESH_COMPLETE 0x0000800000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_IO_CAPABILITY_REQUEST 0x0001000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_IO_CAPABILITY_REQUEST_REPLY 0x0002000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_USER_CONFIRMATION_REQUEST 0x0004000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_USER_PASSKEY_REQUEST 0x0008000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_REMOTE_OOB_DATA_REQUEST 0x0010000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_SIMPLE_PAIRING_COMPLETE 0x0020000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_LINK_SUPERVISION_TIMOUT_CHANGED 0x0080000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_ENHANCED_FLUSH_COMPLETE 0x0100000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_USER_PASSKEY_NOTIFICATION 0x0400000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_KEYPRESS_NOTIFICATION 0x0800000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_REMOTE_HOST_SUPPORTED_FEATURES 0x1000000000000000ULL /* BT 2.1+ */ -#define HCI_EVENT_ALL_BT_2_1 0x1DBFFFFFFFFFFFFFULL -#define HCI_EVENT_ALL_BT_3_0 0x1DBFFFFFFFFFFFFFULL -#define HCI_EVENT_LE_META 0x2000000000000000ULL /* BT 4.0+ */ -#define HCI_EVENT_ALL_BT_4_0 0x3DBFFFFFFFFFFFFFULL -#define HCI_EVENT_ALL_BT_4_1 0x3DBFFFFFFFFFFFFFULL - -#define HCI_EVENT_P2_PHYS_LINK_COMPLETE 0x0000000000000001ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_CHANNEL_SELECTED 0x0000000000000002ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_DISCONNECTION_PHYSICAL_LINK 0x0000000000000004ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_PHYSICAL_LINK_LOSS_EARLY_WARNING 0x0000000000000008ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_PHYSICAL_LINK_RECOVERY 0x0000000000000010ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_LOGICAL_LINK_COMPLETE 0x0000000000000020ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_DISCONNECTION_LOGICAL_LINK_COMPLETE 0x0000000000000040ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_FLOW_SPEC_MODIFY_COMPLETE 0x0000000000000080ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_NUMBER_OF_COMPLETED_DATA_BLOCKS 0x0000000000000100ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_AMP_START_TEST 0x0000000000000200ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_AMP_TEST_END 0x0000000000000400ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_AMP_RECEIVER_REPORT 0x0000000000000800ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_SHORT_RANGE_MODE_CHANGE_COMPLETE 0x0000000000001000ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_AMP_STATUS_CHANGE 0x0000000000002000ULL /* BT 3.0+ */ -#define HCI_EVENT_P2_ALL_BT_3_0 0x0000000000003FFFULL -#define HCI_EVENT_P2_ALL_BT_4_0 0x0000000000003FFFULL -#define HCI_EVENT_P2_TRIGGERED_CLOCK_CAPTURE 0x0000000000004000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_SYNCH_TRAIN_COMPLETE 0x0000000000008000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_SYNCH_TRAIN_RECEIVED 0x0000000000010000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_CONNLESS_SLAVE_BROADCAST_RXED 0x0000000000020000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_CONNLESS_SLAVE_BROADCAST_TIMEOUT 0x0000000000040000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_TRUNCATED_PAGE_COMPLETE 0x0000000000080000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_SLAVE_PAGE_RESPONSE_TIMEOUT 0x0000000000100000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_CONNLESS_SLAVE_BROADCAST_CHANNEL_MAP_CHANGE 0x0000000000200000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_INQUIRY_RESPONSE_NOTIFICATION 0x0000000000400000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_AUTHENTICATED_PAYLOAD_TIMEOUT_EXPIRED 0x0000000000800000ULL /* BT 4.1+ */ -#define HCI_EVENT_P2_ALL_BT_4_1 0x0000000000FFFFFFULL - -#define HCI_LE_EVENT_CONN_COMPLETE 0x0000000000000001ULL /* BT 4.0+ */ -#define HCI_LE_EVENT_ADV_REPORT 0x0000000000000002ULL /* BT 4.0+ */ -#define HCI_LE_EVENT_CONN_UPDATE_COMPLETE 0x0000000000000004ULL /* BT 4.0+ */ -#define HCI_LE_EVENT_READ_REMOTE_USED_FEATURES_CMPLETE 0x0000000000000008ULL /* BT 4.0+ */ -#define HCI_LE_EVENT_LTK_REQUEST 0x0000000000000010ULL /* BT 4.0+ */ -#define HCI_LE_EVENT_REMOTE_CONNECTION_PARAMETER_REQUEST 0x0000000000000020ULL /* BT 4.1+ */ - -#define HCI_LE_FTR_ENCRYPTION 0x0000000000000001ULL /* BT 4.0+ */ -#define HCI_LE_FTR_CONNECTION_PARAMETERS_REQUEST 0x0000000000000002ULL /* BT 4.1+ */ -#define HCI_LE_FTR_EXTENDED_REJECT_INDICATION 0x0000000000000004ULL /* BT 4.1+ */ -#define HCI_LE_FTR_SLAVE_INITIATED_FEATURES_EXCHANGE 0x0000000000000008ULL /* BT 4.1+ */ -#define HCI_LE_FTR_LE_PING 0x0000000000000010ULL /* BT 4.1+ */ - - - - - -#define HCI_OGF_Link_Control 1 - - -/* ==== BT 1.1 ==== */ - -#define HCI_CMD_Inquiry 0x0001 /* status */ -struct hciInquiry { - uint8_t lap[3]; - uint8_t inqLen; - uint8_t numResp; -} __packed; - -#define HCI_CMD_Inquiry_Cancel 0x0002 /* complete */ -struct hciCmplInquiryCancel { - uint8_t status; -} __packed; - -#define HCI_CMD_Periodic_Inquiry_Mode 0x0003 /* complete */ -struct hciPeriodicInquiryMode { - uint16_t maxPeriodLen; - uint16_t minPeriodLen; - uint8_t lap[3]; - uint8_t inqLen; - uint8_t numResp; -} __packed; -struct hciCmplPeriodicInquiryMode { - uint8_t status; -} __packed; - - -#define HCI_CMD_Exit_Periodic_Inquiry_Mode 0x0004 /* complete */ - -#define HCI_CMD_Create_Connection 0x0005 /* status */ -struct hciCreateConnection { - uint8_t mac[6]; - uint16_t allowedPackets; /* HCI_PKT_TYP_* */ - uint8_t PSRM; - uint16_t clockOffset; /* possibly | HCI_CLOCK_OFST_VALID */ - uint8_t allowRoleSwitch; -} __packed; - -#define HCI_CMD_Disconnect 0x0006 /* status */ -struct hciDisconnect { - uint16_t conn; - uint8_t reason; -} __packed; - -#define HCI_CMD_Add_SCO_Connection 0x0007 /* status */ /* deprecated in BT 1.2+ */ -struct hciAddScoConnection { - uint16_t conn; - uint16_t packetTypes; /* HCI_PKT_TYP_SCO_* */ -} __packed; - -#define HCI_CMD_Create_Connection_Cancel 0x0008 /* complete */ -struct hciCreateConnectionCancel { - uint8_t mac[6]; -} __packed; -struct hciCmplCreateConnectionCancel { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Accept_Connection_Request 0x0009 /* status */ -struct hciAcceptConnection { - uint8_t mac[6]; - uint8_t remainSlave; -} __packed; - -#define HCI_CMD_Reject_Connection_Request 0x000A /* status */ -struct hciRejectConnection { - uint8_t mac[6]; - uint8_t reason; -} __packed; - -#define HCI_CMD_Link_Key_Request_Reply 0x000B /* complete */ -struct hciLinkKeyRequestReply { - uint8_t mac[6]; - uint8_t key[16]; -} __packed; -struct hciCmplLinkKeyRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Link_Key_Request_Negative_Reply 0x000C /* complete */ -struct hciLinkKeyRequestNegativeReply { - uint8_t mac[6]; -} __packed; -struct hciCmplLinkKeyRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_PIN_Code_Request_Reply 0x000D /* complete */ -struct hciPinCodeRequestReply { - uint8_t mac[6]; - uint8_t pinCodeLen; - uint8_t pinCode[16]; -} __packed; -struct hciCmplPinCodeRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_PIN_Code_Request_Negative_Reply 0x000E /* complete */ -struct hciPinCodeRequestNegativeReply { - uint8_t mac[6]; -} __packed; -struct hciCmplPinCodeRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Change_Connection_Packet_Type 0x000F /* status */ -struct hciChangeConnectionPacketType { - uint16_t conn; - uint16_t allowedPackets; /* HCI_PKT_TYP_* */ -} __packed; - -#define HCI_CMD_Authentication_Requested 0x0011 /* status */ -struct hciAuthRequested { - uint16_t conn; -} __packed; - -#define HCI_CMD_Set_Connection_Encryption 0x0013 /* status */ -struct hciSetConnectionEncryption { - uint16_t conn; - uint8_t encrOn; -} __packed; - -#define HCI_CMD_Change_Connection_Link_Key 0x0015 /* status */ -struct hciChangeConnLinkKey { - uint16_t conn; -} __packed; - -#define HCI_CMD_Master_Link_Key 0x0017 /* status */ -struct hciMasterLinkKey { - uint8_t useTempKey; -} __packed; - -#define HCI_CMD_Remote_Name_Request 0x0019 /* status */ -struct hciRemoteNameRequest { - uint8_t mac[6]; - uint8_t PSRM; - uint8_t PSM; /* deprecated, should be zero for BT 1.2+ */ - uint16_t clockOffset; /* possibly | HCI_CLOCK_OFST_VALID */ -} __packed; - -#define HCI_CMD_Remote_Name_Request_Cancel 0x001A /* complete */ -struct hciRemoteNameRequestCancel { - uint8_t mac[6]; -} __packed; -struct hciCmplRemoteNameRequestCancel { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Read_Remote_Supported_Features 0x001B /* status */ -struct hciReadRemoteSupportedFeatures { - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Remote_Version_Information 0x001D /* status */ -struct hciReadRemoteVersionInfo { - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Clock_Offset 0x001F /* status */ -struct hciReadClockOffset { - uint16_t conn; -} __packed; - - -/* ==== BT 1.2 ==== */ - -#define HCI_CMD_Read_Remote_Extended_Features 0x001C /* status */ -struct hciReadRemoteExtendedFeatures { - uint16_t conn; - uint8_t page; /* BT1.2 max: 0 */ -} __packed; - -#define HCI_CMD_Read_Lmp_Handle 0x0020 /* complete */ -struct hciReadLmpHandle { - uint16_t handle; -} __packed; -struct hciCmplReadLmpHandle { - uint8_t status; - uint16_t handle; - uint8_t lmpHandle; - uint32_t reserved; -} __packed; - -#define HCI_CMD_Setup_Synchronous_Connection 0x0028 /* status */ -struct hciSetupSyncConn { - uint16_t conn; - uint32_t txBandwidth; - uint32_t rxBandwidth; - uint16_t maxLatency; - uint16_t voiceSetting; - uint8_t retransmissionEffort; - uint16_t allowedPacketsSco; /* HCI_PKT_TYP_SCO_* */ -} __packed; - -#define HCI_CMD_Accept_Synchronous_Connection_Request 0x0029 /* status */ -struct hciAcceptSyncConn { - uint8_t mac[6]; - uint32_t txBandwidth; - uint32_t rxBandwidth; - uint16_t maxLatency; - uint16_t contentFormat; - uint8_t retransmissionEffort; - uint16_t allowedPacketsSco; /* HCI_PKT_TYP_SCO_* */ -} __packed; - -#define HCI_CMD_Reject_Synchronous_Connection_Request 0x002A /* status */ -struct hciRejectSyncConn { - uint8_t mac[6]; - uint8_t reason; -} __packed; - - -/* ==== BR 2.1 ==== */ - -#define HCI_CMD_IO_Capability_Request_Reply 0x002B /* complete */ -struct hciIoCapabilityRequestReply { - uint8_t mac[6]; - uint8_t cap; /* HCI_DISPLAY_CAP_* */ - uint8_t oobPresent; - uint8_t authReqments; /* HCI_AUTH_REQMENT_* */ -} __packed; -struct hciCmplIoCapabilityRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_User_Confirmation_Request_Reply 0x002C /* complete */ -struct hciUserConfRequestReply { - uint8_t mac[6]; -} __packed; -struct hciCmplUserConfRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_User_Confirmation_Request_Negative_Reply 0x002D /* complete */ -struct hciUserConfRequestNegativeReply { - uint8_t mac[6]; -} __packed; -struct hciCmplUserConfRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_User_Passkey_Request_Reply 0x002E /* complete */ -struct hciUserPasskeyRequestReply { - uint8_t mac[6]; - uint32_t num; -} __packed; -struct hciCmplUserPasskeyRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_User_Passkey_Request_Negative_Reply 0x002F /* complete */ -struct hciUserPasskeyRequestNegativeReply { - uint8_t mac[6]; -} __packed; -struct hciCmplUserPasskeyRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Remote_OOB_Data_Request_Reply 0x0030 /* complete */ -struct hciRemoteOobDataRequestReply { - uint8_t mac[6]; - uint8_t C[16]; - uint8_t R[16]; -} __packed; -struct hciCmplRemoteOobDataRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Remote_OOB_Data_Request_Negative_Reply 0x0033 /* complete */ -struct hciRemoteOobDataRequestNegativeReply { - uint8_t mac[6]; -} __packed; -struct hciCmplRemoteOobDataRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_IO_Capability_Request_Negative_Reply 0x0034 /* complete */ -struct hciIoCapabilityRequestNegativeReply { - uint8_t mac[6]; - uint8_t reason; -} __packed; -struct hciCmplIoCapabilityRequestNegativeReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - - -/* ==== BT 3.0 ==== */ - -#define HCI_CMD_Create_Physical_link 0x0035 /* status */ -struct hciCreatePhysicalLink { - uint8_t physLinkHandle; - uint8_t dedicatedAmpKeyLength; - uint8_t dedicatedAmpKeyType; - uint8_t dedicatedAmpKey; -} __packed; - -#define HCI_CMD_Accept_Physical_link 0x0036 /* status */ -struct hciAcceptPhysicalLink { - uint8_t physLinkHandle; - uint8_t dedicatedAmpKeyLength; - uint8_t dedicatedAmpKeyType; - uint8_t dedicatedAmpKey; -} __packed; - -#define HCI_CMD_Disconnect_Physical_link 0x0037 /* status */ -struct hciDisconnectPhysicalLink { - uint8_t physLinkHandle; - uint8_t reason; -} __packed; - -#define HCI_CMD_Create_Logical_link 0x0038 /* status */ -struct hciCreateLogicalLink { - uint8_t physLinkHandle; - uint8_t txFlowSpec[16]; - uint8_t rxFlowSpec[16]; -} __packed; - -#define HCI_CMD_Accept_Logical_Link 0x0039 /* status */ -struct hciAcceptLogicalLink { - uint8_t physLinkHandle; - uint8_t txFlowSpec[16]; - uint8_t rxFlowSpec[16]; -} __packed; - -#define HCI_CMD_Disconnect_Logical_link 0x003A /* status */ -struct hciDisconnectLogicalLink { - uint8_t physLinkHandle; -} __packed; - -#define HCI_CMD_Logical_Link_Cancel 0x003B /* complete */ -struct hciLogicalLinkCancel { - uint8_t physLinkHandle; - uint8_t txFlowSpecID; -} __packed; -struct hciCmplLogicalLinkCancel { - uint8_t status; - uint8_t physLinkHandle; - uint8_t txFlowSpecID; -} __packed; - -#define HCI_CMD_Flow_Spec_Modify 0x003C /* status */ -struct hciFlowSpecModify { - uint16_t handle; - uint8_t txFlowSpec[16]; - uint8_t rxFlowSpec[16]; -} __packed; - - -/* ==== BT 4.1 ==== */ - -#define HCI_CMD_Enhanced_Setup_Synchronous_Connection 0x003D /* status */ -struct hciEnhSetupSyncConn { - uint16_t conn; - uint32_t txBandwidth; - uint32_t rxBandwidth; - uint8_t txCodingFormat[5]; - uint8_t rxCodingFormat[5]; - uint16_t txCodecFrameSize; - uint16_t rxCodecFrameSize; - uint32_t inputBandwidth; - uint32_t outputBandwidth; - uint8_t inputCodingFormat[5]; - uint8_t outputCodingFormat[5]; - uint16_t inputCodedDataSize; - uint16_t outputCodedDataSize; - uint8_t inputPcmDataFormat; - uint8_t outputPcmDataFormat; - uint8_t inputPcmSamplePayloadMsbPosition; - uint8_t outputPcmSamplePayloadMsbPosition; - uint8_t inputDataPath; - uint8_t outputDataPath; - uint8_t inputTransportUnitSize; - uint8_t outputTransportUnitSize; - uint16_t maxLatency; - uint16_t allowedPacketsSco; /* HCI_PKT_TYP_SCO_* */ - uint8_t retransmissionEffort; -} __packed; - -#define HCI_CMD_Enhanced_Accept_Synchronous_Connection 0x003E /* status */ -struct hciEnhAcceptSyncConn { - uint8_t mac[6]; - uint32_t txBandwidth; - uint32_t rxBandwidth; - uint8_t txCodingFormat[5]; - uint8_t rxCodingFormat[5]; - uint16_t txCodecFrameSize; - uint16_t rxCodecFrameSize; - uint32_t inputBandwidth; - uint32_t outputBandwidth; - uint8_t inputCodingFormat[5]; - uint8_t outputCodingFormat[5]; - uint16_t inputCodedDataSize; - uint16_t outputCodedDataSize; - uint8_t inputPcmDataFormat; - uint8_t outputPcmDataFormat; - uint8_t inputPcmSamplePayloadMsbPosition; - uint8_t outputPcmSamplePayloadMsbPosition; - uint8_t inputDataPath; - uint8_t outputDataPath; - uint8_t inputTransportUnitSize; - uint8_t outputTransportUnitSize; - uint16_t maxLatency; - uint16_t allowedPacketsSco; /* HCI_PKT_TYP_SCO_* */ - uint8_t retransmissionEffort; -} __packed; - -#define HCI_CMD_Truncated_Page 0x003F /* status */ -struct hciTruncatedPage { - uint8_t mac[6]; - uint8_t PSRM; - uint16_t clockOffset; /* possibly | HCI_CLOCK_OFST_VALID */ -} __packed; - -#define HCI_CMD_Truncated_Page_Cancel 0x0040 /* complete */ -struct hciTruncatedPageCancel { - uint8_t mac[6]; -} __packed; -struct hciCmplTruncatedPageCancel { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_CMD_Set_Connectionless_Slave_Broadcast 0x0041 /* complete */ -struct hciSetConnectionlessSlaveBroadcast { - uint8_t enabled; - uint8_t ltAddr; /* 1..7 */ - uint8_t lpoAllowed; /* can sleep? */ - uint16_t allowedPackets; /* HCI_PKT_TYP_* */ - uint16_t intervalMin; - uint16_t intervalMax; - uint16_t supervisionTimeout; -} __packed; -struct hciCmplSetConnectionlessSlaveBroadcast { - uint8_t status; - uint8_t ltAddr; /* 1..7 */ - uint16_t interval; -} __packed; - -#define HCI_CMD_Set_Connectionless_Slave_Broadcast_Receive 0x0042 /* complete */ -struct hciSetConnectionlessSlaveBroadcastReceive { - uint8_t enabled; - uint8_t mac[6]; /* add rof tranmitter */ - uint8_t ltAddr; /* 1..7 */ - uint16_t interval; - uint32_t clockOffset; /* lower 28 bits used */ - uint32_t nextConnectionlessSlaveBroadcastClock; /* lower 28 bits used */ - uint16_t supervisionTimeout; - uint8_t remoteTimingAccuracy; - uint8_t skip; - uint16_t allowedPackets; /* HCI_PKT_TYP_* */ - uint8_t afhChannelMap[10]; -} __packed; -struct hciCmplSetConnectionlessSlaveBroadcastReceive { - uint8_t status; - uint8_t mac[6]; /* add rof tranmitter */ - uint8_t ltAddr; /* 1..7 */ -} __packed; - -#define HCI_CMD_Start_Synchronisation_Train 0x0043 /* status */ - -#define HCI_CMD_Receive_Synchronisation_Train 0x0044 /* status */ -struct hciReceiveSyncTrain { - uint8_t mac[6]; - uint16_t syncScanTimeout; - uint16_t syncScanWindow; - uint16_t syncScanInterval; -} __packed; - -#define HCI_CMD_Remote_OOB_Extended_Data_Request_Reply 0x0045 /* complete */ -struct hciRemoteOobExtendedDataRequestReply { - uint8_t mac[6]; - uint8_t C_192[16]; - uint8_t R_192[16]; - uint8_t C_256[16]; - uint8_t R_256[16]; -} __packed; -struct hciCmplRemoteOobExtendedDataRequestReply { - uint8_t status; - uint8_t mac[6]; -} __packed; - - - - - -#define HCI_OGF_Link_Policy 2 - - -/* ==== BT 1.1 ==== */ - -#define HCI_CMD_Hold_Mode 0x0001 /* status */ -struct hciHoldMode { - uint16_t conn; - uint16_t holdModeMaxInt; - uint16_t holdModeMinInt; -} __packed; - -#define HCI_CMD_Sniff_Mode 0x0003 /* status */ -struct hciSniffMode { - uint16_t conn; - uint16_t sniffMaxInt; - uint16_t sniffMinInt; - uint16_t sniffAttempt; - uint16_t sniffTimeout; -} __packed; - -#define HCI_CMD_Exit_Sniff_Mode 0x0004 /* status */ -struct hciExitSniffMode { - uint16_t conn; -} __packed; - -#define HCI_CMD_Park_State 0x0005 /* status */ -struct hciParkState { - uint16_t conn; - uint16_t beaconMaxInt; - uint16_t beaconMinInt; -} __packed; - -#define HCI_CMD_Exit_Park_State 0x0006 /* status */ -struct hciExitParkState { - uint16_t conn; -} __packed; - -#define HCI_CMD_QoS_Setup 0x0007 /* status */ -struct hisQosSetup { - uint16_t conn; - uint8_t flags; - uint8_t serviceType; - uint32_t tokenRate; - uint32_t peakBandwidth; - uint32_t latency; - uint32_t delayVariation; -} __packed; - -#define HCI_CMD_Role_Discovery 0x0009 /* complete */ -struct hciRoleDiscovery { - uint16_t conn; -} __packed; -struct hciCmplRoleDiscovery { - uint8_t status; -} __packed; - -#define HCI_CMD_Switch_Role 0x000B /* status */ -struct hciSwitchRole { - uint8_t mac[6]; - uint8_t becomeSlave; -} __packed; - -#define HCI_CMD_Read_Link_Policy_Settings 0x000C /* complete */ -struct hciReadLinkPolicySettings { - uint16_t conn; -} __packed; -struct hciCmplReadLinkPolicySettings { - uint8_t status; - uint16_t conn; - uint16_t policy; /* HCI_LINK_POLICY_* */ -} __packed; - -#define HCI_CMD_Write_Link_Policy_Settings 0x000D /* complete */ -struct hciWriteLinkPolicySettings { - uint16_t conn; - uint16_t policy; /* HCI_LINK_POLICY_* */ -} __packed; -struct hciCmplWriteLinkPolicySettings { - uint8_t status; - uint16_t conn; -} __packed; - - -/* ==== BT 1.2 ==== */ - -#define HCI_CMD_Read_Default_Link_Policy_Settings 0x000E /* complete */ -struct hciCmplReadDefaultLinkPolicySettings { - uint8_t status; - uint16_t policy; /* HCI_LINK_POLICY_* */ -} __packed; - -#define HCI_CMD_Write_Default_Link_Policy_Settings 0x000F /* complete */ -struct hciWriteDefaultLinkPolicySettings { - uint16_t policy; /* HCI_LINK_POLICY_* */ -} __packed; -struct hciCmplWriteDefaultLinkPolicySettings { - uint8_t status; -} __packed; - -#define HCI_CMD_Flow_Specification 0x0010 /* status */ -struct hisFlowSpecification { - uint16_t conn; - uint8_t flags; - uint8_t flowDirection; - uint8_t serviceType; - uint32_t tokenRate; - uint32_t tockenBucketSize; - uint32_t peakBandwidth; - uint32_t accessLatency; -} __packed; - - -/* ==== BT 2.1 ==== */ - -#define HCI_CMD_Sniff_Subrating 0x0011 /* complete */ -struct hciSniffSubrating { - uint16_t conn; - uint16_t maxLatency; - uint16_t minRemoteTimeout; - uint16_t minLocalTimeout; -} __packed; -struct hciCmplSniffSubrating { - uint8_t status; - uint16_t conn; -} __packed; - - - - - -#define HCI_OGF_Controller_and_Baseband 3 - - -/* ==== BT 1.1 ==== */ - -#define HCI_CMD_Set_Event_Mask 0x0001 /* complete */ -struct hciSetEventMask { - uint64_t mask; /* bitmask of HCI_EVENT_* */ -} __packed; -struct hciCmplSetEventMask { - uint8_t status; -} __packed; - -#define HCI_CMD_Reset 0x0003 /* complete */ -struct hciCmplReset { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_Event_Filter 0x0005 /* complete */ -struct hciSetEventFilter { - uint8_t filterType; /* HCI_FILTER_TYPE_* */ - /* more things are optional here */ -} __packed; -struct hciCmplSetEventFiler { - uint8_t status; -} __packed; - -#define HCI_CMD_Flush 0x0008 /* complete */ -struct hciFlush { - uint16_t conn; -} __packed; -struct hciCmplFlush { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_PIN_Type 0x0009 /* complete */ -struct hciCmplReadPinType { - uint8_t status; - uint8_t isFixed; -} __packed; - -#define HCI_CMD_Write_PIN_Type 0x000A /* complete */ -struct hciWritePinType { - uint8_t isFixed; -} __packed; -struct hciCmplWritePinType { - uint8_t status; -} __packed; - -#define HCI_CMD_Create_New_Unit_Key 0x000B /* complete */ -struct hciCmplCreateNewUnitKey { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Stored_Link_Key 0x000D /* complete */ -struct hciReadStoredLinkKey { - uint8_t mac[6]; - uint8_t readAll; -} __packed; -struct hciCmplReadStoredLinkKey { - uint8_t status; - uint16_t maxNumKeys; - uint16_t numKeysRead; -} __packed; - -#define HCI_CMD_Write_Stored_Link_Key 0x0011 /* complete */ -struct hciWriteStoredLinkKeyItem { - uint8_t mac[6]; - uint8_t key[16]; -} __packed; -struct hciWriteStoredLinkKey { - uint8_t numKeys; - struct hciWriteStoredLinkKeyItem items[]; -} __packed; -struct hciCmplWriteStoredLinkKey { - uint8_t status; - uint8_t numKeysWritten; -} __packed; - -#define HCI_CMD_Delete_Stored_Link_Key 0x0012 /* complete */ -struct hciDeleteStoredLinkKey { - uint8_t mac[6]; - uint8_t deleteAll; -} __packed; -struct hciCmplDeleteStoredLinkKey { - uint8_t status; - uint8_t numKeysDeleted; -} __packed; - -#define HCI_CMD_Write_Local_Name 0x0013 /* complete */ -struct hciWriteLocalName { - char name[HCI_DEV_NAME_LEN]; -} __packed; -struct hciCmplWriteLocalName { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Local_Name 0x0014 /* complete */ -struct hciCmplReadLocalName { - uint8_t status; - char name[HCI_DEV_NAME_LEN]; -} __packed; - -#define HCI_CMD_Read_Connection_Accept_Timeout 0x0015 /* complete */ -struct hciCmplReadConnAcceptTimeout { - uint8_t status; - uint16_t timeout; /* in units of 0.625ms 1..0xB540 */ -} __packed; - -#define HCI_CMD_Write_Connection_Accept_Timeout 0x0016 /* complete */ -struct hciWriteConnAcceptTimeout { - uint16_t timeout; /* in units of 0.625ms 1..0xB540 */ -} __packed; -struct hciCmplWriteConnAcceptTimeout { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Page_Timeout 0x0017 /* complete */ -struct hciCmplReadPageTimeout { - uint8_t status; - uint16_t timeout; -} __packed; - -#define HCI_CMD_Write_Page_Timeout 0x0018 /* complete */ -struct hciWritePageTimeout { - uint16_t timeout; -} __packed; -struct hciCmplWritePageTimeout { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Scan_Enable 0x0019 /* complete */ -struct hciCmplReadScanEnable { - uint8_t status; - uint8_t state; /* bitmask of HCI_SCAN_ENABLE_* */ -} __packed; - -#define HCI_CMD_Write_Scan_Enable 0x001A /* complete */ -struct hciWriteScanEnable { - uint8_t state; /* bitmask of HCI_SCAN_ENABLE_* */ -} __packed; -struct hciCmplWriteScanEnable { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Page_Scan_Activity 0x001B /* complete */ -struct hciCmplReadPageScanActivity { - uint8_t status; - uint16_t scanInterval; - uint16_t scanWindow; -} __packed; - -#define HCI_CMD_Write_Page_Scan_Activity 0x001C /* complete */ -struct hciWritePageScanActivity { - uint16_t scanInterval; - uint16_t scanWindow; -} __packed; -struct hciCmplWritePageScanActivity { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Inquiry_Scan_Activity 0x001D /* complete */ -struct hciCmplReadInquiryScanActivity { - uint8_t status; - uint16_t scanInterval; - uint16_t scanWindow; -} __packed; - -#define HCI_CMD_Write_Inquiry_Scan_Activity 0x001E /* complete */ -struct hciWriteInquiryScanActivity { - uint16_t scanInterval; - uint16_t scanWindow; -} __packed; -struct hciCmplWriteInquiryScanActivity { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Authentication_Enable 0x001F /* complete */ -struct hciCmplReadAuthEnable { - uint8_t status; - uint8_t authRequired; -} __packed; - -#define HCI_CMD_Write_Authentication_Enable 0x0020 /* complete */ -struct hciWriteAuthEnable { - uint8_t authRequired; -} __packed; -struct hciCmplWriteAuthEnable { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Encryption_Mode 0x0021 /* complete *//* deprecated in BT 2.1+ */ -struct hciCmplReadEncryptionMode { - uint8_t status; - uint8_t encrRequired; -} __packed; - -#define HCI_CMD_Write_Encryption_Mode 0x0022 /* complete *//* deprecated in BT 2.1+ */ -struct hciWriteEncryptionMode { - uint8_t encrRequired; -} __packed; -struct hciCmplWriteEncryptionMode { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Class_Of_Device 0x0023 /* complete */ -struct hciCmplReadClassOfDevice { - uint8_t status; - uint8_t cls[3]; -} __packed; - -#define HCI_CMD_Write_Class_Of_Device 0x0024 /* complete */ -struct hciWriteClassOfDevice { - uint8_t cls[3]; -} __packed; -struct hciCmplWriteClassOfDevice { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Voice_Setting 0x0025 /* complete */ -struct hciCmplReadVoiceSetting { - uint8_t status; - uint16_t voiceSetting; -} __packed; - -#define HCI_CMD_Write_Voice_Setting 0x0026 /* complete */ -struct hciWriteVoiceSetting { - uint16_t voiceSetting; -} __packed; -struct hciCmplWriteVoiceSetting { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Automatic_Flush_Timeout 0x0027 /* complete */ -struct hciReadAutoFlushTimeout { - uint16_t conn; -} __packed; -struct hciCmplReadAutoFlushTimeout { - uint8_t status; - uint16_t conn; - uint16_t timeout; -} __packed; - -#define HCI_CMD_Write_Automatic_Flush_Timeout 0x0028 /* complete */ -struct hciWriteAutoFlushTimeout { - uint16_t conn; - uint16_t timeout; -} __packed; -struct hciCmplWriteAutoFlushTimeout { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Num_Broadcast_Retransmissions 0x0029 /* complete */ -struct hciCmplReadNumBroadcastRetransmissions { - uint8_t status; - uint8_t numRetransmissions; /* 0 .. 0xFE => 1 .. 255 TXes */ -} __packed; - -#define HCI_CMD_Write_Num_Broadcast_Retransmissions 0x002A /* complete */ -struct hciWriteNumBroadcastRetransmissions { - uint8_t numRetransmissions; /* 0 .. 0xFE => 1 .. 255 TXes */ -} __packed; -struct hciCmplWriteNumBroadcastRetransmissions { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Hold_Mode_Activity 0x002B /* complete */ -struct hciCmplReadHoldModeActivity { - uint8_t status; - uint8_t holdModeActivity; /* bitfield if HCI_HOLD_MODE_SUSPEND_* */ -} __packed; - -#define HCI_CMD_Write_Hold_Mode_Activity 0x002C /* complete */ -struct hciWriteHoldModeActivity { - uint8_t holdModeActivity; /* bitfield if HCI_HOLD_MODE_SUSPEND_* */ -} __packed; -struct hciCmplWriteHoldModeActivity { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Transmit_Power_Level 0x002D /* complete */ -struct hciReadTransmitPowerLevel { - uint16_t conn; - uint8_t max; /* else current */ -} __packed; -struct hciCmplReadTransmitPowerLevel { - uint8_t status; - uint16_t conn; - uint8_t txPower; /* actually an int8_t */ -} __packed; - -#define HCI_CMD_Read_SCO_Flow_Control_Enable 0x002E /* complete */ -struct hciCmplReadSyncFlowCtrl { - uint8_t status; - uint8_t syncFlowCtrlOn; -} __packed; - -#define HCI_CMD_Write_SCO_Flow_Control_Enable 0x002F /* complete */ -struct hciWriteSyncFlowCtrlEnable { - uint8_t syncFlowCtrlOn; -} __packed; -struct hciCmplWriteSyncFlowCtrlEnable { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_Controller_To_Host_Flow_Control 0x0031 /* complete */ -struct hciSetControllerToHostFlowControl { - uint8_t chipToHostFlowCtrl; /* bitmask of HCI_TO_HOST_FLOW_CTRL_* */ -} __packed; -struct hciCmplSetControllerToHostFlowControl { - uint8_t status; -} __packed; - -#define HCI_CMD_Host_Buffer_Size 0x0033 /* complete */ -struct hciHostBufferSize { - uint16_t maxAclPacket; - uint8_t maxScoPacket; - uint16_t numAclPackets; - uint16_t numScoPackets; -} __packed; -struct hciCmplHostBufferSize { - uint8_t status; -} __packed; - -#define HCI_CMD_Host_Number_Of_Completed_Packets 0x0035 /* special: can be sent anytime (not subj to cmd flow control), does not generate events unless error */ -struct hciHostNumberOfCompletedPacketsItem { - uint16_t conn; - uint16_t numCompletedPackets; -} __packed; -struct hciHostNumberOfCompletedPackets { - uint8_t numHandles; - struct hciHostNumberOfCompletedPacketsItem items[]; -} __packed; - -#define HCI_CMD_Read_Link_Supervision_Timeout 0x0036 /* complete */ -struct hciReadLinkSupervisionTimeout { - uint16_t conn; -} __packed; -struct hciCmplReadLinkSupervisionTimeout { - uint8_t status; - uint16_t conn; - uint16_t timeout; /* in units of 0.625ms allowed: 1..0xffff, required support 0x0190 - 0xffff */ -} __packed; - -#define HCI_CMD_Write_Link_Supervision_Timeout 0x0037 /* complete */ -struct hciWriteLinkSupervisionTimeout { - uint16_t conn; - uint16_t timeout; /* in units of 0.625ms allowed: 1..0xffff, required support 0x0190 - 0xffff */ -} __packed; -struct hciCmplWriteLinkSupervisionTimeout { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Number_Of_Supported_IAC 0x0038 /* complete */ -struct hciCmplReadNumberOfSupportedIac { - uint8_t status; - uint8_t numSupportedIac; -} __packed; - -#define HCI_CMD_Read_Current_IAC_LAP 0x0039 /* complete */ -struct hciCmplReadCurrentIacItem { - uint8_t iac_lap[3]; -} __packed; -struct hciCmplReadCurrentIac { - uint8_t status; - uint8_t numCurrentIac; - struct hciCmplReadCurrentIacItem items[]; -} __packed; - -#define HCI_CMD_Write_Current_IAC_LAP 0x003A /* complete */ -struct hciWriteCurrentIacLapItem { - uint8_t iacLap[3]; -} __packed; -struct hciWriteCurrentIacLap { - uint8_t numCurrentIac; - struct hciWriteCurrentIacLapItem items[]; -} __packed; -struct hciCmplWriteCurrentIacLap { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Page_Scan_Period_Mode 0x003B /* complete */ -struct hciCmplReadPageScanPeriodMode { - uint8_t status; - uint8_t mode; -} __packed; - -#define HCI_CMD_Write_Page_Scan_Period_Mode 0x003C /* complete */ -struct hciWritePageScanPeriodMode { - uint8_t mode; -} __packed; -struct hciCmplWritePageScanPeriodMode { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Page_Scan_Mode 0x003D /* complete *//* deprecated in BT 1.2+ */ -struct hciCmplReadPageScanMode { - uint8_t status; - uint8_t pageScanMode; /* nonzero modes are optional */ -} __packed; - -#define HCI_CMD_Write_Page_Scan_Mode 0x003E /* complete *//* deprecated in BT 1.2+ */ -struct hciWritePageScanMode { - uint8_t pageScanMode; /* nonzero modes are optional */ -} __packed; -struct hciCmplWritePageScanMode { - uint8_t status; -} __packed; - - -/* ==== BT 1.2 ==== */ - -#define HCI_CMD_Set_AFH_Host_Channel_Classification 0x003F /* complete */ -struct hciSetAfhHostChannelClassification { - uint8_t channels[10]; -} __packed; -struct hciCmplSetAfhHostChannelClassification { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Inquiry_Scan_Type 0x0042 /* complete */ -struct hciCmplReadInquiryScanType { - uint8_t status; - uint8_t interlaced; /* optional */ -} __packed; - -#define HCI_CMD_Write_Inquiry_Scan_Type 0x0043 /* complete */ -struct hciWriteInquiryScanType { - uint8_t interlaced; /* optional */ -} __packed; -struct hciCmplWriteInquiryScanType { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Inquiry_Mode 0x0044 /* complete */ -struct hciCmplReadInquryMode { - uint8_t status; - uint8_t inqMode; /* HCI_INQ_MODE_* */ -} __packed; - -#define HCI_CMD_Write_Inquiry_Mode 0x0045 /* complete */ -struct hciWriteInquiryMode { - uint8_t inqMode; /* HCI_INQ_MODE_* */ -} __packed; -struct hciCmplWriteInquiryMode { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Page_Scan_Type 0x0046 /* complete */ -struct hciCmplReadPageScanType { - uint8_t status; - uint8_t interlaced; /* optional */ -} __packed; - -#define HCI_CMD_Write_Page_Scan_Type 0x0047 /* complete */ -struct hciWritePageScanType { - uint8_t interlaced; /* optional */ -} __packed; -struct hciCmplWritePageScanType { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_AFH_Channel_Assessment_Mode 0x0048 /* complete */ -struct hciCmplReadAfhChannelAssessment { - uint8_t status; - uint8_t channelAssessmentEnabled; -} __packed; - -#define HCI_CMD_Write_AFH_Channel_Assessment_Mode 0x0049 /* complete */ -struct hciWriteAfhChannelAssessment { - uint8_t channelAssessmentEnabled; -} __packed; -struct hciCmplWriteAfhChannelAssessment { - uint8_t status; -} __packed; - - -/* ==== BT 2.1 ==== */ - -#define HCI_CMD_Read_Extended_Inquiry_Response 0x0051 /* complete */ -struct hciCmplReadEIR { - uint8_t status; - uint8_t useFec; - uint8_t data[240]; -} __packed; - -#define HCI_CMD_Write_Extended_Inquiry_Response 0x0052 /* complete */ -struct hciWriteEIR { - uint8_t useFec; - uint8_t data[240]; -} __packed; -struct hciCmplWriteEIR { - uint8_t status; -} __packed; - -#define HCI_CMD_Refresh_Encryption_Key 0x0052 /* status */ -struct hciRefreshEncryptionKey { - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Simple_Pairing_Mode 0x0055 /* complete */ -struct hciCmplReadSimplePairingMore { - uint8_t status; - uint8_t useSsp; -} __packed; - -#define HCI_CMD_Write_Simple_Pairing_Mode 0x0056 /* complete */ -struct hciWriteSimplePairingMode { - uint8_t useSsp; -} __packed; -struct hciCmplWriteSimplePairingMode { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Local_OOB_Data 0x0057 /* complete */ -struct hciCmplReadLocalOobData { - uint8_t status; - uint8_t C[16]; - uint8_t R[16]; -} __packed; - -#define HCI_CMD_Read_Inquiry_Response_Transmit_Power_Level 0x0058 /* complete */ -struct hciCmplReadInquiryTransmitPowerLevel { - uint8_t status; - uint8_t power; /* actually an int8_t */ -} __packed; - -#define HCI_CMD_Write_Inquiry_Transmit_Power_Level 0x0059 /* complete */ -struct hciWriteInquiryTransmitPowerLevel { - uint8_t power; /* actually an int8_t */ -} __packed; -struct hciCmplWriteInquiryTransmitPowerLevel { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Default_Erroneous_Data_Reporting 0x005A /* complete */ -struct hciCmplReadErroneousDataReporting { - uint8_t status; - uint8_t reportingEnabled; -} __packed; - -#define HCI_CMD_Write_Default_Erroneous_Data_Reporting 0x005B /* complete */ -struct hciWriteErroneousDataReporting { - uint8_t reportingEnabled; -} __packed; -struct hciCmplWriteErroneousDataReporting { - uint8_t status; -} __packed; - -#define HCI_CMD_Enhanced_Flush 0x005F /* status */ -struct hciEnhancedFlush { - uint16_t conn; - uint8_t which; /* 0 is the only value - flush auto-flushable packets only */ -} __packed; - -#define HCI_CMD_Send_Keypress_Notification 0x0060 /* complete */ -struct hciSendKeypressNotification { - uint8_t mac[6]; - uint8_t notifType; /* HCI_SSP_KEY_ENTRY_* */ -} __packed; -struct hciCmplSendKeypressNotification { - uint8_t status; - uint8_t mac[6]; -} __packed; - - -/* ==== BT 3.0 ==== */ - -#define HCI_CMD_Read_Logical_Link_Accept_Timeout 0x0061 /* complete */ -struct hciCmplReadLogicalLinkTimeout { - uint8_t status; - uint16_t timeout; /* in units of 0.625ms 1..0xB540. Required support 0x00A0..0xB540 */ -} __packed; - -#define HCI_CMD_Write_Logical_Link_Accept_Timeout 0x0062 /* complete */ -struct hciWriteLogicalLinkTimeout { - uint16_t timeout; /* in units of 0.625ms 1..0xB540. Required support 0x00A0..0xB540 */ -} __packed; -struct hciCmplWriteLogicalLinkTimeout { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_Event_Mask_Page_2 0x0063 /* complete */ -struct hciSetEventMaskPage2 { - uint64_t mask; /* bitmask of HCI_EVENT_P2_* */ -} __packed; -struct hciCmplSetEventMaskPage2 { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Location_Data 0x0064 /* complete */ -struct hciCmplReadLocationData { - uint8_t status; - uint8_t regulatoryDomainKnown; - uint16_t domain; /* ISO3166-1 code if known, else 0x5858 'XX' */ - uint8_t locationSuffix; /* HCI_LOCATION_DOMAIN_OPTION_* */ - uint8_t mainsPowered; -} __packed; - -#define HCI_CMD_Write_Location_Data 0x0065 /* complete */ -struct hciWriteLocationData { - uint8_t regulatoryDomainKnown; - uint16_t domain; /* ISO3166-1 code if known, else 0x5858 'XX' */ - uint8_t locationSuffix; /* HCI_LOCATION_DOMAIN_OPTION_* */ - uint8_t mainsPowered; -} __packed; -struct hciCmplWriteLocationData { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Flow_Control_Mode 0x0066 /* complete */ -struct hciCmplReadFlowControlMode { - uint8_t status; - uint8_t blockBased; /* block based is for amp, packed-based is for BR/EDR */ -} __packed; - -#define HCI_CMD_Write_Flow_Control_mode 0x0067 /* complete */ -struct hciWriteFlowControlMode { - uint8_t blockBased; /* block based is for amp, packed-based is for BR/EDR */ -} __packed; -struct hciCmplWriteFlowcontrolMode { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Enhanced_Transmit_Power_Level 0x0068 /* complete */ -struct hciReadEnhancedTransmitPowerLevel { - uint16_t conn; - uint8_t max; /* else currurent is read */ -} __packed; -struct hciCmplReadEnhancedTransmitPowerLevel { - uint8_t status; - uint16_t conn; - uint8_t txLevelGFSK; /* actually an int8_t */ - uint8_t txLevelDQPSK; /* actually an int8_t */ - uint8_t txLevel8DPSK; /* actually an int8_t */ -} __packed; - -#define HCI_CMD_Read_Best_Effort_Flush_Timeout 0x0069 /* complete */ -struct hciReadBestEffortFlushTimeout { - uint16_t logicalLinkHandle; -} __packed; -struct hciCmplReadBestEffortFlushTimeout { - uint8_t status; - uint32_t bestEffortFlushTimeout; /* in microseconds */ -} __packed; - -#define HCI_CMD_Write_Best_Effort_Flush_Timeout 0x006A /* complete */ -struct hciWriteBestEffortFlushTimeout { - uint16_t logicalLinkHandle; - uint32_t bestEffortFlushTimeout; /* in microseconds */ -} __packed; -struct hciCmplWriteBestEffortFlushTimeout { - uint8_t status; -} __packed; - -#define HCI_CMD_Short_Range_Mode 0x006B /* status */ -struct hciShortRangeMode { - uint8_t physicalLinkHandle; - uint8_t shortRangeModeEnabled; -} __packed; - - -/* ==== BT 4.0 ==== */ - -#define HCI_CMD_Read_LE_Host_Supported 0x006C /* complete */ -struct hciCmplReadLeHostSupported { - uint8_t status; - uint8_t leSupportedHost; - uint8_t simultaneousLeHost; -} __packed; - -#define HCI_CMD_Write_LE_Host_Supported 0x006D /* complete */ -struct hciWriteLeHostSupported { - uint8_t leSupportedHost; - uint8_t simultaneousLeHost; -} __packed; -struct hciCmplWriteLeHostSupported { - uint8_t status; -} __packed; - - -/* ==== BT 4.1 ==== */ - -#define HCI_CMD_Set_MWS_Channel_Parameters 0x006E /* complete */ -struct hciSetMwsChannelParams { - uint8_t mwsEnabled; - uint16_t mwsChannelRxCenterFreq; /* in MHz */ - uint16_t mwsChannelTxCenterFreq; /* in MHz */ - uint16_t mwsChannelRxBandwidth; /* in MHz */ - uint16_t mwsChannelTxBandwidth; /* in MHz */ - uint8_t mwsChannelType; -} __packed; -struct hciCmplSetMwsChannelParams { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_External_Frame_Configuration 0x006F /* complete */ -struct hciSetExternalFrameConfigItem { - uint16_t periodDuration; /* in microseconds */ - uint8_t periodType; /* HCI_PERIOD_TYPE_* */ -} __packed; -struct hciSetExternalFrameConfig { - uint16_t extFrameDuration; /* in microseonds */ - uint16_t extFrameSyncAssertOffset; /* in microseonds */ - uint16_t extFrameSyncAssertJitter; /* in microseonds */ - uint8_t extNumPeriods; /* 1 .. 32 */ - struct hciSetExternalFrameConfigItem items[]; -} __packed; -struct hciCmplSetExternalFrameConfig { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_MWS_Signalling 0x0070 /* complete */ -struct hciSetMwsSignalling { - uint16_t mwsRxAssertOffset; /* all of these are in microseconds */ - uint16_t mwsRxAssertJitter; - uint16_t mwsRxDeassertOffset; - uint16_t mwsRxDeassertJitter; - uint16_t mwsTxAssertOffset; - uint16_t mwsTxAssertJitter; - uint16_t mwsTxDeassertOffset; - uint16_t mwsTxDeassertJitter; - uint16_t mwsPatternAssertOffset; - uint16_t mwsPatternAssertJitter; - uint16_t mwsInactivityDurationAssertOffset; - uint16_t mwsInactivityDurationAssertJitter; - uint16_t mwsScanFrequencyAssertOffset; - uint16_t mwsScanFrequencyAssertJitter; - uint16_t mwsPriorityAssertOffsetRequest; -} __packed; -struct hciCmplSetMwsSignalling { - uint8_t status; - uint16_t bluetoothRxPriorityAssertOffset; - uint16_t bluetoothRxPriorityAssertJitter; - uint16_t bluetoothRxPriorityDeassertOffset; - uint16_t bluetoothRxPriorityDeassertJitter; - uint16_t _802RxPriorityAssertOffset; - uint16_t _802RxPriorityAssertJitter; - uint16_t _802RxPriorityDeassertOffset; - uint16_t _802RxPriorityDeassertJitter; - uint16_t bluetoothTxOnAssertOffset; - uint16_t bluetoothTxOnAssertJitter; - uint16_t bluetoothTxOnDeassertOffset; - uint16_t bluetoothTxOnDeassertJitter; - uint16_t _802TxOnAssertOffset; - uint16_t _802TxOnAssertJitter; - uint16_t _802TxOnDeassertOffset; - uint16_t _802TxOnDeassertJitter; -} __packed; - -#define HCI_CMD_Set_MWS_Transport_Layer 0x0071 /* complete */ -struct hciSetMwsTransportLayer { - uint8_t transportLayer; - uint32_t toMwsBaudRate; /* in byte/sec */ - uint32_t fromMwsBaudRate; /* in byte/sec */ -} __packed; -struct hciCmplSetMwsTransportLayer { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_MWS_Scan_Frequency_Table 0x0072 /* complete */ -struct hciSetMwsScanFrequencyTableItem { - uint16_t scanFreqLow; /*in MHz */ - uint16_t scanFreqHigh; /*in MHz */ -} __packed; -struct hciSetMwsScanFrequencyTable { - uint8_t n; - struct hciSetMwsScanFrequencyTableItem items[]; -} __packed; -struct hciCmplSetMwsScanFrequencyTable { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_MWS_PATTERN_Configuration 0x0073 /* complete */ -struct hciSetMwsPatternConfigItem { - uint16_t intervalDuration; /* in microseconds */ - uint8_t intervalType; /* HCI_MWS_INTERVAL_TYPE_* */ -} __packed; -struct hciSetMwsPatternConfig { - uint8_t mwsPatternIndex; /* 0 .. 2 */ - uint8_t mwsPatternNumIntervals; - struct hciSetMwsPatternConfigItem items[]; -} __packed; -struct hciCmplSetMwsPatternConfig { - uint8_t status; -} __packed; - -#define HCI_CMD_Set_Reserved_LT_ADDR 0x0074 /* complete */ -struct hciSetReservedLtAddr { - uint8_t ltAddr; -} __packed; -struct hciCmplSetReservedLtAddr { - uint8_t status; - uint8_t ltAddr; -} __packed; - -#define HCI_CMD_Delete_Reserved_LT_ADDR 0x0075 /* complete */ -struct hciDeleteReservedLtAddr { - uint8_t ltAddr; -} __packed; -struct hciCmplDeleteReservedLtAddr { - uint8_t status; - uint8_t ltAddr; -} __packed; - -#define HCI_CMD_Set_Connectionless_Slave_Broadcast_Data 0x0076 /* complete */ -struct hciSetConnlessSlaveBroadcastData { - uint8_t ltAddr; - uint8_t fragment; /* HCI_CONNLESS_FRAG_TYPE_* */ - uint8_t dataLen; - uint8_t data[]; -} __packed; -struct hciCmplSetConnlessSlaveBroadcastData { - uint8_t status; - uint8_t ltAddr; -} __packed; - -#define HCI_CMD_Read_Synchronisation_Train_Parameters 0x0077 /* complete */ -struct hciCmplReadSyncTrainParams { - uint8_t status; - uint16_t interval; - uint32_t syncTrainTimeout; - uint8_t serviceData; -} __packed; - -#define HCI_CMD_Write_Synchronisation_Train_Parameters 0x0078 /* complete */ -struct hciWriteSyncTrainParams { - uint16_t intMin; - uint16_t intMax; - uint32_t syncTrainTimeout; - uint8_t serviceData; -} __packed; -struct hciCmplWriteSyncTrainParams { - uint8_t status; - uint16_t interval; -} __packed; - -#define HCI_CMD_Read_Secure_Connections_Host_Support 0x0079 /* complete */ -struct hciCmplReadSecureConnectionsHostSupport { - uint8_t status; - uint8_t secureConnectionsSupported; -} __packed; - -#define HCI_CMD_Write_Secure_Connections_Host_Support 0x007A /* complete */ -struct hciWriteSecureConnectionsHostSupport { - uint8_t secureConnectionsSupported; -} __packed; -struct hciCmplWriteSecureConnectionsHostSupport { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Authenticated_Payload_Timeout 0x007B /* complete */ -struct hciReadAuthedPayloadTimeout { - uint16_t conn; -} __packed; -struct hciCmplReadAuthedPayloadTimeout { - uint8_t status; - uint16_t conn; - uint16_t timeout; /* in units of 10ms, 1 .. 0xffff */ -} __packed; - -#define HCI_CMD_Write_Authenticated_Payload_Timeout 0x007C /* complete */ -struct hciWriteAuthedPayloadTimeout { - uint16_t conn; - uint16_t timeout; /* in units of 10ms, 1 .. 0xffff */ -} __packed; -struct hciCmplWriteAuthedPayloadTimeout { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Local_OOB_Extended_Data 0x007D /* complete */ -struct hciCmplReadLocalOobExtendedData { - uint8_t status; - uint8_t C_192[16]; - uint8_t R_192[16]; - uint8_t C_256[16]; - uint8_t R_256[16]; -} __packed; - -#define HCI_CMD_Read_Extended_Page_Timeout 0x007E /* complete */ -struct hciCmplReadExtendedPageTimeout { - uint8_t status; - uint16_t timeout; /* in units of 0.625ms 0..0xffff */ -} __packed; - -#define HCI_CMD_Write_Extended_Page_Timeout 0x007F /* complete */ -struct hciWriteExtendedPageTimeout { - uint16_t timeout; /* in units of 0.625ms 0..0xffff */ -} __packed; -struct hciCmplWriteExtendedPageTimeout { - uint8_t status; -} __packed; - -#define HCI_CMD_Read_Extended_Inquiry_Length 0x0080 /* complete */ -struct hciCmplReadExtendedInquiryLength { - uint8_t status; - uint16_t timeout; /* in units of 0.625ms 0..0xffff */ -} __packed; - -#define HCI_CMD_Write_Extended_Inquiry_Length 0x0081 /* complete */ -struct hciWriteExtendedInquiryLength { - uint16_t timeout; /* in units of 0.625ms 0..0xffff */ -} __packed; -struct hciCmplWriteExtendedInquiryLength { - uint8_t status; -} __packed; - - - - - -#define HCI_OGF_Informational 4 - - -/* ==== BT 1.1 ==== */ - -#define HCI_CMD_Read_Local_Version_Information 0x0001 /* complete */ -struct hciCmplReadLocalVersion { - uint8_t status; - uint8_t hciVersion; /* HCI_VERSION_* */ - uint16_t hciRevision; - uint8_t lmpVersion; /* HCI_VERSION_* */ - uint16_t manufName; - uint16_t lmpSubversion; -} __packed; - -#define HCI_CMD_Read_Local_Supported_Commands 0x0002 /* complete */ -struct hciCmplReadLocalSupportedCommands { - uint8_t status; - uint64_t bitfield; -} __packed; - -#define HCI_CMD_Read_Local_Supported_Features 0x0003 /* complete */ -struct hciCmplReadLocalSupportedFeatures { - uint8_t status; - uint64_t features; /* bitmask of HCI_LMP_FTR_* */ -} __packed; - -#define HCI_CMD_Read_Local_Extended_Features 0x0004 /* complete */ -struct hciReadLocalExtendedFeatures { - uint8_t page; -} __packed; -struct hciCmplReadLocalExtendedFeatures { - uint8_t status; - uint8_t page; - uint8_t maxPage; - uint64_t features; /* bitmask of HCI_LMP_EXT_FTR_P* */ -} __packed; - -#define HCI_CMD_Read_Buffer_Size 0x0005 /* complete */ -struct hciCmplReadBufferSize { - uint8_t status; - uint16_t aclBufferLen; - uint8_t scoBufferLen; - uint16_t numAclBuffers; - uint16_t numScoBuffers; -} __packed; - -#define HCI_CMD_Read_BD_ADDR 0x0009 /* complete */ -struct hciCmplReadBdAddr { - uint8_t status; - uint8_t mac[6]; -} __packed; - - -/* ==== BT 3.0 ==== */ - -#define HCI_CMD_Read_Data_Block_Size 0x000A /* complete */ -struct hciCmplReadDataBlockSize { - uint8_t status; - uint16_t maxAclDataPacketLen; - uint16_t dataBlockLen; - uint16_t totalNumDataBlocks; -} __packed; - - -/* ==== BT 4.1 ==== */ - -#define HCI_CMD_Read_Local_Supported_Codecs 0x000B /* complete */ -struct hciCmplReadLocalSupportedCodecs { - uint8_t status; - uint8_t numSupportedCodecs; - uint8_t codecs[]; -/* these follow, but due to var array cannot be declared here: - uint8_t numVendorCodecs; - uint32_t vendorCodecs[]; -*/ -} __packed; - - - - - -#define HCI_OGF_Status 5 - - -/* == BT 1.1 == */ - -#define HCI_CMD_Read_Failed_Contact_Counter 0x0001 /* complete */ -struct hciReadFailedContactCounter { - uint16_t conn; -} __packed; -struct hciCmplReadFailedContactCounter { - uint8_t status; - uint16_t conn; - uint16_t counter; -} __packed; - -#define HCI_CMD_Reset_Failed_Contact_Counter 0x0002 /* complete */ -struct hciResetFailedContactCounter { - uint16_t conn; -} __packed; -struct hciCmplResetFailedContactCounter { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_Read_Link_Quality 0x0003 /* complete */ -struct hciReadLinkQuality { - uint16_t conn; -} __packed; -struct hciCmplReadLinkQuality { - uint8_t status; - uint16_t conn; - uint8_t quality; -} __packed; - -#define HCI_CMD_Read_RSSI 0x0005 /* complete */ -struct hciReadRssi { - uint16_t conn; -} __packed; -struct hciCmplReadRssi { - uint8_t status; - uint16_t conn; - uint8_t RSSI; /* actually an int8_t */ -} __packed; - - -/* ==== BT 1.2 ==== */ - -#define HCI_CMD_Read_AFH_Channel_Map 0x0006 /* complete */ -struct hciReadAfhChannelMap { - uint16_t conn; -} __packed; -struct hciCmplReadAfhChannelMap { - uint8_t status; - uint16_t conn; - uint8_t map[10]; -} __packed; - -#define HCI_CMD_Read_Clock 0x0007 /* complete */ -struct hciReadClock { - uint16_t conn; - uint8_t readRemote; /* else reads local and ignores conn */ -} __packed; -struct hciCmplReadClock { - uint8_t status; - uint16_t conn; - uint32_t clock; - uint16_t accuracy; -} __packed; - - -/* ==== BT 3.0 ==== */ - -#define HCI_CMD_Read_Encryption_Key_Size 0x0008 /* complete */ -struct hciReadEncrKeySize { - uint16_t conn; -} __packed; -struct hciCmplReadEncrKeySize { - uint8_t status; - uint16_t conn; - uint8_t keySize; -} __packed; - -#define HCI_CMD_Read_Local_AMP_Info 0x0009 /* complete */ -struct hciCmplReadLocalAmpInfo { - uint8_t status; - uint8_t ampStatus; - uint32_t totalBandwidth; - uint32_t maxGuaranteedBandwidth; - uint32_t minLatency; - uint16_t maxPduSize; - uint8_t controllerType; - uint16_t palCapabilities; - uint16_t maxAmpAssocLen; - uint32_t maxFlushTimeout; - uint32_t bestEffortFlushTimeout; -} __packed; - -#define HCI_CMD_Read_Local_AMP_ASSOC 0x000A /* complete */ -struct hciReadLocalAmpAssoc { - uint8_t physicalLinkHandle; - uint16_t lengthSoFar; - uint16_t ampAssocLen; -} __packed; -struct hciCmplReadLocalAmpAssoc { - uint8_t status; - uint8_t physicalLinkHandle; - uint16_t ampAssocRemainingLen; /* incl this fragment */ - uint8_t ampAssocFragment[]; /* 1.. 248 byutes */ -} __packed; - -#define HCI_CMD_Write_Remote_AMP_ASSOC 0x000B /* complete */ -struct hciWriteRemoteAmpAssoc { - uint8_t physicalLinkHandle; - uint16_t lengthSoFar; - uint16_t remaningLength; - uint8_t fragment[]; /* 248 bytes for all but last one */ -} __packed; -struct hciCmplWriteRemoteAmpAssoc { - uint8_t status; - uint8_t physicalLinkHandle; -} __packed; - -/* ==== BT 4.1 ==== */ - -#define HCI_CMD_Get_MWS_Transport_Layer_Configuration 0x000C /* complete */ -struct hciCmplGetMwsTransportLayerConfigItem { - uint8_t transportLayer; - uint8_t numBaudRates; -} __packed; -struct hciCmplGetMwsTransportLayerConfigBandwidthItem { - uint32_t toMwsBaudRate; - uint32_t fromMwsBaudRate; -} __packed; -struct hciCmplGetMwsTransportLayerConfig { - uint8_t status; - uint8_t numTransports; - struct hciCmplGetMwsTransportLayerConfigItem items[]; /* numTransports items */ -/* this follows: - struct hciCmplGetMwsTransportLayerConfigBandwidthItem items[] // sum(items[].numbaudRates) items -*/ -} __packed; - -#define HCI_CMD_Set_Triggered_Clock_Capture 0x000D /* complete */ -struct hciSetTriggeredClockCapture { - uint16_t conn; - uint8_t enable; - uint8_t piconetClock; /* else local clock & "conn" is ignored */ - uint8_t lpoAllowed; /* can sleep? */ - uint8_t numClockCapturesToFilter; -} __packed; -struct hciCmplSetTriggeredClockCapture { - uint8_t status; -} __packed; - - - - - -#define HCI_OGF_LE 8 - - -/* ==== BT 4.0 ==== */ - -#define HCI_CMD_LE_Set_Event_Mask 0x0001 /* complete */ -struct hciLeSetEventMask { - uint64_t events; /* bitmask of HCI_LE_EVENT_* */ -} __packed; -struct hciCmplLeSetEventMask { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Read_Buffer_Size 0x0002 /* complete */ -struct hciCmplLeReadBufferSize { - uint8_t status; - uint16_t leBufferSize; - uint8_t leNumBuffers; -} __packed; - -#define HCI_CMD_LE_Read_Local_Supported_Features 0x0003 /* complete */ -struct hciCmplLeReadLocalSupportedFeatures { - uint8_t status; - uint64_t leFeatures; /* bitmask of HCI_LE_FTR_* */ -} __packed; - -#define HCI_CMD_LE_Set_Random_Address 0x0005 /* complete */ -struct hciLeSetRandomAddress{ - uint8_t mac[6]; -} __packed; -struct hciCmplLeSetRandomAddress{ - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Set_Adv_Params 0x0006 /* complete */ -struct hciLeSetAdvParams { - uint16_t advIntervalMin; - uint16_t advIntervalMax; - uint8_t advType; - uint8_t useRandomAddress; - uint8_t directRandomAddress; - uint8_t directAddr[6]; - uint8_t advChannelMap; - uint8_t advFilterPolicy; -} __packed; -struct hciCmplLeSetAdvParams { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Read_Adv_Channel_TX_Power 0x0007 /* complete */ -struct hciCmplLeReadAdvChannelTxPower { - uint8_t status; - uint8_t txPower; /* actually an int8_t */ -} __packed; - -#define HCI_CMD_LE_Set_Advertising_Data 0x0008 /* complete */ -struct hciLeSetAdvData { - uint8_t advDataLen; - uint8_t advData[31]; -} __packed; -struct hciCmplLeSetAdvData { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Set_Scan_Response_Data 0x0009 /* complete */ -struct hciSetScanResponseData { - uint8_t scanRspDataLen; - uint8_t scanRspData[31]; -} __packed; -struct hciCmplSetScanResponseData { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Set_Advertise_Enable 0x000A /* complete */ -struct hciLeSetAdvEnable { - uint8_t advOn; -} __packed; -struct hciCmplLeSetAdvEnable { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Set_Scan_Parameters 0x000B /* complete */ -struct hciLeSetScanParams { - uint8_t activeScan; - uint16_t scanInterval; /* in units of 0.625ms, 4..0x4000 */ - uint16_t scanWindow; /* in units of 0.625ms, 4..0x4000 */ - uint8_t useOwnRandomAddr; - uint8_t onlyAllowlist; -} __packed; -struct hciCmplLeSetScanParams { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Set_Scan_Enable 0x000C /* complete */ -struct hciLeSetScanEnable { - uint8_t scanOn; - uint8_t filterDuplicates; -} __packed; -struct hciCmplLeSetScanEnable { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Create_Connection 0x000D /* status */ -struct hciLeCreateConnection { - uint16_t scanInterval; /* in units of 0.625ms, 4..0x4000 */ - uint16_t scanWindow; /* in units of 0.625ms, 4..0x4000 */ - uint8_t connectToAnyAllowlistedDevice; /* if so, ignore next 2 params */ - uint8_t peerRandomAddr; - uint8_t peerMac[6]; - uint8_t useOwnRandomAddr; - uint16_t connIntervalMin; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connIntervalMax; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connLatency; /* 0..0x1F4 */ - uint16_t supervisionTimeout; /* in units of 10ms, 0xA...0x0C80 */ - uint16_t minConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ - uint16_t maxConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ -} __packed; - -#define HCI_CMD_LE_Create_Connection_Cancel 0x000E /* complete */ -struct hciCmplLeCreateConnectionCancel { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Read_Allow_List_Size 0x000F /* complete */ -struct hciCmplLeReadAllowListSize { - uint8_t status; - uint8_t allowlistSize; -} __packed; - -#define HCI_CMD_LE_Clear_Allow_List 0x0010 /* complete */ -struct hciCmplLeClearAllowList { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Add_Device_To_Allow_List 0x0011 /* complete */ -struct hciLeAddDeviceToAllowList { - uint8_t randomAddr; - uint8_t mac[6]; -} __packed; -struct hciCmplLeAddDeviceToAllowList { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Remove_Device_From_Allow_List 0x0012 /* complete */ -struct hciLeRemoveDeviceFromAllowList { - uint8_t randomAddr; - uint8_t mac[6]; -} __packed; -struct hciCmplLeRemoveDeviceFromAllowList { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Connection_Update 0x0013 /* status */ -struct hciLeConnectionUpdate { - uint16_t conn; - uint16_t connIntervalMin; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connIntervalMax; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connLatency; /* 0..0x1F4 */ - uint16_t supervisionTimeout; /* in units of 10ms, 0xA...0x0C80 */ - uint16_t minConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ - uint16_t maxConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ -} __packed; - -#define HCI_CMD_LE_Set_Host_Channel_Classification 0x0014 /* complete */ -struct hciLeSetHostChannelClassification { - uint8_t chMap[5]; -} __packed; -struct hciCmplLeSetHostChannelClassification { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Read_Channel_Map 0x0015 /* complete */ -struct hciLeReadChannelMap { - uint16_t conn; -} __packed; -struct hciCmplLeReadChannelMap { - uint8_t status; - uint16_t conn; - uint8_t chMap[5]; -} __packed; - -#define HCI_CMD_LE_Read_Remote_Used_Features 0x0016 /* status */ -struct hciLeReadRemoteUsedFeatures { - uint16_t conn; -} __packed; - -#define HCI_CMD_LE_Encrypt 0x0017 /* complete */ -struct hciLeEncrypt { - uint8_t key[16]; - uint8_t plaintext[16]; -} __packed; -struct hciCmplLeEncrypt { - uint8_t status; - uint8_t encryptedData[16]; -} __packed; - -#define HCI_CMD_LE_Rand 0x0018 /* complete */ -struct hciCmplLeRand { - uint8_t status; - uint64_t rand; -} __packed; - -#define HCI_CMD_LE_Start_Encryption 0x0019 /* status */ -struct hciLeStartEncryption { - uint16_t conn; - uint64_t rand; - uint16_t diversifier; - uint8_t LTK[16]; -} __packed; - -#define HCI_CMD_LE_LTK_Request_Reply 0x001A /* complete */ -struct hciLeLtkRequestReply { - uint16_t conn; - uint8_t LTK[16]; -} __packed; -struct hciCmplLeLtkRequestReply { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_LE_LTK_Request_Negative_Reply 0x001B /* complete */ -struct hciLeLtkRequestNegativeReply { - uint16_t conn; -} __packed; -struct hciCmplLeLtkRequestNegativeReply { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_LE_Read_Supported_States 0x001C /* complete */ -struct hciCmplLeReadSupportedStates { - uint8_t status; - uint64_t states; /* bitmask of HCI_LE_STATE_* */ -} __packed; - -#define HCI_CMD_LE_Receiver_Test 0x001D /* complete */ -struct hciLeReceiverTest { - uint8_t radioChannelNum; /* 2402 + radioChannelNum * 2 MHz */ -} __packed; -struct hciCmplLeReceiverTest { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Transmitter_Test 0x001E /* complete */ -struct hciLeTransmitterTest { - uint8_t radioChannelNum; /* 2402 + radioChannelNum * 2 MHz */ - uint8_t lengthOfTestData; - uint8_t testPacketDataType; -} __packed; -struct hciCmplLeTransmitterTest { - uint8_t status; -} __packed; - -#define HCI_CMD_LE_Test_End 0x001F /* complete */ -struct hciCmplLeTestEnd { - uint8_t status; - uint16_t numPackets; -} __packed; - - -/* ==== BT 4.1 ==== */ - -#define HCI_CMD_LE_Remote_Conn_Param_Request_Reply 0x0020 /* complete */ -struct hciLeRemoteConnParamRequestReply { - uint16_t conn; - uint16_t connIntervalMin; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connIntervalMax; /* in units of 1.25ms, 6..0x0C80 */ - uint16_t connLatency; /* 0..0x1F4 */ - uint16_t supervisionTimeout; /* in units of 10ms, 0xA...0x0C80 */ - uint16_t minConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ - uint16_t maxConnLen; /* minimum conn len needed in units of 0.625ms 0..0xfff */ -} __packed; -struct hciCmplLeRemoteConnParamRequestReply { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_CMD_LE_Remote_Conn_Param_Request_Negative_Reply 0x0021 /* complete */ -struct hciRemoteConnParamRequestNegativeReply { - uint16_t conn; - uint8_t reason; -} __packed; -struct hciCmplLeRemoteConnParamRequestNegativeReply { - uint8_t status; - uint16_t conn; -} __packed; - - - -/* EVENTS */ - - -/* ==== BT 1.1 ==== */ - -#define HCI_EVT_Inquiry_Complete 0x01 -struct hciEvtInquiryComplete { - uint8_t status; -} __packed; - -#define HCI_EVT_Inquiry_Result 0x02 -struct hciEvtInquiryResultItem { - uint8_t mac[6]; - uint8_t PSRM; - uint8_t PSPM; - uint8_t PSM; /* obsoleted in BT 1.2+ */ - uint8_t deviceClass[3]; - uint16_t clockOffset; -} __packed; -struct hciEvtInquiryResult { - uint8_t numResponses; - struct hciEvtInquiryResultItem items[]; -} __packed; - -#define HCI_EVT_Connection_Complete 0x03 -struct hciEvtConnComplete { - uint8_t status; - uint16_t conn; - uint8_t mac[6]; - uint8_t isAclLink; - uint8_t encrypted; -} __packed; - -#define HCI_EVT_Connection_Request 0x04 -struct hciEvtConnRequest { - uint8_t mac[6]; - uint8_t deviceClass[3]; - uint8_t isAclLink; -} __packed; - -#define HCI_EVT_Disconnection_Complete 0x05 -struct hciEvtDiscComplete { - uint8_t status; - uint16_t conn; - uint8_t reason; -} __packed; - -#define HCI_EVT_Authentication_Complete 0x06 -struct hciEvtAuthComplete { - uint8_t status; - uint16_t handle; -} __packed; - -#define HCI_EVT_Remote_Name_Request_Complete 0x07 -struct hciEvtRemoteNameReqComplete { - uint8_t status; - uint8_t mac[6]; - char name[HCI_DEV_NAME_LEN]; -} __packed; - -#define HCI_EVT_Encryption_Change 0x08 -struct hciEvtEncrChange { - uint8_t status; - uint16_t conn; - uint8_t encrOn; -} __packed; - -#define HCI_EVT_Change_Connection_Link_Key_Complete 0x09 -struct hciEvtChangeConnLinkKeyComplete { - uint8_t status; - uint16_t handle; -} __packed; - -#define HCI_EVT_Master_Link_Key_Complete 0x0A -struct hciEvtMasterLinkKeyComplete { - uint8_t status; - uint16_t conn; - uint8_t usingTempKey; /* else using semi-permanent key */ -} __packed; - -#define HCI_EVT_Read_Remote_Supported_Features_Complete 0x0B -struct hciEvtReadRemoteSupportedFeaturesComplete { - uint8_t status; - uint16_t conn; - uint64_t lmpFeatures; /* bitmask of HCI_LMP_FTR_* */ -} __packed; - -#define HCI_EVT_Read_Remote_Version_Complete 0x0C -struct hciEvtReadRemoteVersionComplete { - uint8_t status; - uint16_t conn; - uint8_t lmpVersion; /* HCI_VERSION_* */ - uint16_t manufName; - uint16_t lmpSubversion; -} __packed; - -#define HCI_EVT_QOS_Setup_Complete 0x0D -struct hciEvtQosSetupComplete { - uint8_t status; - uint16_t conn; - uint8_t flags; - uint8_t serviceType; - uint32_t tokenRate; - uint32_t peakBandwidth; - uint32_t latency; - uint32_t delayVariation; -} __packed; - -#define HCI_EVT_Command_Complete 0x0E -struct hciEvtCmdComplete { - uint8_t numCmdCredits; - uint16_t opcode; -} __packed; - -#define HCI_EVT_Command_Status 0x0F -struct hciEvtCmdStatus { - uint8_t status; - uint8_t numCmdCredits; - uint16_t opcode; -} __packed; - -#define HCI_EVT_Hardware_Error 0x10 -struct hciEvtHwError { - uint8_t errCode; -} __packed; - -#define HCI_EVT_Flush_Occurred 0x11 -struct hciEvtFlushOccurred { - uint16_t conn; -} __packed; - -#define HCI_EVT_Role_Change 0x12 -struct hciEvtRoleChange { - uint8_t status; - uint8_t mac[6]; - uint8_t amSlave; -} __packed; - -#define HCI_EVT_Number_Of_Completed_Packets 0x13 -struct hciEvtNumCompletedPacketsItem { - uint16_t conn; - uint16_t numPackets; -} __packed; -struct hciEvtNumCompletedPackets { - uint8_t numHandles; - struct hciEvtNumCompletedPacketsItem items[]; -} __packed; - -#define HCI_EVT_Mode_Change 0x14 -struct hciEvtModeChange { - uint8_t status; - uint16_t conn; - uint8_t mode; /* HCI_CUR_MODE_* */ - uint16_t interval; /* in units of 0.625ms 0..0xffff */ -} __packed; - -#define HCI_EVT_Return_Link_Keys 0x15 -struct hciEvtReturnLinkKeysItem { - uint8_t mac[6]; - uint8_t key[16]; -} __packed; -struct hciEvtReturnLinkKeys { - uint8_t numKeys; - struct hciEvtReturnLinkKeysItem items[]; -} __packed; - -#define HCI_EVT_PIN_Code_Request 0x16 -struct hciEvtPinCodeReq { - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Link_Key_Request 0x17 -struct hciEvtLinkKeyReq { - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Link_Key_Notification 0x18 -struct hciEvtLinkKeyNotif { - uint8_t mac[6]; - uint8_t key[16]; - uint8_t keyType; /* HCI_KEY_TYPE_ */ -} __packed; - -#define HCI_EVT_Loopback_Command 0x19 -/* data is the sent command, up to 252 bytes of it */ - -#define HCI_EVT_Data_Buffer_Overflow 0x1A -struct hciEvtDataBufferOverflow { - uint8_t aclLink; -} __packed; - -#define HCI_EVT_Max_Slots_Change 0x1B -struct hciEvtMaxSlotsChange { - uint16_t conn; - uint8_t lmpMaxSlots; -} __packed; - -#define HCI_EVT_Read_Clock_Offset_Complete 0x1C -struct hciEvtReadClockOffsetComplete { - uint8_t status; - uint16_t conn; - uint16_t clockOffset; -} __packed; - -#define HCI_EVT_Connection_Packet_Type_Changed 0x1D -struct hciEvtConnPacketTypeChanged { - uint8_t status; - uint16_t conn; - uint16_t packetsAllowed; /* HCI_PKT_TYP_* */ -} __packed; - -#define HCI_EVT_QoS_Violation 0x1E -struct hciEvtQosViolation { - uint16_t conn; -} __packed; - -#define HCI_EVT_Page_Scan_Mode_Change 0x1F /* deprecated in BT 1.2+ */ -struct hciEvtPsmChange { - uint8_t mac[6]; - uint8_t PSM; -} __packed; - -#define HCI_EVT_Page_Scan_Repetition_Mode_Change 0x20 -struct hciEvtPrsmChange { - uint8_t mac[6]; - uint8_t PSRM; -} __packed; - - -/* ==== BT 1.2 ==== */ - -#define HCI_EVT_Flow_Specification_Complete 0x21 -struct hciEvtFlowSpecComplete { - uint8_t status; - uint16_t conn; - uint8_t flags; - uint8_t flowDirection; - uint8_t serviceType; - uint32_t tokenRate; - uint32_t peakBandwidth; - uint32_t latency; -} __packed; - -#define HCI_EVT_Inquiry_Result_With_RSSI 0x22 -struct hciEvtInquiryResultWithRssiItem { - uint8_t mac[6]; - uint8_t PSRM; - uint8_t PSPM; - uint8_t deviceClass[3]; - uint16_t clockOffset; - uint8_t RSSI; /* actually a int8_t */ -} __packed; -struct hciEvtInquiryResultWithRssi { - uint8_t numResponses; - struct hciEvtInquiryResultWithRssiItem items[]; -} __packed; - -#define HCI_EVT_Read_Remote_Extended_Features_Complete 0x23 -struct hciEvtReadRemoteExtFeturesComplete { - uint8_t status; - uint16_t conn; - uint8_t pageNum; - uint8_t maxPageNum; - uint64_t extLmpFeatures; /* HCI_LMP_EXT_FTR_P* & HCI_LMP_FTR_* */ -} __packed; - -#define HCI_EVT_Synchronous_Connection_Complete 0x2C -struct hciEvtSyncConnComplete { - uint8_t status; - uint16_t conn; - uint8_t mac[6]; - uint8_t linkType; /* HCI_SCO_LINK_TYPE_* */ - uint8_t interval; - uint8_t retrWindow; - uint16_t rxPacketLen; - uint16_t txPacketLen; - uint8_t airMode; /* HCI_SCO_AIR_MODE_* */ -} __packed; - -#define HCI_EVT_Synchronous_Connection_Changed 0x2D -struct hciEvtSyncConnChanged { - uint8_t status; - uint16_t conn; - uint8_t interval; - uint8_t retrWindow; - uint16_t rxPacketLen; - uint16_t txPacketLen; -} __packed; - - -/* ==== BT 2.1 ==== */ - -#define HCI_EVT_Sniff_Subrating 0x2E -struct hciEvtSniffSubrating { - uint8_t status; - uint16_t conn; - uint16_t maxTxLatency; - uint16_t maxRxLatency; - uint16_t minRemoteTimeout; - uint16_t minLocalTimeout; -} __packed; - -#define HCI_EVT_Extended_Inquiry_Result 0x2F -struct hciEvtExtendedInquiryResult { - uint8_t numResponses; /* must be 1 */ - uint8_t mac[6]; - uint8_t PSRM; - uint8_t reserved; - uint8_t deviceClass[3]; - uint16_t clockOffset; - uint8_t RSSI; /* actually a int8_t */ - uint8_t EIR[240]; -} __packed; - -#define HCI_EVT_Encryption_Key_Refresh_Complete 0x30 -struct hciEvtEncrKeyRefreshComplete { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_EVT_IO_Capability_Request 0x31 -struct hciEvtIoCapRequest { - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_IO_Capability_Response 0x32 -struct hciEvtIoCapResponse { - uint8_t mac[6]; - uint8_t ioCapability; /* HCI_DISPLAY_CAP_* */ - uint8_t oobDataPresent; - uint8_t authReqments; /* HCI_AUTH_REQMENT_ */ -} __packed; - -#define HCI_EVT_User_Confirmation_Request 0x33 -struct hciEvtUserConfRequest { - uint8_t mac[6]; - uint32_t numericValue; -} __packed; - -#define HCI_EVT_User_Passkey_Request 0x34 -struct hciEvtUserPasskeyRequest { - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Remote_OOB_Data_Request 0x35 -struct hciEvtRemoteOobRequest { - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Simple_Pairing_Complete 0x36 -struct hciEvtSimplePairingComplete { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Link_Supervision_Timeout_Changed 0x38 -struct hciEvtLinkSupervisionTimeoutChanged { - uint16_t conn; - uint16_t timeout; /* in units of 0.625 ms 1..0xffff */ -} __packed; - -#define HCI_EVT_Enhanced_Flush_Complete 0x39 -struct hciEvtEnahncedFlushComplete { - uint16_t conn; -} __packed; - -#define HCI_EVT_User_Passkey_Notification 0x3B -struct hciEvtUserPasskeyNotif { - uint8_t mac[6]; - uint32_t passkey; -} __packed; - -#define HCI_EVT_Keypress_Notification 0x3C -struct hciEvtKeypressNotification { - uint8_t mac[6]; - uint8_t notifType; /* HCI_SSP_KEY_ENTRY_* */ -} __packed; - -#define HCI_EVT_Remote_Host_Supported_Features_Notification 0x3D -struct hciEvtRemoteHostSupportedFeatures { - uint8_t mac[6]; - uint64_t hostSupportedFeatures; /* HCI_LMP_FTR_* */ -} __packed; - - -/* ==== BT 3.0 ==== */ - -#define HCI_EVT_Physical_Link_Complete 0x40 -struct hciEvtPhysLinkComplete { - uint8_t status; - uint8_t physLinkHandle; -} __packed; - -#define HIC_EVT_Channel_Selected 0x41 -struct hciEvtChannelSelected { - uint8_t physLinkHandle; -} __packed; - -#define HCI_EVT_Disconnection_Physical_Link_Complete 0x42 -struct hciEvtDiscPhysLinkComplete { - uint8_t status; - uint8_t physLinkHandle; - uint8_t reason; -} __packed; - -#define HCI_EVT_Physical_Link_Loss_Early_Warning 0x43 -struct hciEvtDiscPhysLinkLossEralyWarning { - uint8_t physLinkHandle; - uint8_t lossReason; -} __packed; - -#define HCI_EVT_Physical_Link_Recovery 0x44 -struct hciEvtDiscPhysLinkRecovery { - uint8_t physLinkHandle; -} __packed; - -#define HCI_EVT_Logical_Link_Complete 0x45 -struct hciEvtLogicalLinkComplete { - uint8_t status; - uint16_t logicalLinkHandle; - uint8_t physLinkHandle; - uint8_t txFlowSpecID; -} __packed; - -#define HCI_EVT_Disconnection_Logical_Link_Complete 0x46 -struct hciEvtDiscLogicalLinkComplete { - uint8_t status; - uint16_t logicalLinkHandle; - uint8_t reason; -} __packed; - -#define HCI_EVT_Flow_Spec_Modify_Complete 0x47 -struct hciEvtFlowSpecModifyComplete { - uint8_t status; - uint16_t conn; -} __packed; - -#define HCI_EVT_Number_Of_Completed_Data_Blocks 0x48 -struct hciEvtNumCompletedDataBlocksItem { - uint16_t conn; - uint16_t numPackets; -} __packed; -struct hciEvtNumCompletedDataBlocks { - uint16_t totalNumBlocks; - uint8_t numberOfHandles; - struct hciEvtNumCompletedDataBlocksItem items[]; -} __packed; - -#define HCI_EVT_AMP_Start_Test 0x49 -struct hciEvtAmpStartTest { - uint8_t status; - uint8_t scenario; -} __packed; - -#define HCI_EVT_AMP_Test_End 0x4A -struct hciEvtAmpTestEnd { - uint8_t status; - uint8_t scenario; -} __packed; - -#define HCI_EVT_AMP_Receiver_Report 0x4B -struct hciEvtampReceiverReport { - uint8_t controllerType; - uint8_t reason; - uint32_t eventType; - uint16_t numberOfFrames; - uint16_t numberOfErrorFrames; - uint32_t numberOfBits; - uint32_t numberOfErrorBits; -} __packed; - -#define HCI_EVT_Short_Range_Mode_Change_Complete 0x4C -struct hciEvtshortRangeModeChangeComplete { - uint8_t status; - uint8_t physLinkHandle; - uint8_t shortRangeModeOn; -} __packed; - -#define HCI_EVT_AMP_Status_Change 0x4D -struct hciEvtAmpStatusChange { - uint8_t status; - uint8_t ampStatus; -} __packed; - - -/* ==== BT 4.0 ==== */ - -#define HCI_EVT_LE_Meta 0x3E -struct hciEvtLeMeta { - uint8_t subevent; -} __packed; - -#define HCI_EVTLE_Connection_Complete 0x01 -struct hciEvtLeConnectionComplete { - uint8_t status; - uint16_t conn; - uint8_t amSlave; - uint8_t peerAddrRandom; - uint8_t peerMac[6]; - uint16_t connInterval; /* in units of 1.25 ms 6..0x0C80 */ - uint16_t connLatency; /* 0..0x01f3 */ - uint16_t supervisionTimeout; /* inunit sof 10ms, 0xA..0x0C80 */ - uint8_t masterClockAccuracy; /* HCI_MCA_* */ -} __packed; - -#define HCI_EVTLE_Advertising_Report 0x02 -struct hciEvtLeAdvReportItem { - uint8_t advType; /* HCI_ADV_TYPE_* */ - uint8_t randomAddr; - uint8_t mac[6]; - uint8_t dataLen; - uint8_t data[]; -/* int8_t RSSI <-- this cannot be here due to variable data len, but in reality it is there */ -} __packed; -struct hciEvtLeAdvReport { - uint8_t numReports; - /* struct hciEvtLeAdvReportItem items[]; <- this cannot be here since data length is variable */ -} __packed; - -#define HCI_EVTLE_Connection_Update_Complete 0x03 -struct hciEvtLeConnectionUpdateComplete { - uint8_t status; - uint16_t conn; - uint16_t connInterval; /* in units of 1.25 ms 6..0x0C80 */ - uint16_t connLatency; /* 0..0x01f3 */ - uint16_t supervisionTimeout; /* inunit sof 10ms, 0xA..0x0C80 */ -} __packed; - -#define HCI_EVTLE_Read_Remote_Used_Features_Complete 0x04 -struct hciEvtLeReadRemoteFeaturesComplete { - uint8_t status; - uint16_t conn; - uint64_t leFeatures; /* bitmask of HCI_LE_FTR_* */ -} __packed; - -#define HCI_EVTLE_LTK_Request 0x05 -struct hciEvtLeLtkRequest { - uint16_t conn; - uint64_t randomNum; - uint16_t diversifier; -} __packed; - - -/* ==== BT 4.1 ==== */ - -#define HCI_EVTLE_Read_Remote_Connection_Parameter_Request 0x06 -struct hciEvtLeReadRemoteConnParamRequest { - uint16_t conn; - uint16_t connIntervalMin; /* in units of 1.25 ms 6..0x0C80 */ - uint16_t connIntervalMax; /* in units of 1.25 ms 6..0x0C80 */ - uint16_t connLatency; /* 0..0x01f3 */ - uint16_t supervisionTimeout; /* inunit sof 10ms, 0xA..0x0C80 */ -} __packed; - -#define HCI_EVT_Triggered_Clock_Capture 0x4E -struct hciEvtTriggeredClockCapture { - uint16_t conn; - uint8_t piconetClock; - uint32_t clock; - uint16_t slotOffset; -} __packed; - -#define HCI_EVT_Synchronization_Train_Complete 0x4F -struct hciEvtSyncTrainComplete { - uint8_t status; -} __packed; - -#define HCI_EVT_Synchronization_Train_Received 0x50 -struct hciEvtSyncTrainReceived { - uint8_t status; - uint8_t mac[6]; - uint32_t offset; - uint8_t afhChannelMap[10]; - uint8_t ltAddr; - uint32_t nextBroadcastInstant; - uint16_t connectionlessSlaveBroadcastInterval; - uint8_t serviceData; -} __packed; - -#define HCI_EVT_Connectionless_Slave_Broadcast_Receive 0x51 -struct hciEvtConnectionlessSlaveBroadcastReceive { - uint8_t mac[6]; - uint8_t ltAddr; - uint32_t clk; - uint32_t offset; - uint8_t rxFailed; - uint8_t fragment; /* HCI_CONNLESS_FRAG_TYPE_* */ - uint8_t dataLen; - /* data */ -} __packed; - -#define HCI_EVT_Connectionless_Slave_Broadcast_Timeout 0x52 -struct hciEvtConnectionlessSlaveBroadcastTimeout { - uint8_t mac[6]; - uint8_t ltAddr; -} __packed; - -#define HCI_EVT_Truncated_Page_Complete 0x53 -struct hciEvtTruncatedPageComplete { - uint8_t status; - uint8_t mac[6]; -} __packed; - -#define HCI_EVT_Slave_Page_Response_Timeout 0x54 - -#define HCI_EVT_Connless_Slave_Broadcast_Channel_Map_Change 0x55 -struct hciEvtConnlessSlaveBroadcastChannelMapChange { - uint8_t map[10]; -} __packed; - -#define HCI_EVT_Inquiry_Response_Notification 0x56 -struct hciEvtInquiryResponseNotif { - uint8_t lap[3]; - uint8_t RSSI; /* actually an int8_t */ -} __packed; - -#define HCI_EVT_Authenticated_Payload_Timeout_Expired 0x57 -struct hciEvtAuthedPayloadTimeoutExpired { - uint16_t conn; -} __packed; - - - - - -/* ERROR CODES */ - -/* ==== BT 1.1 ==== */ - -#define HCI_SUCCESS 0x00 -#define HCI_ERR_Unknown_HCI_Command 0x01 -#define HCI_ERR_No_Connection 0x02 -#define HCI_ERR_Hardware_Failure 0x03 -#define HCI_ERR_Page_Timeout 0x04 -#define HCI_ERR_Authentication_Failure 0x05 -#define HCI_ERR_Key_Missing 0x06 -#define HCI_ERR_Memory_Full 0x07 -#define HCI_ERR_Connection_Timeout 0x08 -#define HCI_ERR_Max_Number_Of_Connections 0x09 -#define HCI_ERR_Max_Number_Of_SCO_Connections_To_A_Device 0x0A -#define HCI_ERR_ACL_Connection_Already_Exists 0x0B -#define HCI_ERR_Command_Disallowed 0x0C -#define HCI_ERR_Host_Rejected_Due_To_Limited_Resources 0x0D -#define HCI_ERR_Host_Rejected_Due_To_Security_Reasons 0x0E -#define HCI_ERR_Host_Rejected_Remote_Device_Personal_Device 0x0F -#define HCI_ERR_Host_Timeout 0x10 -#define HCI_ERR_Unsupported_Feature_Or_Parameter_Value 0x11 -#define HCI_ERR_Invalid_HCI_Command_Parameters 0x12 -#define HCI_ERR_Other_End_Terminated_Connection_User_Requested 0x13 -#define HCI_ERR_Other_End_Terminated_Connection_Low_Resources 0x14 -#define HCI_ERR_Other_End_Terminated_Connection_Soon_Power_Off 0x15 -#define HCI_ERR_Connection_Terminated_By_Local_Host 0x16 -#define HCI_ERR_Repeated_Attempts 0x17 -#define HCI_ERR_Pairing_Not_Allowed 0x18 -#define HCI_ERR_Unknown_LMP_PDU 0x19 -#define HCI_ERR_Unsupported_Remote_Feature 0x1A -#define HCI_ERR_SCO_Offset_Rejected 0x1B -#define HCI_ERR_SCO_Interval_Rejected 0x1C -#define HCI_ERR_SCO_Air_Mode_Rejected 0x1D -#define HCI_ERR_Invalid_LMP_Parameters 0x1E -#define HCI_ERR_Unspecified_Error 0x1F -#define HCI_ERR_Unsupported_LMP_Parameter 0x20 -#define HCI_ERR_Role_Change_Not_Allowed 0x21 -#define HCI_ERR_LMP_Response_Timeout 0x22 -#define HCI_ERR_LMP_Error_Transaction_Collision 0x23 -#define HCI_ERR_LMP_PDU_Not_Allowed 0x24 -#define HCI_ERR_Encryption_Mode_Not_Acceptable 0x25 -#define HCI_ERR_Unit_Key_Used 0x26 -#define HCI_ERR_QoS_Not_Supported 0x27 -#define HCI_ERR_Instant_Passed 0x28 -#define HCI_ERR_Pairing_With_Unit_Key_Not_Supported 0x29 - - -/* ==== BT 1.2 ==== */ - -#define HCI_ERR_Different_Transaction_Collision 0x2A -#define HCI_ERR_QoS_Unacceptable_Parameter 0x2C -#define HCI_ERR_QoS_Rejected 0x2D -#define HCI_ERR_Channel_Classification_Not_Supported 0x2E -#define HCI_ERR_Insufficient_Security 0x2F -#define HCI_ERR_Parameter_Out_Of_Mandatory_Range 0x30 -#define HCI_ERR_Role_Switch_Pending 0x33 -#define HCI_ERR_Reserved_Slot_Violation 0x34 -#define HIC_ERR_Role_Switch_Failed 0x35 - - -/* ==== BT 2.1 ==== */ - -#define HCI_ERR_EIR_Too_Large 0x36 -#define HCI_ERR_SSP_Not_Supported_By_Host 0x37 -#define HCI_ERR_Host_Busy_Pairing 0x38 - - -/* ==== BT 3.0 ==== */ - -#define HCI_ERR_Connection_Rejected_No_Suitable_Channel_Found 0x39 -#define HCI_ERR_Controller_Busy 0x3A - - -/* ==== BT 4.0 ==== */ - -#define HCI_ERR_Unacceptable_Connection_Interval 0x3B -#define HCI_ERR_Directed_Advertising_Timeout 0x3C -#define HCI_ERR_Connection_Terminated_Due_To_MIC_Failure 0x3D -#define HCI_ERR_Connection_Failed_To_To_Established 0x3E -#define HCI_ERR_MAC_Connection_Failed 0x3F - - -/* ==== BT 4.1 ==== */ - -#define HCI_ERR_CoarseClock_AdjFailed_Will_Try_clock_Dragging 0x40 - - - -#endif - diff --git a/include/byteorder.h b/include/byteorder.h deleted file mode 100644 index 8cfd810e54..0000000000 --- a/include/byteorder.h +++ /dev/null @@ -1,11 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __EC_INCLUDE_BYTEORDER_H -#define __EC_INCLUDE_BYTEORDER_H - -#include <endian.h> - -#endif /* __EC_INCLUDE_BYTEORDER_H */ diff --git a/include/capsense.h b/include/capsense.h deleted file mode 100644 index 2c0734aa4d..0000000000 --- a/include/capsense.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CAPSENSE_H -#define __CROS_EC_CAPSENSE_H - -#include "common.h" -#include "gpio.h" - -void capsense_interrupt(enum gpio_signal signal); - -#endif /* __CROS_EC_CAPSENSE_H */ diff --git a/include/case_closed_debug.h b/include/case_closed_debug.h deleted file mode 100644 index 53c8b1ed17..0000000000 --- a/include/case_closed_debug.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Case Closed Debug interface - */ -#ifndef __CROS_EC_CASE_CLOSED_DEBUG_H -#define __CROS_EC_CASE_CLOSED_DEBUG_H - -/** - * Return non-zero if the CCD external interface is enabled. - */ -int ccd_ext_is_enabled(void); - -#endif /* __CROS_EC_CASE_CLOSED_DEBUG_H */ diff --git a/include/cec.h b/include/cec.h deleted file mode 100644 index b1ac6dbbb0..0000000000 --- a/include/cec.h +++ /dev/null @@ -1,95 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "ec_commands.h" - -/* Size of the buffer inside the rx queue */ -#define CEC_RX_BUFFER_SIZE 20 -#if CEC_RX_BUFFER_SIZE < MAX_CEC_MSG_LEN + 1 -#error "Buffer must fit at least a CEC message and a length byte" -#endif -#if CEC_RX_BUFFER_SIZE > 255 -#error "Buffer size must not exceed 255 since offsets are uint8_t" -#endif - -/* CEC message during transfer */ -struct cec_msg_transfer { - /* Bit offset */ - uint8_t bit; - /* Byte offset */ - uint8_t byte; - /* The CEC message */ - uint8_t buf[MAX_CEC_MSG_LEN]; -}; - -/* - * Queue of completed incoming CEC messages - * ready to be read out by AP - */ -struct cec_rx_queue { - /* - * Write offset. Updated from interrupt context when we - * have received a complete message. - */ - uint8_t write_offset; - /* Read offset. Updated when AP sends CEC read command */ - uint8_t read_offset; - /* Data buffer */ - uint8_t buf[CEC_RX_BUFFER_SIZE]; -}; - -/** - * Get the current bit of a CEC message transfer - * - * @param queue Queue to flush - */ -int cec_transfer_get_bit(const struct cec_msg_transfer *transfer); - -/** - * Set the current bit of a CEC message transfer - * - * @param transfer Message transfer to set current bit of - * @param val New bit value - */ -void cec_transfer_set_bit(struct cec_msg_transfer *transfer, int val); - -/** - * Make the current bit the next bit in the transfer buffer - * - * @param transfer Message transfer to change current bit of - */ -void cec_transfer_inc_bit(struct cec_msg_transfer *transfer); - -/** - * Check if current bit is an end-of-message bit and if it is set - * - * @param transfer Message transfer to check for end-of-message - */ -int cec_transfer_is_eom(const struct cec_msg_transfer *transfer, int len); - -/** - * Flush all messages from a CEC receive queue - * - * @param queue Queue to flush - */ -void cec_rx_queue_flush(struct cec_rx_queue *queue); - -/** - * Push a CEC message to a CEC receive queue - * - * @param queue Queue to add message to - */ -int cec_rx_queue_push(struct cec_rx_queue *queue, const uint8_t *msg, - uint8_t msg_len); - -/** - * Pop a CEC message from a CEC receive queue - * - * @param queue Queue to retrieve message from - * @param msg Buffer to store retrieved message in - * @param msg_len Number of data bytes in msg - */ -int cec_rx_queue_pop(struct cec_rx_queue *queue, uint8_t *msg, - uint8_t *msg_len); diff --git a/include/charge_ramp.h b/include/charge_ramp.h deleted file mode 100644 index 0745f5ef98..0000000000 --- a/include/charge_ramp.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Charge input current limit ramp header for Chrome EC */ - -#ifndef __CROS_EC_CHARGE_RAMP_H -#define __CROS_EC_CHARGE_RAMP_H - -#include "timer.h" - -/* Charge ramp state used for checking VBUS */ -enum chg_ramp_vbus_state { - CHG_RAMP_VBUS_RAMPING, - CHG_RAMP_VBUS_STABLE -}; - -/** - * Check if VBUS is too low - * - * @param port Charge ramp port - * @param ramp_state Current ramp state - * - * @return VBUS is sagging low - */ -int board_is_vbus_too_low(int port, enum chg_ramp_vbus_state ramp_state); - -/** - * Check if ramping is allowed for given supplier - * - * @param port Charge ramp port - * @supplier Supplier to check - * - * @return Ramping is allowed for given supplier - */ -int chg_ramp_allowed(int port, int supplier); - -/** - * Get the maximum current limit that we are allowed to ramp to - * - * @param port Charge ramp port - * @supplier Active supplier type - * @sup_curr Input current limit based on supplier - * - * @return Maximum current in mA - */ -int chg_ramp_max(int port, int supplier, int sup_curr); - -/** - * Get the input current limit set by ramp module - * - * Active input current limit (mA) - */ -int chg_ramp_get_current_limit(void); - -/** - * Return if charge ramping has reached stable state - * - * @return 1 if stable, 0 otherwise - */ -int chg_ramp_is_stable(void); - -/** - * Return if charge ramping has reached detected state - * - * @return 1 if detected, 0 otherwise - */ -int chg_ramp_is_detected(void); - -#ifdef HAS_TASK_CHG_RAMP -/** - * Notify charge ramp module of supplier type change on a port. If port - * is CHARGE_PORT_NONE, the call indicates the last charge supplier went - * away. - * - * @port Active charging port - * @supplier Active charging supplier - * @current Minimum input current limit - * @registration_time Timestamp of when the supplier is registered - * @voltage Negotiated charge voltage. - */ -void chg_ramp_charge_supplier_change(int port, int supplier, int current, - timestamp_t registration_time, int voltage); - -#else -static inline void chg_ramp_charge_supplier_change( - int port, int supplier, timestamp_t registration_time) { } -#endif - -#endif /* __CROS_EC_CHARGE_RAMP_H */ diff --git a/include/charge_state_v1.h b/include/charge_state_v1.h deleted file mode 100644 index 6bc8529a6e..0000000000 --- a/include/charge_state_v1.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "battery.h" -#include "timer.h" - -#ifndef __CROS_EC_CHARGE_STATE_V1_H -#define __CROS_EC_CHARGE_STATE_V1_H - -/* Update period to prevent charger watchdog timeout */ -#define CHARGER_UPDATE_PERIOD (SECOND * 10) - -/* Power state error flags */ -#define F_CHARGER_INIT BIT(0) /* Charger initialization */ -#define F_CHARGER_VOLTAGE BIT(1) /* Charger maximum output voltage */ -#define F_CHARGER_CURRENT BIT(2) /* Charger maximum output current */ -#define F_BATTERY_VOLTAGE BIT(3) /* Battery voltage */ -#define F_BATTERY_MODE BIT(8) /* Battery mode */ -#define F_BATTERY_CAPACITY BIT(9) /* Battery capacity */ -#define F_BATTERY_STATE_OF_CHARGE BIT(10) /* State of charge, percentage */ -#define F_BATTERY_UNRESPONSIVE BIT(11) /* Battery not responding */ -#define F_BATTERY_NOT_CONNECTED BIT(12) /* Battery not connected */ -#define F_BATTERY_GET_PARAMS BIT(13) /* Any battery parameter bad */ - -#define F_BATTERY_MASK (F_BATTERY_VOLTAGE | \ - F_BATTERY_MODE | \ - F_BATTERY_CAPACITY | F_BATTERY_STATE_OF_CHARGE | \ - F_BATTERY_UNRESPONSIVE | F_BATTERY_NOT_CONNECTED | \ - F_BATTERY_GET_PARAMS) -#define F_CHARGER_MASK (F_CHARGER_VOLTAGE | F_CHARGER_CURRENT | \ - F_CHARGER_INIT) - -/* Power state data - * Status collection of charging state machine. - */ -struct charge_state_data { - int ac; - int charging_voltage; - int charging_current; - struct batt_params batt; - enum charge_state state; - uint32_t error; - timestamp_t ts; -}; - -/* State context - * The shared context for state handler. The context contains current and - * previous state. - */ -struct charge_state_context { - struct charge_state_data curr; - struct charge_state_data prev; - timestamp_t charge_state_updated_time; - uint32_t *memmap_batt_volt; - uint32_t *memmap_batt_rate; - uint32_t *memmap_batt_cap; - uint8_t *memmap_batt_flags; - /* Charger and battery pack info */ - const struct charger_info *charger; - const struct battery_info *battery; - /* Charging timestamps */ - timestamp_t charger_update_time; - timestamp_t trickle_charging_time; - timestamp_t voltage_debounce_time; - timestamp_t shutdown_warning_time; - int battery_responsive; -}; - -#endif /* __CROS_EC_CHARGE_STATE_V1_H */ - diff --git a/include/charger_detect.h b/include/charger_detect.h deleted file mode 100644 index ae2001e418..0000000000 --- a/include/charger_detect.h +++ /dev/null @@ -1,17 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Detect what adapter is connected */ - -#ifndef __CROS_CHARGER_DETECT_H -#define __CROS_CHARGER_DETECT_H - -/* - * Get attached device type. - * - * @return CHARGE_SUPPLIER_BC12_* or 0 if the device type was not detected - */ -int charger_detect_get_device_type(void); - -#endif /* __CROS_CHARGER_DETECT_H */ diff --git a/include/charger_profile_override.h b/include/charger_profile_override.h deleted file mode 100644 index 091eb11946..0000000000 --- a/include/charger_profile_override.h +++ /dev/null @@ -1,86 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Charger profile override for fast charging - */ - -#ifndef __CROS_EC_CHARGER_PROFILE_OVERRIDE_H -#define __CROS_EC_CHARGER_PROFILE_OVERRIDE_H - -#include "charge_state_v2.h" - -#define TEMPC_TENTHS_OF_DEG(c) ((c) * 10) - -#define CHARGER_PROF_TEMP_C_LAST_RANGE 0xFFFF - -#define CHARGER_PROF_VOLTAGE_MV_LAST_RANGE 0xFFFF - -/* Charge profile override info */ -struct fast_charge_profile { - /* temperature in 10ths of a degree C */ - const int temp_c; - /* charge current for respective battery voltage ranges in mA. */ - const int current_mA[CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES]; -}; - -/* Charge profile override parameters */ -struct fast_charge_params { - /* Total temperature ranges of the charge profile */ - const int total_temp_ranges; - /* Default temperature range of the charge profile */ - const int default_temp_range_profile; - /* - * Battery voltage ranges in mV. - * It is assumed that these values are added in ascending order in the - * board battery file. - */ - const int voltage_mV[CONFIG_CHARGER_PROFILE_VOLTAGE_RANGES]; - const struct fast_charge_profile *chg_profile_info; -}; - -/** - * Optional customization of charger profile override for fast charging. - * - * On input, the struct reflects the default behavior. The function can make - * changes to the state, requested_voltage, or requested_current. - * - * @param curr Charge state machine data. - * - * @return - * >0 Desired time in usec for this poll period. - * 0 Use the default poll period (which varies with the state). - * <0 An error occurred. The poll time will be shorter than usual. - * Too many errors in a row may trigger some corrective action. - */ -int charger_profile_override(struct charge_state_data *curr); - -/** - * Common code of charger profile override for fast charging. - * - * @param curr Charge state machine data. - * @param fast_chg_params Fast charge profile parameters. - * @param prev_chg_prof_info Previous charge profile info. - * @param batt_vtg_max Maximum battery voltage. - * - * @return - * >0 Desired time in usec for this poll period. - * 0 Use the default poll period (which varies with the state). - * <0 An error occurred. The poll time will be shorter than usual. - * Too many errors in a row may trigger some corrective action. - */ -int charger_profile_override_common(struct charge_state_data *curr, - const struct fast_charge_params *fast_chg_params, - const struct fast_charge_profile **prev_chg_prof_info, - int batt_vtg_max); - -/* - * Access to custom profile params through host commands. - * What this does is up to the implementation. - */ -enum ec_status charger_profile_override_get_param(uint32_t param, - uint32_t *value); -enum ec_status charger_profile_override_set_param(uint32_t param, - uint32_t value); - -#endif /* __CROS_EC_CHARGER_PROFILE_OVERRIDE_H */ diff --git a/include/config.h b/include/config.h index 2753cc715c..30224c9a95 100644 --- a/include/config.h +++ b/include/config.h @@ -6126,8 +6126,6 @@ * override some of the config flags in non-standard ways to mock only parts of * the system. */ -#include "fuzz_config.h" -#include "test_config.h" /* * Validity checks to make sure some of the configs above make sense. diff --git a/include/config_std_internal_flash.h b/include/config_std_internal_flash.h deleted file mode 100644 index d272f5136c..0000000000 --- a/include/config_std_internal_flash.h +++ /dev/null @@ -1,78 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CONFIG_STD_INTERNAL_FLASH_H -#define __CROS_EC_CONFIG_STD_INTERNAL_FLASH_H - -/* - * Standard memory-mapped flash layout: - * - RO image starts at the beginning of flash. - * - PSTATE immediately follows the RO image. - * - RW image starts at the second half of flash. - * - Protected region consists of the first half of flash (RO image + PSTATE). - * - Unprotected region consists of second half of flash (RW image). - * - * PSTATE - * | - * v - * |<-----Protected Region------>|<------Unprotected Region----->| - * |<--------RO image--------->| |<----------RW image----------->| - * 0 N/2 N - * - * This layout is used by several supported chips. Chips which do not use - * this layout MUST NOT include this header file, and must instead define - * the configs below in a chip-level header file (config_flash_layout.h). - * - * See the following page for additional image geometry discussion: - * - * https://www.chromium.org/chromium-os/ec-development/ec-image-geometry-spec - * - * TODO(crosbug.com/p/23796): Finish implementing the spec. - */ - -/* - * Size of one firmware image in flash - half for RO, half for RW. - * This is NOT a globally defined config, and is only used in this file - * for convenience. - */ -#define _IMAGE_SIZE ((CONFIG_FLASH_SIZE_BYTES - \ - CONFIG_SHAREDLIB_SIZE) / 2) - -/* - * The EC uses the one bank of flash to emulate a SPI-like write protect - * register with persistent state. - */ -#define CONFIG_FLASH_PSTATE -#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE -#define CONFIG_FW_PSTATE_OFF (_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) - -/* - * By default, there is no shared objects library. However, if configured, the - * shared objects library will be placed after the RO image. - */ -#define CONFIG_SHAREDLIB_MEM_OFF (CONFIG_RO_MEM_OFF + \ - _IMAGE_SIZE) -#define CONFIG_SHAREDLIB_STORAGE_OFF (CONFIG_RO_STORAGE_OFF + \ - _IMAGE_SIZE) -#define CONFIG_SHAREDLIB_SIZE 0 - -#define CONFIG_RO_MEM_OFF 0 -#define CONFIG_RO_STORAGE_OFF 0 -#define CONFIG_RO_SIZE (_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) -#define CONFIG_RW_MEM_OFF (CONFIG_SHAREDLIB_MEM_OFF + \ - CONFIG_SHAREDLIB_SIZE) -#define CONFIG_RW_STORAGE_OFF 0 -#define CONFIG_RW_SIZE _IMAGE_SIZE - -#define CONFIG_EC_PROTECTED_STORAGE_OFF 0 -#define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_OFF CONFIG_RW_MEM_OFF -#define CONFIG_EC_WRITABLE_STORAGE_SIZE (CONFIG_FLASH_SIZE_BYTES - \ - CONFIG_EC_WRITABLE_STORAGE_OFF) - -#define CONFIG_WP_STORAGE_OFF CONFIG_EC_PROTECTED_STORAGE_OFF -#define CONFIG_WP_STORAGE_SIZE CONFIG_EC_PROTECTED_STORAGE_SIZE - -#endif /* __CROS_EC_CONFIG_STD_INTERNAL_FLASH_H */ diff --git a/include/crc.h b/include/crc.h deleted file mode 100644 index 04a82313d8..0000000000 --- a/include/crc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_CRC_H -#define __CROS_EC_CRC_H -/* CRC-32 implementation with USB constants */ -/* Note: it's a stateful CRC-32 to match the hardware block interface */ - -#if defined(CONFIG_HW_CRC) && !defined(HOST_TOOLS_BUILD) -#include "crc_hw.h" -#else - -/* Use software implementation */ - -/* Static context variant */ - -void crc32_init(void); - -/** - * Calculate CRC32 of data in arbitrary length. - * - * @param buf Data for CRC32 to be calculated for. - * @param size Size of <buf> in bytes. - */ -void crc32_hash(const void *buf, int size); - -void crc32_hash32(uint32_t val); - -void crc32_hash16(uint16_t val); - -uint32_t crc32_result(void); - -/* Provided context variant */ - -void crc32_ctx_init(uint32_t *ctx); - -/** - * Calculate CRC32 of data in arbitrary length using given context. - * - * @param crc CRC32 context. - * @param buf Data for CRC32 to be calculated for. - * @param size Size of <buf> in bytes. - */ -void crc32_ctx_hash(uint32_t *crc, const void *buf, int size); - -void crc32_ctx_hash32(uint32_t *ctx, uint32_t val); - -void crc32_ctx_hash16(uint32_t *ctx, uint16_t val); - -void crc32_ctx_hash8(uint32_t *ctx, uint8_t val); - -uint32_t crc32_ctx_result(uint32_t *ctx); - -#endif /* CONFIG_HW_CRC && !HOST_TOOLS_BUILD */ - -#endif /* __CROS_EC_CRC_H */ diff --git a/include/crypto_api.h b/include/crypto_api.h deleted file mode 100644 index 8a8ccacf99..0000000000 --- a/include/crypto_api.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __INCLUDE_CRYPTO_API_H -#define __INCLUDE_CRYPTO_API_H - -#include "util.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * Calculate hash of an arbitrary data - * - * Up to SHA_DIGEST_SIZE byte hash can be generated, if hash_len is - * longer - it is padded with zeros. - * - * @param p_buf: pointer to beginning of data - * @param num_bytes: length of data in bytes - * @param p_hash: pointer to where computed hash will be stored - * @param hash_len: length in bytes to use from sha computation. If this - * value exceeds SHA1 size (20 bytes), the rest of the - * hash is filled up with zeros. - */ -void app_compute_hash(uint8_t *p_buf, size_t num_bytes, - uint8_t *p_hash, size_t hash_len); - -#define CIPHER_SALT_SIZE 16 - -/* - * Encrypt/decrypt a flat blob. - * - * Encrypt or decrypt the input buffer, and write the correspondingly - * ciphered output to out. The number of bytes produced is equal to - * the number of input bytes. - * - * This API is expected to be applied to a single contiguous region. WARNING: - * Presently calling this function more than once with "in" pointing to - * logically different buffers will result in using the same IV value - * internally and as such reduce encryption efficiency. - * - * @param salt pointer to a unique value to be associated with this blob, - * used for derivation of the proper IV, the size of this value - * is as defined by CIPHER_SALT_SIZE above. - * WARNING: a given salt/"in" pair must be unique (it is an ERROR - * to use a given salt with more than one unique buffer). For an - * example, a good salt would be a digest of the plaintext input. - * @param out Destination pointer where to write plaintext / ciphertext. - * @param in Source pointer where to read ciphertext / plaintext. - * @param len Number of bytes to read from in / write to out. - * @return non-zero on success, and zero otherwise. - */ -int app_cipher(const void *salt, void *out, const void *in, size_t size); - -/* - * Return a Boolean showing if crypto hardware is enabled. - */ -int crypto_enabled(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __INCLUDE_CRYPTO_API_H */ diff --git a/include/curve25519.h b/include/curve25519.h deleted file mode 120000 index b9943bd4ac..0000000000 --- a/include/curve25519.h +++ /dev/null @@ -1 +0,0 @@ -../third_party/boringssl/include/curve25519.h
\ No newline at end of file diff --git a/include/device_event.h b/include/device_event.h deleted file mode 100644 index 7a6403e51d..0000000000 --- a/include/device_event.h +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Device event module for Chrome EC */ - -#ifndef __CROS_EC_DEVICE_EVENT_H -#define __CROS_EC_DEVICE_EVENT_H - -#include "common.h" -#include "ec_commands.h" - -/** - * Return the raw device event state. - */ -uint32_t device_get_events(void); - -/** - * Set one or more device event bits. - * - * Call device_clear_events to unset event bits. - * - * @param mask Event bits to set (use EC_DEVICE_EVENT_MASK()). - */ -void device_set_events(uint32_t mask); - -/** - * Clear one or more device event bits. - * - * @param mask Event bits to clear (use EC_DEVICE_EVENT_MASK()). - * Write 1 to a bit to clear it. - */ -void device_clear_events(uint32_t mask); - -/** - * Set a single device event. - * - * @param event Event to set (EC_DEVICE_EVENT_*). - */ -static inline void device_set_single_event(int event) -{ - device_set_events(EC_DEVICE_EVENT_MASK(event)); -} - -/** - * Enable device event. - * - * @param event Event to enable (EC_DEVICE_EVENT_*) - */ -void device_enable_event(enum ec_device_event event); - -#endif /* __CROS_EC_DEVICE_EVENT_H */ diff --git a/include/device_state.h b/include/device_state.h deleted file mode 100644 index e7894ba998..0000000000 --- a/include/device_state.h +++ /dev/null @@ -1,87 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_DEVICE_STATE_H -#define __CROS_DEVICE_STATE_H - -enum gpio_signal; - -/* Device configuration */ -struct device_config { - /* Device name */ - const char *name; - - /* Current state */ - enum device_state state; - - /* - * Last known state. That is, the last state value passed to - * device_set_state() which was DEVICE_STATE_OFF or DEVICE_STATE_ON. - * Or DEVICE_STATE_UNKNOWN, if device_set_state() has not been called - * for this device this boot. - */ - enum device_state last_known_state; - - /* - * Deferred handler to debounce state transitions. This is NOT used by - * the device_state module; it's just here as a convenience for the - * board. - */ - const struct deferred_data *deferred; - - /* - * GPIO used to detect the state. This is NOT used by the device_state - * module; it's just here as a convenience for the board. - */ - enum gpio_signal detect; -}; - -/* - * board.h must supply an enumerated list of devices, ending in DEVICE_COUNT. - */ -enum device_type; - -/* - * board.c must provide this list of device configurations. It must match enum - * device_type, and must be DEVICE_COUNT entries long. - */ -extern struct device_config device_states[]; - -/** - * Get the current state for the device. - * - * @param device Device to check - * @return The device state (current; NOT last known). - */ -enum device_state device_get_state(enum device_type device); - -/** - * Set the device state - * - * Updates the device's last known state if <state> is DEVICE_STATE_ON or - * DEVICE_STATE_OFF, and that's different than the device's last known state. - * - * Note that this only changes the recorded state. It does not notify anything - * of these changes. That must be done by the caller. - * - * @param device Device to update - * @param state New device state - * @return non-zero if this changed the device's last known state. - */ -int device_set_state(enum device_type device, enum device_state state); - -/** - * Update the device state based on the device gpios. - * - * The board must implement this. It will be called for each device in the - * context of HOOK_SECOND. If the state has changed, the board is responsible - * for doing any associated reconfiguration and then calling - * device_set_state(). - * - * @param device Device to check. - */ -void board_update_device_state(enum device_type device); - -#endif /* __CROS_DEVICE_STATE_H */ diff --git a/include/display_7seg.h b/include/display_7seg.h deleted file mode 100644 index cbaf33f458..0000000000 --- a/include/display_7seg.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Seven Segment Display module for Chrome EC */ - -#ifndef __CROS_EC_DISPLAY_7SEG_H -#define __CROS_EC_DISPLAY_7SEG_H - -enum seven_seg_module_display { - SEVEN_SEG_CONSOLE_DISPLAY, /* Console data */ - SEVEN_SEG_EC_DISPLAY, /* power state */ - SEVEN_SEG_PORT80_DISPLAY, /* port80 data */ -}; - -/** - * Write register to MAX656x 7-segment display. - * - * @param module which is writing to the display - * @param data to be displayed - * @return EC_SUCCESS is write is successful - */ -int display_7seg_write(enum seven_seg_module_display module, uint16_t data); - -#endif /* __CROS_EC_DISPLAY_7SEG_H */ - diff --git a/include/dps.h b/include/dps.h deleted file mode 100644 index 151c6b3f09..0000000000 --- a/include/dps.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_DPS__H -#define __CROS_EC_DPS__H - -#include <stdbool.h> - -#include "common.h" - -/* Dynamic PDO Selection config. */ -struct dps_config_t { - /* (0, 100) coeff for transition to a lower power PDO*/ - uint32_t k_less_pwr; - /* (0, 100) coeff for transition to a higher power PDO*/ - uint32_t k_more_pwr; - /* Number for how many the same consecutive sample to transist */ - uint32_t k_sample; - /* Number for moving average window for the power and the current. */ - uint32_t k_window; - /* Power stabilized time after a new contract in us */ - uint32_t t_stable; - /* Next power evaluation time interval in us */ - uint32_t t_check; - /* - * If the current voltage is more efficient than the previous voltage - * - * @param curr_mv: current PDO voltage - * @param prev_mv: previous PDO voltage - * @param batt_mv: battery desired voltage - * @param batt_mw: current battery power - * @param input_mw: current adapter input power - * @return true is curr_mv is more efficient otherwise false - */ - bool (*is_more_efficient)(int curr_mv, int prev_mv, int batt_mv, - int batt_mw, int input_mw); -}; - -/* - * Get voltage in the current system load - * - * @return a voltage(mV) that the adapter supports to charge at the given port. - */ -int dps_get_dynamic_voltage(void); - -/* - * Get DPS charge port - * - * @return the DPS charge port, or CHARGE_PORT_NONE if unavailable. - */ -int dps_get_charge_port(void); - -/* - * Check if DPS is enabled. - * - * @return true if enabled, false otherwise. - */ -bool dps_is_enabled(void); - -/* - * Update DPS stablized timeout - * - * This is called at the exit of PE_SNK_TRANSITION_SINK - * - * @param port: the port for timer reset. - */ -void dps_update_stabilized_time(int port); - -#endif /* __CROS_EC_DPS__H */ diff --git a/include/dptf.h b/include/dptf.h deleted file mode 100644 index c34e8ea47a..0000000000 --- a/include/dptf.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Functions used to provide the Intel DPTF interface over ACPI */ - -#ifndef __CROS_EC_DPTF_H -#define __CROS_EC_DPTF_H - -/** - * Set fan duty target. - * - * 0-100% sets fixed duty cycle, out of range means let the EC drive. - */ -void dptf_set_fan_duty_target(int pct); - -/** - * Return 0-100% if in duty mode. -1 if not. - */ -int dptf_get_fan_duty_target(void); - -/* Thermal thresholds may be set for each temp sensor. */ -#define DPTF_THRESHOLDS_PER_SENSOR 2 -#define DPTF_THRESHOLD_HYSTERESIS 2 - -/** - * Set/enable the thresholds. - */ -void dptf_set_temp_threshold(int sensor_id, /* zero-based sensor index */ - int temp, /* in degrees K */ - int idx, /* which threshold (0 or 1) */ - int enable); /* true = on, false = off */ - -/** - * Return the ID of a temp sensor that has crossed its threshold since the last - * time we asked. -1 means none. - */ -int dptf_query_next_sensor_event(void); - -/** - * Set charging current limit, in mA. -1 means no limit. - */ -void dptf_set_charging_current_limit(int ma); - -/** - * Get charging current limit, in mA, or -1 if not DPTF-limiting. - */ -int dptf_get_charging_current_limit(void); - -#endif /* __CROS_EC_DPTF_H */ diff --git a/include/driver/accel_bma2x2.h b/include/driver/accel_bma2x2.h deleted file mode 100644 index 3a46c7c050..0000000000 --- a/include/driver/accel_bma2x2.h +++ /dev/null @@ -1,155 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMA2x2 gsensor module for Chrome EC */ - -#ifndef __CROS_EC_ACCEL_BMA2x2_H -#define __CROS_EC_ACCEL_BMA2x2_H - -#include "accel_bma2x2_public.h" - -/*** Chip-specific registers ***/ -/* REGISTER ADDRESS DEFINITIONS */ -#define BMA2x2_EEP_OFFSET 0x16 -#define BMA2x2_IMAGE_BASE 0x38 -#define BMA2x2_IMAGE_LEN 22 -#define BMA2x2_CHIP_ID_ADDR 0x00 -#define BMA255_CHIP_ID_MAJOR 0xfa - -/* DATA ADDRESS DEFINITIONS */ -#define BMA2x2_X_AXIS_LSB_ADDR 0x02 -#define BMA2x2_X_AXIS_MSB_ADDR 0x03 -#define BMA2x2_Y_AXIS_LSB_ADDR 0x04 -#define BMA2x2_Y_AXIS_MSB_ADDR 0x05 -#define BMA2x2_Z_AXIS_LSB_ADDR 0x06 -#define BMA2x2_Z_AXIS_MSB_ADDR 0x07 -#define BMA2x2_TEMP_ADDR 0x08 - -#define BMA2x2_AXIS_LSB_NEW_DATA 0x01 - -/* STATUS ADDRESS DEFINITIONS */ -#define BMA2x2_STAT1_ADDR 0x09 -#define BMA2x2_STAT2_ADDR 0x0A -#define BMA2x2_STAT_TAP_SLOPE_ADDR 0x0B -#define BMA2x2_STAT_ORIENT_HIGH_ADDR 0x0C -#define BMA2x2_STAT_FIFO_ADDR 0x0E -#define BMA2x2_RANGE_SELECT_ADDR 0x0F -#define BMA2x2_RANGE_SELECT_MSK 0x0F -#define BMA2x2_RANGE_2G 3 -#define BMA2x2_RANGE_4G 5 -#define BMA2x2_RANGE_8G 8 -#define BMA2x2_RANGE_16G 12 - -#define BMA2x2_RANGE_TO_REG(_range) \ - ((_range) < 8 ? BMA2x2_RANGE_2G + ((_range) / 4) * 2 : \ - BMA2x2_RANGE_8G + ((_range) / 16) * 4) - -#define BMA2x2_REG_TO_RANGE(_reg) \ - ((_reg) < BMA2x2_RANGE_8G ? 2 + (_reg) - BMA2x2_RANGE_2G : \ - 8 + ((_reg) - BMA2x2_RANGE_8G) * 2) - -#define BMA2x2_BW_SELECT_ADDR 0x10 -#define BMA2x2_BW_MSK 0x1F -#define BMA2x2_BW_7_81HZ 0x08 /* LowPass 7.8125HZ */ -#define BMA2x2_BW_15_63HZ 0x09 /* LowPass 15.625HZ */ -#define BMA2x2_BW_31_25HZ 0x0A /* LowPass 31.25HZ */ -#define BMA2x2_BW_62_50HZ 0x0B /* LowPass 62.50HZ */ -#define BMA2x2_BW_125HZ 0x0C /* LowPass 125HZ */ -#define BMA2x2_BW_250HZ 0x0D /* LowPass 250HZ */ -#define BMA2x2_BW_500HZ 0x0E /* LowPass 500HZ */ -#define BMA2x2_BW_1000HZ 0x0F /* LowPass 1000HZ */ - -/* Do not use BW lower than 7813, because __fls cannot be call for 0 */ -#define BMA2x2_BW_TO_REG(_bw) \ - ((_bw) < 125000 ? \ - BMA2x2_BW_7_81HZ + __fls(((_bw) * 10) / 78125) : \ - BMA2x2_BW_125HZ + __fls((_bw) / 125000)) - -#define BMA2x2_REG_TO_BW(_reg) \ - ((_reg) < BMA2x2_BW_125HZ ? \ - (78125 << ((_reg) - BMA2x2_BW_7_81HZ)) / 10 : \ - 125000 << ((_reg) - BMA2x2_BW_125HZ)) - -#define BMA2x2_MODE_CTRL_ADDR 0x11 -#define BMA2x2_LOW_NOISE_CTRL_ADDR 0x12 -#define BMA2x2_DATA_CTRL_ADDR 0x13 -#define BMA2x2_DATA_HIGH_BW 0x80 -#define BMA2x2_DATA_SHADOW_DIS 0x40 -#define BMA2x2_RST_ADDR 0x14 -#define BMA2x2_CMD_SOFT_RESET 0xb6 - -/* INTERRUPT ADDRESS DEFINITIONS */ -#define BMA2x2_INTR_ENABLE1_ADDR 0x16 -#define BMA2x2_INTR_ENABLE2_ADDR 0x17 -#define BMA2x2_INTR_SLOW_NO_MOTION_ADDR 0x18 -#define BMA2x2_INTR1_PAD_SELECT_ADDR 0x19 -#define BMA2x2_INTR_DATA_SELECT_ADDR 0x1A -#define BMA2x2_INTR2_PAD_SELECT_ADDR 0x1B -#define BMA2x2_INTR_SOURCE_ADDR 0x1E -#define BMA2x2_INTR_SET_ADDR 0x20 -#define BMA2x2_INTR_CTRL_ADDR 0x21 -#define BMA2x2_INTR_CTRL_RST_INT 0x80 - -/* FEATURE ADDRESS DEFINITIONS */ -#define BMA2x2_LOW_DURN_ADDR 0x22 -#define BMA2x2_LOW_THRES_ADDR 0x23 -#define BMA2x2_LOW_HIGH_HYST_ADDR 0x24 -#define BMA2x2_HIGH_DURN_ADDR 0x25 -#define BMA2x2_HIGH_THRES_ADDR 0x26 -#define BMA2x2_SLOPE_DURN_ADDR 0x27 -#define BMA2x2_SLOPE_THRES_ADDR 0x28 -#define BMA2x2_SLOW_NO_MOTION_THRES_ADDR 0x29 -#define BMA2x2_TAP_PARAM_ADDR 0x2A -#define BMA2x2_TAP_THRES_ADDR 0x2B -#define BMA2x2_ORIENT_PARAM_ADDR 0x2C -#define BMA2x2_THETA_BLOCK_ADDR 0x2D -#define BMA2x2_THETA_FLAT_ADDR 0x2E -#define BMA2x2_FLAT_HOLD_TIME_ADDR 0x2F -#define BMA2x2_SELFTEST_ADDR 0x32 -#define BMA2x2_EEPROM_CTRL_ADDR 0x33 -#define BMA2x2_EEPROM_REMAIN_OFF 4 -#define BMA2x2_EEPROM_REMAIN_MSK 0xF0 -#define BMA2x2_EEPROM_LOAD 0x08 -#define BMA2x2_EEPROM_RDY 0x04 -#define BMA2x2_EEPROM_PROG 0x02 -#define BMA2x2_EEPROM_PROG_EN 0x01 -#define BMA2x2_SERIAL_CTRL_ADDR 0x34 - -/* OFFSET ADDRESS DEFINITIONS */ -#define BMA2x2_OFFSET_CTRL_ADDR 0x36 -#define BMA2x2_OFFSET_RESET 0x80 -#define BMA2x2_OFFSET_TRIGGER_OFF 5 -#define BMA2x2_OFFSET_TRIGGER_MASK (0x3 << BMA2x2_OFFSET_TRIGGER_OFF) -#define BMA2x2_OFFSET_CAL_READY 0x10 -#define BMA2x2_OFFSET_CAL_SLOW_X 0x04 -#define BMA2x2_OFFSET_CAL_SLOW_Y 0x02 -#define BMA2x2_OFFSET_CAL_SLOW_Z 0x01 - -#define BMA2x2_OFC_SETTING_ADDR 0x37 -#define BMA2x2_OFC_TARGET_AXIS_OFF 1 -#define BMA2x2_OFC_TARGET_AXIS_LEN 2 -#define BMA2x2_OFC_TARGET_AXIS(_axis) \ - (BMA2x2_OFC_TARGET_AXIS_LEN * (_axis) + BMA2x2_OFC_TARGET_AXIS_OFF) -#define BMA2x2_OFC_TARGET_0G 0 -#define BMA2x2_OFC_TARGET_PLUS_1G 1 -#define BMA2x2_OFC_TARGET_MINUS_1G 2 - -#define BMA2x2_OFFSET_X_AXIS_ADDR 0x38 -#define BMA2x2_OFFSET_Y_AXIS_ADDR 0x39 -#define BMA2x2_OFFSET_Z_AXIS_ADDR 0x3A - -/* GP ADDRESS DEFINITIONS */ -#define BMA2x2_GP0_ADDR 0x3B -#define BMA2x2_GP1_ADDR 0x3C - -/* FIFO ADDRESS DEFINITIONS */ -#define BMA2x2_FIFO_MODE_ADDR 0x3E -#define BMA2x2_FIFO_DATA_OUTPUT_ADDR 0x3F -#define BMA2x2_FIFO_WML_TRIG 0x30 - -/* Sensor resolution in number of bits. This sensor has fixed resolution. */ -#define BMA2x2_RESOLUTION 12 - -#endif /* __CROS_EC_ACCEL_BMA2x2_H */ diff --git a/include/driver/accel_bma2x2_public.h b/include/driver/accel_bma2x2_public.h deleted file mode 100644 index 6b3d366270..0000000000 --- a/include/driver/accel_bma2x2_public.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMA2x2 gsensor module for Chrome EC */ - -#ifndef __CROS_EC_DRIVER_ACCEL_BMA2x2_PUBLIC_H -#define __CROS_EC_DRIVER_ACCEL_BMA2x2_PUBLIC_H - -extern const struct accelgyro_drv bma2x2_accel_drv; - -/* I2C ADDRESS DEFINITIONS */ -/* The following definition of I2C address is used for the following sensors -* BMA253 -* BMA255 -* BMA355 -* BMA280 -* BMA282 -* BMA223 -* BMA254 -* BMA284 -* BMA250E -* BMA222E -*/ -#define BMA2x2_I2C_ADDR1_FLAGS 0x18 -#define BMA2x2_I2C_ADDR2_FLAGS 0x19 - -/* The following definition of I2C address is used for the following sensors -* BMC150 -* BMC056 -* BMC156 -*/ -#define BMA2x2_I2C_ADDR3_FLAGS 0x10 -#define BMA2x2_I2C_ADDR4_FLAGS 0x11 - -/* - * Min and Max sampling frequency in mHz. - * Given BMA255 is polled, we limit max frequency to 125Hz. - * If set to 250Hz, given we can read up to 3ms before the due time - * (see CONFIG_MOTION_MIN_SENSE_WAIT_TIME), we may read too early when - * other sensors are active. - */ -#define BMA255_ACCEL_MIN_FREQ 7810 -#define BMA255_ACCEL_MAX_FREQ \ - MOTION_MAX_SENSOR_FREQUENCY(125000, 15625) - -#endif /* CROS_EC_DRIVER_ACCEL_BMA2x2_PUBLIC_H */ diff --git a/include/driver/accel_lis2dw12_public.h b/include/driver/accel_lis2dw12_public.h deleted file mode 100644 index 565376f319..0000000000 --- a/include/driver/accel_lis2dw12_public.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* LIS2DW12 gsensor module for Chrome EC */ - -#ifndef __CROS_EC_DRIVER_ACCEL_LIS2DW12_PUBLIC_H -#define __CROS_EC_DRIVER_ACCEL_LIS2DW12_PUBLIC_H - -#include "gpio.h" - -extern const struct accelgyro_drv lis2dw12_drv; - -/* I2C ADDRESS DEFINITIONS - * - * 7-bit address is 011000Xb. Where 'X' is determined - * by the voltage on the ADDR pin. - */ -#define LIS2DW12_ADDR0 0x18 -#define LIS2DW12_ADDR1 0x19 - -#define LIS2DWL_ADDR0_FLAGS 0x18 -#define LIS2DWL_ADDR1_FLAGS 0x19 - -#define LIS2DW12_EN_BIT 0x01 -#define LIS2DW12_DIS_BIT 0x00 - -/* Absolute Acc rate. */ -#define LIS2DW12_ODR_MIN_VAL 12500 -#define LIS2DW12_ODR_MAX_VAL \ - MOTION_MAX_SENSOR_FREQUENCY(1600000, LIS2DW12_ODR_MIN_VAL) - -void lis2dw12_interrupt(enum gpio_signal signal); - -#endif /* __CROS_EC_DRIVER_ACCEL_LIS2DW12_PUBLIC_H */ diff --git a/include/driver/accelgyro_bmi160.h b/include/driver/accelgyro_bmi160.h deleted file mode 100644 index c916576130..0000000000 --- a/include/driver/accelgyro_bmi160.h +++ /dev/null @@ -1,394 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMI160 accelerometer and gyro and BMM150 compass module for Chrome EC */ - -#ifndef __CROS_EC_ACCELGYRO_BMI160_H -#define __CROS_EC_ACCELGYRO_BMI160_H - -#include "accelgyro.h" -#include "driver/accelgyro_bmi160_public.h" -#include "mag_bmm150.h" - -#define BMI160_CHIP_ID 0x00 -#define BMI160_CHIP_ID_MAJOR 0xd1 -#define BMI168_CHIP_ID_MAJOR 0xd2 - -#define BMI160_SPEC_ACC_STARTUP_TIME_MS 10 -#define BMI160_SPEC_GYR_STARTUP_TIME_MS 80 -#define BMI160_SPEC_MAG_STARTUP_TIME_MS 60 - - -#define BMI160_ERR_REG 0x02 -#define BMI160_PMU_STATUS 0x03 -#define BMI160_PMU_MAG_OFFSET 0 -#define BMI160_PMU_GYR_OFFSET 2 -#define BMI160_PMU_ACC_OFFSET 4 -#define BMI160_PMU_SENSOR_STATUS(_sensor_type, _val) \ - (((_val) >> (4 - 2 * (_sensor_type))) & 0x3) -#define BMI160_PMU_SUSPEND 0 -#define BMI160_PMU_NORMAL 1 -#define BMI160_PMU_LOW_POWER 2 -#define BMI160_PMU_FAST_STARTUP 3 - -#define BMI160_MAG_X_L_G 0x04 -#define BMI160_MAG_X_H_G 0x05 -#define BMI160_MAG_Y_L_G 0x06 -#define BMI160_MAG_Y_H_G 0x07 -#define BMI160_MAG_Z_L_G 0x08 -#define BMI160_MAG_Z_H_G 0x09 -#define BMI160_RHALL_L_G 0x0a -#define BMI160_RHALL_H_G 0x0b -#define BMI160_GYR_X_L_G 0x0c -#define BMI160_GYR_X_H_G 0x0d -#define BMI160_GYR_Y_L_G 0x0e -#define BMI160_GYR_Y_H_G 0x0f -#define BMI160_GYR_Z_L_G 0x10 -#define BMI160_GYR_Z_H_G 0x11 -#define BMI160_ACC_X_L_G 0x12 -#define BMI160_ACC_X_H_G 0x13 -#define BMI160_ACC_Y_L_G 0x14 -#define BMI160_ACC_Y_H_G 0x15 -#define BMI160_ACC_Z_L_G 0x16 -#define BMI160_ACC_Z_H_G 0x17 - -#define BMI160_SENSORTIME_0 0x18 -#define BMI160_SENSORTIME_1 0x19 -#define BMI160_SENSORTIME_2 0x1a - -#define BMI160_STATUS 0x1b -#define BMI160_POR_DETECTED BIT(0) -#define BMI160_GYR_SLF_TST BIT(1) -#define BMI160_MAG_MAN_OP BIT(2) -#define BMI160_FOC_RDY BIT(3) -#define BMI160_NVM_RDY BIT(4) -#define BMI160_DRDY_MAG BIT(5) -#define BMI160_DRDY_GYR BIT(6) -#define BMI160_DRDY_ACC BIT(7) -#define BMI160_DRDY_OFF(_sensor) (7 - (_sensor)) -#define BMI160_DRDY_MASK(_sensor) (1 << BMI160_DRDY_OFF(_sensor)) - -/* first 2 bytes are the interrupt reasons, next 2 some qualifier */ -#define BMI160_INT_STATUS_0 0x1c -#define BMI160_STEP_INT BIT(0) -#define BMI160_SIGMOT_INT BIT(1) -#define BMI160_ANYM_INT BIT(2) -#define BMI160_PMU_TRIGGER_INT BIT(3) -#define BMI160_D_TAP_INT BIT(4) -#define BMI160_S_TAP_INT BIT(5) -#define BMI160_ORIENT_INT BIT(6) -#define BMI160_FLAT_INT BIT(7) -#define BMI160_ORIENT_XY_MASK 0x30 -#define BMI160_ORIENT_PORTRAIT (0 << 4) -#define BMI160_ORIENT_PORTRAIT_INVERT BIT(4) -#define BMI160_ORIENT_LANDSCAPE (2 << 4) -#define BMI160_ORIENT_LANDSCAPE_INVERT (3 << 4) - - -#define BMI160_INT_STATUS_1 0x1d -#define BMI160_HIGHG_INT (1 << (2 + 8)) -#define BMI160_LOWG_INT (1 << (3 + 8)) -#define BMI160_DRDY_INT (1 << (4 + 8)) -#define BMI160_FFULL_INT (1 << (5 + 8)) -#define BMI160_FWM_INT (1 << (6 + 8)) -#define BMI160_NOMO_INT (1 << (7 + 8)) - -#define BMI160_INT_MASK 0xFFFF - -#define BMI160_INT_STATUS_2 0x1e -#define BMI160_INT_STATUS_3 0x1f -#define BMI160_FIRST_X (1 << (0 + 16)) -#define BMI160_FIRST_Y (1 << (1 + 16)) -#define BMI160_FIRST_Z (1 << (2 + 16)) -#define BMI160_SIGN (1 << (3 + 16)) -#define BMI160_ANYM_OFFSET 0 -#define BMI160_TAP_OFFSET 4 -#define BMI160_HIGH_OFFSET 8 -#define BMI160_INT_INFO(_type, _data) \ -(CONCAT2(BMI160_, _data) << CONCAT3(BMI160_, _type, _OFFSET)) - -#define BMI160_ORIENT_Z (1 << (6 + 24)) -#define BMI160_FLAT (1 << (7 + 24)) - -#define BMI160_TEMPERATURE_0 0x20 -#define BMI160_TEMPERATURE_1 0x21 - - -#define BMI160_FIFO_LENGTH_0 0x22 -#define BMI160_FIFO_LENGTH_1 0x23 -#define BMI160_FIFO_LENGTH_MASK (BIT(11) - 1) -#define BMI160_FIFO_DATA 0x24 - -#define BMI160_ACC_CONF 0x40 -#define BMI160_ACC_BW_OFFSET 4 -#define BMI160_ACC_BW_MASK (0x7 << BMI160_ACC_BW_OFFSET) - -#define BMI160_ACC_RANGE 0x41 -#define BMI160_GSEL_2G 0x03 -#define BMI160_GSEL_4G 0x05 -#define BMI160_GSEL_8G 0x08 -#define BMI160_GSEL_16G 0x0c - -#define BMI160_GYR_CONF 0x42 -#define BMI160_GYR_BW_OFFSET 4 -#define BMI160_GYR_BW_MASK (0x3 << BMI160_GYR_BW_OFFSET) - -#define BMI160_GYR_RANGE 0x43 -#define BMI160_DPS_SEL_2000 0x00 -#define BMI160_DPS_SEL_1000 0x01 -#define BMI160_DPS_SEL_500 0x02 -#define BMI160_DPS_SEL_250 0x03 -#define BMI160_DPS_SEL_125 0x04 - -#define BMI160_MAG_CONF 0x44 - -#define BMI160_FIFO_DOWNS 0x45 -#define BMI160_FIFO_CONFIG_0 0x46 -#define BMI160_FIFO_CONFIG_1 0x47 -#define BMI160_FIFO_TAG_TIME_EN BIT(1) -#define BMI160_FIFO_TAG_INT2_EN BIT(2) -#define BMI160_FIFO_TAG_INT1_EN BIT(3) -#define BMI160_FIFO_HEADER_EN BIT(4) -#define BMI160_FIFO_MAG_EN BIT(5) -#define BMI160_FIFO_ACC_EN BIT(6) -#define BMI160_FIFO_GYR_EN BIT(7) -#define BMI160_FIFO_TARG_INT(_i) CONCAT3(BMI160_FIFO_TAG_INT, _i, _EN) -#define BMI160_FIFO_SENSOR_EN(_sensor) \ - ((_sensor) == MOTIONSENSE_TYPE_ACCEL ? BMI160_FIFO_ACC_EN : \ - ((_sensor) == MOTIONSENSE_TYPE_GYRO ? BMI160_FIFO_GYR_EN : \ - BMI160_FIFO_MAG_EN)) - -#define BMI160_MAG_IF_0 0x4b -#define BMI160_MAG_I2C_ADDRESS BMI160_MAG_IF_0 -#define BMI160_MAG_IF_1 0x4c -#define BMI160_MAG_I2C_CONTROL BMI160_MAG_IF_1 -#define BMI160_MAG_READ_BURST_MASK 3 -#define BMI160_MAG_READ_BURST_1 0 -#define BMI160_MAG_READ_BURST_2 1 -#define BMI160_MAG_READ_BURST_6 2 -#define BMI160_MAG_READ_BURST_8 3 -#define BMI160_MAG_OFFSET_OFF 3 -#define BMI160_MAG_OFFSET_MASK (0xf << BMI160_MAG_OFFSET_OFF) -#define BMI160_MAG_MANUAL_EN BIT(7) - -#define BMI160_MAG_IF_2 0x4d -#define BMI160_MAG_I2C_READ_ADDR BMI160_MAG_IF_2 -#define BMI160_MAG_IF_3 0x4e -#define BMI160_MAG_I2C_WRITE_ADDR BMI160_MAG_IF_3 -#define BMI160_MAG_IF_4 0x4f -#define BMI160_MAG_I2C_WRITE_DATA BMI160_MAG_IF_4 -#define BMI160_MAG_I2C_READ_DATA BMI160_MAG_X_L_G - -#define BMI160_INT_EN_0 0x50 -#define BMI160_INT_ANYMO_X_EN BIT(0) -#define BMI160_INT_ANYMO_Y_EN BIT(1) -#define BMI160_INT_ANYMO_Z_EN BIT(2) -#define BMI160_INT_D_TAP_EN BIT(4) -#define BMI160_INT_S_TAP_EN BIT(5) -#define BMI160_INT_ORIENT_EN BIT(6) -#define BMI160_INT_FLAT_EN BIT(7) -#define BMI160_INT_EN_1 0x51 -#define BMI160_INT_HIGHG_X_EN BIT(0) -#define BMI160_INT_HIGHG_Y_EN BIT(1) -#define BMI160_INT_HIGHG_Z_EN BIT(2) -#define BMI160_INT_LOW_EN BIT(3) -#define BMI160_INT_DRDY_EN BIT(4) -#define BMI160_INT_FFUL_EN BIT(5) -#define BMI160_INT_FWM_EN BIT(6) -#define BMI160_INT_EN_2 0x52 -#define BMI160_INT_NOMOX_EN BIT(0) -#define BMI160_INT_NOMOY_EN BIT(1) -#define BMI160_INT_NOMOZ_EN BIT(2) -#define BMI160_INT_STEP_DET_EN BIT(3) - -#define BMI160_INT_OUT_CTRL 0x53 -#define BMI160_INT_EDGE_CTRL BIT(0) -#define BMI160_INT_LVL_CTRL BIT(1) -#define BMI160_INT_OD BIT(2) -#define BMI160_INT_OUTPUT_EN BIT(3) -#define BMI160_INT1_CTRL_OFFSET 0 -#define BMI160_INT2_CTRL_OFFSET 4 -#define BMI160_INT_CTRL(_i, _bit) \ -(CONCAT2(BMI160_INT_, _bit) << CONCAT3(BMI160_INT, _i, _CTRL_OFFSET)) - -#define BMI160_INT_LATCH 0x54 -#define BMI160_INT1_INPUT_EN BIT(4) -#define BMI160_INT2_INPUT_EN BIT(5) -#define BMI160_LATCH_MASK 0xf -#define BMI160_LATCH_NONE 0 -#define BMI160_LATCH_5MS 5 -#define BMI160_LATCH_FOREVER 0xf - -#define BMI160_INT_MAP_0 0x55 -#define BMI160_INT_LOWG_STEP BIT(0) -#define BMI160_INT_HIGHG BIT(1) -#define BMI160_INT_ANYMOTION BIT(2) -#define BMI160_INT_NOMOTION BIT(3) -#define BMI160_INT_D_TAP BIT(4) -#define BMI160_INT_S_TAP BIT(5) -#define BMI160_INT_ORIENT BIT(6) -#define BMI160_INT_FLAT BIT(7) - -#define BMI160_INT_MAP_1 0x56 -#define BMI160_INT_PMU_TRIG BIT(0) -#define BMI160_INT_FFULL BIT(1) -#define BMI160_INT_FWM BIT(2) -#define BMI160_INT_DRDY BIT(3) -#define BMI160_INT1_MAP_OFFSET 4 -#define BMI160_INT2_MAP_OFFSET 0 -#define BMI160_INT_MAP(_i, _bit) \ -(CONCAT2(BMI160_INT_, _bit) << CONCAT3(BMI160_INT, _i, _MAP_OFFSET)) -#define BMI160_INT_FIFO_MAP BMI160_INT_MAP_1 - -#define BMI160_INT_MAP_2 0x57 - -#define BMI160_INT_MAP_INT_1 BMI160_INT_MAP_0 -#define BMI160_INT_MAP_INT_2 BMI160_INT_MAP_2 -#define BMI160_INT_MAP_REG(_i) CONCAT2(BMI160_INT_MAP_INT_, _i) - -#define BMI160_INT_DATA_0 0x58 -#define BMI160_INT_DATA_1 0x59 - -#define BMI160_INT_LOW_HIGH_0 0x5a -#define BMI160_INT_LOW_HIGH_1 0x5b -#define BMI160_INT_LOW_HIGH_2 0x5c -#define BMI160_INT_LOW_HIGH_3 0x5d -#define BMI160_INT_LOW_HIGH_4 0x5e - -#define BMI160_INT_MOTION_0 0x5f -#define BMI160_INT_MOTION_1 0x60 -/* - * The formula is defined in 2.11.25 (any motion interrupt [1]). - * - * if we want threshold at a (in mg), the register should be x, where - * x * 7.81mg = a, assuming a range of 4G, which is - * x * 4 * 1.953 = a so - * x = a * 1000 / range * 1953 - */ -#define BMI160_MOTION_TH(_s, _mg) \ - (MIN(((_mg) * 1000) / ((_s)->current_range * 1953), 0xff)) -#define BMI160_INT_MOTION_2 0x61 -#define BMI160_INT_MOTION_3 0x62 -#define BMI160_MOTION_NO_MOT_SEL BIT(0) -#define BMI160_MOTION_SIG_MOT_SEL BIT(1) -#define BMI160_MOTION_SKIP_OFF 2 -#define BMI160_MOTION_SKIP_MASK 0x3 -#define BMI160_MOTION_SKIP_TIME(_ms) \ - (MIN(__fls((_ms) / 1500), BMI160_MOTION_SKIP_MASK)) -#define BMI160_MOTION_PROOF_OFF 4 -#define BMI160_MOTION_PROOF_MASK 0x3 -#define BMI160_MOTION_PROOF_TIME(_ms) \ - (MIN(__fls((_ms) / 250), BMI160_MOTION_PROOF_MASK)) - -#define BMI160_INT_TAP_0 0x63 -#define BMI160_TAP_DUR(_s, _ms) \ - ((_ms) <= 250 ? MAX((_ms), 50) / 50 - 1 : \ - (_ms) <= 500 ? 4 + ((_ms) - 250) / 125 : \ - (_ms) < 700 ? 6 : 7) - -#define BMI160_INT_TAP_1 0x64 -#define BMI160_TAP_TH(_s, _mg) \ - (MIN(((_mg) * 1000) / ((_s)->current_range * 31250), 0x1f)) - -#define BMI160_INT_ORIENT_0 0x65 - -/* No hysterisis, theta block, int on slope > 0.2 or axis > 1.5, symmetrical */ -#define BMI160_INT_ORIENT_0_INIT_VAL 0x48 - -#define BMI160_INT_ORIENT_1 0x66 - -/* no axes remap, no int on up/down, no blocking angle */ -#define BMI160_INT_ORIENT_1_INIT_VAL 0x00 - -#define BMI160_INT_FLAT_0 0x67 -#define BMI160_INT_FLAT_1 0x68 - -#define BMI160_FOC_CONF 0x69 -#define BMI160_FOC_GYRO_EN BIT(6) -#define BMI160_FOC_ACC_PLUS_1G 1 -#define BMI160_FOC_ACC_MINUS_1G 2 -#define BMI160_FOC_ACC_0G 3 -#define BMI160_FOC_ACC_Z_OFFSET 0 -#define BMI160_FOC_ACC_Y_OFFSET 2 -#define BMI160_FOC_ACC_X_OFFSET 4 - -#define BMI160_CONF 0x6a -#define BMI160_IF_CONF 0x6b -#define BMI160_IF_MODE_OFF 4 -#define BMI160_IF_MODE_MASK 3 -#define BMI160_IF_MODE_AUTO_OFF 0 -#define BMI160_IF_MODE_I2C_IOS 1 -#define BMI160_IF_MODE_AUTO_I2C 2 - -#define BMI160_PMU_TRIGGER 0x6c -#define BMI160_SELF_TEST 0x6d - -#define BMI160_NV_CONF 0x70 - -#define BMI160_OFFSET_ACC70 0x71 -#define BMI160_OFFSET_GYR70 0x74 -#define BMI160_OFFSET_EN_GYR98 0x77 -#define BMI160_OFFSET_ACC_EN BIT(6) -#define BMI160_OFFSET_GYRO_EN BIT(7) - -#define BMI160_STEP_CNT_0 0x78 -#define BMI160_STEP_CNT_1 0x79 -#define BMI160_STEP_CONF_0 0x7a -#define BMI160_STEP_CONF_1 0x7b - -#define BMI160_CMD_REG 0x7e -#define BMI160_CMD_SOFT_RESET 0xb6 -#define BMI160_CMD_NOOP 0x00 -#define BMI160_CMD_START_FOC 0x03 -#define BMI160_CMD_ACC_MODE_OFFSET 0x10 -#define BMI160_CMD_ACC_MODE_SUSP 0x10 -#define BMI160_CMD_ACC_MODE_NORMAL 0x11 -#define BMI160_CMD_ACC_MODE_LOWPOWER 0x12 -#define BMI160_CMD_GYR_MODE_SUSP 0x14 -#define BMI160_CMD_GYR_MODE_NORMAL 0x15 -#define BMI160_CMD_GYR_MODE_FAST_STARTUP 0x17 -#define BMI160_CMD_MAG_MODE_SUSP 0x18 -#define BMI160_CMD_MAG_MODE_NORMAL 0x19 -#define BMI160_CMD_MAG_MODE_LOWPOWER 0x1a -#define BMI160_CMD_MODE_SUSPEND(_sensor_type) \ - (BMI160_CMD_ACC_MODE_OFFSET | (_sensor_type) << 2 | BMI160_PMU_SUSPEND) -#define BMI160_CMD_MODE_NORMAL(_sensor_type) \ - (BMI160_CMD_ACC_MODE_OFFSET | (_sensor_type) << 2 | BMI160_PMU_NORMAL) - -#define BMI160_CMD_FIFO_FLUSH 0xb0 -#define BMI160_CMD_INT_RESET 0xb1 -#define BMI160_CMD_SOFT_RESET 0xb6 -#define BMI160_CMD_EXT_MODE_EN_B0 0x37 -#define BMI160_CMD_EXT_MODE_EN_B1 0x9a -#define BMI160_CMD_EXT_MODE_EN_B2 0xc0 - -#define BMI160_CMD_EXT_MODE_ADDR 0x7f -#define BMI160_CMD_PAGING_EN BIT(7) -#define BMI160_CMD_TARGET_PAGE BIT(4) -#define BMI160_COM_C_TRIM_ADDR 0x85 -#define BMI160_COM_C_TRIM (3 << 4) - -#define BMI160_CMD_TGT_PAGE 0 -#define BMI160_CMD_TGT_PAGE_COM 1 -#define BMI160_CMD_TGT_PAGE_ACC 2 -#define BMI160_CMD_TGT_PAGE_GYR 3 - -#define BMI160_FF_FRAME_LEN_TS 4 -#define BMI160_FF_DATA_LEN_ACC 6 -#define BMI160_FF_DATA_LEN_GYR 6 -#define BMI160_FF_DATA_LEN_MAG 8 - -/* Root mean square noise of 100 Hz accelerometer, units: ug */ -#define BMI160_ACCEL_RMS_NOISE_100HZ 1300 - -#ifdef CONFIG_BMI_SEC_I2C -/* Functions to access the secondary device through the accel/gyro. */ -int bmi160_sec_raw_read8(const int port, const uint16_t addr_flags, - const uint8_t reg, int *data_ptr); -int bmi160_sec_raw_write8(const int port, const uint16_t addr_flags, - const uint8_t reg, int data); -#endif - -#endif /* __CROS_EC_ACCELGYRO_BMI160_H */ diff --git a/include/driver/accelgyro_bmi160_public.h b/include/driver/accelgyro_bmi160_public.h deleted file mode 100644 index 6a6890eb84..0000000000 --- a/include/driver/accelgyro_bmi160_public.h +++ /dev/null @@ -1,32 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMI160 accelerometer and gyro for Chrome EC */ - -#ifndef __CROS_EC_DRIVER_ACCELGYRO_BMI160_PUBLIC_H -#define __CROS_EC_DRIVER_ACCELGYRO_BMI160_PUBLIC_H - -/* - * The addr field of motion_sensor support both SPI and I2C: - * This is defined in include/i2c.h and is no longer an 8bit - * address. The 7/10 bit address starts at bit 0 and leaves - * room for a 10 bit address, although we don't currently - * have any 10 bit peripherals. I2C or SPI is indicated by a - * more significant bit - */ - -/* I2C addresses */ -#define BMI160_ADDR0_FLAGS 0x68 - -extern const struct accelgyro_drv bmi160_drv; - -void bmi160_interrupt(enum gpio_signal signal); -int bmi160_get_sensor_temp(int idx, int *temp_ptr); - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_ACCEL -extern struct i2c_stress_test_dev bmi160_i2c_stress_test_dev; -#endif - -#endif /* __CROS_EC_DRIVER_ACCELGYRO_BMI260_PUBLIC_H */ diff --git a/include/driver/accelgyro_bmi260.h b/include/driver/accelgyro_bmi260.h deleted file mode 100644 index 86c05a0697..0000000000 --- a/include/driver/accelgyro_bmi260.h +++ /dev/null @@ -1,328 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMI260 accelerometer and gyro for Chrome EC */ - -#ifndef __CROS_EC_ACCELGYRO_BMI260_H -#define __CROS_EC_ACCELGYRO_BMI260_H - -#include "accelgyro.h" -#include "common.h" -#include "mag_bmm150.h" -#include "driver/accelgyro_bmi260_public.h" - -#define BMI260_CHIP_ID 0x00 -#define BMI260_CHIP_ID_MAJOR 0x27 - -#define BMI260_ERR_REG 0x02 - -#define BMI260_STATUS 0x03 -#define BMI260_AUX_BUSY BIT(2) -#define BMI260_CMD_RDY BIT(4) -#define BMI260_DRDY_AUX BIT(5) -#define BMI260_DRDY_GYR BIT(6) -#define BMI260_DRDY_ACC BIT(7) -#define BMI260_DRDY_OFF(_sensor) (7 - (_sensor)) -#define BMI260_DRDY_MASK(_sensor) (1 << BMI260_DRDY_OFF(_sensor)) - -#define BMI260_AUX_X_L_G 0x04 -#define BMI260_AUX_X_H_G 0x05 -#define BMI260_AUX_Y_L_G 0x06 -#define BMI260_AUX_Y_H_G 0x07 -#define BMI260_AUX_Z_L_G 0x08 -#define BMI260_AUX_Z_H_G 0x09 -#define BMI260_AUX_R_L_G 0x0a -#define BMI260_AUX_R_H_G 0x0b -#define BMI260_ACC_X_L_G 0x0c -#define BMI260_ACC_X_H_G 0x0d -#define BMI260_ACC_Y_L_G 0x0e -#define BMI260_ACC_Y_H_G 0x0f -#define BMI260_ACC_Z_L_G 0x10 -#define BMI260_ACC_Z_H_G 0x11 -#define BMI260_GYR_X_L_G 0x12 -#define BMI260_GYR_X_H_G 0x13 -#define BMI260_GYR_Y_L_G 0x14 -#define BMI260_GYR_Y_H_G 0x15 -#define BMI260_GYR_Z_L_G 0x16 -#define BMI260_GYR_Z_H_G 0x17 - -#define BMI260_SENSORTIME_0 0x18 -#define BMI260_SENSORTIME_1 0x19 -#define BMI260_SENSORTIME_2 0x1a - -#define BMI260_EVENT 0x1b - -/* 2 bytes interrupt reasons*/ -#define BMI260_INT_STATUS_0 0x1c -#define BMI260_SIG_MOTION_OUT BIT(0) -#define BMI260_STEP_COUNTER_OUT BIT(1) -#define BMI260_HIGH_LOW_G_OUT BIT(2) -#define BMI260_TAP_OUT BIT(3) -#define BMI260_FLAT_OUT BIT(4) -#define BMI260_NO_MOTION_OUT BIT(5) -#define BMI260_ANY_MOTION_OUT BIT(6) -#define BMI260_ORIENTATION_OUT BIT(7) - -#define BMI260_INT_STATUS_1 0x1d -#define BMI260_FFULL_INT BIT(0 + 8) -#define BMI260_FWM_INT BIT(1 + 8) -#define BMI260_ERR_INT BIT(2 + 8) -#define BMI260_AUX_DRDY_INT BIT(5 + 8) -#define BMI260_GYR_DRDY_INT BIT(6 + 8) -#define BMI260_ACC_DRDY_INT BIT(7 + 8) - -#define BMI260_INT_MASK 0xFFFF - -#define BMI260_SC_OUT_0 0x1e -#define BMI260_SC_OUT_1 0x1f - -#define BMI260_ORIENT_ACT 0x20 - -#define BMI260_INTERNAL_STATUS 0X21 -#define BMI260_MESSAGE_MASK 0xf -#define BMI260_NOT_INIT 0x00 -#define BMI260_INIT_OK 0x01 -#define BMI260_INIT_ERR 0x02 -#define BMI260_DRV_ERR 0x03 -#define BMI260_SNS_STOP 0x04 -#define BMI260_NVM_ERROR 0x05 -#define BMI260_START_UP_ERROR 0x06 -#define BMI260_COMPAT_ERROR 0x07 - -#define BMI260_TEMPERATURE_0 0x22 -#define BMI260_TEMPERATURE_1 0x23 - -#define BMI260_FIFO_LENGTH_0 0x24 -#define BMI260_FIFO_LENGTH_1 0x25 -#define BMI260_FIFO_LENGTH_MASK (BIT(14) - 1) -#define BMI260_FIFO_DATA 0x26 - -#define BMI260_FEAT_PAGE 0x2f -/* - * The register of feature page should be read/write as 16-bit register - * Otherwise, there can be invalid data - */ -/* Features page 0 */ -#define BMI260_ORIENT_OUT 0x36 -#define BMI260_ORIENT_OUT_PORTRAIT_LANDSCAPE_MASK 3 -#define BMI260_ORIENT_PORTRAIT 0x0 -#define BMI260_ORIENT_LANDSCAPE 0x1 -#define BMI260_ORIENT_PORTRAIT_INVERT 0x2 -#define BMI260_ORIENT_LANDSCAPE_INVERT 0x3 - -/* Features page 1 */ -#define BMI260_GEN_SET_1 0x34 -#define BMI260_GYR_SELF_OFF BIT(9) - -#define BMI260_TAP_1 0x3e -#define BMI260_TAP_1_EN BIT(0) -#define BMI260_TAP_1_SENSITIVITY_OFFSET 1 -#define BMI260_TAP_1_SENSITIVITY_MASK \ - (0x7 << BMI260_TAP_1_SENSITIVITY_OFFSET) - -/* Features page 2 */ -#define BMI260_ORIENT_1 0x30 -#define BMI260_ORIENT_1_EN BIT(0) -#define BMI260_ORIENT_1_UD_EN BIT(1) -#define BMI260_ORIENT_1_MODE_OFFSET 2 -#define BMI260_ORIENT_1_MODE_MASK (0x3 << BMI260_ORIENT_1_MODE_OFFSET) -#define BMI260_ORIENT_1_BLOCK_OFFSET 4 -#define BMI260_ORIENT_1_BLOCK_MASK (0x3 << BMI260_ORIENT_1_BLOCK_OFFSET) -#define BMI260_ORIENT_1_THETA_OFFSET 6 -#define BMI260_ORIENT_1_THETA_MASK \ - ((BIT(6) - 1) << BMI260_ORIENT_1_THETA_OFFSET) - -#define BMI260_ORIENT_2 0x32 -/* hysteresis(10...0) range is 0~1g, default is 128 (0.0625g) */ -#define BMI260_ORIENT_2_HYSTERESIS_MASK (BIT(11) - 1) - -#define BMI260_ACC_CONF 0x40 -#define BMI260_ACC_BW_OFFSET 4 -#define BMI260_ACC_BW_MASK (0x7 << BMI260_ACC_BW_OFFSET) -#define BMI260_FILTER_PERF BIT(7) -#define BMI260_ULP 0x0 -#define BMI260_HP 0x1 - -#define BMI260_ACC_RANGE 0x41 -#define BMI260_GSEL_2G 0x00 -#define BMI260_GSEL_4G 0x01 -#define BMI260_GSEL_8G 0x02 -#define BMI260_GSEL_16G 0x03 - -/* The max positvie value of accel data is 0x7FFF, equal to range(g) */ -/* So, in order to get +1g, divide the 0x7FFF by range */ -#define BMI260_ACC_DATA_PLUS_1G(range) (0x7FFF / (range)) -#define BMI260_ACC_DATA_MINUS_1G(range) (-BMI260_ACC_DATA_PLUS_1G(range)) - -#define BMI260_GYR_CONF 0x42 -#define BMI260_GYR_BW_OFFSET 4 -#define BMI260_GYR_BW_MASK (0x3 << BMI260_GYR_BW_OFFSET) -#define BMI260_GYR_NOISE_PERF BIT(6) - -#define BMI260_GYR_RANGE 0x43 -#define BMI260_DPS_SEL_2000 0x00 -#define BMI260_DPS_SEL_1000 0x01 -#define BMI260_DPS_SEL_500 0x02 -#define BMI260_DPS_SEL_250 0x03 -#define BMI260_DPS_SEL_125 0x04 - -#define BMI260_AUX_CONF 0x44 - -#define BMI260_FIFO_DOWNS 0x45 - -#define BMI260_FIFO_WTM_0 0x46 -#define BMI260_FIFO_WTM_1 0x47 - -#define BMI260_FIFO_CONFIG_0 0x48 -#define BMI260_FIFO_STOP_ON_FULL BIT(0) -#define BMI260_FIFO_TIME_EN BIT(1) - -#define BMI260_FIFO_CONFIG_1 0x49 -#define BMI260_FIFO_TAG_INT1_EN_OFFSET 0 -#define BMI260_FIFO_TAG_INT1_EN_MASK (0x3 << BMI260_FIFO_TAG_INT1_EN_OFFSET) -#define BMI260_FIFO_TAG_INT2_EN_OFFSET 2 -#define BMI260_FIFO_TAG_INT2_EN_MASK (0x3 << BMI260_FIFO_TAG_INT2_EN_OFFSET) -#define BMI260_FIFO_TAG_INT_EDGE 0x0 -#define BMI260_FIFO_TAG_INT_LEVEL 0x1 -#define BMI260_FIFO_TAG_ACC_SAT 0x2 -#define BMI260_FIFO_TAG_GYR_SAT 0x3 -#define BMI260_FIFO_HEADER_EN BIT(4) -#define BMI260_FIFO_AUX_EN BIT(5) -#define BMI260_FIFO_ACC_EN BIT(6) -#define BMI260_FIFO_GYR_EN BIT(7) -#define BMI260_FIFO_SENSOR_EN(_sensor) \ - ((_sensor) == MOTIONSENSE_TYPE_ACCEL ? BMI260_FIFO_ACC_EN : \ - ((_sensor) == MOTIONSENSE_TYPE_GYRO ? BMI260_FIFO_GYR_EN : \ - BMI260_FIFO_AUX_EN)) - -#define BMI260_SATURATION 0x4a - -#define BMI260_AUX_DEV_ID 0x4b -#define BMI260_AUX_I2C_ADDRESS BMI260_AUX_DEV_ID - -#define BMI260_AUX_IF_CONF 0x4c -#define BMI260_AUX_I2C_CONTROL BMI260_AUX_IF_CONF -#define BMI260_AUX_READ_BURST_MASK 3 -#define BMI260_AUX_MAN_READ_BURST_OFF 2 -#define BMI260_AUX_MAN_READ_BURST_MASK (0x3 << BMI280_AUX_MAN_READ_BURST_OFF) -#define BMI260_AUX_READ_BURST_1 0 -#define BMI260_AUX_READ_BURST_2 1 -#define BMI260_AUX_READ_BURST_6 2 -#define BMI260_AUX_READ_BURST_8 3 -#define BMI260_AUX_FCU_WRITE_EN BIT(6) -#define BMI260_AUX_MANUAL_EN BIT(7) - -#define BMI260_AUX_RD_ADDR 0x4d -#define BMI260_AUX_I2C_READ_ADDR BMI260_AUX_RD_ADDR -#define BMI260_AUX_WR_ADDR 0x4e -#define BMI260_AUX_I2C_WRITE_ADDR BMI260_AUX_WR_ADDR -#define BMI260_AUX_WR_DATA 0x4f -#define BMI260_AUX_I2C_WRITE_DATA BMI260_AUX_WR_DATA -#define BMI260_AUX_I2C_READ_DATA BMI260_AUX_X_L_G - -#define BMI260_ERR_REG_MSK 0x52 -#define BMI260_FATAL_ERR BIT(0) -#define BMI260_INTERNAL_ERR_OFF 1 -#define BMI260_INTERNAL_ERR_MASK (0xf << BMI260_INTERNAL_ERR_OFF) -#define BMI260_FIFO_ERR BIT(6) -#define BMI260_AUX_ERR BIT(7) - -#define BMI260_INT1_IO_CTRL 0x53 -#define BMI260_INT1_LVL BIT(1) -#define BMI260_INT1_OD BIT(2) -#define BMI260_INT1_OUTPUT_EN BIT(3) -#define BMI260_INT1_INPUT_EN BIT(4) - -#define BMI260_INT2_IO_CTRL 0x54 -#define BMI260_INT2_LVL BIT(1) -#define BMI260_INT2_OD BIT(2) -#define BMI260_INT2_OUTPUT_EN BIT(3) -#define BMI260_INT2_INPUT_EN BIT(4) - -#define BMI260_INT_LATCH 0x55 -#define BMI260_INT_LATCH_EN BIT(0) - -#define BMI260_INT1_MAP_FEAT 0x56 -#define BMI260_INT2_MAP_FEAT 0x57 -#define BMI260_MAP_SIG_MOTION_OUT BIT(0) -#define BMI260_MAP_STEP_COUNTER_OUT BIT(1) -#define BMI260_MAP_HIGH_LOW_G_OUT BIT(2) -#define BMI260_MAP_TAP_OUT BIT(3) -#define BMI260_MAP_FLAT_OUT BIT(4) -#define BMI260_MAP_NO_MOTION_OUT BIT(5) -#define BMI260_MAP_ANY_MOTION_OUT BIT(6) -#define BMI260_MAP_ORIENTAION_OUT BIT(7) - -#define BMI260_INT_MAP_DATA 0x58 -#define BMI260_MAP_FFULL_INT BIT(0) -#define BMI260_MAP_FWM_INT BIT(1) -#define BMI260_MAP_DRDY_INT BIT(2) -#define BMI260_MAP_ERR_INT BIT(3) -#define BMI260_INT_MAP_DATA_INT1_OFFSET 0 -#define BMI260_INT_MAP_DATA_INT2_OFFSET 4 -#define BMI260_INT_MAP_DATA_REG(_i, _bit) \ - (CONCAT3(BMI260_MAP_, _bit, _INT) << \ - CONCAT3(BMI260_INT_MAP_DATA_INT, _i, _OFFSET)) - -#define BMI260_INIT_CTRL 0x59 -#define BMI260_INIT_ADDR_0 0x5b -#define BMI260_INIT_ADDR_1 0x5c -#define BMI260_INIT_DATA 0x5e -#define BMI260_INTERNAL_ERROR 0x5f -#define BMI260_INT_ERR_1 BIT(1) -#define BMI260_INT_ERR_2 BIT(2) -#define BMI260_FEAT_ENG_DISABLED BIT(4) - -#define BMI260_AUX_IF_TRIM 0x68 -#define BMI260_GYR_CRT_CONF 0x69 - -#define BMI260_NVM_CONF 0x6a -#define BMI260_NVM_PROG_EN BIT(1) - -#define BMI260_IF_CONF 0x6b -#define BMI260_IF_SPI3 BIT(0) -#define BMI260_IF_SPI3_OIS BIT(1) -#define BMI260_IF_OIS_EN BIT(4) -#define BMI260_IF_AUX_EN BIT(5) - -#define BMI260_DRV 0x6c -#define BMI260_ACC_SELF_TEST 0x6d - -#define BMI260_GYR_SELF_TEST_AXES 0x6e - -#define BMI260_NV_CONF 0x70 -#define BMI260_ACC_OFFSET_EN BIT(3) - -#define BMI260_OFFSET_ACC70 0x71 -#define BMI260_OFFSET_GYR70 0x74 -#define BMI260_OFFSET_EN_GYR98 0x77 -#define BMI260_OFFSET_GYRO_EN BIT(6) -#define BMI260_GYR_GAIN_EN BIT(7) - -#define BMI260_PWR_CONF 0x7c -#define BMI260_ADV_POWER_SAVE BIT(0) -#define BMI260_FIFO_SELF_WAKE_UP BIT(1) -#define BMI260_FUP_EN BIT(2) - -#define BMI260_PWR_CTRL 0x7d -#define BMI260_AUX_EN BIT(0) -#define BMI260_GYR_EN BIT(1) -#define BMI260_ACC_EN BIT(2) -#define BMI260_PWR_EN(_sensor_type) BIT(2 - _sensor_type) -#define BMI260_TEMP_EN BIT(3) - -#define BMI260_CMD_REG 0x7e -#define BMI260_CMD_FIFO_FLUSH 0xb0 -#define BMI260_CMD_SOFT_RESET 0xb6 - -#define BMI260_FF_FRAME_LEN_TS 4 -#define BMI260_FF_DATA_LEN_ACC 6 -#define BMI260_FF_DATA_LEN_GYR 6 -#define BMI260_FF_DATA_LEN_MAG 8 - -/* Root mean square noise of 100Hz accelerometer, units: ug */ -#define BMI260_ACCEL_RMS_NOISE_100HZ 1060 - -#endif /* __CROS_EC_ACCELGYRO_BMI260_H */ diff --git a/include/driver/accelgyro_bmi260_public.h b/include/driver/accelgyro_bmi260_public.h deleted file mode 100644 index 9b93ef65ae..0000000000 --- a/include/driver/accelgyro_bmi260_public.h +++ /dev/null @@ -1,31 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* BMI260 accelerometer and gyro for Chrome EC */ - -#ifndef __CROS_EC_DRIVER_ACCELGYRO_BMI260_PUBLIC_H -#define __CROS_EC_DRIVER_ACCELGYRO_BMI260_PUBLIC_H - -/* - * The addr field of motion_sensor support both SPI and I2C: - * This is defined in include/i2c.h and is no longer an 8bit - * address. The 7/10 bit address starts at bit 0 and leaves - * room for a 10 bit address, although we don't currently - * have any 10 bit peripherals. I2C or SPI is indicated by a - * more significant bit - */ - -/* I2C addresses */ -#define BMI260_ADDR0_FLAGS 0x68 - -extern const struct accelgyro_drv bmi260_drv; - -void bmi260_interrupt(enum gpio_signal signal); - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_ACCEL -extern struct i2c_stress_test_dev bmi260_i2c_stress_test_dev; -#endif - -#endif /* __CROS_EC_DRIVER_ACCELGYRO_BMI260_PUBLIC_H */ diff --git a/include/driver/accelgyro_bmi_common.h b/include/driver/accelgyro_bmi_common.h deleted file mode 100644 index 6e1ed122b3..0000000000 --- a/include/driver/accelgyro_bmi_common.h +++ /dev/null @@ -1,319 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* BMI accelerometer and gyro common definitions for Chrome EC */ - -#ifndef __CROS_EC_ACCELGYRO_BMI_COMMON_H -#define __CROS_EC_ACCELGYRO_BMI_COMMON_H - -#include "accelgyro.h" -#include "accelgyro_bmi160.h" -#include "accelgyro_bmi260.h" -#include "mag_bmm150.h" -#include "accelgyro_bmi_common_public.h" - -#if !defined(CONFIG_ACCELGYRO_BMI_COMM_SPI) && \ - !defined(CONFIG_ACCELGYRO_BMI_COMM_I2C) -#error "BMI must use either SPI or I2C communication" -#endif - -#define BMI_CONF_REG(_sensor) (0x40 + 2 * (_sensor)) -#define BMI_RANGE_REG(_sensor) (0x41 + 2 * (_sensor)) - -#define BMI_ODR_MASK 0x0F -/* odr = 100 / (1 << (8 - reg)) , within limit */ -#define BMI_ODR_0_78HZ 0x01 -#define BMI_ODR_100HZ 0x08 - -#define BMI_REG_TO_ODR(_regval) \ - ((_regval) < BMI_ODR_100HZ ? 100000 / (1 << (8 - (_regval))) : \ - 100000 * (1 << ((_regval) - 8))) -#define BMI_ODR_TO_REG(_odr) \ - ((_odr) < 100000 ? (__builtin_clz(100000 / ((_odr) + 1)) - 24) : \ - (39 - __builtin_clz((_odr) / 100000))) - -enum fifo_header { - BMI_FH_EMPTY = 0x80, - BMI_FH_SKIP = 0x40, - BMI_FH_TIME = 0x44, - BMI_FH_CONFIG = 0x48 -}; - -#define BMI_FH_MODE_MASK 0xc0 -#define BMI_FH_PARM_OFFSET 2 -#define BMI_FH_PARM_MASK (0x7 << BMI_FH_PARM_OFFSET) -#define BMI_FH_EXT_MASK 0x03 - -/* Sensor resolution in number of bits. This sensor has fixed resolution. */ -#define BMI_RESOLUTION 16 -/* Min and Max sampling frequency in mHz */ -#define BMI_ACCEL_MIN_FREQ 12500 -#define BMI_ACCEL_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(1600000, 100000) -#define BMI_GYRO_MIN_FREQ 25000 -#define BMI_GYRO_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(3200000, 100000) - -enum bmi_running_mode { - STANDARD_UI_9DOF_FIFO = 0, - STANDARD_UI_IMU_FIFO = 1, - STANDARD_UI_IMU = 2, - STANDARD_UI_ADVANCEPOWERSAVE = 3, - ACCEL_PEDOMETER = 4, - APPLICATION_HEAD_TRACKING = 5, - APPLICATION_NAVIGATION = 6, - APPLICATION_REMOTE_CONTROL = 7, - APPLICATION_INDOOR_NAVIGATION = 8, -}; - -#define BMI_FLAG_SEC_I2C_ENABLED BIT(0) -#define BMI_FIFO_FLAG_OFFSET 4 -#define BMI_FIFO_ALL_MASK 7 - -#define BMI_GET_DATA(_s) \ - ((struct bmi_drv_data_t *)(_s)->drv_data) -#define BMI_GET_SAVED_DATA(_s) \ - (&BMI_GET_DATA(_s)->saved_data[(_s)->type]) - -#define BMI_ACC_DATA(v) (BMI160_ACC_X_L_G + \ - (v) * (BMI260_ACC_X_L_G - BMI160_ACC_X_L_G)) -#define BMI_GYR_DATA(v) (BMI160_GYR_X_L_G + \ - (v) * (BMI260_GYR_X_L_G - BMI160_GYR_X_L_G)) -#define BMI_AUX_DATA(v) (BMI160_MAG_X_L_G + \ - (v) * (BMI260_AUX_X_L_G - BMI160_MAG_X_L_G)) - -#define BMI_FIFO_CONFIG_0(v) (BMI160_FIFO_CONFIG_0 + \ - (v) * (BMI260_FIFO_CONFIG_0 - BMI160_FIFO_CONFIG_0)) -#define BMI_FIFO_CONFIG_1(v) (BMI160_FIFO_CONFIG_1 + \ - (v) * (BMI260_FIFO_CONFIG_1 - BMI160_FIFO_CONFIG_1)) -#define BMI_FIFO_SENSOR_EN(v, _sensor) (BMI160_FIFO_SENSOR_EN(_sensor) + \ - (v) * (BMI260_FIFO_SENSOR_EN(_sensor) - BMI160_FIFO_SENSOR_EN(_sensor))) - -#define BMI_TEMPERATURE_0(v) (BMI160_TEMPERATURE_0 + \ - (v) * (BMI260_TEMPERATURE_0 - BMI160_TEMPERATURE_0)) -#define BMI_INVALID_TEMP 0x8000 - -#define BMI_STATUS(v) (BMI160_STATUS + \ - (v) * (BMI260_STATUS - BMI160_STATUS)) -#define BMI_DRDY_OFF(_sensor) (7 - (_sensor)) -#define BMI_DRDY_MASK(_sensor) (1 << BMI160_DRDY_OFF(_sensor)) - -#define BMI_OFFSET_ACC70(v) (BMI160_OFFSET_ACC70 + \ - (v) * (BMI260_OFFSET_ACC70 - BMI160_OFFSET_ACC70)) -#define BMI_OFFSET_GYR70(v) (BMI160_OFFSET_GYR70 + \ - (v) * (BMI260_OFFSET_GYR70 - BMI160_OFFSET_GYR70)) -/* - * There is some bits in this register that differ between BMI160 and BMI260 - * Only use this macro for gyro offset 9:8 (BMI_OFFSET_EN_GYR98 5:0). - */ -#define BMI_OFFSET_EN_GYR98(v) (BMI160_OFFSET_EN_GYR98 + \ - (v) * (BMI260_OFFSET_EN_GYR98 - BMI160_OFFSET_EN_GYR98)) -#define BMI_OFFSET_GYR98_MASK (BIT(6) - 1) -#define BMI_OFFSET_ACC_MULTI_MG (3900 * 1024) -#define BMI_OFFSET_ACC_DIV_MG 1000000 -#define BMI_OFFSET_GYRO_MULTI_MDS (61 * 1024) -#define BMI_OFFSET_GYRO_DIV_MDS 1000 - -#define BMI_FIFO_LENGTH_0(v) (BMI160_FIFO_LENGTH_0 + \ - (v) * (BMI260_FIFO_LENGTH_0 - BMI160_FIFO_LENGTH_0)) -#define BMI_FIFO_LENGTH_MASK(v) (BMI160_FIFO_LENGTH_MASK + \ - (v) * (BMI260_FIFO_LENGTH_MASK - BMI160_FIFO_LENGTH_MASK)) -#define BMI_FIFO_DATA(v) (BMI160_FIFO_DATA + \ - (v) * (BMI260_FIFO_DATA - BMI160_FIFO_DATA)) - -#define BMI_CMD_REG(v) (BMI160_CMD_REG + \ - (v) * (BMI260_CMD_REG - BMI160_CMD_REG)) -#define BMI_CMD_FIFO_FLUSH 0xb0 - -#define BMI_ACCEL_RMS_NOISE_100HZ(v) (BMI160_ACCEL_RMS_NOISE_100HZ + \ - (v) * (BMI260_ACCEL_RMS_NOISE_100HZ - BMI160_ACCEL_RMS_NOISE_100HZ)) -#define BMI_ACCEL_100HZ 100 - -/* - * Struct for pairing an engineering value with the register value for a - * parameter. - */ -struct bmi_accel_param_pair { - int val; /* Value in engineering units. */ - int reg_val; /* Corresponding register value. */ -}; - -int bmi_get_xyz_reg(const struct motion_sensor_t *s); - -/** - * @param type Accel/Gyro - * @param psize Size of the table - * - * @return Range table of the type. - */ -const struct bmi_accel_param_pair *bmi_get_range_table( - const struct motion_sensor_t *s, int *psize); - -/** - * @return reg value that matches the given engineering value passed in. - * The round_up flag is used to specify whether to round up or down. - * Note, this function always returns a valid reg value. If the request is - * outside the range of values, it returns the closest valid reg value. - */ -int bmi_get_reg_val(const int eng_val, const int round_up, - const struct bmi_accel_param_pair *pairs, - const int size); - -/** - * @return engineering value that matches the given reg val - */ -int bmi_get_engineering_val(const int reg_val, - const struct bmi_accel_param_pair *pairs, - const int size); - -/** - * Read 8bit register from accelerometer. - */ -int bmi_read8(const int port, const uint16_t i2c_spi_addr_flags, - const int reg, int *data_ptr); - -/** - * Write 8bit register from accelerometer. - */ -int bmi_write8(const int port, const uint16_t i2c_spi_addr_flags, - const int reg, int data); - -/** - * Read 16bit register from accelerometer. - */ -int bmi_read16(const int port, const uint16_t i2c_spi_addr_flags, - const uint8_t reg, int *data_ptr); - -/** - * Write 16bit register from accelerometer. - */ -int bmi_write16(const int port, const uint16_t i2c_spi_addr_flags, - const int reg, int data); - -/** - * Read 32bit register from accelerometer. - */ -int bmi_read32(const int port, const uint16_t i2c_spi_addr_flags, - const uint8_t reg, int *data_ptr); - -/** - * Read n bytes from accelerometer. - */ -int bmi_read_n(const int port, const uint16_t i2c_spi_addr_flags, - const uint8_t reg, uint8_t *data_ptr, const int len); - -/** - * Write n bytes from accelerometer. - */ -int bmi_write_n(const int port, const uint16_t i2c_spi_addr_flags, - const uint8_t reg, const uint8_t *data_ptr, const int len); - -/* - * Enable/Disable specific bit set of a 8-bit reg. - */ -int bmi_enable_reg8(const struct motion_sensor_t *s, - int reg, uint8_t bits, int enable); - -/* - * Set specific bit set to certain value of a 8-bit reg. - */ -int bmi_set_reg8(const struct motion_sensor_t *s, int reg, - uint8_t bits, int mask); - -/* - * @s: base sensor. - * @v: output vector. - * @input: 6-bits array input. - */ -void bmi_normalize(const struct motion_sensor_t *s, intv3_t v, uint8_t *input); - -/* - * Decode the header from the fifo. - * Return 0 if we need further processing. - * Sensor mutex must be held during processing, to protect the fifos. - * - * @accel: base sensor - * @hdr: the header to decode - * @last_ts: the last timestamp of fifo interrupt. - * @bp: current pointer in the buffer, updated when processing the header. - * @ep: pointer to the end of the valid data in the buffer. - */ -int bmi_decode_header(struct motion_sensor_t *accel, - enum fifo_header hdr, uint32_t last_ts, - uint8_t **bp, uint8_t *ep); -/** - * Retrieve hardware FIFO from sensor, - * - put data in Sensor Hub fifo. - * - update sensor raw_xyz vector with the last information. - * We put raw data in hub fifo and process data from there. - * @s: Pointer to sensor data. - * @last_ts: The last timestamp of fifo interrupt. - * - * Read only up to bmi_buffer. If more reads are needed, we will be called - * again by the interrupt routine. - * - * NOTE: If a new driver supports this function, be sure to add a check - * for spoof_mode in order to load the sensor stack with the spoofed - * data. See accelgyro_bmi260.c::load_fifo for an example. - */ -int bmi_load_fifo(struct motion_sensor_t *s, uint32_t last_ts); - -int bmi_set_range(struct motion_sensor_t *s, int range, int rnd); - -int bmi_get_data_rate(const struct motion_sensor_t *s); - - -int bmi_get_offset(const struct motion_sensor_t *s, - int16_t *offset, int16_t *temp); - -int bmi_get_resolution(const struct motion_sensor_t *s); - -#ifdef CONFIG_BODY_DETECTION -int bmi_get_rms_noise(const struct motion_sensor_t *s); -#endif - -int bmi_set_scale(const struct motion_sensor_t *s, - const uint16_t *scale, int16_t temp); - -int bmi_get_scale(const struct motion_sensor_t *s, - uint16_t *scale, int16_t *temp); - -/* Start/Stop the FIFO collecting events */ -int bmi_enable_fifo(const struct motion_sensor_t *s, int enable); - -/* Read the xyz data of accel/gyro */ -int bmi_read(const struct motion_sensor_t *s, intv3_t v); - -/* Read temperature of sensor s */ -int bmi_read_temp(const struct motion_sensor_t *s, int *temp_ptr); - -/* Read temperature of sensor idx */ -int bmi_get_sensor_temp(int idx, int *temp_ptr); - -/* - * Get the normalized rate according to input rate and input rnd - * @rate: input rate - * @rnd: round up - * @normalized_rate_ptr: normalized rate pointer for output - * @reg_val_ptr: pointer to the actual register value of normalized rate for - * output. - */ -int bmi_get_normalized_rate(const struct motion_sensor_t *s, int rate, int rnd, - int *normalized_rate_ptr, uint8_t *reg_val_ptr); - -/* Get the accelerometer offset */ -int bmi_accel_get_offset(const struct motion_sensor_t *accel, intv3_t v); - -/* Get the gyroscope offset */ -int bmi_gyro_get_offset(const struct motion_sensor_t *gyro, intv3_t v); - -/* Set the accelerometer offset */ -int bmi_set_accel_offset(const struct motion_sensor_t *accel, intv3_t v); - -/* Set the gyroscope offset */ -int bmi_set_gyro_offset(const struct motion_sensor_t *gyro, intv3_t v, - int *val98_ptr); - -int bmi_list_activities(const struct motion_sensor_t *s, - uint32_t *enabled, - uint32_t *disabled); -#endif /* __CROS_EC_ACCELGYRO_BMI_COMMON_H */ diff --git a/include/driver/accelgyro_bmi_common_public.h b/include/driver/accelgyro_bmi_common_public.h deleted file mode 100644 index 52814c71bf..0000000000 --- a/include/driver/accelgyro_bmi_common_public.h +++ /dev/null @@ -1,32 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* BMI accelerometer and gyro common definitions for Chrome EC */ - -#ifndef __CROS_EC_DRIVER_ACCELGYRO_BMI_COMMON_PUBLIC_H -#define __CROS_EC_DRIVER_ACCELGYRO_BMI_COMMON_PUBLIC_H - -/* Min and Max sampling frequency in mHz */ -#define BMI_ACCEL_MIN_FREQ 12500 -#define BMI_ACCEL_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(1600000, 100000) -#define BMI_GYRO_MIN_FREQ 25000 -#define BMI_GYRO_MAX_FREQ MOTION_MAX_SENSOR_FREQUENCY(3200000, 100000) - -struct bmi_drv_data_t { - struct accelgyro_saved_data_t saved_data[3]; - uint8_t flags; - uint8_t enabled_activities; - uint8_t disabled_activities; -#ifdef CONFIG_MAG_BMI_BMM150 - struct bmm150_private_data compass; -#endif -#ifdef CONFIG_BMI_ORIENTATION_SENSOR - uint8_t raw_orientation; - enum motionsensor_orientation orientation; - enum motionsensor_orientation last_orientation; -#endif - -}; - -#endif /* __CROS_EC_DRIVER_ACCELGYRO_BMI_COMMON_PUBLIC_H */ diff --git a/include/driver/als_tcs3400.h b/include/driver/als_tcs3400.h deleted file mode 100644 index 0078b90442..0000000000 --- a/include/driver/als_tcs3400.h +++ /dev/null @@ -1,122 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * AMS TCS3400 light sensor driver - */ - -#ifndef __CROS_EC_ALS_TCS3400_H -#define __CROS_EC_ALS_TCS3400_H - -#include "driver/als_tcs3400_public.h" - -/* ID for TCS34001 and TCS34005 */ -#define TCS340015_DEVICE_ID 0x90 - -/* ID for TCS34003 and TCS34007 */ -#define TCS340037_DEVICE_ID 0x93 - -/* Register Map */ -#define TCS_I2C_ENABLE 0x80 /* R/W Enables states and interrupts */ -#define TCS_I2C_ATIME 0x81 /* R/W RGBC integration time */ -#define TCS_I2C_WTIME 0x83 /* R/W Wait time */ -#define TCS_I2C_AILTL 0x84 /* R/W Clear irq low threshold low byte */ -#define TCS_I2C_AILTH 0x85 /* R/W Clear irq low threshold high byte */ -#define TCS_I2C_AIHTL 0x86 /* R/W Clear irq high threshold low byte */ -#define TCS_I2C_AIHTH 0x87 /* R/W Clear irq high threshold high byte */ -#define TCS_I2C_PERS 0x8C /* R/W Interrupt persistence filter */ -#define TCS_I2C_CONFIG 0x8D /* R/W Configuration */ -#define TCS_I2C_CONTROL 0x8F /* R/W Gain control register */ -#define TCS_I2C_AUX 0x90 /* R/W Auxiliary control register */ -#define TCS_I2C_REVID 0x91 /* R Revision ID */ -#define TCS_I2C_ID 0x92 /* R Device ID */ -#define TCS_I2C_STATUS 0x93 /* R Device status */ -#define TCS_I2C_CDATAL 0x94 /* R Clear / IR channel low data register */ -#define TCS_I2C_CDATAH 0x95 /* R Clear / IR channel high data register */ -#define TCS_I2C_RDATAL 0x96 /* R Red ADC low data register */ -#define TCS_I2C_RDATAH 0x97 /* R Red ADC high data register */ -#define TCS_I2C_GDATAL 0x98 /* R Green ADC low data register */ -#define TCS_I2C_GDATAH 0x99 /* R Green ADC high data register */ -#define TCS_I2C_BDATAL 0x9A /* R Blue ADC low data register */ -#define TCS_I2C_BDATAH 0x9B /* R Blue ADC high data register */ -#define TCS_I2C_IR 0xC0 /* R/W Access IR Channel */ -#define TCS_I2C_IFORCE 0xE4 /* W Force Interrupt */ -#define TCS_I2C_CICLEAR 0xE6 /* W Clear channel interrupt clear */ -#define TCS_I2C_AICLEAR 0xE7 /* W Clear all interrupts */ - -#define TCS_I2C_ENABLE_POWER_ON BIT(0) -#define TCS_I2C_ENABLE_ADC_ENABLE BIT(1) -#define TCS_I2C_ENABLE_WAIT_ENABLE BIT(3) -#define TCS_I2C_ENABLE_INT_ENABLE BIT(4) -#define TCS_I2C_ENABLE_SLEEP_AFTER_INT BIT(6) -#define TCS_I2C_ENABLE_MASK (TCS_I2C_ENABLE_POWER_ON | \ - TCS_I2C_ENABLE_ADC_ENABLE | \ - TCS_I2C_ENABLE_WAIT_ENABLE | \ - TCS_I2C_ENABLE_INT_ENABLE | \ - TCS_I2C_ENABLE_SLEEP_AFTER_INT) - -enum tcs3400_mode { - TCS3400_MODE_SUSPEND = 0, - TCS3400_MODE_IDLE = (TCS_I2C_ENABLE_POWER_ON | - TCS_I2C_ENABLE_ADC_ENABLE), - TCS3400_MODE_COLLECTING = (TCS_I2C_ENABLE_POWER_ON | - TCS_I2C_ENABLE_ADC_ENABLE | - TCS_I2C_ENABLE_INT_ENABLE), -}; - -#define TCS_I2C_CONTROL_MASK 0x03 -#define TCS_I2C_STATUS_RGBC_VALID BIT(0) -#define TCS_I2C_STATUS_ALS_IRQ BIT(4) -#define TCS_I2C_STATUS_ALS_SATURATED BIT(7) - -#define TCS_I2C_AUX_ASL_INT_ENABLE BIT(5) - -/* Light data resides at 0x94 thru 0x98 */ -#define TCS_DATA_START_LOCATION TCS_I2C_CDATAL -#define TCS_CLEAR_DATA_SIZE 2 -#define TCS_RGBC_DATA_SIZE 8 - -#define TCS3400_DRV_DATA(_s) ((struct als_drv_data_t *)(_s)->drv_data) -#define TCS3400_RGB_DRV_DATA(_s) \ - ((struct tcs3400_rgb_drv_data_t *)(_s)->drv_data) - -/* - * Factor to multiply light value by to determine if an increase in gain - * would cause the next value to saturate. - * - * On the TCS3400, gain increases 4x each time again register setting is - * incremented. However, I see cases where values that are 24% of saturation - * go into saturation after increasing gain, causing a back-and-forth cycle to - * occur : - * - * [134.654994 tcs3400_adjust_sensor_for_saturation value=65535 100% Gain=2 ] - * [135.655064 tcs3400_adjust_sensor_for_saturation value=15750 24% Gain=1 ] - * [136.655107 tcs3400_adjust_sensor_for_saturation value=65535 100% Gain=2 ] - * - * To avoid this, we require value to be <= 20% of saturation level - * (TCS_GAIN_SAT_LEVEL) before allowing gain to be increased. - */ -#define TCS_GAIN_ADJUST_FACTOR 5 -#define TCS_GAIN_SAT_LEVEL (TCS_SATURATION_LEVEL / TCS_GAIN_ADJUST_FACTOR) -#define TCS_UPSHIFT_FACTOR_N 25 /* upshift factor = 2.5 */ -#define TCS_UPSHIFT_FACTOR_D 10 -#define TCS_GAIN_UPSHIFT_LEVEL (TCS_SATURATION_LEVEL * TCS_UPSHIFT_FACTOR_D \ - / TCS_UPSHIFT_FACTOR_N) - -/* - * Percentage of saturation level that the auto-adjusting anti-saturation - * method will drive towards. - */ -#define TSC_SATURATION_LOW_BAND_PERCENT 90 -#define TSC_SATURATION_LOW_BAND_LEVEL (TCS_SATURATION_LEVEL * \ - TSC_SATURATION_LOW_BAND_PERCENT / 100) - -enum crbg_index { - CLEAR_CRGB_IDX = 0, - RED_CRGB_IDX, - GREEN_CRGB_IDX, - BLUE_CRGB_IDX, - CRGB_COUNT, -}; - -#endif /* __CROS_EC_ALS_TCS3400_H */ diff --git a/include/driver/als_tcs3400_public.h b/include/driver/als_tcs3400_public.h deleted file mode 100644 index 812aeda8d3..0000000000 --- a/include/driver/als_tcs3400_public.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * AMS TCS3400 light sensor driver - */ - -#ifndef __CROS_EC_DRIVER_ALS_TCS3400_PUBLIC_H -#define __CROS_EC_DRIVER_ALS_TCS3400_PUBLIC_H - -#include "accelgyro.h" - -/* I2C Interface */ -#define TCS3400_I2C_ADDR_FLAGS 0x39 - -/* NOTE: The higher the ATIME value in reg, the shorter the accumulation time */ -#define TCS_MIN_ATIME 0x00 /* 712 ms */ -#define TCS_MAX_ATIME 0x70 /* 400 ms */ -#define TCS_ATIME_GRANULARITY 256 /* 256 atime settings */ -#define TCS_SATURATION_LEVEL 0xffff /* for 0 < atime < 0x70 */ -#define TCS_DEFAULT_ATIME TCS_MIN_ATIME /* 712 ms */ -#define TCS_CALIBRATION_ATIME TCS_MIN_ATIME -#define TCS_GAIN_UPSHIFT_ATIME TCS_MAX_ATIME - -/* Number of different ranges supported for atime adjustment support */ -#define TCS_MAX_ATIME_RANGES 13 -#define TCS_GAIN_TABLE_MAX_LUX 12999 -#define TCS_ATIME_GAIN_FACTOR 100 /* table values are 100x actual value */ - -#define TCS_MIN_AGAIN 0x00 /* 1x gain */ -#define TCS_MAX_AGAIN 0x03 /* 64x gain */ -#define TCS_CALIBRATION_AGAIN 0x02 /* 16x gain */ -#define TCS_DEFAULT_AGAIN TCS_CALIBRATION_AGAIN - -#define TCS_MAX_INTEGRATION_TIME 2780 /* 2780us */ -#define TCS_ATIME_DEC_STEP 5 -#define TCS_ATIME_INC_STEP TCS_GAIN_UPSHIFT_ATIME - -/* Min and Max sampling frequency in mHz */ -#define TCS3400_LIGHT_MIN_FREQ 149 -#define TCS3400_LIGHT_MAX_FREQ 1000 -#if (CONFIG_EC_MAX_SENSOR_FREQ_MILLIHZ <= TCS3400_LIGHT_MAX_FREQ) -#error "EC too slow for light sensor" -#endif - -/* saturation auto-adjustment */ -struct tcs_saturation_t { - /* - * Gain Scaling; must be value between 0 and 3 - * 0 - 1x scaling - * 1 - 4x scaling - * 2 - 16x scaling - * 3 - 64x scaling - */ - uint8_t again; - - /* Acquisition Time, controlled by the ATIME register */ - uint8_t atime; /* ATIME register setting */ -}; - -/* tcs3400 rgb als driver data */ -struct tcs3400_rgb_drv_data_t { - uint8_t calibration_mode;/* 0 = normal run mode, 1 = calibration mode */ - - struct rgb_calibration_t calibration; - struct tcs_saturation_t saturation; /* saturation adjustment */ -}; - -extern const struct accelgyro_drv tcs3400_drv; -extern const struct accelgyro_drv tcs3400_rgb_drv; - -void tcs3400_interrupt(enum gpio_signal signal); -int tcs3400_get_integration_time(int atime); - -#endif /* __CROS_EC_DRIVER_ALS_TCS3400_PUBLIC_H */ diff --git a/include/driver/amd_stt.h b/include/driver/amd_stt.h deleted file mode 100644 index 3d382a6c0a..0000000000 --- a/include/driver/amd_stt.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* AMD STT (Skin Temperature Tracking) Manager */ - -#ifndef __CROS_EC_AMD_STT_H -#define __CROS_EC_AMD_STT_H - -#define AMD_STT_WRITE_SENSOR_VALUE_CMD 0x3A - -enum amd_stt_pcb_sensor { - AMD_STT_PCB_SENSOR_APU = 0x0, - AMD_STT_PCB_SENSOR_REMOTE = 0x1, - AMD_STT_PCB_SENSOR_GPU = 0x2 -}; - -/** - * Boards must implement these callbacks for SOC and Ambient temperature. - * Temperature must be returned in Milli Kelvin. - * TODO(b/192391025): Replace with direct calls to temp_sensor_read_mk - */ -int board_get_soc_temp_mk(int *temp_mk); -int board_get_ambient_temp_mk(int *temp_mk); - -#endif /* __CROS_EC_AMD_STT_H */ diff --git a/include/driver/bc12/mt6360_public.h b/include/driver/bc12/mt6360_public.h deleted file mode 100644 index d2b8499e1f..0000000000 --- a/include/driver/bc12/mt6360_public.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_DRIVER_BC12_MT6360_PUBLIC_H -#define __CROS_EC_DRIVER_BC12_MT6360_PUBLIC_H - -#include <inttypes.h> - -#define MT6360_PMU_I2C_ADDR_FLAGS 0x34 -#define MT6360_PMIC_I2C_ADDR_FLAGS 0x1a -#define MT6360_LDO_I2C_ADDR_FLAGS 0x64 -#define MT6360_PD_I2C_ADDR_FLAGS 0x4e - -enum mt6360_regulator_id { - MT6360_LDO3, - MT6360_LDO5, - MT6360_LDO6, - MT6360_LDO7, - MT6360_BUCK1, - MT6360_BUCK2, - - MT6360_REGULATOR_COUNT, -}; - -int mt6360_regulator_get_info(enum mt6360_regulator_id id, char *name, - uint16_t *voltage_count, uint16_t *voltages_mv); - -int mt6360_regulator_enable(enum mt6360_regulator_id id, uint8_t enable); - -int mt6360_regulator_is_enabled(enum mt6360_regulator_id id, uint8_t *enabled); - -int mt6360_regulator_set_voltage(enum mt6360_regulator_id id, int min_mv, - int max_mv); - -int mt6360_regulator_get_voltage(enum mt6360_regulator_id id, int *voltage_mv); - -enum mt6360_led_id { - MT6360_LED_RGB1, - MT6360_LED_RGB2, - MT6360_LED_RGB3, - MT6360_LED_RGB_ML, - - MT6360_LED_COUNT, -}; - -#define MT6360_LED_BRIGHTNESS_MAX 15 - -int mt6360_led_enable(enum mt6360_led_id led_id, int enable); - -int mt6360_led_set_brightness(enum mt6360_led_id led_id, int brightness); - -extern const struct mt6360_config_t mt6360_config; - -struct mt6360_config_t { - int i2c_port; - int i2c_addr_flags; -}; -extern const struct bc12_drv mt6360_drv; - -#endif /* __CROS_EC_DRIVER_BC12_MT6360_PUBLIC_H */ diff --git a/include/driver/bc12/pi3usb9201_public.h b/include/driver/bc12/pi3usb9201_public.h deleted file mode 100644 index 643952ab4a..0000000000 --- a/include/driver/bc12/pi3usb9201_public.h +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* PI3USB9201 USB BC 1.2 Charger Detector public definitions */ - -#ifndef __CROS_EC_DRIVER_BC12_PI3USB9201_PUBLIC_H -#define __CROS_EC_DRIVER_BC12_PI3USB9201_PUBLIC_H - -/* I2C address */ -#define PI3USB9201_I2C_ADDR_0_FLAGS 0x5C -#define PI3USB9201_I2C_ADDR_1_FLAGS 0x5D -#define PI3USB9201_I2C_ADDR_2_FLAGS 0x5E -#define PI3USB9201_I2C_ADDR_3_FLAGS 0x5F - -struct pi3usb9201_config_t { - const int i2c_port; - const int i2c_addr_flags; - const int flags; -}; - -/* Configuration struct defined at board level */ -extern const struct pi3usb9201_config_t pi3usb9201_bc12_chips[]; - -extern const struct bc12_drv pi3usb9201_drv; - -#endif /* __CROS_EC_DRIVER_BC12_PI3USB9201_PUBLIC_H */ diff --git a/include/driver/charger/isl923x_public.h b/include/driver/charger/isl923x_public.h deleted file mode 100644 index 2ee5f62cdb..0000000000 --- a/include/driver/charger/isl923x_public.h +++ /dev/null @@ -1,70 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Renesas (Intersil) ISL-9237/38 battery charger public header - */ - -#ifndef __CROS_EC_DRIVER_CHARGER_ISL923X_PUBLIC_H -#define __CROS_EC_DRIVER_CHARGER_ISL923X_PUBLIC_H - -#include "common.h" -#include "stdbool.h" - -#define ISL923X_ADDR_FLAGS (0x09) - -extern const struct charger_drv isl923x_drv; - -/** - * Initialize AC & DC prochot threshold - * - * @param chgnum: Index into charger chips - * @param AC Prochot threshold current in mA: - * multiple of 128 up to 6400 mA - * DC Prochot threshold current in mA: - * multiple of 128 up to 12800 mA - * Bits below 128mA are truncated (ignored). - * @return enum ec_error_list - */ -int isl923x_set_ac_prochot(int chgnum, uint16_t ma); -int isl923x_set_dc_prochot(int chgnum, uint16_t ma); - -/** - * Set the general comparator output polarity when asserted. - * - * @param chgnum: Index into charger chips - * @param invert: Non-zero to invert polarity, zero to non-invert. - * @return EC_SUCCESS, error otherwise. - */ -int isl923x_set_comparator_inversion(int chgnum, int invert); - -/** - * Return whether ACOK is high or low. - * - * @param chgnum index into chg_chips table. - * @param acok will be set to true if ACOK is asserted, otherwise false. - * @return EC_SUCCESS, error otherwise. - */ -enum ec_error_list raa489000_is_acok(int chgnum, bool *acok); - -/** - * Prepare the charger IC for battery ship mode. Battery ship mode sets the - * lowest power state for the IC. Battery ship mode can only be entered from - * battery only mode. - * - * @param chgnum index into chg_chips table. - */ -void raa489000_hibernate(int chgnum, bool disable_adc); - -/** - * Enable or Disable the ASGATE in the READY state. - * - * @param chgnum: Index into charger chips - * @param enable: whether to enable ASGATE - */ -int raa489000_enable_asgate(int chgnum, bool enable); - -enum ec_error_list isl9238c_hibernate(int chgnum); -enum ec_error_list isl9238c_resume(int chgnum); - -#endif /* __CROS_EC_DRIVER_CHARGER_ISL923X_PUBLIC_H */ diff --git a/include/driver/charger/isl9241_public.h b/include/driver/charger/isl9241_public.h deleted file mode 100644 index 342f627bd3..0000000000 --- a/include/driver/charger/isl9241_public.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Renesas (Intersil) ISL-9241 battery charger public header - */ - -#ifndef __CROS_EC_DRIVER_CHARGER_ISL9241_PUBLIC_H -#define __CROS_EC_DRIVER_CHARGER_ISL9241_PUBLIC_H - -#define ISL9241_ADDR_FLAGS 0x09 - -/* Default minimum VIN voltage controlled by ISL9241_REG_VIN_VOLTAGE */ -#define ISL9241_BC12_MIN_VOLTAGE 4096 - -extern const struct charger_drv isl9241_drv; - -/** - * Set AC prochot threshold - * - * @param chgnum: Index into charger chips - * @param ma: AC prochot threshold current in mA, multiple of 128mA - * @return EC_SUCCESS or error - */ -int isl9241_set_ac_prochot(int chgnum, int ma); - -/** - * Set DC prochot threshold - * - * @param chgnum: Index into charger chips - * @param ma: DC prochot threshold current in mA, multiple of 256mA - * @return EC_SUCCESS or error - */ -int isl9241_set_dc_prochot(int chgnum, int ma); - -#define ISL9241_AC_PROCHOT_CURRENT_MIN 128 /* mA */ -#define ISL9241_AC_PROCHOT_CURRENT_MAX 6400 /* mA */ -#define ISL9241_DC_PROCHOT_CURRENT_MIN 256 /* mA */ -#define ISL9241_DC_PROCHOT_CURRENT_MAX 12800 /* mA */ - -#endif /* __CROS_EC_DRIVER_CHARGER_ISL9241_PUBLIC_H */ diff --git a/include/driver/ln9310.h b/include/driver/ln9310.h deleted file mode 100644 index 0ae7af4c4c..0000000000 --- a/include/driver/ln9310.h +++ /dev/null @@ -1,238 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * LION Semiconductor LN-9310 switched capacitor converter. - */ - -#ifndef __CROS_EC_LN9310_H -#define __CROS_EC_LN9310_H - -#include "gpio.h" - -/* I2C address */ -#define LN9310_I2C_ADDR_0_FLAGS 0x72 -#define LN9310_I2C_ADDR_1_FLAGS 0x73 -#define LN9310_I2C_ADDR_2_FLAGS 0x53 -#define LN9310_I2C_ADDR_3_FLAGS 0x54 - -/* Registers */ -#define LN9310_REG_CHIP_ID 0x00 -#define LN9310_CHIP_ID 0x44 -#define LN9310_REG_INT1 0x01 -#define LN9310_REG_INT1_MSK 0x02 -#define LN9310_INT1_TIMER BIT(0) -#define LN9310_INT1_INFET BIT(1) -#define LN9310_INT1_TEMP BIT(2) -#define LN9310_INT1_REV_CURR BIT(3) -#define LN9310_INT1_MODE BIT(4) -#define LN9310_INT1_ALARM BIT(5) -#define LN9310_INT1_OK BIT(6) -#define LN9310_INT1_FAULT BIT(7) - -#define LN9310_REG_SYSGPIO_MSK 0x03 - -#define LN9310_REG_SYS_STS 0x04 -#define LN9310_SYS_STANDBY BIT(0) -#define LN9310_SYS_SWITCHING21_ACTIVE BIT(1) -#define LN9310_SYS_SWITCHING31_ACTIVE BIT(2) -#define LN9310_SYS_BYPASS_ACTIVE BIT(3) -#define LN9310_SYS_INFET_OK BIT(4) -#define LN9310_SYS_SC_OUT_SWITCH_OK BIT(5) -#define LN9310_SYS_INFET_OUT_SWITCH_OK BIT(6) - -#define LN9310_REG_SAFETY_STS 0x05 -#define LN9310_REG_FAULT1_STS 0x06 -#define LN9310_REG_FAULT2_STS 0x07 - -#define LN9310_REG_PWR_CTRL 0x1d -#define LN9310_PWR_OP_MODE0 BIT(0) -#define LN9310_PWR_OP_MODE1 BIT(1) -#define LN9310_PWR_INFET_EN BIT(2) -#define LN9310_PWR_INFET_AUTO_MODE BIT(3) -#define LN9310_PWR_REVERSE_MODE BIT(4) -#define LN9310_PWR_VIN_OV_IGNORE BIT(5) -#define LN9310_PWR_OP_MANUAL_UPDATE BIT(6) -#define LN9310_PWR_FORCE_INSNS_EN BIT(7) -#define LN9310_PWR_OP_MODE_MASK 0x03 -#define LN9310_PWR_OP_MODE_DISABLED 0x00 -#define LN9310_PWR_OP_MODE_BYPASS 0x01 -#define LN9310_PWR_OP_MODE_SWITCH21 0x02 -#define LN9310_PWR_OP_MODE_SWITCH31 0x03 -#define LN9310_PWR_OP_MODE_MANUAL_UPDATE_MASK 0x40 -#define LN9310_PWR_OP_MODE_MANUAL_UPDATE_OFF 0x00 -#define LN9310_PWR_INFET_AUTO_MODE_MASK 0x08 -#define LN9310_PWR_INFET_AUTO_MODE_ON 0x08 -#define LN9310_PWR_INFET_AUTO_MODE_OFF 0x00 - -#define LN9310_REG_SYS_CTRL 0x1e - -#define LN9310_REG_STARTUP_CTRL 0x1f -#define LN9310_STARTUP_STANDBY_EN BIT(0) -#define LN9310_STARTUP_SELECT_EXT_5V_FOR_VDR BIT(3) - -#define LN9310_REG_IIN_CTRL 0x20 -#define LN9310_REG_VIN_CTRL 0x21 - -#define LN9310_REG_TRACK_CTRL 0x22 -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_EN BIT(7) -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_CFG2 BIT(6) -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_CFG1 BIT(5) -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_CFG0 BIT(4) -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_EN_MASK 0x80 -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_EN_ON 0x80 -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_EN_OFF 0x00 -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_CFG_MASK 0x70 -#define LN9310_TRACK_INFET_OUT_SWITCH_OK_CFG_10V 0x10 - -#define LN9310_REG_OCP_CTRL 0x23 - -#define LN9310_REG_TIMER_CTRL 0x24 -#define LN9310_TIMER_OP_SELF_SYNC_EN BIT(3) -#define LN9310_TIMER_OP_SELF_SYNC_EN_MASK 0x08 -#define LN9310_TIMER_OP_SELF_SYNC_EN_ON 0x08 - -#define LN9310_REG_RECOVERY_CTRL 0x25 - -#define LN9310_REG_LB_CTRL 0x26 -#define LN9310_LB_MIN_FREQ_EN BIT(2) -#define LN9310_LB_DELTA_MASK 0x38 -#define LN9310_LB_DELTA_2S 0x20 -#define LN9310_LB_DELTA_3S 0x20 - -#define LN9310_REG_SC_OUT_OV_CTRL 0x29 -#define LN9310_REG_STS_CTRL 0x2d - -#define LN9310_REG_MODE_CHANGE_CFG 0x2e -#define LN9310_MODE_TM_VIN_OV_CFG0 BIT(0) -#define LN9310_MODE_TM_VIN_OV_CFG1 BIT(1) -#define LN9310_MODE_TM_VIN_OV_CFG2 BIT(2) -#define LN9310_MODE_TM_SC_OUT_PRECHG_CFG0 BIT(3) -#define LN9310_MODE_TM_SC_OUT_PRECHG_CFG1 BIT(4) -#define LN9310_MODE_TM_TRACK_CFG0 BIT(5) -#define LN9310_MODE_TM_TRACK_CFG1 BIT(6) -#define LN9310_MODE_FORCE_MODE_CFG BIT(7) -#define LN9310_MODE_TM_TRACK_MASK 0x60 -#define LN9310_MODE_TM_TRACK_BYPASS 0x00 -#define LN9310_MODE_TM_TRACK_SWITCH21 0x20 -#define LN9310_MODE_TM_TRACK_SWITCH31 0x60 -#define LN9310_MODE_TM_SC_OUT_PRECHG_MASK 0x18 -#define LN9310_MODE_TM_SC_OUT_PRECHG_BYPASS 0x0 -#define LN9310_MODE_TM_SC_OUT_PRECHG_SWITCH21 0x08 -#define LN9310_MODE_TM_SC_OUT_PRECHG_SWITCH31 0x18 -#define LN9310_MODE_TM_VIN_OV_CFG_MASK 0x07 -#define LN9310_MODE_TM_VIN_OV_CFG_2S 0x0 /* 14V */ -#define LN9310_MODE_TM_VIN_OV_CFG_3S 0x2 /* 20V */ - -#define LN9310_REG_SPARE_0 0x2A -#define LN9310_SPARE_0_SW4_BEFORE_BSTH_BSTL_EN_CFG_MASK 0x40 -#define LN9310_SPARE_0_SW4_BEFORE_BSTH_BSTL_EN_CFG_ON 0x40 -#define LN9310_SPARE_0_LB_MIN_FREQ_SEL_MASK 0x10 -#define LN9310_SPARE_0_LB_MIN_FREQ_SEL_ON 0x10 - -#define LN9310_REG_SC_DITHER_CTRL 0x2f - -#define LN9310_REG_LION_CTRL 0x30 -#define LN9310_LION_CTRL_MASK 0xFF -#define LN9310_LION_CTRL_UNLOCK_AND_EN_TM 0xAA -#define LN9310_LION_CTRL_UNLOCK 0x5B -/* - * value changed to 0x22 to distinguish from reset value of 0x00 - * 0x22 and 0x00 are functionally equivalent within LN9310 - */ -#define LN9310_LION_CTRL_LOCK 0x22 - -#define LN9310_REG_CFG_0 0x3C -#define LN9310_CFG_0_LS_HELPER_IDLE_MSK_MASK 0x20 -#define LN9310_CFG_0_LS_HELPER_IDLE_MSK_ON 0x20 - -#define LN9310_REG_CFG_4 0x40 -#define LN9310_CFG_4_SC_OUT_PRECHARGE_EN_TIME_CFG BIT(2) -#define LN9310_CFG_4_SW1_VGS_SHORT_EN_MSK BIT(3) -#define LN9310_CFG_4_SC_OUT_PRECHARGE_EN_TIME_CFG_MASK 0x04 -#define LN9310_CFG_4_SW1_VGS_SHORT_EN_MSK_MASK 0x08 -#define LN9310_CFG_4_BSTH_BSTL_HIGH_ROUT_CFG_MASK 0xC0 -#define LN9310_CFG_4_SC_OUT_PRECHARGE_EN_TIME_CFG_ON 0x04 -#define LN9310_CFG_4_SW1_VGS_SHORT_EN_MSK_OFF 0x00 -#define LN9310_CFG_4_BSTH_BSTL_HIGH_ROUT_CFG_LOWEST 0x00 - -#define LN9310_REG_CFG_5 0x41 -#define LN9310_CFG_5_INGATE_PD_EN_MASK 0xC0 -#define LN9310_CFG_5_INGATE_PD_EN_OFF 0x00 -#define LN9310_CFG_5_INFET_CP_PD_BIAS_CFG_MASK 0x30 -#define LN9310_CFG_5_INFET_CP_PD_BIAS_CFG_LOWEST 0x00 - -#define LN9310_REG_TEST_MODE_CTRL 0x46 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PRECHARGE_MASK 0x40 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PRECHARGE_ON 0x40 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PRECHARGE_OFF 0x00 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PREDISCHARGE_MASK 0x20 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PREDISCHARGE_ON 0x20 -#define LN9310_TEST_MODE_CTRL_FORCE_SC_OUT_PREDISCHARGE_OFF 0x00 - -#define LN9310_REG_FORCE_SC21_CTRL_1 0x49 -#define LN9310_FORCE_SC21_CTRL_1_TM_SC_OUT_CFLY_PRECHARGE_MASK 0xFF -#define LN9310_FORCE_SC21_CTRL_1_TM_SC_OUT_CFLY_PRECHARGE_ON 0x59 -#define LN9310_FORCE_SC21_CTRL_1_TM_SC_OUT_CFLY_PRECHARGE_OFF 0x40 - -#define LN9310_REG_FORCE_SC21_CTRL_2 0x4A -#define LN9310_FORCE_SC21_CTRL_2_FORCE_SW_CTRL_REQ_MASK 0x80 -#define LN9310_FORCE_SC21_CTRL_2_FORCE_SW_CTRL_REQ_ON 0x80 -#define LN9310_FORCE_SC21_CTRL_2_FORCE_SW_CTRL_REQ_OFF 0x00 - -#define LN9310_REG_SWAP_CTRL_0 0x58 -#define LN9310_REG_SWAP_CTRL_1 0x59 -#define LN9310_REG_SWAP_CTRL_2 0x5A -#define LN9310_REG_SWAP_CTRL_3 0x5B - -#define LN9310_REG_BC_STS_B 0x51 -#define LN9310_BC_STS_B_INFET_OUT_SWITCH_OK BIT(5) -#define LN9310_BC_STS_B_INFET_OUT_SWITCH_OK_MASK 0x20 - -#define LN9310_REG_BC_STS_C 0x52 -#define LN9310_BC_STS_C_CHIP_REV_MASK 0xF0 -#define LN9310_BC_STS_C_CHIP_REV_FIXED 0x40 - -/* LN9310 Timing definition */ -#define LN9310_CDC_DELAY 120 /* 120us */ -#define LN9310_CFLY_PRECHARGE_DELAY (12*MSEC) -#define LN9310_CFLY_PRECHARGE_TIMEOUT (100*MSEC) - -/* LN9310 Driver Configuration */ -#define LN9310_INIT_RETRY_COUNT 3 - -/* Define configuration of LN9310 part */ -struct ln9310_config_t { - const int i2c_port; - const int i2c_addr_flags; -}; - -/* Configuration struct defined at board level */ -extern const struct ln9310_config_t ln9310_config; - -/** - * @brief Init the driver - * - * @return EC_SUCCESS when initialization was complete. - */ -int ln9310_init(void); - -/* Enable/disable the ln9310 output */ -void ln9310_software_enable(int enable); - -/* Interrupt handler */ -void ln9310_interrupt(enum gpio_signal signal); - -/* Return the POWER_GOOD status */ -int ln9310_power_good(void); - -/* Battery cell type */ -enum battery_cell_type { - BATTERY_CELL_TYPE_UNKNOWN = 0, - BATTERY_CELL_TYPE_2S = 2, - BATTERY_CELL_TYPE_3S = 3 -}; - -enum battery_cell_type board_get_battery_cell_type(void); - -#endif /* __CROS_EC_LN9310_H */ diff --git a/include/driver/ppc/sn5s330_public.h b/include/driver/ppc/sn5s330_public.h deleted file mode 100644 index fdd60e54cb..0000000000 --- a/include/driver/ppc/sn5s330_public.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TI SN5S330 USB-C Power Path Controller */ - -#ifndef __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H -#define __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H - -#define SN5S330_ADDR0_FLAGS 0x40 -#define SN5S330_ADDR1_FLAGS 0x41 -#define SN5S330_ADDR2_FLAGS 0x42 -#define SN5S330_ADDR3_FLAGS 0x43 - -extern const struct ppc_drv sn5s330_drv; - -/** - * Interrupt Handler for the SN5S330. - * - * By default, the only interrupt sources that are unmasked are overcurrent - * conditions for PP1, and VBUS_GOOD if PPC is being used to detect VBUS - * (CONFIG_USB_PD_VBUS_DETECT_PPC). - * - * @param port: The Type-C port which triggered the interrupt. - */ -void sn5s330_interrupt(int port); - -#endif /* __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H */ diff --git a/include/driver/ppc/syv682x_public.h b/include/driver/ppc/syv682x_public.h deleted file mode 100644 index f366da59b3..0000000000 --- a/include/driver/ppc/syv682x_public.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Silergy SYV682x Type-C Power Path Controller */ - -#ifndef __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H -#define __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H - -/* I2C addresses */ -#define SYV682X_ADDR0_FLAGS 0x40 -#define SYV682X_ADDR1_FLAGS 0x41 -#define SYV682X_ADDR2_FLAGS 0x42 -#define SYV682x_ADDR3_FLAGS 0x43 - -extern const struct ppc_drv syv682x_drv; - -void syv682x_interrupt(int port); - -#endif /* __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H */ diff --git a/include/driver/retimer/bb_retimer.h b/include/driver/retimer/bb_retimer.h deleted file mode 100644 index 35b2352704..0000000000 --- a/include/driver/retimer/bb_retimer.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Driver header for Intel Burnside Bridge - Thunderbolt/USB/DisplayPort Retimer - */ - -#ifndef __CROS_EC_BB_RETIMER_H -#define __CROS_EC_BB_RETIMER_H - -#include "gpio.h" -#include "usb_mux.h" -#include "driver/retimer/bb_retimer_public.h" - -/* Burnside Bridge I2C Configuration Space */ -#define BB_RETIMER_REG_VENDOR_ID 0 -#define BB_RETIMER_VENDOR_ID_1 0x8086 -#define BB_RETIMER_VENDOR_ID_2 0x8087 - -#define BB_RETIMER_REG_DEVICE_ID 1 -#define BB_RETIMER_DEVICE_ID 0x15EE - -/* Connection State Register Attributes */ -#define BB_RETIMER_REG_CONNECTION_STATE 4 -#define BB_RETIMER_DATA_CONNECTION_PRESENT BIT(0) -#define BB_RETIMER_CONNECTION_ORIENTATION BIT(1) -#define BB_RETIMER_RE_TIMER_DRIVER BIT(2) -#define BB_RETIMER_USB_2_CONNECTION BIT(4) -#define BB_RETIMER_USB_3_CONNECTION BIT(5) -#define BB_RETIMER_USB_3_SPEED BIT(6) -#define BB_RETIMER_USB_DATA_ROLE BIT(7) -#define BB_RETIMER_DP_CONNECTION BIT(8) -#define BB_RETIMER_DP_PIN_ASSIGNMENT BIT(10) -#define BB_RETIMER_IRQ_HPD BIT(14) -#define BB_RETIMER_HPD_LVL BIT(15) -#define BB_RETIMER_TBT_CONNECTION BIT(16) -#define BB_RETIMER_TBT_TYPE BIT(17) -#define BB_RETIMER_TBT_CABLE_TYPE BIT(18) -#define BB_RETIMER_VPRO_DOCK_DP_OVERDRIVE BIT(19) -#define BB_RETIMER_TBT_ACTIVE_LINK_TRAINING BIT(20) -#define BB_RETIMER_ACTIVE_PASSIVE BIT(22) -#define BB_RETIMER_USB4_ENABLED BIT(23) -#define BB_RETIMER_USB4_TBT_CABLE_SPEED_SUPPORT(x) (((x) & 0x7) << 25) -#define BB_RETIMER_TBT_CABLE_GENERATION(x) (((x) & 0x3) << 28) - -#define BB_RETIMER_REG_TBT_CONTROL 5 -#define BB_RETIMER_REG_EXT_CONNECTION_MODE 6 - -#define BB_RETIMER_REG_COUNT 7 - -#endif /* __CROS_EC_BB_RETIMER_H */ diff --git a/include/driver/retimer/bb_retimer_public.h b/include/driver/retimer/bb_retimer_public.h deleted file mode 100644 index f1a924f67e..0000000000 --- a/include/driver/retimer/bb_retimer_public.h +++ /dev/null @@ -1,56 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Public header for Intel Burnside Bridge - Thunderbolt/USB/DisplayPort Retimer - */ - -#ifndef __CROS_EC_DRIVER_RETIMER_BB_RETIMER_PUBLIC_H -#define __CROS_EC_DRIVER_RETIMER_BB_RETIMER_PUBLIC_H - -#include "usb_mux.h" - -struct usb_mux; - -/* Supported USB retimer drivers */ -extern const struct usb_mux_driver bb_usb_retimer; - -/* Retimer driver hardware specific controls */ -struct bb_usb_control { - /* Load switch enable */ - enum gpio_signal usb_ls_en_gpio; - /* Retimer reset */ - enum gpio_signal retimer_rst_gpio; -}; - -#ifndef CONFIG_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG -extern const struct bb_usb_control bb_controls[]; -#else -extern struct bb_usb_control bb_controls[]; -#endif - -/** - * Enable/disable the power state of BB retimer - * - * Define override function at board level if the platform specific changes - * are needed to enable/disable the power state of BB retimer. - * - * @param me Pointer to USB mux - * @param enable BB retimer power state to be changed - * - * @return EC_SUCCESS, or non-zero on error. - */ -__override_proto int bb_retimer_power_enable(const struct usb_mux *me, - bool enable); - -/** - * Set HPD on the BB retimer - * - * Set the HPD related fields in the BB retimer - * - * @param me Pointer to USB mux - * @param mux_state USB mux state containing HPD level and IRQ - */ -void bb_retimer_hpd_update(const struct usb_mux *me, mux_state_t mux_state); - -#endif /* __CROS_EC_DRIVER_RETIMER_BB_RETIMER_PUBLIC_H */ diff --git a/include/driver/tcpm/it8xxx2_pd_public.h b/include/driver/tcpm/it8xxx2_pd_public.h deleted file mode 100644 index 6ad11a9555..0000000000 --- a/include/driver/tcpm/it8xxx2_pd_public.h +++ /dev/null @@ -1,12 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H - -extern const struct tcpm_drv it83xx_tcpm_drv; -extern const struct tcpm_drv it8xxx2_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_IT8XXX2_PD_PUBLIC_H */ diff --git a/include/driver/tcpm/ps8xxx_public.h b/include/driver/tcpm/ps8xxx_public.h deleted file mode 100644 index 0e200cb395..0000000000 --- a/include/driver/tcpm/ps8xxx_public.h +++ /dev/null @@ -1,96 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Parade Tech Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H - -#include "usb_mux.h" - -struct usb_mux; - -/* I2C interface */ -#define PS8751_I2C_ADDR1_P1_FLAGS 0x09 -#define PS8751_I2C_ADDR1_P2_FLAGS 0x0A -#define PS8751_I2C_ADDR1_FLAGS 0x0B /* P3 */ -#define PS8751_I2C_ADDR2_FLAGS 0x1B -#define PS8751_I2C_ADDR3_FLAGS 0x2B -#define PS8751_I2C_ADDR4_FLAGS 0x4B - -#define PS8XXX_VENDOR_ID 0x1DA0 - -/* Minimum Delay for reset assertion */ -#define PS8XXX_RESET_DELAY_MS 1 - -/* Delay between releasing reset and the first I2C read */ -#define PS8805_FW_INIT_DELAY_MS 10 - -/* Delay from power on to reset de-asserted */ -#define PS8815_PWR_H_RST_H_DELAY_MS 20 - -/* - * Add delay of writing TCPC_REG_POWER_CTRL makes - * CC status being judged correctly when disable VCONN. - * This may be a PS8XXX firmware issue, Parade is still trying. - * https://partnerissuetracker.corp.google.com/issues/185202064 - */ -#define PS8XXX_VCONN_TURN_OFF_DELAY_US 10 - -/* - * Delay between releasing reset and the first I2C read - * - * If the delay is too short, I2C fails. - * If the delay is marginal I2C reads return garbage. - * - * With firmware 0x03: - * 10ms is too short - * 20ms is marginal - * 25ms is OK - */ -#define PS8815_FW_INIT_DELAY_MS 50 - -/* NOTE: The Product ID will read as 0x8803 if the firmware has malfunctioned in - * 8705, 8755 and 8805. - */ -#define PS8705_PRODUCT_ID 0x8705 -#define PS8751_PRODUCT_ID 0x8751 -#define PS8755_PRODUCT_ID 0x8755 -#define PS8805_PRODUCT_ID 0x8805 -#define PS8815_PRODUCT_ID 0x8815 - -extern const struct tcpm_drv ps8xxx_tcpm_drv; - -/** - * Board-specific callback to judge and provide which chip source of PS8XXX - * series supported by this driver per specific port. - * - * If the board supports only one single source then there is no nencessary to - * provide the __override version. - * - * If board supports two sources or above (with CONFIG_USB_PD_TCPM_MULTI_PS8XXX) - * then the __override version is mandatory. - * - * @param port TCPC port number. - */ -__override_proto -uint16_t board_get_ps8xxx_product_id(int port); - -void ps8xxx_tcpc_update_hpd_status(const struct usb_mux *me, - mux_state_t mux_state); - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC -extern struct i2c_stress_test_dev ps8xxx_i2c_stress_test_dev; -#endif /* defined(CONFIG_CMD_I2C_STRESS_TEST_TCPC) */ - -/* - * This driver was designed to use Low Power Mode on PS8751 TCPC/MUX chip - * when running as MUX only (CC lines are not connected, eg. Ampton). - * To achieve this RP on CC lines is set when device should enter LPM and - * RD when mux should work. - */ -extern const struct usb_mux_driver ps8xxx_usb_mux_driver; - -#endif /* __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H */ diff --git a/include/driver/tcpm/rt1715_public.h b/include/driver/tcpm/rt1715_public.h deleted file mode 100644 index 14fa9495e8..0000000000 --- a/include/driver/tcpm/rt1715_public.h +++ /dev/null @@ -1,18 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Richtek RT1715 Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H - -/* I2C interface */ -#define RT1715_I2C_ADDR_FLAGS 0x4E - -#define RT1715_VENDOR_ID 0x29CF - -extern const struct tcpm_drv rt1715_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H */ diff --git a/include/driver/tcpm/tcpci.h b/include/driver/tcpm/tcpci.h deleted file mode 100644 index 53a6a4e65e..0000000000 --- a/include/driver/tcpm/tcpci.h +++ /dev/null @@ -1,300 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery port management */ - -#ifndef __CROS_EC_USB_PD_TCPM_TCPCI_H -#define __CROS_EC_USB_PD_TCPM_TCPCI_H - -#include "config.h" -#include "ec_commands.h" -#include "tcpm/tcpm.h" -#include "usb_mux.h" -#include "usb_pd_tcpm.h" - -#define TCPC_REG_VENDOR_ID 0x0 -#define TCPC_REG_PRODUCT_ID 0x2 -#define TCPC_REG_BCD_DEV 0x4 -#define TCPC_REG_TC_REV 0x6 -#define TCPC_REG_PD_REV 0x8 -#define TCPC_REG_PD_INT_REV 0xa - -#define TCPC_REG_ALERT 0x10 -#define TCPC_REG_ALERT_NONE 0x0000 -#define TCPC_REG_ALERT_MASK_ALL 0xffff -#define TCPC_REG_ALERT_VENDOR_DEF BIT(15) -#define TCPC_REG_ALERT_ALERT_EXT BIT(14) -#define TCPC_REG_ALERT_EXT_STATUS BIT(13) -#define TCPC_REG_ALERT_VBUS_DISCNCT BIT(11) -#define TCPC_REG_ALERT_RX_BUF_OVF BIT(10) -#define TCPC_REG_ALERT_FAULT BIT(9) -#define TCPC_REG_ALERT_V_ALARM_LO BIT(8) -#define TCPC_REG_ALERT_V_ALARM_HI BIT(7) -#define TCPC_REG_ALERT_TX_SUCCESS BIT(6) -#define TCPC_REG_ALERT_TX_DISCARDED BIT(5) -#define TCPC_REG_ALERT_TX_FAILED BIT(4) -#define TCPC_REG_ALERT_RX_HARD_RST BIT(3) -#define TCPC_REG_ALERT_RX_STATUS BIT(2) -#define TCPC_REG_ALERT_POWER_STATUS BIT(1) -#define TCPC_REG_ALERT_CC_STATUS BIT(0) -#define TCPC_REG_ALERT_TX_COMPLETE (TCPC_REG_ALERT_TX_SUCCESS | \ - TCPC_REG_ALERT_TX_DISCARDED | \ - TCPC_REG_ALERT_TX_FAILED) - -#define TCPC_REG_ALERT_MASK 0x12 -#define TCPC_REG_ALERT_MASK_VENDOR_DEF BIT(15) - -#define TCPC_REG_POWER_STATUS_MASK 0x14 -#define TCPC_REG_FAULT_STATUS_MASK 0x15 -#define TCPC_REG_EXT_STATUS_MASK 0x16 -#define TCPC_REG_ALERT_EXTENDED_MASK 0x17 - -#define TCPC_REG_CONFIG_STD_OUTPUT 0x18 -#define TCPC_REG_CONFIG_STD_OUTPUT_DBG_ACC_CONN_N BIT(6) -#define TCPC_REG_CONFIG_STD_OUTPUT_AUDIO_CONN_N BIT(5) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK (3 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_NONE (0 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB BIT(2) -#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP (2 << 2) -#define TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED BIT(0) - -#define TCPC_REG_TCPC_CTRL 0x19 -#define TCPC_REG_TCPC_CTRL_SET(polarity) (polarity) -#define TCPC_REG_TCPC_CTRL_POLARITY(reg) ((reg) & 0x1) -/* - * In TCPCI Rev 2.0, this bit must be set this to generate CC status alerts when - * a connection is found. - */ -#define TCPC_REG_TCPC_CTRL_EN_LOOK4CONNECTION_ALERT BIT(6) -#define TCPC_REG_TCPC_CTRL_DEBUG_ACC_CONTROL BIT(4) -#define TCPC_REG_TCPC_CTRL_BIST_TEST_MODE BIT(1) - -#define TCPC_REG_ROLE_CTRL 0x1a -#define TCPC_REG_ROLE_CTRL_DRP_MASK BIT(6) -#define TCPC_REG_ROLE_CTRL_RP_MASK (BIT(5)|BIT(4)) -#define TCPC_REG_ROLE_CTRL_CC2_MASK (BIT(3)|BIT(2)) -#define TCPC_REG_ROLE_CTRL_CC1_MASK (BIT(1)|BIT(0)) -#define TCPC_REG_ROLE_CTRL_SET(drp, rp, cc1, cc2) \ - ((((drp) << 6) & TCPC_REG_ROLE_CTRL_DRP_MASK) | \ - (((rp) << 4) & TCPC_REG_ROLE_CTRL_RP_MASK) | \ - (((cc2) << 2) & TCPC_REG_ROLE_CTRL_CC2_MASK) | \ - ((cc1) & TCPC_REG_ROLE_CTRL_CC1_MASK)) -#define TCPC_REG_ROLE_CTRL_DRP(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_DRP_MASK) >> 6) -#define TCPC_REG_ROLE_CTRL_RP(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_RP_MASK) >> 4) -#define TCPC_REG_ROLE_CTRL_CC2(reg) \ - (((reg) & TCPC_REG_ROLE_CTRL_CC2_MASK) >> 2) -#define TCPC_REG_ROLE_CTRL_CC1(reg) \ - ((reg) & TCPC_REG_ROLE_CTRL_CC1_MASK) - -#define TCPC_REG_FAULT_CTRL 0x1b -#define TCPC_REG_FAULT_CTRL_VBUS_OVP_FAULT_DIS BIT(1) -#define TCPC_REG_FAULT_CTRL_VBUS_OCP_FAULT_DIS BIT(0) - -#define TCPC_REG_POWER_CTRL 0x1c -#define TCPC_REG_POWER_CTRL_FRS_ENABLE BIT(7) -#define TCPC_REG_POWER_CTRL_VBUS_VOL_MONITOR_DIS BIT(6) -#define TCPC_REG_POWER_CTRL_VOLT_ALARM_DIS BIT(5) -#define TCPC_REG_POWER_CTRL_AUTO_DISCHARGE_DISCONNECT BIT(4) -#define TCPC_REG_POWER_CTRL_FORCE_DISCHARGE BIT(2) -#define TCPC_REG_POWER_CTRL_SET(vconn) (vconn) -#define TCPC_REG_POWER_CTRL_VCONN(reg) ((reg) & 0x1) - -#define TCPC_REG_CC_STATUS 0x1d -#define TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK BIT(5) -#define TCPC_REG_CC_STATUS_CONNECT_RESULT_MASK BIT(4) -#define TCPC_REG_CC_STATUS_CC2_STATE_MASK (BIT(3)|BIT(2)) -#define TCPC_REG_CC_STATUS_CC1_STATE_MASK (BIT(1)|BIT(0)) -#define TCPC_REG_CC_STATUS_SET(term, cc1, cc2) \ - ((term) << 4 | ((cc2) & 0x3) << 2 | ((cc1) & 0x3)) -#define TCPC_REG_CC_STATUS_LOOK4CONNECTION(reg) \ - ((reg & TCPC_REG_CC_STATUS_LOOK4CONNECTION_MASK) >> 5) -#define TCPC_REG_CC_STATUS_TERM(reg) \ - (((reg) & TCPC_REG_CC_STATUS_CONNECT_RESULT_MASK) >> 4) -#define TCPC_REG_CC_STATUS_CC2(reg) \ - (((reg) & TCPC_REG_CC_STATUS_CC2_STATE_MASK) >> 2) -#define TCPC_REG_CC_STATUS_CC1(reg) \ - ((reg) & TCPC_REG_CC_STATUS_CC1_STATE_MASK) - -#define TCPC_REG_POWER_STATUS 0x1e -#define TCPC_REG_POWER_STATUS_MASK_ALL 0xff -#define TCPC_REG_POWER_STATUS_DEBUG_ACC_CON BIT(7) -#define TCPC_REG_POWER_STATUS_UNINIT BIT(6) -#define TCPC_REG_POWER_STATUS_SOURCING_VBUS BIT(4) -#define TCPC_REG_POWER_STATUS_VBUS_DET BIT(3) -#define TCPC_REG_POWER_STATUS_VBUS_PRES BIT(2) -#define TCPC_REG_POWER_STATUS_SINKING_VBUS BIT(0) - -#define TCPC_REG_FAULT_STATUS 0x1f -#define TCPC_REG_FAULT_STATUS_ALL_REGS_RESET BIT(7) -#define TCPC_REG_FAULT_STATUS_FORCE_OFF_VBUS BIT(6) -#define TCPC_REG_FAULT_STATUS_AUTO_DISCHARGE_FAIL BIT(5) -#define TCPC_REG_FAULT_STATUS_FORCE_DISCHARGE_FAIL BIT(4) -#define TCPC_REG_FAULT_STATUS_VBUS_OVER_CURRENT BIT(3) -#define TCPC_REG_FAULT_STATUS_VBUS_OVER_VOLTAGE BIT(2) -#define TCPC_REG_FAULT_STATUS_VCONN_OVER_CURRENT BIT(1) -#define TCPC_REG_FAULT_STATUS_I2C_INTERFACE_ERR BIT(0) - -#define TCPC_REG_EXT_STATUS 0x20 -#define TCPC_REG_EXT_STATUS_SAFE0V BIT(0) - -#define TCPC_REG_ALERT_EXT 0x21 -#define TCPC_REG_ALERT_EXT_TIMER_EXPIRED BIT(2) -#define TCPC_REG_ALERT_EXT_SRC_FRS BIT(1) -#define TCPC_REG_ALERT_EXT_SNK_FRS BIT(0) - -#define TCPC_REG_COMMAND 0x23 -#define TCPC_REG_COMMAND_ENABLE_VBUS_DETECT 0x33 -#define TCPC_REG_COMMAND_SNK_CTRL_LOW 0x44 -#define TCPC_REG_COMMAND_SNK_CTRL_HIGH 0x55 -#define TCPC_REG_COMMAND_SRC_CTRL_LOW 0x66 -#define TCPC_REG_COMMAND_SRC_CTRL_HIGH 0x77 -#define TCPC_REG_COMMAND_LOOK4CONNECTION 0x99 -#define TCPC_REG_COMMAND_I2CIDLE 0xFF - -#define TCPC_REG_DEV_CAP_1 0x24 -#define TCPC_REG_DEV_CAP_1_VBUS_NONDEFAULT_TARGET BIT(15) -#define TCPC_REG_DEV_CAP_1_VBUS_OCP_REPORTING BIT(14) -#define TCPC_REG_DEV_CAP_1_VBUS_OVP_REPORTING BIT(13) -#define TCPC_REG_DEV_CAP_1_BLEED_DISCHARGE BIT(12) -#define TCPC_REG_DEV_CAP_1_FORCE_DISCHARGE BIT(11) -#define TCPC_REG_DEV_CAP_1_VBUS_MEASURE_ALARM_CAPABLE BIT(10) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_MASK (BIT(8)|BIT(9)) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_DEF (0 << 8) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_1P5_DEF (1 << 8) -#define TCPC_REG_DEV_CAP_1_SRC_RESISTOR_RP_3P0_1P5_DEF (2 << 8) -#define TCPC_REG_DEV_CAP_1_PWRROLE_MASK (BIT(5)|BIT(6)|BIT(7)) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_OR_SNK (0 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC (1 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SNK (2 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SNK_ACC (3 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_DRP (4 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP_ADPT_CBL (5 << 5) -#define TCPC_REG_DEV_CAP_1_PWRROLE_SRC_SNK_DRP (6 << 5) -#define TCPC_REG_DEV_CAP_1_ALL_SOP_STAR_MSGS_SUPPORTED BIT(4) -#define TCPC_REG_DEV_CAP_1_SOURCE_VCONN BIT(3) -#define TCPC_REG_DEV_CAP_1_SINK_VBUS BIT(2) -#define TCPC_REG_DEV_CAP_1_SOURCE_NONDEFAULT_VBUS BIT(1) -#define TCPC_REG_DEV_CAP_1_SOURCE_VBUS BIT(0) - -#define TCPC_REG_DEV_CAP_2 0x26 -#define TCPC_REG_DEV_CAP_2_SNK_FR_SWAP BIT(9) - -#define TCPC_REG_STD_INPUT_CAP 0x28 -#define TCPC_REG_STD_OUTPUT_CAP 0x29 - -#define TCPC_REG_CONFIG_EXT_1 0x2A -#define TCPC_REG_CONFIG_EXT_1_FR_SWAP_SNK_DIR BIT(1) - -#define TCPC_REG_MSG_HDR_INFO 0x2e -#define TCPC_REG_MSG_HDR_INFO_SET(drole, prole) \ - ((drole) << 3 | (PD_REV20 << 1) | (prole)) -#define TCPC_REG_MSG_HDR_INFO_DROLE(reg) (((reg) & 0x8) >> 3) -#define TCPC_REG_MSG_HDR_INFO_PROLE(reg) ((reg) & 0x1) - -#define TCPC_REG_RX_DETECT 0x2f -#define TCPC_REG_RX_DETECT_SOP_HRST_MASK 0x21 -#define TCPC_REG_RX_DETECT_SOP_SOPP_SOPPP_HRST_MASK 0x27 - -/* TCPCI Rev 1.0 receive registers */ -#define TCPC_REG_RX_BYTE_CNT 0x30 -#define TCPC_REG_RX_BUF_FRAME_TYPE 0x31 -#define TCPC_REG_RX_HDR 0x32 -#define TCPC_REG_RX_DATA 0x34 /* through 0x4f */ - -/* - * In TCPCI Rev 2.0, the RECEIVE_BUFFER is comprised of three sets of registers: - * READABLE_BYTE_COUNT, RX_BUF_FRAME_TYPE and RX_BUF_BYTE_x. These registers can - * only be accessed by reading at a common register address 30h. - */ -#define TCPC_REG_RX_BUFFER 0x30 - -#define TCPC_REG_TRANSMIT 0x50 -#define TCPC_REG_TRANSMIT_SET_WITH_RETRY(retries, type) \ - ((retries) << 4 | (type)) -#define TCPC_REG_TRANSMIT_SET_WITHOUT_RETRY(type) (type) -#define TCPC_REG_TRANSMIT_RETRY(reg) (((reg) & 0x30) >> 4) -#define TCPC_REG_TRANSMIT_TYPE(reg) ((reg) & 0x7) - -/* TCPCI Rev 1.0 transmit registers */ -#define TCPC_REG_TX_BYTE_CNT 0x51 -#define TCPC_REG_TX_HDR 0x52 -#define TCPC_REG_TX_DATA 0x54 /* through 0x6f */ - -/* - * In TCPCI Rev 2.0, the TRANSMIT_BUFFER holds the I2C_WRITE_BYTE_COUNT and the - * portion of the SOP* USB PD message payload (including the header and/or the - * data bytes) most recently written by the TCPM in TX_BUF_BYTE_x. TX_BUF_BYTE_x - * is “hidden” and can only be accessed by writing to register address 51h - */ -#define TCPC_REG_TX_BUFFER 0x51 - -#define TCPC_REG_VBUS_VOLTAGE 0x70 - -#define TCPC_REG_VBUS_SINK_DISCONNECT_THRESH 0x72 -#define TCPC_REG_VBUS_SINK_DISCONNECT_THRESH_DEFAULT 0x008C /* 3.5 V */ - -#define TCPC_REG_VBUS_STOP_DISCHARGE_THRESH 0x74 -#define TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG 0x76 -#define TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG 0x78 - -extern const struct tcpm_drv tcpci_tcpm_drv; -extern const struct usb_mux_driver tcpci_tcpm_usb_mux_driver; - -void tcpci_set_cached_rp(int port, int rp); -int tcpci_get_cached_rp(int port); -void tcpci_set_cached_pull(int port, enum tcpc_cc_pull pull); -enum tcpc_cc_pull tcpci_get_cached_pull(int port); - -void tcpci_tcpc_alert(int port); -int tcpci_tcpm_init(int port); -int tcpci_tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2); -bool tcpci_tcpm_check_vbus_level(int port, enum vbus_level level); -int tcpci_tcpm_select_rp_value(int port, int rp); -int tcpci_tcpm_set_cc(int port, int pull); -int tcpci_tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity); -int tcpci_tcpm_sop_prime_enable(int port, bool enable); -int tcpci_tcpm_set_vconn(int port, int enable); -int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role); -int tcpci_tcpm_set_rx_enable(int port, int enable); -int tcpci_tcpm_get_message_raw(int port, uint32_t *payload, int *head); -int tcpci_tcpm_transmit(int port, enum tcpci_msg_type type, - uint16_t header, const uint32_t *data); -int tcpci_tcpm_release(int port); -#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -int tcpci_set_role_ctrl(int port, enum tcpc_drp drp, enum tcpc_rp_value rp, - enum tcpc_cc_pull pull); -int tcpci_tcpc_drp_toggle(int port); -#endif -#ifdef CONFIG_USB_PD_TCPC_LOW_POWER -int tcpci_enter_low_power_mode(int port); -#endif -enum ec_error_list tcpci_set_bist_test_mode(const int port, - const bool enable); -#ifdef CONFIG_USB_PD_DISCHARGE_TCPC -void tcpci_tcpc_discharge_vbus(int port, int enable); -#endif -void tcpci_tcpc_enable_auto_discharge_disconnect(int port, int enable); -int tcpci_tcpc_debug_accessory(int port, bool enable); - -int tcpci_tcpm_mux_init(const struct usb_mux *me); -int tcpci_tcpm_mux_set(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required); -int tcpci_tcpm_mux_get(const struct usb_mux *me, mux_state_t *mux_state); -int tcpci_tcpm_mux_enter_low_power(const struct usb_mux *me); -int tcpci_get_chip_info(int port, int live, - struct ec_response_pd_chip_info_v1 *chip_info); -#ifdef CONFIG_USBC_PPC -bool tcpci_tcpm_get_snk_ctrl(int port); -int tcpci_tcpm_set_snk_ctrl(int port, int enable); -bool tcpci_tcpm_get_src_ctrl(int port); -int tcpci_tcpm_set_src_ctrl(int port, int enable); -#endif - -int tcpci_tcpc_fast_role_swap_enable(int port, int enable); - -#endif /* __CROS_EC_USB_PD_TCPM_TCPCI_H */ diff --git a/include/driver/tcpm/tcpm.h b/include/driver/tcpm/tcpm.h deleted file mode 100644 index fb63e5504f..0000000000 --- a/include/driver/tcpm/tcpm.h +++ /dev/null @@ -1,599 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery port management - common header for TCPM drivers */ - -#ifndef __CROS_EC_USB_PD_TCPM_TCPM_H -#define __CROS_EC_USB_PD_TCPM_TCPM_H - -#include "common.h" -#include "ec_commands.h" -#include "i2c.h" -#include "usb_pd_tcpm.h" -#include "util.h" - -#if defined(CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE) && \ - !defined(CONFIG_USB_PD_DUAL_ROLE) -#error "DRP auto toggle requires board to have DRP support" -#error "Please upgrade your board configuration" -#endif - -#ifndef CONFIG_USB_PD_TCPC - -/* I2C wrapper functions - get I2C port / peripheral addr from config struct. */ -#ifndef CONFIG_USB_PD_TCPC_LOW_POWER -static inline int tcpc_addr_write(int port, int i2c_addr, int reg, int val) -{ - return i2c_write8(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_write16(int port, int i2c_addr, int reg, int val) -{ - return i2c_write16(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_read(int port, int i2c_addr, int reg, int *val) -{ - return i2c_read8(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -static inline int tcpc_addr_read16(int port, int i2c_addr, int reg, int *val) -{ - return i2c_read16(tcpc_config[port].i2c_info.port, - i2c_addr, reg, val); -} - -/* - * The *_no_lpm_exit() routines are intende to be used where the TCPC - * needs to be accessed without being being taken out of LPM. The main - * use case is to check the alert register to determine if a TCPC is the - * source of an interrupt in a shared interrupt implementation. If the - * TCPC is taken out of LPM, it may generate a new alert which can lead - * to successive unintended interrupts. The TCPC is placed back into the - * idle state after the LPM timer expires similar to other tcpc_*() - * routines. - * - * The caller must guarantee that the chip responds to I2C as expected: - * - some TCPCs wake up when they alert and do not need special handing - * - some TCPCs wake up on I2C and respond as expected - * - some TCPCs wake up on I2C and throw away the transaction - these - * need an explicit by the caller. - */ - -static inline int tcpc_addr_read16_no_lpm_exit(int port, int i2c_addr, - int reg, int *val) -{ - return tcpc_addr_read16(port, i2c_addr, reg, val); -} - -static inline int tcpc_xfer(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size) -{ - return i2c_xfer(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - out, out_size, in, in_size); -} - -static inline int tcpc_xfer_unlocked(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size, int flags) -{ - return i2c_xfer_unlocked(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - out, out_size, in, in_size, flags); -} - -static inline int tcpc_read_block(int port, int reg, uint8_t *in, int size) -{ - return i2c_read_block(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, in, size); -} - -static inline int tcpc_write_block(int port, int reg, - const uint8_t *out, int size) -{ - return i2c_write_block(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, out, size); -} - -static inline int tcpc_update8(int port, int reg, - uint8_t mask, - enum mask_update_action action) -{ - return i2c_update8(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, mask, action); -} - -static inline int tcpc_update16(int port, int reg, - uint16_t mask, - enum mask_update_action action) -{ - return i2c_update16(tcpc_config[port].i2c_info.port, - tcpc_config[port].i2c_info.addr_flags, - reg, mask, action); -} - -#else /* !CONFIG_USB_PD_TCPC_LOW_POWER */ -int tcpc_addr_write(int port, int i2c_addr, int reg, int val); -int tcpc_addr_write16(int port, int i2c_addr, int reg, int val); -int tcpc_addr_read(int port, int i2c_addr, int reg, int *val); -int tcpc_addr_read16(int port, int i2c_addr, int reg, int *val); -int tcpc_addr_read16_no_lpm_exit(int port, int i2c_addr, int reg, int *val); -int tcpc_read_block(int port, int reg, uint8_t *in, int size); -int tcpc_write_block(int port, int reg, const uint8_t *out, int size); -int tcpc_xfer(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size); -int tcpc_xfer_unlocked(int port, const uint8_t *out, int out_size, - uint8_t *in, int in_size, int flags); - -int tcpc_update8(int port, int reg, - uint8_t mask, enum mask_update_action action); -int tcpc_update16(int port, int reg, - uint16_t mask, enum mask_update_action action); - -#endif /* CONFIG_USB_PD_TCPC_LOW_POWER */ - -static inline int tcpc_write(int port, int reg, int val) -{ - return tcpc_addr_write(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_write16(int port, int reg, int val) -{ - return tcpc_addr_write16(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_read(int port, int reg, int *val) -{ - return tcpc_addr_read(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline int tcpc_read16(int port, int reg, int *val) -{ - return tcpc_addr_read16(port, - tcpc_config[port].i2c_info.addr_flags, reg, val); -} - -static inline void tcpc_lock(int port, int lock) -{ - i2c_lock(tcpc_config[port].i2c_info.port, lock); -} - -/* TCPM driver wrapper function */ -static inline int tcpm_init(int port) -{ - int rv; - - rv = tcpc_config[port].drv->init(port); - if (rv) - return rv; - - /* Board specific post TCPC init */ - if (board_tcpc_post_init) - rv = board_tcpc_post_init(port); - - return rv; -} - -static inline int tcpm_release(int port) -{ - return tcpc_config[port].drv->release(port); -} - -static inline int tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2) -{ - return tcpc_config[port].drv->get_cc(port, cc1, cc2); -} - -static inline bool tcpm_check_vbus_level(int port, enum vbus_level level) -{ - return tcpc_config[port].drv->check_vbus_level(port, level); -} - -static inline int tcpm_select_rp_value(int port, int rp) -{ - return tcpc_config[port].drv->select_rp_value(port, rp); -} - -static inline int tcpm_set_cc(int port, int pull) -{ - return tcpc_config[port].drv->set_cc(port, pull); -} - -static inline int tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity) -{ - return tcpc_config[port].drv->set_polarity(port, polarity); -} - -static inline int tcpm_sop_prime_enable(int port, bool enable) -{ -#ifdef CONFIG_USB_PD_DECODE_SOP - return tcpc_config[port].drv->sop_prime_enable(port, enable); -#else - return EC_SUCCESS; -#endif -} - -static inline int tcpm_set_vconn(int port, int enable) -{ -#ifdef CONFIG_USB_PD_TCPC_VCONN - int rv; - - rv = tcpc_config[port].drv->set_vconn(port, enable); - if (rv) - return rv; -#endif - - return tcpm_sop_prime_enable(port, enable); -} - -static inline int tcpm_set_msg_header(int port, int power_role, int data_role) -{ - return tcpc_config[port].drv->set_msg_header(port, power_role, - data_role); -} - -static inline int tcpm_set_rx_enable(int port, int enable) -{ - return tcpc_config[port].drv->set_rx_enable(port, enable); -} - -static inline void tcpm_enable_auto_discharge_disconnect(int port, int enable) -{ - const struct tcpm_drv *tcpc = tcpc_config[port].drv; - - if (tcpc->tcpc_enable_auto_discharge_disconnect) - tcpc->tcpc_enable_auto_discharge_disconnect(port, enable); -} - -static inline int tcpm_reset_bist_type_2(int port) -{ - if (tcpc_config[port].drv->reset_bist_type_2 != NULL) - return tcpc_config[port].drv->reset_bist_type_2(port); - else - return EC_SUCCESS; -} - -/** - * Reads a message using get_message_raw driver method and puts it into EC's - * cache. - */ -int tcpm_enqueue_message(int port); - -static inline int tcpm_transmit(int port, enum tcpci_msg_type type, - uint16_t header, const uint32_t *data) -{ - return tcpc_config[port].drv->transmit(port, type, header, data); -} - -#ifdef CONFIG_USB_PD_PPC -static inline bool tcpm_get_snk_ctrl(int port) -{ - return tcpc_config[port].drv->get_snk_ctrl ? - tcpc_config[port].drv->get_snk_ctrl(port) : false; -} -static inline int tcpm_set_snk_ctrl(int port, int enable) -{ - if (tcpc_config[port].drv->set_snk_ctrl != NULL) - return tcpc_config[port].drv->set_snk_ctrl(port, enable); - else - return EC_ERROR_UNIMPLEMENTED; -} - -static inline bool tcpm_get_src_ctrl(int port) -{ - - return tcpc_config[port].drv->get_src_ctrl ? - tcpc_config[port].drv->get_src_ctrl(port) : false; -} -static inline int tcpm_set_src_ctrl(int port, int enable) -{ - if (tcpc_config[port].drv->set_src_ctrl != NULL) - return tcpc_config[port].drv->set_src_ctrl(port, enable); - else - return EC_ERROR_UNIMPLEMENTED; -} -#endif - -static inline void tcpc_alert(int port) -{ - tcpc_config[port].drv->tcpc_alert(port); -} - -static inline void tcpc_discharge_vbus(int port, int enable) -{ - tcpc_config[port].drv->tcpc_discharge_vbus(port, enable); -} - -#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE -static inline int tcpm_auto_toggle_supported(int port) -{ - return !!tcpc_config[port].drv->drp_toggle; -} - -static inline int tcpm_enable_drp_toggle(int port) -{ - return tcpc_config[port].drv->drp_toggle(port); -} -#else -static inline int tcpm_auto_toggle_supported(int port) -{ - return false; -} -int tcpm_enable_drp_toggle(int port); -#endif - -static inline int tcpm_debug_accessory(int port, bool enable) -{ - if (tcpc_config[port].drv->debug_accessory) - return tcpc_config[port].drv->debug_accessory(port, enable); - return EC_SUCCESS; -} - -static inline int tcpm_debug_detach(int port) -{ - if (tcpc_config[port].drv->debug_detach) - return tcpc_config[port].drv->debug_detach(port); - - /* No special handling for debug disconnections? Success! */ - return EC_SUCCESS; -} - -#ifdef CONFIG_USB_PD_TCPC_LOW_POWER -static inline int tcpm_enter_low_power_mode(int port) -{ - return tcpc_config[port].drv->enter_low_power_mode(port); -} -#else -int tcpm_enter_low_power_mode(int port); -#endif - -#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC -static inline int tcpc_i2c_read(const int port, const uint16_t addr_flags, - const int reg, int *data) -{ - return tcpc_read(port, reg, data); -} - -static inline int tcpc_i2c_write(const int port, const uint16_t addr_flags, - const int reg, int data) -{ - return tcpc_write(port, reg, data); -} -#endif - -static inline int tcpm_get_chip_info(int port, int live, - struct ec_response_pd_chip_info_v1 *info) -{ - if (tcpc_config[port].drv->get_chip_info) - return tcpc_config[port].drv->get_chip_info(port, live, info); - return EC_ERROR_UNIMPLEMENTED; -} - -static inline enum ec_error_list tcpc_set_bist_test_mode(int port, bool enable) -{ - const struct tcpm_drv *tcpc; - int rv = EC_SUCCESS; - - tcpc = tcpc_config[port].drv; - if (tcpc->set_bist_test_mode) - rv = tcpc->set_bist_test_mode(port, enable); - return rv; -} - -#ifdef CONFIG_USB_PD_FRS_TCPC -static inline int tcpm_set_frs_enable(int port, int enable) -{ - const struct tcpm_drv *tcpc; - int rv = EC_SUCCESS; - - /* - * set_frs_enable will be set to tcpci_tcp_fast_role_swap_enable - * if it is handled by the tcpci for the tcpc chipset - */ - tcpc = tcpc_config[port].drv; - if (tcpc->set_frs_enable) - rv = tcpc->set_frs_enable(port, enable); - return rv; -} -#endif /* defined(CONFIG_USB_PD_FRS_TCPC) */ - -#else /* CONFIG_USB_PD_TCPC */ - -/** - * Initialize TCPM driver and wait for TCPC readiness. - * - * @param port Type-C port number - * - * @return EC_SUCCESS or error - */ -int tcpm_init(int port); - -/** - * Read the CC line status. - * - * @param port Type-C port number - * @param cc1 pointer to CC status for CC1 - * @param cc2 pointer to CC status for CC2 - * - * @return EC_SUCCESS or error - */ -int tcpm_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2); - -/** - * Check VBUS level - * - * @param port Type-C port number - * @param level safe level voltage to check against - * - * @return False => VBUS not at level, True => VBUS at level - */ -bool tcpm_check_vbus_level(int port, enum vbus_level level); - -/** - * Set the value of the CC pull-up used when we are a source. - * - * @param port Type-C port number - * @param rp One of enum tcpc_rp_value - * - * @return EC_SUCCESS or error - */ -int tcpm_select_rp_value(int port, int rp); - -/** - * Set the CC pull resistor. This sets our role as either source or sink. - * - * @param port Type-C port number - * @param pull One of enum tcpc_cc_pull - * - * @return EC_SUCCESS or error - */ -int tcpm_set_cc(int port, int pull); - -/** - * Set polarity - * - * @param port Type-C port number - * @param polarity port polarity - * - * @return EC_SUCCESS or error - */ -int tcpm_set_polarity(int port, enum tcpc_cc_polarity polarity); - -/** - * Enable SOP' message transmit/receive. - * - * @param port Type-C port number - * @param enable Enable/Disable SOP' and SOP'' messages - * - * @return EC_SUCCESS or error - */ -int tcpm_sop_prime_enable(int port, int enable); - -/** - * Set Vconn. - * - * @param port Type-C port number - * @param enable Enable/Disable Vconn - * - * @return EC_SUCCESS or error - */ -int tcpm_set_vconn(int port, int enable); - -/** - * Set PD message header to use for goodCRC - * - * @param port Type-C port number - * @param power_role Power role to use in header - * @param data_role Data role to use in header - * - * @return EC_SUCCESS or error - */ -int tcpm_set_msg_header(int port, int power_role, int data_role); - -/** - * Set RX enable flag - * - * @param port Type-C port number - * @enable true for enable, false for disable - * - * @return EC_SUCCESS or error - */ -int tcpm_set_rx_enable(int port, int enable); - -/** - * Enable Auto Discharge Disconnect - * - * @param port Type-C port number - * @param enable true for enable, false for disable - */ -void tcpm_enable_auto_discharge_disconnect(int port, int enable); - -/** - * Transmit PD message - * - * @param port Type-C port number - * @param type Transmit type - * @param header Packet header - * @param cnt Number of bytes in payload - * @param data Payload - * - * @return EC_SUCCESS or error - */ -int tcpm_transmit(int port, enum tcpci_msg_type type, uint16_t header, - const uint32_t *data); - -/** - * TCPC is asserting alert - * - * @param port Type-C port number - */ -void tcpc_alert(int port); - -#endif /* CONFIG_USB_PD_TCPC */ - -/** - * Gets the next waiting RX message. - * - * @param port Type-C port number - * @param payload Pointer to location to copy payload of PD message - * @param header The header of PD message - * - * @return EC_SUCCESS or error - */ -int tcpm_dequeue_message(int port, uint32_t *payload, int *header); - -/** - * Returns true if the tcpm has RX messages waiting to be consumed. - */ -int tcpm_has_pending_message(int port); - -/** - * Clear any pending messages in the RX queue. This function must be - * called from the same context as the caller of tcpm_dequeue_message to avoid - * race conditions. - */ -void tcpm_clear_pending_messages(int port); - -/** - * Enable/Disable TCPC Fast Role Swap detection - * - * @param port Type-C port number - * @param enable FRS enable (true) disable (false) - * @return EC_SUCCESS on success, or an error - */ -int tcpm_set_frs_enable(int port, int enable); - -#ifdef CONFIG_CMD_TCPC_DUMP -static inline void tcpm_dump_registers(int port) -{ - const struct tcpm_drv *tcpc = tcpc_config[port].drv; - - if (tcpc->dump_registers) - tcpc->dump_registers(port); - else - tcpc_dump_std_registers(port); -} -#endif /* defined(CONFIG_CMD_TCPC_DUMP) */ - -/** - * Disable BIST type-2 mode - * - * @param port Type-C port number - * @return EC_SUCCESS on success, or an error - */ -int tcpm_reset_bist_type_2(int port); - -#endif diff --git a/include/driver/tcpm/tusb422_public.h b/include/driver/tcpm/tusb422_public.h deleted file mode 100644 index 8756d9b362..0000000000 --- a/include/driver/tcpm/tusb422_public.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* TI TUSB422 Type-C port controller */ - -#ifndef __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H -#define __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H - -/* I2C interface */ -#define TUSB422_I2C_ADDR_FLAGS 0x20 - -extern const struct tcpm_drv tusb422_tcpm_drv; - -#endif /* __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H */ diff --git a/include/driver/temp_sensor/thermistor.h b/include/driver/temp_sensor/thermistor.h deleted file mode 100644 index adcd5c5be4..0000000000 --- a/include/driver/temp_sensor/thermistor.h +++ /dev/null @@ -1,166 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Thermistor module for Chrome EC */ - -#ifndef __CROS_EC_TEMP_SENSOR_THERMISTOR_H -#define __CROS_EC_TEMP_SENSOR_THERMISTOR_H - -struct thermistor_data_pair { - uint8_t mv; /* Scaled voltage level at ADC (in mV) */ - uint8_t temp; /* Temperature in Celsius */ -}; - -struct thermistor_info { - uint8_t scaling_factor; /* Scaling factor for voltage in data pair. */ - uint8_t num_pairs; /* Number of data pairs. */ - - /* - * Values between given data pairs will be calculated as points on - * a line. Pairs can be derived using the Steinhart-Hart equation. - * - * Guidelines for data sets: - * - Must contain at least two pairs. - * - First and last pairs are the max and min. - * - Pairs must be sorted in descending order. - * - 5 pairs should provide reasonable accuracy in most cases. Use - * points where the slope changes significantly or to recalibrate - * the algorithm if needed. - */ - const struct thermistor_data_pair *data; -}; - -/** - * Calculate temperature using linear interpolation of data points. - * - * Given a set of datapoints, the algorithm will calculate the "step" in - * between each one in order to interpolate missing entries. - * - * @param mv Value read from ADC (in millivolts). - * @param info Reference data set and info. - * - * @return temperature in C - */ -int thermistor_linear_interpolate(uint16_t mv, - const struct thermistor_info *info); - -#ifdef CONFIG_THERMISTOR_NCP15WB -/** - * ncp15wb temperature conversion routine. - * - * @param adc 10bit raw data on adc. - * - * @return temperature in C. - */ -int ncp15wb_calculate_temp(uint16_t adc); -#endif /* CONFIG_THERMISTOR_NCP15WB */ - -#ifdef CONFIG_STEINHART_HART_3V3_13K7_47K_4050B -/** - * Reads the specified ADC channel and uses a lookup table and interpolation to - * return a temperature in degrees K. - * - * The lookup table is based off of a resistor divider circuit on 3.3V with a - * 13.7K resistor in series with a thermistor with nominal value of 47K (at 25C) - * and a B (25/100) value of 4050. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int get_temp_3v3_13k7_47k_4050b(int idx_adc, int *temp_ptr); -#endif - -#ifdef CONFIG_STEINHART_HART_3V3_51K1_47K_4050B -/** - * Reads the specified ADC channel and uses a lookup table and interpolation to - * return a temperature in degrees K. - * - * The lookup table is based off of a resistor divider circuit on 3.3V with a - * 51.1K resistor in series with a thermistor with nominal value of 47K (at 25C) - * and a B (25/100) value of 4050. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int get_temp_3v3_51k1_47k_4050b(int idx_adc, int *temp_ptr); -#endif - -#ifdef CONFIG_STEINHART_HART_6V0_51K1_47K_4050B -/** - * Reads the specified ADC channel and uses a lookup table and interpolation to - * return a temperature in degrees K. - * - * The lookup table is based off of a resistor divider circuit on 6.0V with a - * 51.1K resistor in series with a thermistor with nominal value of 47K (at 25C) - * and a B (25/100) value of 4050. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int get_temp_6v0_51k1_47k_4050b(int idx_adc, int *temp_ptr); -#endif - -#ifdef CONFIG_STEINHART_HART_3V0_22K6_47K_4050B -/** - * Reads the specified ADC channel and uses a lookup table and interpolation to - * return a temperature in degrees K. - * - * The lookup table is based off of a resistor divider circuit on 3V with a - * 22.6K resistor in series with a thermistor with nominal value of 47K (at 25C) - * and a B (25/100) value of 4050. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int get_temp_3v0_22k6_47k_4050b(int idx_adc, int *temp_ptr); -#endif - -#ifdef CONFIG_STEINHART_HART_3V3_30K9_47K_4050B -/** - * Reads the specified ADC channel and uses a lookup table and interpolation to - * return a temperature in degrees K. - * - * The lookup table is based off of a resistor divider circuit on 3.3V with a - * 30.9K resistor in series with a thermistor with nominal value of 47K (at 25C) - * and a B (25/100) value of 4050. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int get_temp_3v3_30k9_47k_4050b(int idx_adc, int *temp_ptr); -#endif - -/** - * Reads the sensor's ADC channel and uses a lookup table and interpolation to - * argument thermistor_info for interpolation to return a temperature in degrees - * K. - * - * @param idx_adc The idx value from the temp_sensor_t struct, which is - * the ADC channel to read and convert to degrees K - * @param temp_ptr Destination for temperature (in degrees K) - * @param info Structure containing information about the underlying thermistor - * that is necessary to interpolate temperature - * - * @return EC_SUCCESS, or non-zero if error. - */ -int thermistor_get_temperature(int idx_adc, int *temp_ptr, - const struct thermistor_info *info); - -#endif /* __CROS_EC_TEMP_SENSOR_THERMISTOR_NCP15WB_H */ diff --git a/include/driver/usb_mux/it5205_public.h b/include/driver/usb_mux/it5205_public.h deleted file mode 100644 index 81dc326049..0000000000 --- a/include/driver/usb_mux/it5205_public.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * ITE IT5205 Type-C USB alternate mode mux public header - */ - -#ifndef __CROS_EC_DRIVER_USB_MUX_IT5205_PUBLIC_H -#define __CROS_EC_DRIVER_USB_MUX_IT5205_PUBLIC_H - -/* I2C interface */ -#define IT5205_I2C_ADDR1_FLAGS 0x48 -#define IT5205_I2C_ADDR2_FLAGS 0x58 - -#endif /* __CROS_EC_DRIVER_USB_MUX_IT5205_PUBLIC_H */ diff --git a/include/driver/usb_mux/ps8743_public.h b/include/driver/usb_mux/ps8743_public.h deleted file mode 100644 index b0a7ae2eda..0000000000 --- a/include/driver/usb_mux/ps8743_public.h +++ /dev/null @@ -1,103 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Parade PS8743 USB Type-C Redriving Switch for USB Host / DisplayPort. - */ - -#ifndef __CROS_EC_DRIVER_USB_MUX_PS8743_PUBLIC_H -#define __CROS_EC_DRIVER_USB_MUX_PS8743_PUBLIC_H - -#include <inttypes.h> - -#define PS8743_I2C_ADDR0_FLAG 0x10 -#define PS8743_I2C_ADDR1_FLAG 0x11 -#define PS8743_I2C_ADDR2_FLAG 0x19 -#define PS8743_I2C_ADDR3_FLAG 0x1a - -/* Mode register for setting mux */ -#define PS8743_REG_MODE 0x00 -#define PS8743_MODE_IN_HPD_ASSERT BIT(0) -#define PS8743_MODE_IN_HPD_CONTROL BIT(1) -#define PS8743_MODE_FLIP_ENABLE BIT(2) -#define PS8743_MODE_FLIP_REG_CONTROL BIT(3) -#define PS8743_MODE_USB_ENABLE BIT(4) -#define PS8743_MODE_USB_REG_CONTROL BIT(5) -#define PS8743_MODE_DP_ENABLE BIT(6) -#define PS8743_MODE_DP_REG_CONTROL BIT(7) -/* To reset the state machine to default */ -#define PS8743_MODE_POWER_DOWN (PS8743_MODE_USB_REG_CONTROL | \ - PS8743_MODE_DP_REG_CONTROL) -/* DP output setting */ -#define PS8743_REG_DP_SETTING 0x07 -#define PS8743_DP_SWG_ADJ_DFLT 0x00 -#define PS8743_DP_SWG_ADJ_N20P 0x40 -#define PS8743_DP_SWG_ADJ_N15P 0x80 -#define PS8743_DP_SWG_ADJ_P15P 0xc0 -#define PS8743_DP_OUT_SWG_400 0x00 -#define PS8743_DP_OUT_SWG_600 0x10 -#define PS8743_DP_OUT_SWG_800 0x20 -#define PS8743_DP_OUT_SWG_1000 0x30 -#define PS8743_DP_OUT_PRE_EM_0_DB 0x00 -#define PS8743_DP_OUT_PRE_EM_3_5_DB 0x04 -#define PS8743_DP_OUT_PRE_EM_6_0_DB 0x08 -#define PS8743_DP_OUT_PRE_EM_9_5_DB 0x0c -#define PS8743_DP_POST_CUR2_0_DB 0x00 -#define PS8743_DP_POST_CUR2_NEG_0_9_DB 0x01 -#define PS8743_DP_POST_CUR2_NEG_1_9_DB 0x02 -#define PS8743_DP_POST_CUR2_NEG_3_1_DB 0x03 - -/* USB equalization settings for Host to Mux */ -#define PS8743_REG_USB_EQ_TX 0x32 -#define PS8743_USB_EQ_TX_12_8_DB 0x00 -#define PS8743_USB_EQ_TX_17_DB 0x20 -#define PS8743_USB_EQ_TX_7_7_DB 0x40 -#define PS8743_USB_EQ_TX_3_6_DB 0x60 -#define PS8743_USB_EQ_TX_15_DB 0x80 -#define PS8743_USB_EQ_TX_10_9_DB 0xc0 -#define PS8743_USB_EQ_TX_4_5_DB 0xe0 - -/* USB swing adjust for Mux to Type-C connector */ -#define PS8743_REG_USB_SWING 0x36 -#define PS8743_OUT_SWG_DEFAULT 0x00 -#define PS8743_OUT_SWG_NEG_20 0x40 -#define PS8743_OUT_SWG_NEG_15 0x80 -#define PS8743_OUT_SWG_POS_15 0xc0 -#define PS8743_LFPS_SWG_DEFAULT 0x00 -#define PS8743_LFPS_SWG_TD 0x08 - -/* USB equalization settings for Connector to Mux */ -#define PS8743_REG_USB_EQ_RX 0x3b -#define PS8743_USB_EQ_RX_2_4_DB 0x00 -#define PS8743_USB_EQ_RX_5_DB 0x10 -#define PS8743_USB_EQ_RX_6_5_DB 0x20 -#define PS8743_USB_EQ_RX_7_4_DB 0x30 -#define PS8743_USB_EQ_RX_8_7_DB 0x40 -#define PS8743_USB_EQ_RX_10_9_DB 0x50 -#define PS8743_USB_EQ_RX_12_8_DB 0x60 -#define PS8743_USB_EQ_RX_13_8_DB 0x70 -#define PS8743_USB_EQ_RX_14_8_DB 0x80 -#define PS8743_USB_EQ_RX_15_4_DB 0x90 -#define PS8743_USB_EQ_RX_16_0_DB 0xa0 -#define PS8743_USB_EQ_RX_16_7_DB 0xb0 -#define PS8743_USB_EQ_RX_18_8_DB 0xc0 -#define PS8743_USB_EQ_RX_21_3_DB 0xd0 -#define PS8743_USB_EQ_RX_22_2_DB 0xe0 - -/* USB High Speed Signal Detector thershold adjustment */ -#define PS8743_REG_HS_DET_THRESHOLD 0x3c -#define PS8743_USB_HS_THRESH_DEFAULT 0x00 -#define PS8743_USB_HS_THRESH_POS_10 0x20 -#define PS8743_USB_HS_THRESH_POS_33 0x40 -#define PS8743_USB_HS_THRESH_NEG_10 0x60 -#define PS8743_USB_HS_THRESH_NEG_25 0x80 -#define PS8743_USB_HS_THRESH_POS_25 0xa0 -#define PS8743_USB_HS_THRESH_NEG_45 0xc0 -#define PS8743_USB_HS_THRESH_NEG_35 0xe0 - -int ps8743_tune_usb_eq(const struct usb_mux *me, uint8_t tx, uint8_t rx); -int ps8743_write(const struct usb_mux *me, uint8_t reg, uint8_t val); -int ps8743_read(const struct usb_mux *me, uint8_t reg, int *val); -int ps8743_check_chip_id(const struct usb_mux *me, int *val); - -#endif /* __CROS_EC_DRIVER_USB_MUX_PS8743_PUBLIC_H */ diff --git a/include/ec_ec_comm_server.h b/include/ec_ec_comm_server.h deleted file mode 100644 index 1ed5588666..0000000000 --- a/include/ec_ec_comm_server.h +++ /dev/null @@ -1,20 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * EC-EC communication, functions and definition for server. - */ - -#ifndef EC_EC_COMM_SERVER_H_ -#define EC_EC_COMM_SERVER_H_ - -#include <stdint.h> -#include "consumer.h" -#include "queue.h" - -extern struct queue const ec_ec_comm_server_input; -extern struct queue const ec_ec_comm_server_output; - -void ec_ec_comm_server_written(struct consumer const *consumer, size_t count); - -#endif /* EC_EC_COMM_SERVER_H_ */ diff --git a/include/espi.h b/include/espi.h deleted file mode 100644 index d1b8af3425..0000000000 --- a/include/espi.h +++ /dev/null @@ -1,97 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* eSPI module for Chrome EC */ - -#ifndef __CROS_EC_ESPI_H -#define __CROS_EC_ESPI_H - -#include "gpio_signal.h" - -/* Signal through VW */ -enum espi_vw_signal { - /* The first valid VW signal is 0x2000 */ - VW_SIGNAL_START = IOEX_LIMIT + 1, - VW_SLP_S3_L = VW_SIGNAL_START, /* index 02h (In) */ - VW_SLP_S4_L, - VW_SLP_S5_L, - VW_SUS_STAT_L, /* index 03h (In) */ - VW_PLTRST_L, - VW_OOB_RST_WARN, - VW_OOB_RST_ACK, /* index 04h (Out) */ - VW_WAKE_L, - VW_PME_L, - VW_ERROR_FATAL, /* index 05h (Out) */ - VW_ERROR_NON_FATAL, - /* Merge bit 3/0 into one signal. Need to set them simultaneously */ - VW_PERIPHERAL_BTLD_STATUS_DONE, - VW_SCI_L, /* index 06h (Out) */ - VW_SMI_L, - VW_RCIN_L, - VW_HOST_RST_ACK, - VW_HOST_RST_WARN, /* index 07h (In) */ - VW_SUS_ACK, /* index 40h (Out) */ - VW_SUS_WARN_L, /* index 41h (In) */ - VW_SUS_PWRDN_ACK_L, - VW_SLP_A_L, - VW_SLP_LAN, /* index 42h (In) */ - VW_SLP_WLAN, - VW_SIGNAL_END, - VW_LIMIT = 0x2FFF -}; -BUILD_ASSERT(VW_SIGNAL_END < VW_LIMIT); - -#define VW_SIGNAL_COUNT (VW_SIGNAL_END - VW_SIGNAL_START) - -/** - * Set eSPI Virtual-Wire signal to Host - * - * @param signal vw signal needs to set - * @param level level of vw signal - * @return EC_SUCCESS, or non-zero if error. - */ -int espi_vw_set_wire(enum espi_vw_signal signal, uint8_t level); - -/** - * Get eSPI Virtual-Wire signal from host - * - * @param signal vw signal needs to get - * @return 1: set by host, otherwise: no signal - */ -int espi_vw_get_wire(enum espi_vw_signal signal); - -/** - * Enable VW interrupt of power sequence signal - * - * @param signal vw signal needs to enable interrupt - * @return EC_SUCCESS, or non-zero if error. - */ -int espi_vw_enable_wire_int(enum espi_vw_signal signal); - -/** - * Disable VW interrupt of power sequence signal - * - * @param signal vw signal needs to disable interrupt - * @return EC_SUCCESS, or non-zero if error. - */ -int espi_vw_disable_wire_int(enum espi_vw_signal signal); - -/** - * Return pointer to constant eSPI virtual wire signal name - * - * @param signal virtual wire enum - * @return pointer to string or NULL if signal out of range - */ -const char *espi_vw_get_wire_name(enum espi_vw_signal signal); - -/** - * Check if signal is an eSPI virtual wire - * @param signal is gpio_signal or espi_vw_signal enum casted to int - * @return 1 if signal is virtual wire else returns 0. - */ -int espi_signal_is_vw(int signal); - - -#endif /* __CROS_EC_ESPI_H */ diff --git a/include/event_log.h b/include/event_log.h deleted file mode 100644 index 45b10a3a2d..0000000000 --- a/include/event_log.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_EVENT_LOG_H -#define __CROS_EC_EVENT_LOG_H - -struct event_log_entry { - uint32_t timestamp; /* relative timestamp in milliseconds */ - uint8_t type; /* event type, caller-defined */ - uint8_t size; /* [7:5] caller-def'd [4:0] payload size in bytes */ - uint16_t data; /* type-defined data payload */ - uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ -} __packed; - -#define EVENT_LOG_SIZE_MASK 0x1f -#define EVENT_LOG_SIZE(size) ((size) & EVENT_LOG_SIZE_MASK) - -/* The timestamp is the microsecond counter shifted to get about a ms. */ -#define EVENT_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ -/* Returned in the "type" field, when there is no entry available */ -#define EVENT_LOG_NO_ENTRY 0xff - -/* Add an entry to the event log. */ -void log_add_event(uint8_t type, uint8_t size, uint16_t data, - void *payload, uint32_t timestamp); - -/* - * Remove and return an entry from the event log, if available. - * Returns size of log entry *r. - */ -int log_dequeue_event(struct event_log_entry *r); - -#endif /* __CROS_EC_EVENT_LOG_H */ diff --git a/include/fan.h b/include/fan.h deleted file mode 100644 index bd92b97254..0000000000 --- a/include/fan.h +++ /dev/null @@ -1,146 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Fan control module for Chrome EC */ - -#ifndef __CROS_EC_FAN_H -#define __CROS_EC_FAN_H - -#ifdef CONFIG_ZEPHYR -#ifdef CONFIG_PLATFORM_EC_FAN - -#include <devicetree.h> -#define NODE_ID_AND_COMMA(node_id) node_id, -enum fan_channel { -#if DT_NODE_EXISTS(DT_INST(0, named_fans)) - DT_FOREACH_CHILD(DT_INST(0, named_fans), NODE_ID_AND_COMMA) -#endif /* named_fans */ - FAN_CH_COUNT -}; - -#define CONFIG_FANS FAN_CH_COUNT - -#endif /* CONFIG_PLATFORM_EC_FAN */ -#endif /* CONFIG_ZEPHYR */ - -struct fan_conf { - unsigned int flags; - /* Hardware channel number (the meaning is chip-specific) */ - int ch; - /* Active-high power_good input GPIO, or -1 if none */ - int pgood_gpio; - /* Active-high power_enable output GPIO, or -1 if none */ - int enable_gpio; -}; - -struct fan_rpm { - /* rpm_min is to keep turning. rpm_start is to begin turning */ - int rpm_min; - int rpm_start; - int rpm_max; -}; - -/* Characteristic of each physical fan */ -struct fan_t { - const struct fan_conf *conf; - const struct fan_rpm *rpm; -}; - -/* Values for .flags field */ -/* Enable automatic RPM control using tach input */ -#define FAN_USE_RPM_MODE BIT(0) -/* Require a higher duty cycle to start up than to keep running */ -#define FAN_USE_FAST_START BIT(1) - -/* The list of fans is instantiated in board.c. */ -#ifdef CONFIG_FAN_DYNAMIC -extern struct fan_t fans[]; -#else -extern const struct fan_t fans[]; -#endif - -/* For convenience */ -#define FAN_CH(fan) fans[fan].conf->ch - -/** - * Set the amount of active cooling needed. The thermal control task will call - * this frequently, and the fan control logic will attempt to provide it. - * - * @param fan Fan number (index into fans[]) - * @param pct Percentage of cooling effort needed (0 - 100) - */ -void fan_set_percent_needed(int fan, int pct); - -/** - * This function translates the percentage of cooling needed into a target RPM. - * The default implementation should be sufficient for most needs, but - * individual boards may provide a custom version if needed (see config.h). - * - * @param fan Fan number (index into fans[]) - * @param pct Percentage of cooling effort needed (always in [0,100]) - * Return Target RPM for fan - */ -int fan_percent_to_rpm(int fan, int pct); - - -/** - * These functions require chip-specific implementations. - */ - -/* Enable/Disable the fan controller */ -void fan_set_enabled(int ch, int enabled); -int fan_get_enabled(int ch); - -/* Fixed pwm duty cycle (0-100%) */ -void fan_set_duty(int ch, int percent); -int fan_get_duty(int ch); - -/* Enable/Disable automatic RPM control using tach feedback */ -void fan_set_rpm_mode(int ch, int rpm_mode); -int fan_get_rpm_mode(int ch); - -/* Set the target for the automatic RPM control */ -void fan_set_rpm_target(int ch, int rpm); -int fan_get_rpm_actual(int ch); -int fan_get_rpm_target(int ch); - -/* Is the fan stalled when it shouldn't be? */ -int fan_is_stalled(int ch); - -/** - * STOPPED means not spinning. - * - * When setting fan rpm, some implementations in chip layer (npcx and it83xx) - * is to adjust fan pwm duty steps by steps. In this period, fan_status will - * be marked as CHANGING. After change is done, fan_status will become LOCKED. - * - * In the period of changing pwm duty, if it's trying to increase/decrease duty - * even when duty is already in upper/lower bound. Then this action won't work, - * and fan_status will be marked as FRUSTRATED. - * - * For other implementations in chip layer (mchp and mec1322), there is no - * changing period. So they don't have CHANGING status. - * Just return status as LOCKED in normal spinning case, return STOPPED when - * not spinning, return FRUSTRATED when the related flags (which is read from - * chip's register) is set. - */ -enum fan_status { - FAN_STATUS_STOPPED = 0, - FAN_STATUS_CHANGING = 1, - FAN_STATUS_LOCKED = 2, - FAN_STATUS_FRUSTRATED = 3 -}; -enum fan_status fan_get_status(int ch); - -/* Initialize the HW according to the desired flags */ -void fan_channel_setup(int ch, unsigned int flags); - -int fan_get_count(void); - -void fan_set_count(int count); - -int is_thermal_control_enabled(int idx); - -#endif /* __CROS_EC_FAN_H */ diff --git a/include/flash_log.h b/include/flash_log.h deleted file mode 100644 index e504df6ee7..0000000000 --- a/include/flash_log.h +++ /dev/null @@ -1,158 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_EVENT_LOG_H -#define __CROS_EC_EVENT_LOG_H - -#include "config.h" -#include "common.h" -#include "compile_time_macros.h" -#include "stddef.h" - -enum flash_event_type { - FE_LOG_START = 0, - FE_LOG_CORRUPTED = 1, - FE_TPM_I2C_ERROR = 2, - FE_LOG_OVERFLOWS = 3, /* A single byte, overflow counter. */ - FE_LOG_LOCKS = 4, /* A single byte, lock failures counter. */ - FE_LOG_NVMEM = 5, /* NVMEM failure, variable structure. */ - FE_LOG_TPM_WIPE_ERROR = 6, /* Failed to wipe the TPM */ - FE_LOG_TRNG_STALL = 7, /* Stall while retrieving a random number. */ - FE_LOG_DCRYPTO_FAILURE = 8, /* Dcrypto had to be reset. */ - - /* - * Fixed padding value makes it easier to parse log space - * snapshots. - */ - FE_LOG_PAD = 253, - /* A test event, the highest possible event type value. */ - FE_LOG_TEST = 254, -}; -struct flash_log_entry { - /* - * Until real wall clock time is available this is a monotonically - * increasing entry number. - * - * TODO(vbendeb): however unlikely, there could be multiple events - * logged within the same 1 second interval. There needs to be a - * way to handle this. Maybe storing incremental time, having only - * the very first entry in the log carry the real time. Maybe - * enhancing the log traversion function to allow multiple entries - * with the same timestamp value. - */ - uint32_t timestamp; - uint8_t size; /* [7:6] caller-def'd [5:0] payload size in bytes. */ - uint8_t type; /* event type, caller-defined */ - uint8_t crc; - uint8_t payload[0]; /* optional additional data payload: 0..63 bytes. */ -} __packed; - -/* Payloads for various log events. */ -/* NVMEM failures. */ -enum nvmem_failure_type { - NVMEMF_MALLOC = 0, - NVMEMF_PH_SIZE_MISMATCH = 1, - NVMEMF_READ_UNDERRUN = 2, - NVMEMF_INCONSISTENT_FLASH_CONTENTS = 3, - NVMEMF_MIGRATION_FAILURE = 4, - NVMEMF_LEGACY_ERASE_FAILURE = 5, - NVMEMF_EXCESS_DELETE_OBJECTS = 6, - NVMEMF_UNEXPECTED_LAST_OBJ = 7, - NVMEMF_MISSING_OBJECT = 8, - NVMEMF_SECTION_VERIFY = 9, - NVMEMF_PRE_ERASE_MISMATCH = 10, - NVMEMF_PAGE_LIST_OVERFLOW = 11, - NVMEMF_CIPHER_ERROR = 12, - NVMEMF_CORRUPTED_INIT = 13, - NVMEMF_CONTAINER_HASH_MISMATCH = 14, - NVMEMF_UNRECOVERABLE_INIT = 15, - NVMEMF_NVMEM_WIPE = 16, -}; - -/* Not all nvmem failures require payload. */ -struct nvmem_failure_payload { - uint8_t failure_type; - union { - uint16_t size; /* How much memory was requested. */ - struct { - uint16_t ph_offset; - uint16_t expected; - } ph __packed; - uint16_t underrun_size; /* How many bytes short. */ - uint8_t last_obj_type; - } __packed; -} __packed; - -/* Returned in the "type" field, when there is no entry available */ -#define FLASH_LOG_NO_ENTRY 0xff -#define MAX_FLASH_LOG_PAYLOAD_SIZE ((1 << 6) - 1) -#define FLASH_LOG_PAYLOAD_SIZE_MASK (MAX_FLASH_LOG_PAYLOAD_SIZE) - -#define FLASH_LOG_PAYLOAD_SIZE(size) ((size)&FLASH_LOG_PAYLOAD_SIZE_MASK) -/* Size of log entry for a specific payload size. */ -#define FLASH_LOG_ENTRY_SIZE(payload_sz) \ - ((FLASH_LOG_PAYLOAD_SIZE(payload_sz) + \ - sizeof(struct flash_log_entry) + CONFIG_FLASH_WRITE_SIZE - 1) & \ - ~(CONFIG_FLASH_WRITE_SIZE - 1)) - -/* - * Flash log implementation expects minimum flash write size not to exceed the - * log header structure size. - * - * It will be easy to extend implementation to cover larger write sizes if - * necessary. - */ -BUILD_ASSERT(sizeof(struct flash_log_entry) >= CONFIG_FLASH_WRITE_SIZE); - -/* A helper structure to represent maximum size flash elog event entry. */ -union entry_u { - uint8_t entry[FLASH_LOG_ENTRY_SIZE(MAX_FLASH_LOG_PAYLOAD_SIZE)]; - struct flash_log_entry r; -}; - -#define COMPACTION_SPACE_PRESERVE (CONFIG_FLASH_LOG_SPACE / 4) -#define STARTUP_LOG_FULL_WATERMARK (CONFIG_FLASH_LOG_SPACE * 3 / 4) -#define RUN_TIME_LOG_FULL_WATERMARK (CONFIG_FLASH_LOG_SPACE * 9 / 10) - -/* - * Add an entry to the event log. No errors are reported, as there is little - * we can do if logging attempt fails. - */ -void flash_log_add_event(uint8_t type, uint8_t size, void *payload); - -/* - * Report the next event after the passed in number. - * - * Return - * - positive integer - the size of the retrieved event - * - 0 if there is no more events - * - -EC_ERROR_BUSY if event logging is in progress - * - -EC_ERROR_MEMORY_ALLOCATION if event body does not fit into the buffer - * - -EC_ERROR_INVAL in case log storage is corrupted - */ -int flash_log_dequeue_event(uint32_t event_after, void *buffer, - size_t buffer_size); - -void flash_log_register_flash_control_callback( - void (*flash_control)(int enable)); - -/* - * Set log timestamp base. The argument is current epoch time in seconds. - * Return value of EC_ERROR_INVAL indicates attempt to set the timestamp base - * to a value below the latest log entry timestamp. - */ -enum ec_error_list flash_log_set_tstamp(uint32_t tstamp); - -/* Get current log timestamp value. */ -uint32_t flash_log_get_tstamp(void); - -#if defined(TEST_BUILD) -void flash_log_init(void); -extern uint32_t last_used_timestamp; -extern uint32_t lock_failures_count; -extern uint8_t log_event_in_progress; -#endif - -#endif /* __CROS_EC_EVENT_LOG_H */ diff --git a/include/fpsensor.h b/include/fpsensor.h deleted file mode 100644 index 2c5baa2679..0000000000 --- a/include/fpsensor.h +++ /dev/null @@ -1,168 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Fingerprint sensor interface */ - -#ifndef __CROS_EC_FPSENSOR_H -#define __CROS_EC_FPSENSOR_H - -#include <stdint.h> -#include "common.h" -#include "ec_commands.h" - -#ifndef SPI_FP_DEVICE -#define SPI_FP_DEVICE (&spi_devices[0]) -#endif - -/* Four-character-code */ -#define FOURCC(a, b, c, d) ((uint32_t)(a) | ((uint32_t)(b) << 8) | \ - ((uint32_t)(c) << 16) | ((uint32_t)(d) << 24)) - -/* 8-bit greyscale pixel format as defined by V4L2 headers */ -#define V4L2_PIX_FMT_GREY FOURCC('G', 'R', 'E', 'Y') - -/* --- functions provided by the sensor-specific driver --- */ - -/* Initialize the connected sensor hardware and put it in a low power mode. */ -int fp_sensor_init(void); - -/* De-initialize the sensor hardware. */ -int fp_sensor_deinit(void); - -/* - * Fill the 'ec_response_fp_info' buffer with the sensor information - * as required by the EC_CMD_FP_INFO host command. - * - * Put both the static information and the ones read from the sensor at runtime. - */ -int fp_sensor_get_info(struct ec_response_fp_info *resp); - -/* - * Put the sensor in its lowest power state. - * - * fp_sensor_configure_detect needs to be called to restore finger detection - * functionality. - */ -void fp_sensor_low_power(void); - -/* - * Configure finger detection. - * - * Send the settings to the sensor, so it is properly configured to detect - * the presence of a finger. - */ -void fp_sensor_configure_detect(void); - -/* - * Returns the status of the finger on the sensor. - * (assumes fp_sensor_configure_detect was called before) - */ -enum finger_state { - FINGER_NONE = 0, - FINGER_PARTIAL = 1, - FINGER_PRESENT = 2, -}; -enum finger_state fp_sensor_finger_status(void); - -/* - * Acquires a fingerprint image. - * - * This function is called once the finger has been detected and cover enough - * area of the sensor (ie fp_sensor_finger_status returned FINGER_PRESENT). - * It does the acquisition immediately. - * The image_data parameter points to an image data buffer of size - * - * FP_SENSOR_IMAGE_SIZE allocated by the caller. - * Returns: - * - 0 on success - * - negative value on error - * - FP_SENSOR_LOW_IMAGE_QUALITY on image captured but quality is too low - * - FP_SENSOR_TOO_FAST on finger removed before image was captured - * - FP_SENSOR_LOW_SENSOR_COVERAGE on sensor not fully covered by finger - */ -#define FP_SENSOR_LOW_IMAGE_QUALITY 1 -#define FP_SENSOR_TOO_FAST 2 -#define FP_SENSOR_LOW_SENSOR_COVERAGE 3 -int fp_sensor_acquire_image(uint8_t *image_data); - -/* - * Acquires a fingerprint image with specific capture mode. - * - * Same as the fp_sensor_acquire_image function above, - * excepted 'mode' can be set to one of the FP_CAPTURE_ constants - * to get a specific image type (e.g. a pattern) rather than the default one. - */ -int fp_sensor_acquire_image_with_mode(uint8_t *image_data, int mode); - -/* - * Compares given finger image against enrolled templates. - * - * The matching algorithm can update the template with additional biometric data - * from the image, if it chooses to do so. - * - * @param templ a pointer to the array of template buffers. - * @param templ_count the number of buffers in the array of templates. - * @param image the buffer containing the finger image - * @param match_index index of the matched finger in the template array if any. - * @param update_bitmap contains one bit per template, the bit is set if the - * match has updated the given template. - * @return negative value on error, else one of the following code : - * - EC_MKBP_FP_ERR_MATCH_NO on non-match - * - EC_MKBP_FP_ERR_MATCH_YES for match when template was not updated with - * new data - * - EC_MKBP_FP_ERR_MATCH_YES_UPDATED for match when template was updated - * - EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED match, but update failed (not saved) - * - EC_MKBP_FP_ERR_MATCH_LOW_QUALITY when matching could not be performed due - * to low image quality - * - EC_MKBP_FP_ERR_MATCH_LOW_COVERAGE when matching could not be performed - * due to finger covering too little area of the sensor - */ -int fp_finger_match(void *templ, uint32_t templ_count, uint8_t *image, - int32_t *match_index, uint32_t *update_bitmap); - -/* - * Start a finger enrollment session. - * - * @return 0 on success or a negative error code. - */ -int fp_enrollment_begin(void); - -/* - * Generate a template from the finger whose enrollment has just being - * completed. - * - * @param templ the buffer which will receive the template. - * templ can be set to NULL to abort the current enrollment process. - * - * @return 0 on success or a negative error code. - */ -int fp_enrollment_finish(void *templ); - -/* - * Adds fingerprint image to the current enrollment session. - * - * @return a negative value on error or one of the following codes: - * - EC_MKBP_FP_ERR_ENROLL_OK when image was successfully enrolled - * - EC_MKBP_FP_ERR_ENROLL_IMMOBILE when image added, but user should be - * advised to move finger - * - EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY when image could not be used due to low - * image quality - * - EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE when image could not be used due to - * finger covering too little area of the sensor - */ -int fp_finger_enroll(uint8_t *image, int *completion); - -/** - * Runs a test for defective pixels. - * - * Should be triggered periodically by the client. The maintenance command can - * take several hundred milliseconds to run. - * - * @return EC_ERROR_HW_INTERNAL on error (such as finger on sensor) - * @return EC_SUCCESS on success - */ -int fp_maintenance(void); - -#endif /* __CROS_EC_FPSENSOR_H */ diff --git a/include/fpsensor_crypto.h b/include/fpsensor_crypto.h deleted file mode 100644 index b6252b3fd2..0000000000 --- a/include/fpsensor_crypto.h +++ /dev/null @@ -1,95 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Fingerprint sensor crypto operations */ - -#ifndef __CROS_EC_FPSENSOR_CRYPTO_H -#define __CROS_EC_FPSENSOR_CRYPTO_H - -#include <stddef.h> - -#include "sha256.h" - -#define HKDF_MAX_INFO_SIZE 128 -#define HKDF_SHA256_MAX_BLOCK_COUNT 255 - -/** - * Expand hkdf pseudorandom key |prk| to length |out_key_size|. - * - * @param out_key the buffer to hold output key material. - * @param out_key_size length of output key in bytes. Must be less than - * or equal to HKDF_SHA256_MAX_BLOCK_COUNT * SHA256_DIGEST_SIZE bytes. - * @param prk pseudorandom key. - * @param prk_size length of |prk| in bytes. - * @param info optional context. - * @param info_size size of |info| in bytes, must be less than or equal to - * HKDF_MAX_INFO_SIZE bytes. - * @return EC_SUCCESS on success and error code otherwise. - */ -int hkdf_expand(uint8_t *out_key, size_t out_key_size, const uint8_t *prk, - size_t prk_size, const uint8_t *info, size_t info_size); - -/** - * Derive hardware encryption key from rollback secret and |salt|. - * - * @param outkey the pointer to buffer holding the output key. - * @param salt the salt to use in HKDF. - * @return EC_SUCCESS on success and error code otherwise. - */ -int derive_encryption_key(uint8_t *out_key, const uint8_t *salt); - -/** - * Derive positive match secret from |input_positive_match_salt| and - * SBP_Src_Key. - * - * @param output buffer to store positive match secret, must be at least - * FP_POSITIVE_MATCH_SECRET_BYTES in size. - * @param input_positive_match_salt the salt for deriving secret, must be at - * least FP_POSITIVE_MATCH_SALT_BYTES in size. - * @return EC_SUCCESS on success and error code otherwise. - */ -int derive_positive_match_secret(uint8_t *output, - const uint8_t *input_positive_match_salt); - -/** - * Encrypt |plaintext| using AES-GCM128. - * - * @param key the key to use in AES. - * @param key_size the size of |key| in bytes. - * @param plaintext the plain text to encrypt. - * @param ciphertext buffer to hold encryption result. - * @param text_size size of both |plaintext| and output ciphertext in bytes. - * @param nonce the nonce value to use in GCM128. - * @param nonce_size the size of |nonce| in bytes. - * @param tag the tag to hold the authenticator after encryption. - * @param tag_size the size of |tag|. - * @return EC_SUCCESS on success and error code otherwise. - */ -int aes_gcm_encrypt(const uint8_t *key, int key_size, - const uint8_t *plaintext, - uint8_t *ciphertext, int text_size, - const uint8_t *nonce, int nonce_size, - uint8_t *tag, int tag_size); - -/** - * Decrypt |plaintext| using AES-GCM128. - * - * @param key the key to use in AES. - * @param key_size the size of |key| in bytes. - * @param ciphertext the cipher text to decrypt. - * @param plaintext buffer to hold decryption result. - * @param text_size size of both |ciphertext| and output plaintext in bytes. - * @param nonce the nonce value to use in GCM128. - * @param nonce_size the size of |nonce| in bytes. - * @param tag the tag to compare against when decryption finishes. - * @param tag_size the length of tag to compare against. - * @return EC_SUCCESS on success and error code otherwise. - */ -int aes_gcm_decrypt(const uint8_t *key, int key_size, uint8_t *plaintext, - const uint8_t *ciphertext, int text_size, - const uint8_t *nonce, int nonce_size, - const uint8_t *tag, int tag_size); - -#endif /* __CROS_EC_FPSENSOR_CRYPTO_H */ diff --git a/include/fpsensor_state.h b/include/fpsensor_state.h deleted file mode 100644 index 6b752bc86d..0000000000 --- a/include/fpsensor_state.h +++ /dev/null @@ -1,139 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Fingerprint sensor interface */ - -#ifndef __CROS_EC_FPSENSOR_STATE_H -#define __CROS_EC_FPSENSOR_STATE_H - -#include <stdbool.h> -#include <stdint.h> -#include "common.h" -#include "ec_commands.h" -#include "link_defs.h" -#include "timer.h" - -#include "driver/fingerprint/fpsensor.h" - -/* if no special memory regions are defined, fallback on regular SRAM */ -#ifndef FP_FRAME_SECTION -#define FP_FRAME_SECTION -#endif -#ifndef FP_TEMPLATE_SECTION -#define FP_TEMPLATE_SECTION -#endif - -#define SBP_ENC_KEY_LEN 16 -#define FP_ALGORITHM_ENCRYPTED_TEMPLATE_SIZE \ - (FP_ALGORITHM_TEMPLATE_SIZE + \ - FP_POSITIVE_MATCH_SALT_BYTES + \ - sizeof(struct ec_fp_template_encryption_metadata)) - -/* Events for the FPSENSOR task */ -#define TASK_EVENT_SENSOR_IRQ TASK_EVENT_CUSTOM_BIT(0) -#define TASK_EVENT_UPDATE_CONFIG TASK_EVENT_CUSTOM_BIT(1) - -#define FP_NO_SUCH_TEMPLATE -1 - -/* --- Global variables defined in fpsensor_state.c --- */ - -/* Last acquired frame (aligned as it is used by arbitrary binary libraries) */ -extern uint8_t fp_buffer[FP_SENSOR_IMAGE_SIZE]; -/* Fingers templates for the current user */ -extern uint8_t fp_template[FP_MAX_FINGER_COUNT][FP_ALGORITHM_TEMPLATE_SIZE]; -/* Encryption/decryption buffer */ -/* TODO: On-the-fly encryption/decryption without a dedicated buffer */ -/* - * Store the encryption metadata at the beginning of the buffer containing the - * ciphered data. - */ -extern uint8_t fp_enc_buffer[FP_ALGORITHM_ENCRYPTED_TEMPLATE_SIZE]; -/* Salt used in derivation of positive match secret. */ -extern uint8_t fp_positive_match_salt - [FP_MAX_FINGER_COUNT][FP_POSITIVE_MATCH_SALT_BYTES]; -/* Index of the last enrolled but not retrieved template. */ -extern int8_t template_newly_enrolled; -/* Number of used templates */ -extern uint32_t templ_valid; -/* Bitmap of the templates with local modifications */ -extern uint32_t templ_dirty; -/* Current user ID */ -extern uint32_t user_id[FP_CONTEXT_USERID_WORDS]; -/* Part of the IKM used to derive encryption keys received from the TPM. */ -extern uint8_t tpm_seed[FP_CONTEXT_TPM_BYTES]; - -extern uint32_t fp_events; - -extern uint32_t sensor_mode; - -struct positive_match_secret_state { - /* Index of the most recently matched template. */ - int8_t template_matched; - /* Flag indicating positive match secret can be read. */ - bool readable; - /* Deadline to read positive match secret. */ - timestamp_t deadline; -}; - -extern struct positive_match_secret_state positive_match_secret_state; - -/* Simulation for unit tests. */ -void fp_task_simulate(void); - -/* - * Clear one fingerprint template. - * - * @param idx the index of the template to clear. - */ -void fp_clear_finger_context(int idx); - -/** - * Clear all fingerprint templates associated with the current user id and - * reset the sensor. - */ -void fp_reset_and_clear_context(void); - -/* - * Get the next FP event. - * - * @param out the pointer to the output event. - */ -int fp_get_next_event(uint8_t *out); - -/* - * Check if FP TPM seed has been set. - * - * @return 1 if the seed has been set, 0 otherwise. - */ -int fp_tpm_seed_is_set(void); - -/** - * Change the sensor mode. - * - * @param mode new mode to change to - * @param mode_output resulting mode - * @return EC_RES_SUCCESS on success. Error code on failure. - */ -int fp_set_sensor_mode(uint32_t mode, uint32_t *mode_output); - -/** - * Allow reading positive match secret for |fgr| in the next 5 seconds. - * - * @param fgr the index of template to enable positive match secret. - * @param state the state of positive match secret, e.g. readable or not. - * @return EC_SUCCESS if the request is valid, error code otherwise. - */ -int fp_enable_positive_match_secret(uint32_t fgr, - struct positive_match_secret_state *state); - -/** - * Disallow positive match secret for any finger to be read. - * - * @param state the state of positive match secret, e.g. readable or not. - */ -void fp_disable_positive_match_secret( - struct positive_match_secret_state *state); - -#endif /* __CROS_EC_FPSENSOR_STATE_H */ diff --git a/include/gyro_cal.h b/include/gyro_cal.h deleted file mode 100644 index fb69464aec..0000000000 --- a/include/gyro_cal.h +++ /dev/null @@ -1,163 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_GYRO_CAL_H -#define __CROS_EC_GYRO_CAL_H - -#include "common.h" -#include "gyro_still_det.h" -#include "math_util.h" -#include "stdbool.h" -#include "stddef.h" -#include "vec3.h" - -struct temperature_mean_data { - int16_t temperature_min_kelvin; - int16_t temperature_max_kelvin; - int16_t latest_temperature_kelvin; - int mean_accumulator; - size_t num_points; -}; - -/** Data structure for tracking min/max window mean during device stillness. */ -struct min_max_window_mean_data { - fpv3_t gyro_winmean_min; - fpv3_t gyro_winmean_max; -}; - -struct gyro_cal { - /** Stillness detector for accelerometer. */ - struct gyro_still_det accel_stillness_detect; - /** Stillness detector for magnetometer. */ - struct gyro_still_det mag_stillness_detect; - /** Stillness detector for gyroscope. */ - struct gyro_still_det gyro_stillness_detect; - - /** - * Data for tracking temperature mean during periods of device - * stillness. - */ - struct temperature_mean_data temperature_mean_tracker; - - /** Data for tracking gyro mean during periods of device stillness. */ - struct min_max_window_mean_data window_mean_tracker; - - /** - * Aggregated sensor stillness threshold required for gyro bias - * calibration. - */ - fp_t stillness_threshold; - - /** Min and max durations for gyro bias calibration. */ - uint32_t min_still_duration_us; - uint32_t max_still_duration_us; - - /** Duration of the stillness processing windows. */ - uint32_t window_time_duration_us; - - /** Timestamp when device started a still period. */ - uint64_t start_still_time_us; - - /** - * Gyro offset estimate, and the associated calibration temperature, - * timestamp, and stillness confidence values. - * [rad/sec] - */ - fp_t bias_x, bias_y, bias_z; - int bias_temperature_kelvin; - fp_t stillness_confidence; - uint32_t calibration_time_us; - - /** - * Current window end-time for all sensors. Used to assist in keeping - * sensor data collection in sync. On initialization this will be set to - * zero indicating that sensor data will be dropped until a valid - * end-time is set from the first gyro timestamp received. - */ - uint32_t stillness_win_endtime_us; - - /** - * Watchdog timer to reset to a known good state when data capture - * stalls. - */ - uint32_t gyro_window_start_us; - uint32_t gyro_window_timeout_duration_us; - - /** Flag is "true" when the magnetometer is used. */ - bool using_mag_sensor; - - /** Flag set by user to control whether calibrations are used. */ - bool gyro_calibration_enable; - - /** Flag is 'true' when a new calibration update is ready. */ - bool new_gyro_cal_available; - - /** Flag to indicate if device was previously still. */ - bool prev_still; - - /** - * Min and maximum stillness window mean. This is used to check the - * stability of the mean values computed for the gyroscope (i.e. - * provides further validation for stillness). - */ - fpv3_t gyro_winmean_min; - fpv3_t gyro_winmean_max; - fp_t stillness_mean_delta_limit; - - /** - * The mean temperature over the stillness period. The limit is used to - * check for temperature stability and provide a gate for when - * temperature is rapidly changing. - */ - fp_t temperature_mean_kelvin; - fp_t temperature_delta_limit_kelvin; -}; - -/** - * Data structure used to configure the gyroscope calibration in individual - * sensors. - */ -struct gyro_cal_data { - /** The gyro_cal struct to use. */ - struct gyro_cal gyro_cal; - /** The sensor ID of the accelerometer to use. */ - uint8_t accel_sensor_id; - /** - * The sensor ID of the accelerometer to use (use a number greater than - * SENSOR_COUNT to skip). - */ - uint8_t mag_sensor_id; -}; - -/** Reset trackers. */ -void init_gyro_cal(struct gyro_cal *gyro_cal); - -/** Get the most recent bias calibration value. */ -void gyro_cal_get_bias(struct gyro_cal *gyro_cal, fpv3_t bias, - int *temperature_kelvin, uint32_t *calibration_time_us); - -/** Set an initial bias calibration value. */ -void gyro_cal_set_bias(struct gyro_cal *gyro_cal, fpv3_t bias, - int temperature_kelvin, uint32_t calibration_time_us); - -/** Remove gyro bias from the calibration [rad/sec]. */ -void gyro_cal_remove_bias(struct gyro_cal *gyro_cal, fpv3_t in, fpv3_t out); - -/** Returns true when a new gyro calibration is available. */ -bool gyro_cal_new_bias_available(struct gyro_cal *gyro_cal); - -/** Update the gyro calibration with gyro data [rad/sec]. */ -void gyro_cal_update_gyro(struct gyro_cal *gyro_cal, uint32_t sample_time_us, - fp_t x, fp_t y, fp_t z, int temperature_kelvin); - -/** Update the gyro calibration with mag data [micro Tesla]. */ -void gyro_cal_update_mag(struct gyro_cal *gyro_cal, uint32_t sample_time_us, - fp_t x, fp_t y, fp_t z); - -/** Update the gyro calibration with accel data [m/sec^2]. */ -void gyro_cal_update_accel(struct gyro_cal *gyro_cal, uint32_t sample_time_us, - fp_t x, fp_t y, fp_t z); - -#endif /* __CROS_EC_GYRO_CAL_H */ diff --git a/include/gyro_still_det.h b/include/gyro_still_det.h deleted file mode 100644 index a776da7ae7..0000000000 --- a/include/gyro_still_det.h +++ /dev/null @@ -1,91 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_GYRO_STILL_DET_H -#define __CROS_EC_GYRO_STILL_DET_H - -#include "common.h" -#include "math_util.h" -#include "stdbool.h" -#include "vec3.h" - -struct gyro_still_det { - /** - * Variance threshold for the stillness confidence score. - * [sensor units]^2 - */ - fp_t var_threshold; - - /** - * Delta about the variance threshold for calculation of the stillness - * confidence score [0,1]. [sensor units]^2 - */ - fp_t confidence_delta; - - /** - * Flag to indicate when enough samples have been collected for - * a complete stillness calculation. - */ - bool stillness_window_ready; - - /** - * Flag to signal the beginning of a new stillness detection window. - * This is used to keep track of the window start time. - */ - bool start_new_window; - - /** Starting time stamp for the current window. */ - uint32_t window_start_time; - - /** - * Accumulator variables for tracking the sample mean during - * the stillness period. - */ - uint32_t num_acc_samples; - fpv3_t mean; - - /** - * Accumulator variables for computing the window sample mean and - * variance for the current window (used for stillness detection). - */ - uint32_t num_acc_win_samples; - fpv3_t win_mean; - fpv3_t assumed_mean; - fpv3_t acc_var; - - /** Stillness period mean (used for look-ahead). */ - fpv3_t prev_mean; - - /** Latest computed variance. */ - fpv3_t win_var; - - /** - * Stillness confidence score for current and previous sample - * windows [0,1] (used for look-ahead). - */ - fp_t stillness_confidence; - fp_t prev_stillness_confidence; - - /** Timestamp of last sample recorded. */ - uint32_t last_sample_time; -}; - -/** Update the stillness detector with a new sample. */ -void gyro_still_det_update(struct gyro_still_det *gyro_still_det, - uint32_t stillness_win_endtime, uint32_t sample_time, - fp_t x, fp_t y, fp_t z); - -/** Calculates and returns the stillness confidence score [0,1]. */ -fp_t gyro_still_det_compute(struct gyro_still_det *gyro_still_det); - -/** - * Resets the stillness detector and initiates a new detection window. - * - * @param reset_stats Determines whether the stillness statistics are reset. - */ -void gyro_still_det_reset(struct gyro_still_det *gyro_still_det, - bool reset_stats); - -#endif /* __CROS_EC_GYRO_STILL_DET_H */ diff --git a/include/hotword_dsp_api.h b/include/hotword_dsp_api.h deleted file mode 100644 index 369af00ede..0000000000 --- a/include/hotword_dsp_api.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef SPEECH_MICRO_API_HOTWORD_DSP_API_H_ -#define SPEECH_MICRO_API_HOTWORD_DSP_API_H_ - -/* - * This API creates a global singleton behind the scenes. It's the caller's - * responsibility to store the contents of the hotword_memmap model file into - * aligned memory and pass its pointer to this library. Note that no additional - * memory is allocated and hotword_memmap will contain both the model and the - * scratch buffers. - */ - -/* Specifies the required alignment for the hotword_memmap. */ -extern const int kGoogleHotwordRequiredDataAlignment; - -/* - * Called to set up the Google hotword algorithm. Returns 1 if successful, and 0 - * otherwise. - */ -int GoogleHotwordDspInit(void *hotword_memmap); - -/* - * Call with every frame of samples to process. If a hotword is detected, this - * function returns 1 otherwise 0. The required preamble length will be set to - * the number of milliseconds of buffered audio to be transferred to the AP. - */ -int GoogleHotwordDspProcess(const void *samples, int num_samples, - int *preamble_length_ms); - -/* - * If there's a break in the audio stream (e.g. when Sound Activity Detection is - * enabled), call this before any subsequent calls to GoogleHotwordDspProcess. - */ -void GoogleHotwordDspReset(void); - -/* Returns the maximum possible audio preamble length in miliseconds. */ -int GoogleHotwordDspGetMaximumAudioPreambleMs(void); - -/* Returns an internal version number that this library was built at. */ -extern int GoogleHotwordVersion(void); - -#endif /* SPEECH_MICRO_API_HOTWORD_DSP_API_H_ */ diff --git a/include/i2c_hid.h b/include/i2c_hid.h deleted file mode 100644 index 8568b42837..0000000000 --- a/include/i2c_hid.h +++ /dev/null @@ -1,67 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * General definitions for I2C-HID - * - * For a complete reference, please see the following docs on - * https://docs.microsoft.com/ - * - * 1. hid-over-i2c-protocol-spec-v1-0.docx - */ -#ifndef __CROS_EC_I2C_HID_H -#define __CROS_EC_I2C_HID_H - -#include "common.h" -#include "stdint.h" - -/* - * I2C-HID registers - * - * Except for I2C_HID_HID_DESC_REGISTER, fields in this section can be chosen - * freely so we just picked something that we are happy with. - * - * I2C_HID_HID_DESC_REGISTER is defined in the ACPI table so please make sure - * you have put in the same value there. - */ -#define I2C_HID_HID_DESC_REGISTER 0x0001 -#define I2C_HID_REPORT_DESC_REGISTER 0x1000 -#define I2C_HID_INPUT_REPORT_REGISTER 0x2000 -#define I2C_HID_COMMAND_REGISTER 0x3000 -#define I2C_HID_DATA_REGISTER 0x3000 - -/* I2C-HID commands */ -#define I2C_HID_CMD_RESET 0x01 -#define I2C_HID_CMD_GET_REPORT 0x02 -#define I2C_HID_CMD_SET_REPORT 0x03 -#define I2C_HID_CMD_GET_IDLE 0x04 -#define I2C_HID_CMD_SET_IDLE 0x05 -#define I2C_HID_CMD_GET_PROTOCOL 0x06 -#define I2C_HID_CMD_SET_PROTOCOL 0x07 -#define I2C_HID_CMD_SET_POWER 0x08 - -/* Common HID fields */ -#define I2C_HID_DESC_LENGTH sizeof(struct i2c_hid_descriptor) -#define I2C_HID_BCD_VERSION 0x0100 - -/* I2C-HID HID descriptor */ -struct __packed i2c_hid_descriptor { - uint16_t wHIDDescLength; - uint16_t bcdVersion; - uint16_t wReportDescLength; - uint16_t wReportDescRegister; - uint16_t wInputRegister; - uint16_t wMaxInputLength; - uint16_t wOutputRegister; - uint16_t wMaxOutputLength; - uint16_t wCommandRegister; - uint16_t wDataRegister; - uint16_t wVendorID; - uint16_t wProductID; - uint16_t wVersionID; - uint32_t reserved; -}; - -#endif /* __CROS_EC_I2C_HID_H */ diff --git a/include/i2c_hid_touchpad.h b/include/i2c_hid_touchpad.h deleted file mode 100644 index d5d728a488..0000000000 --- a/include/i2c_hid_touchpad.h +++ /dev/null @@ -1,81 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Implementation of I2C HID for touchpads */ -#ifndef __CROS_EC_I2C_HID_TOUCHPAD_H -#define __CROS_EC_I2C_HID_TOUCHPAD_H - -#include "common.h" -#include "i2c_hid.h" -#include "stdbool.h" -#include "stdint.h" - -/* Max fingers to support */ -#define I2C_HID_TOUCHPAD_MAX_FINGERS 5 - -/* - * Struct holding a touchpad event - * - * The user should parse the original touchpad report, apply necessary - * transformations and fill the result in this common struct. The touchpad is - * assumed to implement the Linux HID MT-B protocol. - */ -struct touchpad_event { - /* If hover is detected */ - bool hover; - /* If button is clicked */ - bool button; - /* Struct for contacts */ - struct { - /* X & Y of the contact */ - uint16_t x; - uint16_t y; - /* Pressure/contact area */ - uint16_t pressure; - /* W & H of the contact */ - uint16_t width; - uint16_t height; - /* - * Orientation of the contact ellipse. Can be plain 0 if - * unavailable. - */ - uint16_t orientation; - /* - * If the touchpad believes it is a palm. Some touchpads report - * it through the confidence field. - */ - bool is_palm; - /* If this slot contains valid contact (touching the surface) */ - bool valid; - } __packed finger[I2C_HID_TOUCHPAD_MAX_FINGERS]; -} __packed; - -/* Initialize the I2C HID touchpad */ -void i2c_hid_touchpad_init(void); -/* - * Process an I2C-HID command from host. - * - * @param len >= 0 - Input data length in bytes - * @param buffer Shared input/output buffer - * @param send_response Function to send the response to host - * @param data Extracted request content if there is any - * @param reg I2C HID register as defined in include/i2c-hid.h - * @param cmd I2C HID command as defined in common/i2c_hid_touchpad.c - * - * @return EC_SUCCESS, or non-zero if error. - */ -int i2c_hid_touchpad_process(unsigned int len, uint8_t *buffer, - void (*send_response)(int len), uint8_t *data, - int *reg, int *cmd); -/** - * Compile an (outgoing) HID input report for an (incoming) touchpad event - * - * The compiled report would be sent next time when the host requests one. - * - * @param touchpad_event Touchpad event data - */ -void i2c_hid_compile_report(struct touchpad_event *event); - -#endif /* __CROS_EC_I2C_HID_TOUCHPAD_H */ diff --git a/include/i2c_ite_flash_support.h b/include/i2c_ite_flash_support.h deleted file mode 100644 index f70bec877a..0000000000 --- a/include/i2c_ite_flash_support.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* API for module that provides flash support for ITE-based ECs over i2c */ - -#ifndef __CROS_EC_I2C_ITE_FLASH_SUPPORT_H -#define __CROS_EC_I2C_ITE_FLASH_SUPPORT_H - -#include "gpio.h" -#include "stdbool.h" - -struct ite_dfu_config_t { - /* I2C port to communicate on */ - int i2c_port; - /* True if using OC1N instead of OC1 */ - bool use_complement_timer_channel; - /* - * Optional function that guards access to i2c port. If present, the - * return value should return true if dfu access is allowed and false - * otherwise. - */ - bool (*access_allow)(void); - /* - * The gpio signals that moved between TIM16/17 (MODULE_I2C_TIMERS) and - * I2C (MODULE_I2C). - */ - enum gpio_signal scl; - enum gpio_signal sda; -}; - -/* Provided by board implementation if CONFIG_ITE_FLASH_SUPPORT is used */ -const extern struct ite_dfu_config_t ite_dfu_config; - -#endif /* __CROS_EC_I2C_ITE_FLASH_SUPPORT_H */ diff --git a/include/i2c_peripheral.h b/include/i2c_peripheral.h deleted file mode 100644 index 488e886b0e..0000000000 --- a/include/i2c_peripheral.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* I2C peripheral interface for Chrome EC */ - -#ifndef __CROS_EC_I2C_PERIPHERAL_H -#define __CROS_EC_I2C_PERIPHERAL_H - -/* Data structure to define I2C peripheral port configuration. */ -struct i2c_periph_port_t { - const char *name; /* Port name */ - int port; /* Port */ - uint8_t addr; /* address(7-bit without R/W) */ -}; - -extern const struct i2c_periph_port_t i2c_periph_ports[]; -extern const unsigned int i2c_periphs_used; - -#endif /* __CROS_EC_I2C_PERIPHERAL_H */ diff --git a/include/i8042_protocol.h b/include/i8042_protocol.h deleted file mode 100644 index 7e554fc03e..0000000000 --- a/include/i8042_protocol.h +++ /dev/null @@ -1,92 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * i8042 keyboard protocol constants - */ - -#ifndef __CROS_EC_I8042_PROTOCOL_H -#define __CROS_EC_I8042_PROTOCOL_H - -/* Some commands appear more than once. Why? */ - -/* port 0x60 */ -#define I8042_CMD_MOUSE_1_1 0xe6 -#define I8042_CMD_MOUSE_2_1 0xe7 -#define I8042_CMD_MOUSE_RES 0xe8 -#define I8042_CMD_OK_GETID 0xe8 -#define I8042_CMD_GET_MOUSE 0xe9 -#define I8042_CMD_EX_ENABLE 0xea -#define I8042_CMD_EX_SETLEDS 0xeb -#define I8042_CMD_SETLEDS 0xed -#define I8042_CMD_DIAG_ECHO 0xee -#define I8042_CMD_GSCANSET 0xf0 -#define I8042_CMD_SSCANSET 0xf0 -#define I8042_CMD_GETID 0xf2 -#define I8042_CMD_SETREP 0xf3 -#define I8042_CMD_ENABLE 0xf4 -#define I8042_CMD_RESET_DIS 0xf5 -#define I8042_CMD_RESET_DEF 0xf6 -#define I8042_CMD_ALL_TYPEM 0xf7 -#define I8042_CMD_SETALL_MB 0xf8 -#define I8042_CMD_SETALL_MBR 0xfa -#define I8042_CMD_SET_A_KEY_T 0xfb -#define I8042_CMD_SET_A_KEY_MR 0xfc -#define I8042_CMD_SET_A_KEY_M 0xfd -#define I8042_CMD_RESET 0xff -#define I8042_CMD_RESEND 0xfe - -/* port 0x64 */ -#define I8042_READ_CMD_BYTE 0x20 -#define I8042_READ_CTL_RAM 0x21 -#define I8042_READ_CTL_RAM_END 0x3f -#define I8042_WRITE_CMD_BYTE 0x60 /* expect a byte on port 0x60 */ -#define I8042_WRITE_CTL_RAM 0x61 -#define I8042_WRITE_CTL_RAM_END 0x7f -#define I8042_ROUTE_AUX0 0x90 -#define I8042_ROUTE_AUX1 0x91 -#define I8042_ROUTE_AUX2 0x92 -#define I8042_ROUTE_AUX3 0x93 -#define I8042_ENA_PASSWORD 0xa6 -#define I8042_DIS_MOUSE 0xa7 -#define I8042_ENA_MOUSE 0xa8 -#define I8042_TEST_MOUSE 0xa9 -#define I8042_RESET_SELF_TEST 0xaa -#define I8042_TEST_KB_PORT 0xab -#define I8042_DIS_KB 0xad -#define I8042_ENA_KB 0xae -#define I8042_READ_OUTPUT_PORT 0xd0 -#define I8042_WRITE_OUTPUT_PORT 0xd1 -#define I8042_ECHO_MOUSE 0xd3 /* expect a byte on port 0x60 */ -#define I8042_SEND_TO_MOUSE 0xd4 /* expect a byte on port 0x60 */ -#define I8042_DISABLE_A20 0xdd -#define I8042_ENABLE_A20 0xdf -#define I8042_PULSE_START 0xf0 -#define I8042_SYSTEM_RESET 0xfe -#define I8042_PULSE_END 0xff - -/* port 0x60 return value */ -#define I8042_RET_EMUL0 0xe0 -#define I8042_RET_EMUL1 0xe1 -#define I8042_RET_ECHO 0xee -#define I8042_RET_RELEASE 0xf0 -#define I8042_RET_HANJA 0xf1 -#define I8042_RET_HANGEUL 0xf2 -#define I8042_RET_ACK 0xfa -#define I8042_RET_TEST_FAIL 0xfc -#define I8042_RET_INTERNAL_FAIL 0xfd -#define I8042_RET_NAK 0xfe -#define I8042_RET_ERR 0xff - -/* port 64 - command byte bits */ -#define I8042_XLATE BIT(6) -#define I8042_AUX_DIS BIT(5) -#define I8042_KBD_DIS BIT(4) -#define I8042_SYS_FLAG BIT(2) -#define I8042_ENIRQ12 BIT(1) -#define I8042_ENIRQ1 BIT(0) - -/* Status Flags */ -#define I8042_AUX_DATA BIT(5) - -#endif /* __CROS_EC_I8042_PROTOCOL_H */ diff --git a/include/inductive_charging.h b/include/inductive_charging.h deleted file mode 100644 index 5c44e410aa..0000000000 --- a/include/inductive_charging.h +++ /dev/null @@ -1,20 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Inductive charging control */ - -#include "gpio.h" - -#ifndef __CROS_EC_INDUCTIVE_CHARGING_H -#define __CROS_EC_INDUCTIVE_CHARGING_H - -/* - * Interrupt handler for inductive charging signal. - * - * @param signal Signal which triggered the interrupt. - */ -void inductive_charging_interrupt(enum gpio_signal); - -#endif diff --git a/include/init_rom.h b/include/init_rom.h deleted file mode 100644 index 2c1ab33cd5..0000000000 --- a/include/init_rom.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Routines for accessing data objects store in the .init_rom region. - * Enabled with the CONFIG_CHIP_INIT_ROM_REGION config option. Data - * objects are placed into the .init_rom region using the __init_rom attribute. - */ - -#ifndef __CROS_EC_INIT_ROM_H -#define __CROS_EC_INIT_ROM_H - -#include "stdbool.h" - -#ifdef CONFIG_CHIP_INIT_ROM_REGION -/** - * Get the memory mapped address of an .init_rom data object. - * - * @param offset Address of the data object assigned by the linker. - * This is effectively a flash offset when - * CONFIG_CHIP_INIT_ROM_REGION is enabled, otherwise - * it is a regular address. - * @param size Size of the data object. - * - * @return Pointer to data object in memory. Return NULL if the object - * is not memory mapped. - */ -const void *init_rom_map(const void *addr, int size); - -/** - * Unmaps an .init_rom data object. Must be called when init_rom_map() is - * successful. - * - * @param offset Address of the data object assigned by the linker. - * @param size Size of the data object. - */ -void init_rom_unmap(const void *addr, int size); - -/** - * Copy an .init_rom data object into a RAM location. This routine must be used - * if init_rom_get_addr() returns NULL. This routine automatically handles - * locking of the flash. - * - * @param offset Flash offset of the data object. - * @param size Size of the data object. - * @param data Destination buffer for data. - * - * @return 0 on success. - */ -int init_rom_copy(int offset, int size, char *data); -#else -static inline const void *init_rom_map(const void *addr, int size) -{ - return addr; -} - -static inline void init_rom_unmap(const void *addr, int size) -{ -} - -static inline int init_rom_copy(int offset, int size, char *data) -{ - return 0; -} -#endif - -#endif /* __CROS_EC_INIT_ROM_H */ diff --git a/include/keyboard_8042.h b/include/keyboard_8042.h deleted file mode 100644 index 6826eb98ac..0000000000 --- a/include/keyboard_8042.h +++ /dev/null @@ -1,62 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * The functions implemented by keyboard component of EC core. - */ - -#ifndef __CROS_EC_KEYBOARD_8042_H -#define __CROS_EC_KEYBOARD_8042_H - -#include "common.h" -#include "button.h" - -/** - * Called by power button handler and button interrupt handler. - * - * This function sends the corresponding make or break code to the host. - */ -void button_state_changed(enum keyboard_button_type button, int is_pressed); - -/** - * Notify the keyboard module when a byte is written by the host. - * - * Note: This is called in interrupt context by the LPC interrupt handler. - * - * @param data Byte written by host - * @param is_cmd Is byte command (!=0) or data (0) - */ -void keyboard_host_write(int data, int is_cmd); - -/* - * Board specific callback function when a key state is changed. - * - * A board may watch key events and create some easter eggs, or apply dynamic - * translation to the make code (i.e., remap keys). - * - * Returning EC_SUCCESS implies *make_code is still a valid make code to be - * processed. Any other return value will abort processing of this make code. - * If callback alters *make_code or aborts key processing when pressed=1, it is - * responsible for also altering/aborting the matching pressed=0 call. - * - * @param make_code Pointer to scan code (set 2) of key in action. - * @param pressed Is the key being pressed (1) or released (0). - */ -enum ec_error_list keyboard_scancode_callback(uint16_t *make_code, - int8_t pressed); - -/** - * Send aux data to host from interrupt context. - * - * @param data Aux response to send to host. - */ -void send_aux_data_to_host_interrupt(uint8_t data); - -/** - * Send aux data to device. - * - * @param data Aux data to send to device. - */ -void send_aux_data_to_device(uint8_t data); - -#endif /* __CROS_EC_KEYBOARD_8042_H */ diff --git a/include/keyboard_8042_sharedlib.h b/include/keyboard_8042_sharedlib.h deleted file mode 100644 index 6c2e37fbf4..0000000000 --- a/include/keyboard_8042_sharedlib.h +++ /dev/null @@ -1,179 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * The functions implemented by keyboard component of EC core. - */ - -#ifndef __CROS_EC_KEYBOARD_8042_SHAREDLIB_H -#define __CROS_EC_KEYBOARD_8042_SHAREDLIB_H - -#include "button.h" -#include "keyboard_config.h" -#include "keyboard_protocol.h" - -struct button_8042_t { - uint16_t scancode; - int repeat; -}; - -/** - * Get the standard Chrome OS keyboard matrix set 2 scanset - * @param row Row number - * @param col Column number - * @return 0 on error, scanset for the (row,col) if successful - **/ -uint16_t get_scancode_set2(uint8_t row, uint8_t col); -/** - * Set the standard Chrome OS keyboard matrix set 2 scanset - * @param row Row number - * @param col Column number - * @param val Value to set - **/ -void set_scancode_set2(uint8_t row, uint8_t col, uint16_t val); - -/* Translation from scan code set 2 to set 1. */ -extern const uint8_t scancode_translate_table[]; -extern uint8_t scancode_translate_set2_to_1(uint8_t code); - -#ifdef CONFIG_KEYBOARD_DEBUG -#define KEYCAP_LONG_LABEL_BIT (0x80) -#define KEYCAP_LONG_LABEL_INDEX_BITMASK (~KEYCAP_LONG_LABEL_BIT) - -enum keycap_long_label_idx { - KLLI_UNKNO = 0x80, /* UNKNOWN */ - KLLI_F1 = 0x81, /* F1 or PREVIOUS */ - KLLI_F2 = 0x82, /* F2 or NEXT */ - KLLI_F3 = 0x83, /* F3 or REFRESH */ - KLLI_F4 = 0x84, /* F4 or FULL_SCREEN */ - KLLI_F5 = 0x85, /* F5 or OVERVIEW */ - KLLI_F6 = 0x86, /* F6 or DIM */ - KLLI_F7 = 0x87, /* F7 or BRIGHT */ - KLLI_F8 = 0x88, /* F8 or MUTE */ - KLLI_F9 = 0x89, /* F9 or VOLUME DOWN */ - KLLI_F10 = 0x8A, /* F10 or VOLUME UP */ - KLLI_F11 = 0x8B, /* F11 or POWER */ - KLLI_F12 = 0x8C, /* F12 or DEV TOOLS */ - KLLI_F13 = 0x8D, /* F13 or GOOGLE ASSISTANT */ - KLLI_F14 = 0x8E, /* F14 */ - KLLI_F15 = 0x8F, /* F15 */ - KLLI_L_ALT = 0x90, /* LEFT ALT */ - KLLI_R_ALT = 0x91, /* RIGHT ALT */ - KLLI_L_CTR = 0x92, /* LEFT CONTROL */ - KLLI_R_CTR = 0x93, /* RIGHT CONTROL */ - KLLI_L_SHT = 0x94, /* LEFT SHIFT */ - KLLI_R_SHT = 0x95, /* RIGHT SHIFT */ - KLLI_ENTER = 0x96, /* ENTER */ - KLLI_SPACE = 0x97, /* SPACE */ - KLLI_B_SPC = 0x98, /* BACk SPACE*/ - KLLI_TAB = 0x99, /* TAB */ - KLLI_SEARC = 0x9A, /* SEARCH */ - KLLI_LEFT = 0x9B, /* LEFT ARROW */ - KLLI_RIGHT = 0x9C, /* RIGHT ARROW */ - KLLI_DOWN = 0x9D, /* DOWN ARROW */ - KLLI_UP = 0x9E, /* UP ARROW */ - KLLI_ESC = 0x9F, /* ESCAPE */ - KLLI_MAX -}; - -/** - * Get the keycap "long version" label - * @param idx Index into keycap_long_label_idx[] - * @return "UNKNOWN" on error, long label for idx if successful - */ -const char *get_keycap_long_label(uint8_t idx); - -/** - * Get the keycap label - * @param row Row number - * @param col Column number - * @return KLLI_UNKNO on error, label for the (row,col) if successful - */ -char get_keycap_label(uint8_t row, uint8_t col); -/** - * Set the keycap label - * @param row Row number - * @param col Column number - * @param val Value to set - */ -void set_keycap_label(uint8_t row, uint8_t col, char val); -#endif - -/* Button scancodes (Power, Volume Down, Volume Up, etc.) */ -extern const struct button_8042_t buttons_8042[KEYBOARD_BUTTON_COUNT]; - -/* Scan code set 2 table. */ -enum scancode_values { - SCANCODE_1 = 0x0016, - SCANCODE_2 = 0x001e, - SCANCODE_3 = 0x0026, - SCANCODE_4 = 0x0025, - SCANCODE_5 = 0x002e, - SCANCODE_6 = 0x0036, - SCANCODE_7 = 0x003d, - SCANCODE_8 = 0x003e, - - SCANCODE_A = 0x001c, - SCANCODE_B = 0x0032, - SCANCODE_T = 0x002c, - - SCANCODE_F1 = 0x0005, /* Translates to 3b in codeset 1 */ - SCANCODE_F2 = 0x0006, /* Translates to 3c in codeset 1 */ - SCANCODE_F3 = 0x0004, /* Translates to 3d in codeset 1 */ - SCANCODE_F4 = 0x000c, /* Translates to 3e in codeset 1 */ - SCANCODE_F5 = 0x0003, /* Translates to 3f in codeset 1 */ - SCANCODE_F6 = 0x000b, /* Translates to 40 in codeset 1 */ - SCANCODE_F7 = 0x0083, /* Translates to 41 in codeset 1 */ - SCANCODE_F8 = 0x000a, /* Translates to 42 in codeset 1 */ - SCANCODE_F9 = 0x0001, /* Translates to 43 in codeset 1 */ - SCANCODE_F10 = 0x0009, /* Translates to 44 in codeset 1 */ - SCANCODE_F11 = 0x0078, /* Translates to 57 in codeset 1 */ - SCANCODE_F12 = 0x0007, /* Translates to 58 in codeset 1 */ - SCANCODE_F13 = 0x000f, /* Translates to 59 in codeset 1 */ - SCANCODE_F14 = 0x0017, /* Translates to 5a in codeset 1 */ - SCANCODE_F15 = 0x001f, /* Translates to 5b in codeset 1 */ - - SCANCODE_BACK = 0xe038, /* e06a in codeset 1 */ - SCANCODE_REFRESH = 0xe020, /* e067 in codeset 1 */ - SCANCODE_FORWARD = 0xe030, /* e069 in codeset 1 */ - SCANCODE_FULLSCREEN = 0xe01d, /* e011 in codeset 1 */ - SCANCODE_OVERVIEW = 0xe024, /* e012 in codeset 1 */ - SCANCODE_SNAPSHOT = 0xe02d, /* e013 in codeset 1 */ - SCANCODE_BRIGHTNESS_DOWN = 0xe02c, /* e014 in codeset 1 */ - SCANCODE_BRIGHTNESS_UP = 0xe035, /* e015 in codeset 1 */ - SCANCODE_PRIVACY_SCRN_TOGGLE = 0xe03c, /* e016 in codeset 1 */ - SCANCODE_VOLUME_MUTE = 0xe023, /* e020 in codeset 1 */ - SCANCODE_VOLUME_DOWN = 0xe021, /* e02e in codeset 1 */ - SCANCODE_VOLUME_UP = 0xe032, /* e030 in codeset 1 */ - SCANCODE_KBD_BKLIGHT_DOWN = 0xe043, /* e017 in codeset 1 */ - SCANCODE_KBD_BKLIGHT_UP = 0xe044, /* e018 in codeset 1 */ - SCANCODE_KBD_BKLIGHT_TOGGLE = 0xe01c, /* e01e in codeset 1 */ - SCANCODE_NEXT_TRACK = 0xe04d, /* e019 in codeset 1 */ - SCANCODE_PREV_TRACK = 0xe015, /* e010 in codeset 1 */ - SCANCODE_PLAY_PAUSE = 0xe054, /* e01a in codeset 1 */ - SCANCODE_MICMUTE = 0xe05b, /* e01b in codeset 1 */ - - SCANCODE_UP = 0xe075, - SCANCODE_DOWN = 0xe072, - SCANCODE_LEFT = 0xe06b, - SCANCODE_RIGHT = 0xe074, - - SCANCODE_LEFT_CTRL = 0x0014, - SCANCODE_RIGHT_CTRL = 0xe014, - SCANCODE_LEFT_ALT = 0x0011, - SCANCODE_RIGHT_ALT = 0xe011, - - SCANCODE_LEFT_WIN = 0xe01f, /* Also known as GUI or Super key. */ - SCANCODE_RIGHT_WIN = 0xe027, - SCANCODE_MENU = 0xe02f, - - SCANCODE_POWER = 0xe037, - - SCANCODE_NUMLOCK = 0x0077, - SCANCODE_CAPSLOCK = 0x0058, - SCANCODE_SCROLL_LOCK = 0x007e, - - SCANCODE_CTRL_BREAK = 0xe07e, -}; - -#endif /* __CROS_EC_KEYBOARD_8042_SHAREDLIB_H */ diff --git a/include/keyboard_backlight.h b/include/keyboard_backlight.h deleted file mode 100644 index e0a1f4d30e..0000000000 --- a/include/keyboard_backlight.h +++ /dev/null @@ -1,86 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_KEYBOARD_BACKLIGHT_H -#define __CROS_EC_KEYBOARD_BACKLIGHT_H - -/** - * If GPIO_EN_KEYBOARD_BACKLIGHT is defined, this GPIO will be set when - * the the keyboard backlight is enabled or disabled. This GPIO is used - * to enable or disable the power to the keyboard backlight circuitry. - * GPIO_EN_KEYBOARD_BACKLIGHT must be active high. - */ - -struct kblight_conf { - const struct kblight_drv *drv; -}; - -struct kblight_drv { - /** - * Initialize the keyboard backlight controller - * @return EC_SUCCESS or EC_ERROR_* - */ - int (*init)(void); - - /** - * Set the brightness - * @param percent - * @return EC_SUCCESS or EC_ERROR_* - */ - int (*set)(int percent); - - /** - * Get the current brightness - * @return Brightness in percentage - */ - int (*get)(void); - - /** - * Enable or disable keyboard backlight - * @param enable: 1=Enable, 0=Disable. - * @return EC_SUCCESS or EC_ERROR_* - */ - int (*enable)(int enable); -}; - -/** - * Initialize keyboard backlight per board - */ -void board_kblight_init(void); - -/** - * Set keyboard backlight brightness - * - * @param percent Brightness in percentage - * @return EC_SUCCESS or EC_ERROR_* - */ -int kblight_set(int percent); - -/** - * Get keyboard backlight brightness - * - * @return Brightness in percentage - */ -int kblight_get(void); - -/** - * Enable or disable keyboard backlight - * - * @param enable: 1=Enable, 0=Disable. - * @return EC_SUCCESS or EC_ERROR_* - */ -int kblight_enable(int enable); - -/** - * Register keyboard backlight controller - * - * @param drv: Driver of keyboard backlight controller - * @return EC_SUCCESS or EC_ERROR_* - */ -int kblight_register(const struct kblight_drv *drv); - -extern const struct kblight_drv kblight_pwm; - -#endif /* __CROS_EC_KEYBOARD_BACKLIGHT_H */ diff --git a/include/keyboard_mkbp.h b/include/keyboard_mkbp.h deleted file mode 100644 index 3d153d63b5..0000000000 --- a/include/keyboard_mkbp.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * MKBP keyboard protocol - */ - -#ifndef __CROS_EC_KEYBOARD_MKBP_H -#define __CROS_EC_KEYBOARD_MKBP_H - -#include "common.h" -#include "keyboard_config.h" - -/** - * Add keyboard state into FIFO - * - * @return EC_SUCCESS if entry added, EC_ERROR_OVERFLOW if FIFO is full - */ -int mkbp_keyboard_add(const uint8_t *buffp); - -/** - * Send KEY_BATTERY keystroke. - */ -#ifdef CONFIG_KEYBOARD_PROTOCOL_MKBP -void keyboard_send_battery_key(void); -#else -static inline void keyboard_send_battery_key(void) { } -#endif - -#endif /* __CROS_EC_KEYBOARD_MKBP_H */ diff --git a/include/keyboard_protocol.h b/include/keyboard_protocol.h deleted file mode 100644 index 362364ced4..0000000000 --- a/include/keyboard_protocol.h +++ /dev/null @@ -1,66 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Keyboard protocol interface - */ - -#ifndef __CROS_EC_KEYBOARD_PROTOCOL_H -#define __CROS_EC_KEYBOARD_PROTOCOL_H - -#include "common.h" -#include "button.h" - -/* Routines common to all protocols */ - -/** - * Clear the keyboard buffer to host. - */ -void keyboard_clear_buffer(void); - -/* - * Respond to button changes. Implemented by a host-specific - * handler. - * - * @param button The button that changed. - * @param is_pressed Whether the button is now pressed. - */ -void keyboard_update_button(enum keyboard_button_type button, int is_pressed); - -/* Protocol-specific includes */ - -#ifdef CONFIG_KEYBOARD_PROTOCOL_8042 -#include "keyboard_8042.h" -#endif - -#ifdef CONFIG_KEYBOARD_PROTOCOL_MKBP -#include "keyboard_mkbp.h" - -/* MKBP protocol takes the whole keyboard matrix, and does not care about - * individual key presses. - */ -static inline void keyboard_state_changed(int row, int col, int is_pressed) {} -#else -/** - * Called by keyboard scan code once any key state change (after de-bounce), - * - * This function will look up matrix table and convert scancode host. - */ -void keyboard_state_changed(int row, int col, int is_pressed); -#endif - -/** - * Returns true if keyboard backlight is present/detected. - */ -int board_has_keyboard_backlight(void); - -/* - * This function can help change the keyboard top row layout as presented to the - * AP. If changing the position of the "Refresh" key from T3, you may also need - * to change KEYBOARD_ROW_REFRESH accordingly so that recovery mode can work on - * the EC side of things (also see related CONFIG_KEYBOARD_REFRESH_ROW3) - */ -__override_proto -const struct ec_response_keybd_config *board_vivaldi_keybd_config(void); - -#endif /* __CROS_EC_KEYBOARD_PROTOCOL_H */ diff --git a/include/keyboard_raw.h b/include/keyboard_raw.h deleted file mode 100644 index 6c8ecc3b2a..0000000000 --- a/include/keyboard_raw.h +++ /dev/null @@ -1,121 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Raw access to keyboard GPIOs. - * - * The keyboard matrix is read by driving output signals on the column lines - * and reading the row lines. - */ - -#ifndef __CROS_EC_KEYBOARD_RAW_H -#define __CROS_EC_KEYBOARD_RAW_H - -#include "assert.h" -#include "common.h" -#include "gpio.h" -#include "keyboard_config.h" - -/* Column values for keyboard_raw_drive_column() */ -enum keyboard_column_index { - KEYBOARD_COLUMN_ALL = -2, /* Drive all columns */ - KEYBOARD_COLUMN_NONE = -1, /* Drive no columns (tri-state all) */ - /* 0 ~ KEYBOARD_COLS_MAX-1 for the corresponding column */ -}; - -/** - * Initialize the raw keyboard interface. - * - * Must be called before any other functions in this interface. - */ -void keyboard_raw_init(void); - -/** - * Finish intitialization after task scheduling has started. - * - * Call from the keyboard scan task. - */ -void keyboard_raw_task_start(void); - -/** - * Drive the specified column low. - * - * Other columns are tristated. See enum keyboard_column_index for special - * values for <col>. - */ -void keyboard_raw_drive_column(int col); - -/** - * Read raw row state. - * - * Bits are 1 if signal is present, 0 if not present. - */ -int keyboard_raw_read_rows(void); - -/** - * Enable or disable keyboard interrupts. - * - * Enabling interrupts will clear any pending interrupt bits. To avoid missing - * any interrupts that occur between the end of scanning and then, you should - * call keyboard_raw_read_rows() after this. If it returns non-zero, disable - * interrupts and go back to polling mode instead of waiting for an interrupt. - */ -void keyboard_raw_enable_interrupt(int enable); - -#ifdef HAS_TASK_KEYSCAN - -/** - * GPIO interrupt for raw keyboard input - */ -void keyboard_raw_gpio_interrupt(enum gpio_signal signal); - -#else -static inline void keyboard_raw_gpio_interrupt(enum gpio_signal signal) { } -#endif /* !HAS_TASK_KEYSCAN */ - -/** - * Run keyboard factory test scanning. - * - * @return non-zero if keyboard pins are shorted. - */ -int keyboard_factory_test_scan(void); - -/** - * Return true if the current value of the given input GPIO port is zero - * - * @param port: GPIO port/bank number - * @param id: GPIO index in <port> - * @return true:input is zero, false:otherwise - */ -int keyboard_raw_is_input_low(int port, int id); - -static inline int keyboard_raw_get_cols(void) { - return keyboard_cols; -} - -static inline void keyboard_raw_set_cols(int cols) { -#ifdef CONFIG_KEYBOARD_LANGUAGE_ID - /* Keyboard ID is probably encoded right after the last column. Scanner - * would read keyboard ID if the column size is decreased. */ - assert(cols == KEYBOARD_COLS_MAX); -#else - /* We can only decrease the column size. You have to assume a larger - * grid (and reduce scanning size if the keyboard has no keypad). */ - assert(cols <= KEYBOARD_COLS_MAX); -#endif - keyboard_cols = cols; -} - -#ifdef CONFIG_KEYBOARD_CUSTOMIZATION -/* The board implements this function to control the of the keyboard column. - * For example, use the gpio to drive 0 or 1 for the refresh key column. - * @param col: If the value is greater than or equal to 0, the function drive - * the specific column. - * If the value is KEYBOARD_COLUMN_NONE, drive nothing. - * If the value is KEYBOARD_COLUMN_ALL, drive all columns. - * Otherwise, do nothing. - */ -void board_keyboard_drive_col(int col); -#endif - -#endif /* __CROS_EC_KEYBOARD_RAW_H */ diff --git a/include/keyboard_test.h b/include/keyboard_test.h deleted file mode 100644 index 142cff5e53..0000000000 --- a/include/keyboard_test.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Keyboard scanner test module for Chrome EC */ - -#ifndef __CROS_EC_KEYBOARD_TEST_H -#define __CROS_EC_KEYBOARD_TEST_H - -#include <timer.h> - -/* - * Keyboard scan test item - contains a single scan to 'present' to key scan - * logic. - */ -struct keyscan_item { - timestamp_t abs_time; /* absolute timestamp to present this item */ - uint32_t time_us; /* time for this item relative to test start */ - uint8_t done; /* 1 if we managed to present this */ - uint8_t scan[KEYBOARD_COLS_MAX]; -}; - -/** - * Get the next key scan from the test sequence, if any - * - * @param column Column to read (-1 to OR all columns together - * @param scan Raw scan data read from GPIOs - * @return test scan, or just 'scan' if no test is active - */ -uint8_t keyscan_seq_get_scan(int column, uint8_t scan); - -/** - * Calculate the delay until the next key scan event needs to be presented - * - * @return number of microseconds from now until the next key scan event, or - * -1 if there is no future key scan event (e.g. testing is complete) - */ -int keyscan_seq_next_event_delay(void); - -#endif diff --git a/include/lb_common.h b/include/lb_common.h deleted file mode 100644 index 327c810cad..0000000000 --- a/include/lb_common.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Lightbar IC interface */ - -#ifndef __CROS_EC_LB_COMMON_H -#define __CROS_EC_LB_COMMON_H - -#include "ec_commands.h" - -/* How many (logical) LEDs do we have? */ -#define NUM_LEDS 4 - -/* Set the color of one LED (or all if the LED number is too large) */ -void lb_set_rgb(unsigned int led, int red, int green, int blue); -/* Get the current color of one LED. Fails if the LED number is too large. */ -int lb_get_rgb(unsigned int led, uint8_t *red, uint8_t *green, uint8_t *blue); -/* Set the overall brightness level. */ -void lb_set_brightness(unsigned int newval); -/* Get the overall brighness level. */ -uint8_t lb_get_brightness(void); -/* Initialize the IC controller registers to reasonable values. */ -void lb_init(int use_lock); -/* Disable the LED current off (the IC stays on). */ -void lb_off(void); -/* Enable the LED current. */ -void lb_on(void); -/* Fill in the response fields for the LIGHTBAR_CMD_DUMP command. */ -void lb_hc_cmd_dump(struct ec_response_lightbar *out); -/* Write the IC controller register given by the LIGHTBAR_CMD_REG command. */ -void lb_hc_cmd_reg(const struct ec_params_lightbar *in); -/* - * Optional (see config.h). Request that the lightbar power rails be on or off. - * Returns true if a change to the rails was made, false if it wasn't. - */ -int lb_power(int enabled); - -#endif /* __CROS_EC_LB_COMMON_H */ diff --git a/include/led_common.h b/include/led_common.h deleted file mode 100644 index a66455b008..0000000000 --- a/include/led_common.h +++ /dev/null @@ -1,86 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Common functions for blinking LEDs. - */ - -#ifndef __CROS_EC_LED_COMMON_H -#define __CROS_EC_LED_COMMON_H - -#include "ec_commands.h" - -/* Defined in led_<board>.c */ -extern const enum ec_led_id supported_led_ids[]; - -/* Defined in led_<board>.c */ -extern const int supported_led_ids_count; - -/** - * Enable or disable automatic control of an LED. - * - * @param led_id ID of LED to enable or disable automatic control. - * @param enable 1 to enable . 0 to disable - * - */ -void led_auto_control(enum ec_led_id led_id, int enable); - -/** - * Whether an LED is under automatic control. - * - * @param led_id ID of LED to query. - * - * @returns 1 if LED is under automatic control. 0 if it is not. - * - */ -int led_auto_control_is_enabled(enum ec_led_id led_id); - -/** - * Query brightness per color channel for an LED. - * - * @param led_id ID of LED to query. - * @param brightness_range Points to EC_LED_COLOR_COUNT element array - * where current brightness will be stored. - * Value per color channel: - * 0 unsupported, - * 1 on/off control, - * 2 -> 255 max brightness under PWM control. - * - */ -void led_get_brightness_range(enum ec_led_id, uint8_t *brightness_range); - -/** - * Set brightness per color channel for an LED. - * - * @param led_id ID of LED to set. - * @param brightness Brightness per color channel to set. - * - * @returns EC_SUCCESS or EC_ERROR_INVAL - * - */ -int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness); - -/** - * Enable LED. - * - * @param enable 1 to enable LED. 0 to disable. - * - */ -void led_enable(int enable); - -enum ec_led_state { - LED_STATE_OFF = 0, - LED_STATE_ON = 1, - LED_STATE_RESET = 2, -}; - -/** - * Control state of LED. - * - * @param led_id ID of LED to control - * @param state 0=off, 1=on, 2=reset to default - * - */ -void led_control(enum ec_led_id id, enum ec_led_state state); - -#endif /* __CROS_EC_LED_COMMON_H */ diff --git a/include/led_onoff_states.h b/include/led_onoff_states.h deleted file mode 100644 index 63955e590a..0000000000 --- a/include/led_onoff_states.h +++ /dev/null @@ -1,88 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Common functions for stateful LEDs (charger and power) - */ - -#ifndef __CROS_EC_ONOFFSTATES_LED_H -#define __CROS_EC_ONOFFSTATES_LED_H - -#include "ec_commands.h" - -#define LED_INDEFINITE UINT8_MAX -#define LED_ONE_SEC (1000 / HOOK_TICK_INTERVAL_MS) -#define LED_OFF EC_LED_COLOR_COUNT - -/* - * All LED states should have one phase defined, - * and an additional phase can be defined for blinking - */ -enum led_phase { - LED_PHASE_0, - LED_PHASE_1, - LED_NUM_PHASES -}; - -/* - * STATE_CHARGING_LVL_1 is when 0 <= charge_percentage < led_charge_level_1 - * STATE_CHARGING_LVL_2 is when led_charge_level_1 <= - * charge_percentage < led_charge_level_2. - * STATE_CHARGING_FULL_CHARGE is when - * led_charge_level_2 <= charge_percentage < 100. - * - * STATE_CHARGING_FULL_S5 is optional and state machine will fall back to - * FULL_CHARGE if not defined - */ -enum led_states { - STATE_CHARGING_LVL_1, - STATE_CHARGING_LVL_2, - STATE_CHARGING_FULL_CHARGE, - STATE_CHARGING_FULL_S5, - STATE_DISCHARGE_S0, - STATE_DISCHARGE_S0_BAT_LOW, - STATE_DISCHARGE_S3, - STATE_DISCHARGE_S5, - STATE_BATTERY_ERROR, - STATE_FACTORY_TEST, - LED_NUM_STATES -}; - -struct led_descriptor { - enum ec_led_colors color; - uint8_t time; -}; - -extern const int led_charge_lvl_1; -extern const int led_charge_lvl_2; - -enum pwr_led_states { - PWR_LED_STATE_ON, - PWR_LED_STATE_SUSPEND_AC, - PWR_LED_STATE_SUSPEND_NO_AC, - PWR_LED_STATE_OFF, - PWR_LED_STATE_OFF_LOW_POWER, /* Falls back to OFF if not defined */ - PWR_LED_NUM_STATES -}; - -/** - * Set battery LED color - defined in board's led.c if supported, along with: - * - led_bat_state_table - * - led_charge_lvl_1 - * - led_charge_lvl_2 - * - * @param color Color to set on battery LED - * - */ -__override_proto void led_set_color_battery(enum ec_led_colors color); - -/** - * Set power LED color - defined in board's led.c if supported, along with: - * - led_pwr_state_table - */ -__override_proto void led_set_color_power(enum ec_led_colors color); - -__override_proto enum led_states -board_get_led_state(enum led_states desired_state); - -#endif /* __CROS_EC_ONOFFSTATES_LED_H */ diff --git a/include/led_pwm.h b/include/led_pwm.h deleted file mode 100644 index 0f8b270d19..0000000000 --- a/include/led_pwm.h +++ /dev/null @@ -1,61 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_LED_PWM_H -#define __CROS_EC_LED_PWM_H - -#include "ec_commands.h" - -#ifdef CONFIG_ZEPHYR -#include "pwm/pwm.h" -#endif - -#define PWM_LED_NO_CHANNEL -1 - -struct pwm_led { - enum pwm_channel ch0; - enum pwm_channel ch1; - enum pwm_channel ch2; - - void (*enable)(enum pwm_channel ch, int enabled); - void (*set_duty)(enum pwm_channel ch, int percent); -}; - -struct pwm_led_color_map { - uint8_t ch0; - uint8_t ch1; - uint8_t ch2; -}; - -enum pwm_led_id { - PWM_LED0 = 0, -#if CONFIG_LED_PWM_COUNT >= 2 - PWM_LED1, -#endif /* CONFIG_LED_PWM_COUNT > 2 */ -}; - -/* - * A mapping of color to LED duty cycles per channel. - * - * This should be defined by the boards to declare what each color looks like. - * There should be an entry for every enum ec_led_colors value. For colors that - * are impossible for a given board, they should define a duty cycle of 0 for - * all applicable channels. (e.g. A bi-color LED which has a red and green - * channel should define all 0s for EC_LED_COLOR_BLUE and EC_LED_COLOR_WHITE.) - */ -extern struct pwm_led_color_map led_color_map[EC_LED_COLOR_COUNT]; - -/* - * A map of the PWM channels to logical PWM LEDs. - * - * A logical PWM LED would be considered as "per diffuser". There may be 1-3 - * channels per diffuser and they should form a single entry in pwm_leds. If a - * channel is not used, simply define that channel as PWM_LED_NO_CHANNEL. - */ -extern struct pwm_led pwm_leds[CONFIG_LED_PWM_COUNT]; - -void set_pwm_led_color(enum pwm_led_id id, int color); - -#endif /* defined(__CROS_EC_LED_PWM_H) */ diff --git a/include/libsharedobjs.h b/include/libsharedobjs.h deleted file mode 100644 index 3801ccaca0..0000000000 --- a/include/libsharedobjs.h +++ /dev/null @@ -1,44 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Helper macros for shared objects library. - */ -#ifndef __CROS_EC_LIBSHAREDOBJS_H -#define __CROS_EC_LIBSHAREDOBJS_H - -#include "common.h" - -#ifdef CONFIG_SHAREDLIB -/* - * The shared library currently only works with those platforms in which both - * the RO and RW images are loaded simultaneously in some executable memory. - * - * NOTE: I know that this doesn't cover all possible cases, but it will catch - * an obvious case. - */ -#if (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF) -#error "The shared library is NOT compatible with this EC." -#endif - -/* - * All of the objects in the shared library will be placed into the '.roshared' - * section. The SHAREDLIB() macro simply adds this attribute and prevents the - * RW image from compiling them in. - */ -#undef SHAREDLIB -#ifdef SHAREDLIB_IMAGE -#define SHAREDLIB(...) __attribute__ ((section(".roshared"))) __VA_ARGS__ -#else /* !defined(SHAREDLIB_IMAGE) */ -#define SHAREDLIB(...) -#endif /* defined(SHAREDLIB_IMAGE) */ -#define SHAREDLIB_FUNC(...) \ - extern __VA_ARGS__ __attribute__ ((section(".roshared.text"))) - -#else /* !defined(CONFIG_SHAREDLIB) */ - -/* By default, the SHAREDLIB() macro maps to its contents. */ -#define SHAREDLIB(...) __VA_ARGS__ -#define SHAREDLIB_FUNC(...) __VA_ARGS__ -#endif /* defined(CONFIG_SHAREDLIB) */ -#endif /* __CROS_EC_LIBSHAREDOBJS_H */ diff --git a/include/lightbar_opcode_list.h b/include/lightbar_opcode_list.h deleted file mode 100644 index 5d75feb459..0000000000 --- a/include/lightbar_opcode_list.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * This defines a list of lightbar opcodes for programmable sequences. - */ - -/* NAME OPERAND BYTES MNEMONIC*/ -#define LIGHTBAR_OPCODE_TABLE \ - OP(ON, 0, "on" )\ - OP(OFF, 0, "off" )\ - OP(JUMP, 1, "jump" )\ - OP(JUMP_BATTERY, 2, "jbat" )\ - OP(JUMP_IF_CHARGING, 1, "jcharge" )\ - OP(SET_WAIT_DELAY, 4, "delay.w" )\ - OP(SET_RAMP_DELAY, 4, "delay.r" )\ - OP(WAIT, 0, "wait" )\ - OP(SET_BRIGHTNESS, 1, "bright" )\ - OP(SET_COLOR_SINGLE, 2, "set.1" )\ - OP(SET_COLOR_RGB, 4, "set.rgb" )\ - OP(GET_COLORS, 0, "get" )\ - OP(SWAP_COLORS, 0, "swap" )\ - OP(RAMP_ONCE, 0, "ramp.1" )\ - OP(CYCLE_ONCE, 0, "cycle.1" )\ - OP(CYCLE, 0, "cycle" )\ - OP(HALT, 0, "halt" ) diff --git a/include/memory_commands.h b/include/memory_commands.h deleted file mode 100644 index 91020d8920..0000000000 --- a/include/memory_commands.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2011 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Memory commands for Chrome EC */ - -#ifndef __CROS_EC_MEMORY_COMMANDS_H -#define __CROS_EC_MEMORY_COMMANDS_H - -#include "common.h" - -/* Initializes the module. */ -int memory_commands_init(void); - -#endif /* __CROS_EC_MEMORY_COMMANDS_H */ diff --git a/include/mkbp_fifo.h b/include/mkbp_fifo.h deleted file mode 100644 index 347f94e2a7..0000000000 --- a/include/mkbp_fifo.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* FIFO buffer of MKBP events for Chrome EC */ - -#ifndef __CROS_EC_MKBP_FIFO_H -#define __CROS_EC_MKBP_FIFO_H - -#include "common.h" -#include "ec_commands.h" - - -#define FIFO_DEPTH 16 - - -/** - * Update the "soft" FIFO depth (size). The new depth should be less or - * equal FIFO_DEPTH - * - * @param new_max_depth New FIFO depth. - */ -void mkbp_fifo_depth_update(uint8_t new_max_depth); - -/** - * Clear all keyboard events from the MKBP common FIFO - */ -void mkbp_fifo_clear_keyboard(void); - -/** - * Clear the entire MKBP common FIFO. - */ -void mkbp_clear_fifo(void); - -/** - * Add an element to the common MKBP FIFO. - * - * @param event_type The MKBP event type. - * @param buffp Pointer to the event data to enqueue. - * @return EC_SUCCESS if entry added, EC_ERROR_OVERFLOW if FIFO is full. - */ -test_mockable int mkbp_fifo_add(uint8_t event_type, const uint8_t *buffp); - -/** - * Remove an element from the common MKBP FIFO. - * - * @param out Pointer to the event data to dequeue. - * @param event_type The MKBP event type. - * @return size of the returned event, EC_ERROR_BUSY if type mismatch. - */ -int mkbp_fifo_get_next_event(uint8_t *out, enum ec_mkbp_event evt); - -#endif /* __CROS_EC_MKBP_FIFO_H */ diff --git a/include/mkbp_input_devices.h b/include/mkbp_input_devices.h deleted file mode 100644 index 2557aab3f2..0000000000 --- a/include/mkbp_input_devices.h +++ /dev/null @@ -1,40 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Input devices using Matrix Keyboard Protocol [MKBP] events for Chrome EC */ - -#ifndef __CROS_EC_MKBP_INPUT_DEVICES_H -#define __CROS_EC_MKBP_INPUT_DEVICES_H - -#include "common.h" -#include "ec_commands.h" - -/** - * Update the state of the switches. - * - * @param sw The switch that changed. - * @param state The state of the switch. - */ -void mkbp_update_switches(uint32_t sw, int state); - -/** - * Update the state of buttons - * - * @param button The button that changed. - * @param is_pressed Whether the button is now pressed. - */ -void mkbp_button_update(enum keyboard_button_type button, int is_pressed); - -/** - * Retrieve state of buttons [Power, Volume up/down, etc] - */ -uint32_t mkbp_get_button_state(void); - -/** - * Retrieve state of switches [Lid open/closed, tablet mode switch, etc] - */ -uint32_t mkbp_get_switch_state(void); - -#endif /* __CROS_EC_MKBP_INPUT_DEVICES_H */ diff --git a/include/mock/charge_manager_mock.h b/include/mock/charge_manager_mock.h deleted file mode 100644 index 8a791f6121..0000000000 --- a/include/mock/charge_manager_mock.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * @brief Controls for the mock charge_manager - */ - -#ifndef __MOCK_CHARGE_MANAGER_MOCK_H -#define __MOCK_CHARGE_MANAGER_MOCK_H - -struct mock_ctrl_charge_manager { - int vbus_voltage_mv; -}; - -#define MOCK_CTRL_DEFAULT_CHARGE_MANAGER \ - ((struct mock_ctrl_charge_manager) { \ - .vbus_voltage_mv = 0, \ - }) - -extern struct mock_ctrl_charge_manager mock_ctrl_charge_manager; - -void mock_charge_manager_set_vbus_voltage(int voltage_mv); - -#endif /* __MOCK_CHARGE_MANAGER_MOCK_H */ diff --git a/include/mock/dp_alt_mode_mock.h b/include/mock/dp_alt_mode_mock.h deleted file mode 100644 index 27811140c7..0000000000 --- a/include/mock/dp_alt_mode_mock.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock for DisplayPort alternate mode support */ - -#ifndef __MOCK_DP_ALT_MODE_MOCK_H -#define __MOCK_DP_ALT_MODE_MOCK_H - -#include "common.h" - -void mock_dp_alt_mode_reset(void); - -#endif /* __MOCK_DP_ALT_MODE_MOCK_H */ diff --git a/include/mock/fp_sensor_mock.h b/include/mock/fp_sensor_mock.h deleted file mode 100644 index 432802348c..0000000000 --- a/include/mock/fp_sensor_mock.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * @brief Controls for the mock fpsensor private driver - */ - -#ifndef __MOCK_FP_SENSOR_MOCK_H -#define __MOCK_FP_SENSOR_MOCK_H - -#include "common.h" -#include "fpsensor.h" - -struct mock_ctrl_fp_sensor { - int fp_sensor_init_return; - int fp_sensor_deinit_return; - int fp_sensor_get_info_return; - enum finger_state fp_sensor_finger_status_return; - int fp_sensor_acquire_image_return; - int fp_sensor_acquire_image_with_mode_return; - int fp_finger_match_return; - int fp_enrollment_begin_return; - int fp_enrollment_finish_return; - int fp_finger_enroll_return; - int fp_maintenance_return; -}; - -#define MOCK_CTRL_DEFAULT_FP_SENSOR \ -(struct mock_ctrl_fp_sensor) { \ - .fp_sensor_init_return = EC_SUCCESS, \ - .fp_sensor_deinit_return = EC_SUCCESS, \ - .fp_sensor_get_info_return = EC_SUCCESS, \ - .fp_sensor_finger_status_return = FINGER_NONE, \ - .fp_sensor_acquire_image_return = 0, \ - .fp_sensor_acquire_image_with_mode_return = 0, \ - .fp_finger_match_return = EC_MKBP_FP_ERR_MATCH_YES_UPDATED, \ - .fp_enrollment_begin_return = 0, \ - .fp_enrollment_finish_return = 0, \ - .fp_finger_enroll_return = EC_MKBP_FP_ERR_ENROLL_OK, \ - .fp_maintenance_return = EC_SUCCESS \ -} - -extern struct mock_ctrl_fp_sensor mock_ctrl_fp_sensor; - -#endif /* __MOCK_FP_SENSOR_MOCK_H */ diff --git a/include/mock/fpsensor_detect_mock.h b/include/mock/fpsensor_detect_mock.h deleted file mode 100644 index da23dded96..0000000000 --- a/include/mock/fpsensor_detect_mock.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __MOCK_FPSENSOR_DETECT_MOCK_H -#define __MOCK_FPSENSOR_DETECT_MOCK_H - -#include "fpsensor_detect.h" - -struct mock_ctrl_fpsensor_detect { - enum fp_sensor_type get_fp_sensor_type_return; - enum fp_transport_type get_fp_transport_type_return; - enum fp_sensor_spi_select get_fp_sensor_spi_select_return; -}; - -#define MOCK_CTRL_DEFAULT_FPSENSOR_DETECT \ - { \ - .get_fp_sensor_type_return = FP_SENSOR_TYPE_UNKNOWN, \ - .get_fp_transport_type_return = FP_TRANSPORT_TYPE_UNKNOWN, \ - .get_fp_sensor_spi_select_return = \ - FP_SENSOR_SPI_SELECT_UNKNOWN \ - } - -extern struct mock_ctrl_fpsensor_detect mock_ctrl_fpsensor_detect; - -#endif /* __MOCK_FPSENSOR_DETECT_MOCK_H */ diff --git a/include/mock/fpsensor_state_mock.h b/include/mock/fpsensor_state_mock.h deleted file mode 100644 index eafe01851c..0000000000 --- a/include/mock/fpsensor_state_mock.h +++ /dev/null @@ -1,18 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __MOCK_FPSENSOR_STATE_MOCK_H -#define __MOCK_FPSENSOR_STATE_MOCK_H - -#include <stdbool.h> -#include <stdint.h> -#include "ec_commands.h" - -extern const uint8_t default_fake_tpm_seed[FP_CONTEXT_TPM_BYTES]; - -int fpsensor_state_mock_set_tpm_seed( - const uint8_t tpm_seed[FP_CONTEXT_TPM_BYTES]); - -#endif /* __MOCK_FPSENSOR_STATE_MOCK_H */ diff --git a/include/mock/mkbp_events_mock.h b/include/mock/mkbp_events_mock.h deleted file mode 100644 index 3d686e3618..0000000000 --- a/include/mock/mkbp_events_mock.h +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * @brief Controls for the mock MKBP keyboard protocol - */ - -#ifndef __MOCK_MKBP_EVENTS_MOCK_H -#define __MOCK_MKBP_EVENTS_MOCK_H - -struct mock_ctrl_mkbp_events { - int mkbp_send_event_return; -}; - -#define MOCK_CTRL_DEFAULT_MKBP_EVENTS \ -(struct mock_ctrl_mkbp_events) { \ - .mkbp_send_event_return = 1, \ -} - -extern struct mock_ctrl_mkbp_events mock_ctrl_mkbp_events; - -#endif /* __MOCK_MKBP_EVENTS_MOCK_H */ diff --git a/include/mock/rollback_mock.h b/include/mock/rollback_mock.h deleted file mode 100644 index 576f87e6b9..0000000000 --- a/include/mock/rollback_mock.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/** - * @file - * @brief Controls for the mock rollback block library - */ - -#ifndef __MOCK_ROLLBACK_MOCK_H -#define __MOCK_ROLLBACK_MOCK_H - -#include <stdbool.h> - -struct mock_ctrl_rollback { - bool get_secret_fail; -}; - -#define MOCK_CTRL_DEFAULT_ROLLBACK \ -(struct mock_ctrl_rollback) { \ - .get_secret_fail = false, \ -} - -extern struct mock_ctrl_rollback mock_ctrl_rollback; - -#endif /* __MOCK_ROLLBACK_MOCK_H */ diff --git a/include/mock/tcpc_mock.h b/include/mock/tcpc_mock.h deleted file mode 100644 index 9098fe1ba3..0000000000 --- a/include/mock/tcpc_mock.h +++ /dev/null @@ -1,37 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - /* Mock for the TCPC interface */ - -#include "usb_pd_tcpm.h" -#include "usb_pd.h" - -/* Controller for TCPC state */ -struct mock_tcpc_ctrl { - enum tcpc_cc_voltage_status cc1; - enum tcpc_cc_voltage_status cc2; - int vbus_level; - int num_calls_to_set_header; - bool should_print_call; - uint64_t first_call_to_enable_auto_toggle; - - /* Set to function pointer if callback is needed for test code */ - struct tcpm_drv callbacks; - - /* Store the latest values that were set on TCPC API */ - struct { - enum pd_power_role power_role; - enum pd_data_role data_role; - enum tcpc_cc_pull cc; - enum tcpc_rp_value rp; - enum tcpc_cc_polarity polarity; - } last; - -}; - -/* Reset this TCPC mock */ -void mock_tcpc_reset(void); - -extern const struct tcpm_drv mock_tcpc_driver; -extern struct mock_tcpc_ctrl mock_tcpc; diff --git a/include/mock/tcpci_i2c_mock.h b/include/mock/tcpci_i2c_mock.h deleted file mode 100644 index 1d4a986ebe..0000000000 --- a/include/mock/tcpci_i2c_mock.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" - -#define MOCK_TCPCI_I2C_ADDR_FLAGS 0x99 - -void mock_tcpci_reset(void); - -void mock_tcpci_set_reg(int reg, uint16_t value); -void mock_tcpci_set_reg_bits(int reg_offset, uint16_t mask); -void mock_tcpci_clr_reg_bits(int reg_offset, uint16_t mask); - -uint16_t mock_tcpci_get_reg(int reg_offset); - -int verify_tcpci_transmit(enum tcpci_msg_type tx_type, - enum pd_ctrl_msg_type ctrl_msg, - enum pd_data_msg_type data_msg); - -int verify_tcpci_tx_retry_count(enum tcpci_msg_type tx_type, - enum pd_ctrl_msg_type ctrl_msg, - enum pd_data_msg_type data_msg, - int retry_count); - -int verify_tcpci_tx_timeout(enum tcpci_msg_type tx_type, - enum pd_ctrl_msg_type ctrl_msg, - enum pd_data_msg_type data_msg, - int timeout); - -int verify_tcpci_tx_with_data(enum tcpci_msg_type tx_type, - enum pd_data_msg_type data_msg, - uint8_t *data, - int data_bytes, - int *msg_len, - int timeout); - -struct possible_tx { - enum tcpci_msg_type tx_type; - enum pd_ctrl_msg_type ctrl_msg; - enum pd_data_msg_type data_msg; -}; - -int verify_tcpci_possible_tx(struct possible_tx possible[], - int possible_cnt, - int *found_index, - uint8_t *data, - int data_bytes, - int *msg_len, - int timeout); - -void mock_tcpci_receive(enum tcpci_msg_type sop, uint16_t header, - uint32_t *payload); - -void tcpci_register_dump(void); diff --git a/include/mock/tcpm_mock.h b/include/mock/tcpm_mock.h deleted file mode 100644 index 7fd89919f5..0000000000 --- a/include/mock/tcpm_mock.h +++ /dev/null @@ -1,23 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - /* Mock for the TCPM interface */ - -#include "common.h" -#include "tcpm/tcpm.h" - -/* Copied from usb_prl_sm.c, line 99. */ -#define MOCK_CHK_BUF_SIZE 7 - -/* Define a struct to hold the data we need to control the mocks. */ -struct mock_tcpm_t { - uint32_t mock_rx_chk_buf[MOCK_CHK_BUF_SIZE]; - uint32_t mock_header; - int mock_has_pending_message; -}; - -extern struct mock_tcpm_t mock_tcpm[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void mock_tcpm_reset(void); -void mock_tcpm_rx_msg(int port, uint16_t header, int cnt, const uint32_t *data); diff --git a/include/mock/timer_mock.h b/include/mock/timer_mock.h deleted file mode 100644 index 04dc01e9ab..0000000000 --- a/include/mock/timer_mock.h +++ /dev/null @@ -1,15 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __MOCK_TIMER_MOCK_H -#define __MOCK_TIMER_MOCK_H - -#include "timer.h" - -void set_time(timestamp_t now_); - -timestamp_t get_time(void); - -#endif /* __MOCK_TIMER_MOCK_H */ diff --git a/include/mock/usb_mux_mock.h b/include/mock/usb_mux_mock.h deleted file mode 100644 index 128286796b..0000000000 --- a/include/mock/usb_mux_mock.h +++ /dev/null @@ -1,19 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock USB Type-C mux */ - -#include "usb_mux.h" - -/* Controller for mux state */ -struct mock_usb_mux_ctrl { - mux_state_t state; - int num_set_calls; -}; - -/* Resets the state of the mock */ -void mock_usb_mux_reset(void); - -extern const struct usb_mux_driver mock_usb_mux_driver; -extern struct mock_usb_mux_ctrl mock_usb_mux; diff --git a/include/mock/usb_pd_dpm_mock.h b/include/mock/usb_pd_dpm_mock.h deleted file mode 100644 index c61594fd2b..0000000000 --- a/include/mock/usb_pd_dpm_mock.h +++ /dev/null @@ -1,23 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock of Device Policy Manager implementation */ - -#ifndef __MOCK_USB_PD_DPM_MOCK_H -#define __MOCK_USB_PD_DPM_MOCK_H - -#include "common.h" -#include "usb_pd_dpm.h" - -/* Defaults should all be 0 values. */ -struct mock_dpm_port_t { - bool mode_entry_done; - bool mode_exit_request; -}; - -extern struct mock_dpm_port_t dpm[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void mock_dpm_reset(void); - -#endif /* __MOCK_USB_PD_DPM_MOCK_H */ diff --git a/include/mock/usb_pe_sm_mock.h b/include/mock/usb_pe_sm_mock.h deleted file mode 100644 index fcd6e268a0..0000000000 --- a/include/mock/usb_pe_sm_mock.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock USB PE state machine */ - -#ifndef __MOCK_USB_PE_SM_MOCK_H -#define __MOCK_USB_PE_SM_MOCK_H - -#include "common.h" -#include "usb_pe_sm.h" -#include "usb_pd_tcpm.h" - -struct mock_pe_port_t { - enum tcpci_msg_type sop; - - int mock_pe_message_sent; - int mock_pe_error; - int mock_pe_hard_reset_sent; - int mock_pe_got_hard_reset; - int mock_pe_message_received; - int mock_got_soft_reset; - int mock_pe_message_discarded; -}; - -extern struct mock_pe_port_t mock_pe_port[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void mock_pe_port_reset(void); - -#endif /* __MOCK_USB_PE_SM_MOCK_H */ diff --git a/include/mock/usb_prl_mock.h b/include/mock/usb_prl_mock.h deleted file mode 100644 index ee37d6e6e2..0000000000 --- a/include/mock/usb_prl_mock.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock for USB protocol layer */ - -#ifndef __MOCK_USB_PRL_MOCK_H -#define __MOCK_USB_PRL_MOCK_H - -#include "common.h" -#include "usb_emsg.h" -#include "usb_pd_tcpm.h" - -void mock_prl_reset(void); - -int mock_prl_wait_for_tx_msg(int port, - enum tcpci_msg_type tx_type, - enum pd_ctrl_msg_type ctrl_msg, - enum pd_data_msg_type data_msg, - int timeout); - -enum pd_ctrl_msg_type mock_prl_get_last_sent_ctrl_msg(int port); - -enum pd_data_msg_type mock_prl_get_last_sent_data_msg(int port); - - -void mock_prl_clear_last_sent_msg(int port); - -void mock_prl_message_sent(int port); - -void mock_prl_message_received(int port); - -void mock_prl_report_error(int port, enum pe_error e, - enum tcpci_msg_type tx_type); - -#endif /* __MOCK_DP_ALT_MODE_MOCK_H */ diff --git a/include/mock/usb_tc_sm_mock.h b/include/mock/usb_tc_sm_mock.h deleted file mode 100644 index ca16fb4d98..0000000000 --- a/include/mock/usb_tc_sm_mock.h +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -/* Mock USB TC state machine*/ - -#ifndef __MOCK_USB_TC_SM_MOCK_H -#define __MOCK_USB_TC_SM_MOCK_H - -#include "common.h" -#include "usb_tc_sm.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" - -struct mock_tc_port_t { - int rev; - int pd_enable; - int msg_tx_id; - int msg_rx_id; - enum tcpci_msg_type sop; - enum tcpc_rp_value lcl_rp; - int attached_snk; - int attached_src; - bool vconn_src; - enum pd_data_role data_role; - enum pd_power_role power_role; -}; - -extern struct mock_tc_port_t mock_tc_port[CONFIG_USB_PD_PORT_MAX_COUNT]; - -void mock_tc_port_reset(void); - -#endif /* __MOCK_USB_TC_SM_MOCK_H */ diff --git a/include/mock_filter.h b/include/mock_filter.h deleted file mode 100644 index 113c227a3b..0000000000 --- a/include/mock_filter.h +++ /dev/null @@ -1,22 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Filter mocklists for makefile relevant items. - * A mocklist is the .mocklist file in test/ and fuzz/ directories. - * See common/mock/README.md for more information. - */ - -#ifndef __CROS_EC_MOCK_FILTER_H -#define __CROS_EC_MOCK_FILTER_H - -/* If included directly from Makefile, dump mock list. */ -#ifdef _MAKEFILE -#define MOCK(n) n -CONFIG_TEST_MOCK_LIST -#endif - - -#endif /* __CROS_EC_MOCK_FILTER_H */ diff --git a/include/newton_fit.h b/include/newton_fit.h deleted file mode 100644 index b4db64c814..0000000000 --- a/include/newton_fit.h +++ /dev/null @@ -1,117 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Newton's method for sphere fit algorithm */ - -#ifndef __CROS_EC_NEWTON_FIT_H -#define __CROS_EC_NEWTON_FIT_H - -#include "queue.h" -#include "vec3.h" -#include "stdbool.h" - -struct newton_fit_orientation { - /** An orientations. */ - fpv3_t orientation; - - /** The number of samples of this orientation. */ - uint8_t nsamples; -}; - -struct newton_fit { - /** - * Threshold used to detect when two vectors are identical. Measured in - * units^2. - */ - fp_t nearness_threshold; - - /** - * The weight to use for a new data point when computing the mean. When - * a new point is considered the same as an existing orientation (via - * the nearness_threshold) it will be averaged with the existing - * orientation using this weight. Valid range is (0,1). - */ - fp_t new_pt_weight; - - /** - * The threshold used to determine whether or not to continue iterating - * when performing the bias computation. - */ - fp_t error_threshold; - - /** - * The maximum number of orientations to use, changing this affects the - * memory footprint of the algorithm as 3 floats are needed per - * orientation. - */ - uint32_t max_orientations; - - /** - * The maximum number of iterations the algorithm is allowed to run. - */ - uint32_t max_iterations; - - /** - * The minimum number of samples per orientation to consider the - * orientation ready for calculation - */ - uint8_t min_orientation_samples; - - /** - * Queue of newton_fit_orientation structs. - */ - struct queue *orientations; -}; - -#define NEWTON_FIT(SIZE, NSAMPLES, NEAR_THRES, NEW_PT_WEIGHT, ERROR_THRESHOLD, \ - MAX_ITERATIONS) \ - ((struct newton_fit){ \ - .nearness_threshold = NEAR_THRES, \ - .new_pt_weight = NEW_PT_WEIGHT, \ - .error_threshold = ERROR_THRESHOLD, \ - .max_orientations = SIZE, \ - .max_iterations = MAX_ITERATIONS, \ - .min_orientation_samples = NSAMPLES, \ - .orientations = (struct queue *)&QUEUE_NULL( \ - SIZE, struct newton_fit_orientation), \ - }) - -/** - * Reset the newton_fit struct's state. - * - * @param fit Pointer to the struct. - */ -void newton_fit_reset(struct newton_fit *fit); - -/** - * Add new vector to the struct. The behavior of this depends on the - * configuration values used when the struct was created. For example: - * - Samples that are within sqrt(NEAR_THRES) of an existing orientation will - * be averaged with the matching orientation entry. - * - If the new sample isn't near an existing orientation it will only be added - * if state->num_orientations < config->num_orientations. - * - * @param fit Pointer to the struct. - * @param x The new samples' X component. - * @param y The new samples' Y component. - * @param z The new samples' Z component. - * @return True if orientations are full and the struct is ready to compute the - * bias. - */ -bool newton_fit_accumulate(struct newton_fit *fit, fp_t x, fp_t y, fp_t z); - -/** - * Compute the center/bias and optionally the radius represented by the current - * struct. - * - * @param fit Pointer to the struct. - * @param bias Pointer to the output bias (this is also the starting bias for - * the algorithm. - * @param radius Optional pointer to write the computed radius into. If NULL, - * the calculation will be skipped. - */ -void newton_fit_compute(struct newton_fit *fit, fpv3_t bias, fp_t *radius); - -#endif /* __CROS_EC_NEWTON_FIT_H */ diff --git a/include/onewire.h b/include/onewire.h deleted file mode 100644 index 58899360a4..0000000000 --- a/include/onewire.h +++ /dev/null @@ -1,43 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* 1-wire interface for Chrome EC */ - -/* - * Note that 1-wire communication is VERY latency-sensitive. If these - * functions are run at low priority, communication may be garbled. However, - * these functions are also slow enough (~1ms per call) that it's really not - * desirable to put them at high priority. So make sure you check the - * confirmation code from the peripheral for any communication, and retry a few - * times in case of failure. - */ - -#ifndef __CROS_EC_ONEWIRE_H -#define __CROS_EC_ONEWIRE_H - -#include "common.h" - -/** - * Reset the 1-wire bus. - * - * @return EC_SUCCESS, or non-zero if presence detect fails. - */ -int onewire_reset(void); - -/** - * Read a byte from the 1-wire bus. - * - * @return The byte value read. - */ -int onewire_read(void); - -/** - * Write a byte to the 1-wire bus. - * - * @param data Byte to write - */ -void onewire_write(int data); - -#endif /* __CROS_EC_ONEWIRE_H */ diff --git a/include/overflow.h b/include/overflow.h deleted file mode 100644 index 42eab6a094..0000000000 --- a/include/overflow.h +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_OVERFLOW_H -#define __CROS_EC_OVERFLOW_H - -#include "compiler.h" - -/* - * __builtin_add_overflow, __builtin_sub_overflow and __builtin_mul_overflow - * were added in gcc 5.1: https://gcc.gnu.org/gcc-5/changes.html - */ -#if GCC_VERSION > 50100 -#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1 -#endif - -/* - * __has_builtin available in - * clang 10 and newer: https://clang.llvm.org/docs/LanguageExtensions.html - */ -#ifdef __clang__ -#if __has_builtin(__builtin_add_overflow) && \ - __has_builtin(__builtin_sub_overflow) && \ - __has_builtin(__builtin_mul_overflow) -#define COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW 1 -#endif -#endif /* __clang__ */ - -#include "third_party/linux/overflow.h" - -#endif /* __CROS_EC_OVERFLOW_H */ diff --git a/include/peci.h b/include/peci.h deleted file mode 100644 index 993e7d637d..0000000000 --- a/include/peci.h +++ /dev/null @@ -1,65 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* PECI module for Chrome EC */ - -#ifndef __CROS_EC_PECI_H -#define __CROS_EC_PECI_H - -#include "common.h" - -#define PECI_TARGET_ADDRESS 0x30 -#define PECI_WRITE_DATA_FIFO_SIZE 15 -#define PECI_READ_DATA_FIFO_SIZE 16 - -#define PECI_GET_TEMP_READ_LENGTH 2 -#define PECI_GET_TEMP_WRITE_LENGTH 0 -#define PECI_GET_TEMP_TIMEOUT_US 200 - -/* PECI Command Code */ -enum peci_command_code { - PECI_CMD_PING = 0x00, - PECI_CMD_GET_DIB = 0xF7, - PECI_CMD_GET_TEMP = 0x01, - PECI_CMD_RD_PKG_CFG = 0xA1, - PECI_CMD_WR_PKG_CFG = 0xA5, - PECI_CMD_RD_IAMSR = 0xB1, - PECI_CMD_WR_IAMSR = 0xB5, - PECI_CMD_RD_PCI_CFG = 0x61, - PECI_CMD_WR_PCI_CFG = 0x65, - PECI_CMD_RD_PCI_CFG_LOCAL = 0xE1, - PECI_CMD_WR_PCI_CFG_LOCAL = 0xE5, -}; - -struct peci_data { - enum peci_command_code cmd_code; /* command code */ - uint8_t addr; /* client address */ - uint8_t w_len; /* write length */ - uint8_t r_len; /* read length */ - uint8_t *w_buf; /* buffer pointer of write data */ - uint8_t *r_buf; /* buffer pointer of read data */ - int timeout_us; /* transaction timeout unit:us */ -}; - -/** - * Get the last polled value of the PECI temp sensor. - * - * @param idx Sensor index to read. - * @param temp_ptr Destination for temperature in K. - * - * @return EC_SUCCESS if successful, non-zero if error. - */ -int peci_temp_sensor_get_val(int idx, int *temp_ptr); - -/** - * Start a PECI transaction - * - * @param peci transaction data - * - * @return zero if successful, non-zero if error - */ -int peci_transaction(struct peci_data *peci); - -#endif /* __CROS_EC_PECI_H */ diff --git a/include/peripheral_charger.h b/include/peripheral_charger.h deleted file mode 100644 index b1f82bb1f3..0000000000 --- a/include/peripheral_charger.h +++ /dev/null @@ -1,260 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_PERIPHERAL_CHARGER_H -#define __CROS_EC_PERIPHERAL_CHARGER_H - -#include "common.h" -#include "ec_commands.h" -#include "gpio.h" -#include "queue.h" -#include "stdbool.h" -#include "task.h" - -/* - * Peripheral charge manager - * - * Peripheral charge manager (PCHG) is a state machine (SM), which manages - * charge ports to charge peripheral devices. Events can be generated - * externally (by a charger chip) or internally (by a host command or the SM - * itself). Events are queued and handled first-come-first-serve basis. - * - * Peripheral charger drivers should implement struct pchg_drv. Each operation - * can be synchronous or asynchronous depending on the chip. If a function - * works synchronously, it should return EC_SUCCESS. That'll make the SM - * immediately queue the next event (if applicable) and transition to the next - * state. If a function works asynchronously, it should return - * EC_SUCCESS_IN_PROGRESS. That'll make the SM stay in the same state. The SM - * is expected to receive IRQ for further information about the operation, - * which may or may not make the SM transition to the next state. - * - * Roughly speaking the SM looks as follows: - * - * +---------------+ - * | RESET | - * +-------+-------+ - * | - * | INITIALIZED - * v - * +---------------+ - * | INITIALIZED |<--------------+ - * +------+--------+ | - * | ^ | - * ENABLED | | DISABLED | - * v | | - * +--------+------+ | - * +------------->| ENABLED | | - * | +-----+-+-------+ | - * | | | | - * | DEVICE_CONNECTED | | DEVICE_DOCKED | - * | | v | - * | DEVICE_LOST +---------------+ | - * +--------------+ DOCKED +---------------+ - * | +-------+-------+ | - * | | | | - * | | | DEVICE_CONNECTED | - * | v v | - * | +---------------+ | - * +--------------+ CONNECTED +---------------+ - * | DEVICE_LOST +------+--------+ ERROR | - * | | ^ | - * | CHARGE_STARTED | | CHARGE_ENDED | - * | | | CHARGE_STOPPED | - * | v | | - * | +--------+------+ | - * +--------------+ CHARGING +---------------+ - * DEVICE_LOST +---------------+ ERROR - * - * - * In download (update firmware) mode, the state machine transitions as follows: - * - * +---------------+ - * | DOWNLOAD | - * +------+--------+ - * | ^ - * UPDATE_OPEN | | - * | | UPDATE_CLOSE - * v | - * +--------+------+ - * +-->| DOWNLOADING | - * | +------+--------+ - * | | - * +----------+ - * UPDATE_WRITE - */ - -/* Size of event queue. Use it to initialize struct pchg.events. */ -#define PCHG_EVENT_QUEUE_SIZE 8 - -enum pchg_event { - /* No event */ - PCHG_EVENT_NONE = 0, - - /* IRQ is pending. */ - PCHG_EVENT_IRQ, - - /* External Events */ - PCHG_EVENT_RESET, - PCHG_EVENT_INITIALIZED, - PCHG_EVENT_ENABLED, - PCHG_EVENT_DISABLED, - PCHG_EVENT_DEVICE_DETECTED, - PCHG_EVENT_DEVICE_CONNECTED, - PCHG_EVENT_DEVICE_LOST, - PCHG_EVENT_CHARGE_STARTED, - PCHG_EVENT_CHARGE_UPDATE, - PCHG_EVENT_CHARGE_ENDED, - PCHG_EVENT_CHARGE_STOPPED, - PCHG_EVENT_UPDATE_OPENED, - PCHG_EVENT_UPDATE_CLOSED, - PCHG_EVENT_UPDATE_WRITTEN, - PCHG_EVENT_IN_NORMAL, - - /* Errors */ - PCHG_EVENT_CHARGE_ERROR, - PCHG_EVENT_UPDATE_ERROR, - PCHG_EVENT_OTHER_ERROR, - - /* Internal (a.k.a. Host) Events */ - PCHG_EVENT_ENABLE, - PCHG_EVENT_DISABLE, - PCHG_EVENT_UPDATE_OPEN, - PCHG_EVENT_UPDATE_WRITE, - PCHG_EVENT_UPDATE_CLOSE, - - /* Counter. Add new entry above. */ - PCHG_EVENT_COUNT, -}; - -enum pchg_error { - /* Errors reported by host. */ - PCHG_ERROR_HOST, - PCHG_ERROR_OVER_TEMPERATURE, - PCHG_ERROR_OVER_CURRENT, - PCHG_ERROR_FOREIGN_OBJECT, - /* Errors reported by chip. */ - PCHG_ERROR_FW_VERSION, - PCHG_ERROR_INVALID_FW, - PCHG_ERROR_WRITE_FLASH, - /* All other errors */ - PCHG_ERROR_OTHER, -}; - -#define PCHG_ERROR_MASK(e) BIT(e) - -enum pchg_mode { - PCHG_MODE_NORMAL = 0, - PCHG_MODE_DOWNLOAD, - /* Add no more entries below here. */ - PCHG_MODE_COUNT, -}; - -/** - * Data struct describing the configuration of a peripheral charging port. - */ -struct pchg_config { - /* Charger driver */ - const struct pchg_drv *drv; - /* I2C port number */ - const int i2c_port; - /* GPIO pin used for IRQ */ - const enum gpio_signal irq_pin; - /* Full battery percentage */ - const uint8_t full_percent; - /* Update block size */ - const uint32_t block_size; -}; - -struct pchg_update { - /* Version of new firmware. Usually used by EC_PCHG_UPDATE_CMD_OPEN. */ - uint32_t version; - /* CRC32 of new firmware. Usually used by EC_PCHG_UPDATE_CMD_CLOSE. */ - uint32_t crc32; - /* Address which <data> will be written to. */ - uint32_t addr; - /* Size of <data> */ - uint32_t size; - /* 0: No data. 1: Data is ready for write. */ - uint8_t data_ready; - /* Partial data of new firmware */ - uint8_t data[128]; -}; - -/** - * Data struct describing the status of a peripheral charging port. It provides - * the state machine and a charger driver with a context to work on. - */ -struct pchg { - /* Static configuration */ - const struct pchg_config * const cfg; - /* Current state of the port */ - enum pchg_state state; - /* Event queue */ - struct queue const events; - /* Event queue mutex */ - struct mutex mtx; - /* 1:Pending IRQ 0:No pending IRQ */ - uint32_t irq; - /* Event currently being handled */ - enum pchg_event event; - /* Error (enum pchg_error). Port is disabled until it's cleared. */ - uint32_t error; - /* Battery percentage (0% ~ 100%) of the connected peripheral device */ - uint8_t battery_percent; - /* Number of dropped events (due to queue overflow) */ - uint32_t dropped_event_count; - /* enum pchg_mode */ - uint8_t mode; - /* FW version */ - uint32_t fw_version; - /* Context related to FW update */ - struct pchg_update update; -}; - -/** - * Peripheral charger driver - */ -struct pchg_drv { - /* Reset charger chip. */ - int (*reset)(struct pchg *ctx); - /* Initialize the charger. */ - int (*init)(struct pchg *ctx); - /* Enable/disable the charger. */ - int (*enable)(struct pchg *ctx, bool enable); - /* Get event info. */ - int (*get_event)(struct pchg *ctx); - /* Get battery level. */ - int (*get_soc)(struct pchg *ctx); - /* open update session */ - int (*update_open)(struct pchg *ctx); - /* write update image */ - int (*update_write)(struct pchg *ctx); - /* close update session */ - int (*update_close)(struct pchg *ctx); -}; - -/** - * Array storing configs and states of all the peripheral charging ports. - * Should be defined in board.c. - */ -extern struct pchg pchgs[]; -extern const int pchg_count; - -/* Utility macro converting port config to port number. */ -#define PCHG_CTX_TO_PORT(ctx) ((ctx) - &pchgs[0]) - -/** - * Interrupt handler for a peripheral charger. - * - * @param signal - */ -void pchg_irq(enum gpio_signal signal); - -/** - * Task running a state machine for charging peripheral devices. - */ -void pchg_task(void *u); - -#endif /* __CROS_EC_PERIPHERAL_CHARGER_H */ diff --git a/include/physical_presence.h b/include/physical_presence.h deleted file mode 100644 index 0acbc65691..0000000000 --- a/include/physical_presence.h +++ /dev/null @@ -1,76 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * Physical presence detection - */ -#ifndef __CROS_EC_PHYSICAL_PRESENCE_H -#define __CROS_EC_PHYSICAL_PRESENCE_H - -/** - * Start physical presence detect. - * - * If the physical presence sequence is successful, callback() will be called - * from the hook task context as a deferred function. - * - * On failure or abort, callback() will not be called. - * - * @param is_long Use long (!=0) or short (0) sequence) - * @param callback Function to call when successful - * @return EC_SUCCESS, EC_BUSY if detect already in progress, or other - * non-zero error code if error. - */ -int physical_detect_start(int is_long, void (*callback)(void)); - -/** - * Check if a physical detect attempt is in progress - * - * @return non-zero if in progress - */ -int physical_detect_busy(void); - -/** - * Abort a currently-running physical presence detect. - * - * Note there is a race condition between stopping detect and a running - * detect finishing and calling its callback. The intent of this function - * is not to prevent that, but instead to avoid an aborted physical detect - * tying up the button for long periods when we no longer care. - */ -void physical_detect_abort(void); - -/** - * Handle a physical detect button press. - * - * This may be called from interrupt level. - * - * Returns EC_SUCCESS if the press was consumed, or EC_ERROR_NOT_HANDLED if - * physical detect was idle (so the press is for someone else). - */ -int physical_detect_press(void); - -/** - * Start/stop capturing the button for physical presence. - * - * When enabled, a debounced button press+release should call - * physical_detect_press(). - * - * This should be implemented by the board. - * - * @param enable Enable (!=0) or disable (==0) capturing button. - */ -void board_physical_presence_enable(int enable); - -/** - * An API to report physical presence FSM state to an external entity. Of - * interest are states when key press is currently required or is expected - * soon. - */ -enum pp_fsm_state { - PP_OTHER = 0, - PP_AWAITING_PRESS = 1, - PP_BETWEEN_PRESSES = 2, -}; -enum pp_fsm_state physical_presense_fsm_state(void); - -#endif /* __CROS_EC_PHYSICAL_PRESENCE_H */ diff --git a/include/port80.h b/include/port80.h deleted file mode 100644 index e6212ab593..0000000000 --- a/include/port80.h +++ /dev/null @@ -1,34 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Port 80 module for Chrome EC */ - -#ifndef __CROS_EC_PORT80_H -#define __CROS_EC_PORT80_H - -#include "common.h" - -enum port_80_event { - PORT_80_EVENT_RESUME = 0x1001, /* S3->S0 transition */ - PORT_80_EVENT_RESET = 0x1002, /* RESET transition */ - PORT_80_IGNORE = 0xffff, /* Invalid POST CODE */ -}; - -/** - * Store data from a LPC write to port 80, or a port_80_event code. - * - * @param data Data written to port 80. - */ -void port_80_write(int data); - -/** - * Chip specific function to read from port 80. - * - * @return data from the last LPC write to port 80, - * or PORT_80_IGNORE if no data is available. - */ -int port_80_read(void); - -#endif /* __CROS_EC_PORT80_H */ diff --git a/include/power/alderlake_slg4bd44540.h b/include/power/alderlake_slg4bd44540.h deleted file mode 100644 index 62c617bd98..0000000000 --- a/include/power/alderlake_slg4bd44540.h +++ /dev/null @@ -1,46 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Alder Lake chipset power control module using the SLG4BD44540 power - * sequencer chip for Chrome EC - */ - -#ifndef __CROS_EC_ALDERLAKE_SLG4BD44540_H -#define __CROS_EC_ALDERLAKE_SLG4BD44540_H - -/* Input state flags. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) -#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) - -#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_DSW_DPWROK) - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED) - -#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -/* Power signals list */ -enum power_signal { - X86_SLP_S0_DEASSERTED, - X86_SLP_S3_DEASSERTED, - X86_SLP_S4_DEASSERTED, - X86_SLP_SUS_DEASSERTED, - X86_RSMRST_L_PGOOD, - X86_DSW_DPWROK, - X86_ALL_SYS_PGOOD, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -#endif /* __CROS_EC_ALDERLAKE_SLG4BD44540_H */ diff --git a/include/power/apollolake.h b/include/power/apollolake.h deleted file mode 100644 index cc864f26c3..0000000000 --- a/include/power/apollolake.h +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Apollolake chipset power control module for Chrome EC */ - -#ifndef __CROS_EC_APOLLOLAKE_H -#define __CROS_EC_APOLLOLAKE_H - -/* - * Input state flags. - * TODO: Normalize the power signal masks from board defines to SoC headers. - */ -#define IN_RSMRST_N POWER_SIGNAL_MASK(X86_RSMRST_N) -#define IN_ALL_SYS_PG POWER_SIGNAL_MASK(X86_ALL_SYS_PG) -#define IN_SLP_S3_N POWER_SIGNAL_MASK(X86_SLP_S3_N) -#define IN_SLP_S4_N POWER_SIGNAL_MASK(X86_SLP_S4_N) -#define IN_PCH_SLP_S4_DEASSERTED IN_SLP_S4_N -#define IN_SUSPWRDNACK POWER_SIGNAL_MASK(X86_SUSPWRDNACK) -#define IN_SUS_STAT_N POWER_SIGNAL_MASK(X86_SUS_STAT_N) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_SLP_S3_N | \ - IN_SLP_S4_N) - -#define IN_PGOOD_ALL_CORE (IN_RSMRST_N) - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED) - -#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PGOOD_ALL_CORE - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -enum power_signal { -#ifdef CONFIG_POWER_S0IX - X86_SLP_S0_N, /* PCH -> SLP_S0_L */ -#endif - X86_SLP_S3_N, /* PCH -> SLP_S3_L */ - X86_SLP_S4_N, /* PCH -> SLP_S4_L */ - X86_SUSPWRDNACK, /* PCH -> SUSPWRDNACK */ - - X86_ALL_SYS_PG, /* PMIC -> PMIC_EC_PWROK_OD */ - X86_RSMRST_N, /* PMIC -> PMIC_EC_RSMRST_ODL */ - X86_PGOOD_PP3300, /* PMIC -> PP3300_PG_OD */ - X86_PGOOD_PP5000, /* PMIC -> PP5000_PG_OD */ - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -#endif /* __CROS_EC_APOLLOLAKE_H */ diff --git a/include/power/cannonlake.h b/include/power/cannonlake.h deleted file mode 100644 index a056a96ec8..0000000000 --- a/include/power/cannonlake.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cannonlake chipset power control module for Chrome EC */ - -#ifndef __CROS_EC_CANNONLAKE_H -#define __CROS_EC_CANNONLAKE_H - -/* Input state flags. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) -#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) - -#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_PMIC_DPWROK) - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \ - PP5000_PGOOD_POWER_SIGNAL_MASK) - -#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -#endif /* __CROS_EC_CANNONLAKE_H */ diff --git a/include/power/cometlake-discrete.h b/include/power/cometlake-discrete.h deleted file mode 100644 index 6f5370beee..0000000000 --- a/include/power/cometlake-discrete.h +++ /dev/null @@ -1,150 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Chrome EC chipset power control for Cometlake with platform-controlled - * discrete sequencing. - */ - -#ifndef __CROS_EC_COMETLAKE_DISCRETE_H -#define __CROS_EC_COMETLATE_DISCRETE_H - -/* Input state flags. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED \ - (IN_PCH_SLP_S3_DEASSERTED | IN_PCH_SLP_S4_DEASSERTED) - -/* - * Power mask used by intel_x86 to check that S5 is ready. - * - * This driver controls RSMRST in the G3->S5 transition so this check has nearly - * no use, but letting the common Intel code read RSMRST allows us to avoid - * duplicating the common code (introducing a little redundancy instead). - * - * PP3300 monitoring is analog-only: power_handle_state enforces that it's good - * before continuing to common_intel_x86_power_handle_state. This means we can't - * detect dropouts on that rail, however. - * - * Polling analog inputs as a signal for the common code would require - * modification to support non-power signals as inputs and incurs a minimum 12 - * microsecond time penalty on NPCX7 to do an ADC conversion. Running the ADC - * in repetitive scan mode and enabling threshold detection on the relevant - * channels would permit immediate readings (that might be up to 100 - * microseconds old) but is not currently supported by the ADC driver. - * TODO(b/143188569) try to implement analog watchdogs - */ -#define CHIPSET_G3S5_POWERUP_SIGNAL \ - (POWER_SIGNAL_MASK(PP5000_A_PGOOD) | \ - POWER_SIGNAL_MASK(PP1800_A_PGOOD) | \ - POWER_SIGNAL_MASK(PP1050_A_PGOOD) | \ - POWER_SIGNAL_MASK(OUT_PCH_RSMRST_DEASSERTED)) - -/* - * Power mask used by intel_x86 to check that S3 is ready. - * - * Transition S5->S3 only involves turning on the DRAM power rails which are - * controlled directly from the PCH, so this condition doesn't require any - * special code, except this collection of signals is also polled in POWER_S3 - * and POWER_S0 states. - * - * During normal shutdown the PCH will turn off the DRAM rails before the EC - * notices, so if this collection includes those rails a normal shutdown will be - * treated as a power failure so the system immediately drops to G3 rather than - * doing an orderly shutdown. This must only include those signals that are - * EC-controlled, not those controlled by the PCH. - */ -#define IN_PGOOD_ALL_CORE CHIPSET_G3S5_POWERUP_SIGNAL - -/* - * intel_x86 power mask for S0 all-OK. - * - * This is only used on power task init to check whether the system is powered - * up and already in S0, to correctly handle switching from RO to RW firmware. - */ -#define IN_ALL_S0 \ - (IN_PGOOD_ALL_CORE | POWER_SIGNAL_MASK(PP2500_DRAM_PGOOD) | \ - POWER_SIGNAL_MASK(PP1200_DRAM_PGOOD) | IN_ALL_PM_SLP_DEASSERTED) - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -/* Power signals, in power-on sequence order. */ -enum power_signal { - PP5000_A_PGOOD, - /* PP3300 monitoring is analog */ - PP1800_A_PGOOD, - VPRIM_CORE_A_PGOOD, - PP1050_A_PGOOD, - OUT_PCH_RSMRST_DEASSERTED, - /* S5 ready */ - X86_SLP_S4_DEASSERTED, - PP2500_DRAM_PGOOD, - PP1200_DRAM_PGOOD, - /* S3 ready */ - X86_SLP_S3_DEASSERTED, - /* PP1050 monitoring is analog */ - PP950_VCCIO_PGOOD, - /* S0 ready */ - X86_SLP_S0_DEASSERTED, - CPU_C10_GATE_DEASSERTED, - IMVP8_READY, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -/* - * Board-specific enable for any additional rails in S0. - * - * Input 0 to turn off, 1 to turn on. - * - * This function may be called from interrupts so must not assume it's running - * in a task. - */ -void board_enable_s0_rails(int enable); - -/* - * Board-specific flag for whether EN_S0_RAILS can be turned off when - * CPU_C10_GATED is asserted by the PCH. - * - * Return 0 if EN_S0_RAILS must be left on when in S0, even if the PCH asserts - * the C10 gate. - * - * If this can ever return 1, the CPU_C10_GATE_L input from the PCH must also - * be configured to call c10_gate_interrupt() rather than - * power_signal_interrupt() in order to actually control the relevant core - * rails. - * - * TODO: it is safe to remove this function and assume C10 gating is enabled if - * support for rev0 puff boards is no longer required- it was added only for the - * benefit of those boards. - */ -int board_is_c10_gate_enabled(void); - -/* - * Special interrupt for CPU_C10_GATE_L handling. - * - * Response time on resume from C10 has very strict timing requirements- no more - * than 65 uS to turn on, and the load switches are specified to turn on in 65 - * uS max at 1V (30 uS typical). This means the response to changes on the C10 - * gate input must be as fast as possible to meet PCH timing requirements- much - * faster than doing this handling in the power state machine can achieve - * (hundreds of microseconds). - */ -void c10_gate_interrupt(enum gpio_signal signal); - -/* - * Special interrupt for SLP_S3_L handling. - * - * The time window in which to turn off some rails when dropping to S3 is - * ~200us, and using the regular power state machine path tends to have latency - * >1ms. This ISR short-circuits the relevant signals in a fast path before - * scheduling a state machine update to ensure sufficiently low latency. - */ -void slp_s3_interrupt(enum gpio_signal signal); - -#endif /* __CROS_EC_COMETLAKE_DISCRETE_H */ diff --git a/include/power/cometlake.h b/include/power/cometlake.h deleted file mode 100644 index 0f48346c9e..0000000000 --- a/include/power/cometlake.h +++ /dev/null @@ -1,45 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Cometlake chipset power control module for Chrome EC */ - -#ifndef __CROS_EC_COMETLAKE_H -#define __CROS_EC_COMETLAKE_H - -/* Input state flags. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED) - -#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_RSMRST_L_PGOOD) - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \ - PP5000_PGOOD_POWER_SIGNAL_MASK) - -#define CHIPSET_G3S5_POWERUP_SIGNAL (POWER_SIGNAL_MASK(X86_RSMRST_L_PGOOD) | \ - POWER_SIGNAL_MASK(X86_PP5000_A_PGOOD)) - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -/* Power signals list */ -enum power_signal { - X86_SLP_S0_DEASSERTED, - X86_SLP_S3_DEASSERTED, - X86_SLP_S4_DEASSERTED, - X86_RSMRST_L_PGOOD, - X86_PP5000_A_PGOOD, - X86_ALL_SYS_PGOOD, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -void all_sys_pgood_check_reboot(void); -__override_proto void board_chipset_forced_shutdown(void); - -#endif /* __CROS_EC_COMETLAKE_H */ diff --git a/include/power/icelake.h b/include/power/icelake.h deleted file mode 100644 index 08c14718ec..0000000000 --- a/include/power/icelake.h +++ /dev/null @@ -1,82 +0,0 @@ -/* Copyright 2018 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Icelake chipset power control module for Chrome EC */ - -#ifndef __CROS_EC_ICELAKE_H -#define __CROS_EC_ICELAKE_H - -#include "stdbool.h" - -/* Input state flags. */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) -#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) - -#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_DSW_DPWROK) - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED) - -#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -/* Power signals list */ -enum power_signal { - X86_SLP_S0_DEASSERTED, - X86_SLP_S3_DEASSERTED, - X86_SLP_S4_DEASSERTED, - X86_SLP_SUS_DEASSERTED, - X86_RSMRST_L_PGOOD, - X86_DSW_DPWROK, - X86_ALL_SYS_PGOOD, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -struct intel_x86_pwrok_signal { - enum gpio_signal gpio; - bool active_low; - int delay_ms; -}; - -/* - * Ice Lake/Tiger Lake/Jasper Lake PWROK Generation - * - * The following signals are controlled based on the state of the ALL_SYS_PWRGD - * signal - * - * VCCIN enable (input to the VCCIN voltage rail controller) - * VCCST_PWRGD (input to the SoC) - * PCH_PWROK (input to the SoC) - * SYS_PWROK (input to the SoC) - * - * For any the above signals that are controlled by the EC, create an entry - * in the pwrok_signal_assert_list[] and pwrok_signal_deassert_list[] arrays. - * The typical order for asserting the signals is shown above, the deassert - * order is the reverse. - * - * ALL_SYS_PWRGD indicates when all the following are asserted. - * RSMRST_PWRGD & DPWROK - * S4 voltage rails good (DDR) - * VCCST voltage rail good - * S0 voltage rails good - * - * ALL_SYS_PWRGD can be implemented as a single GPIO if the platform power logic - * combines the above power good signals. Otherwise your board can override - * intel_x86_get_pg_ec_all_sys_pwrgd() to check multiple power good signals. - */ -extern const struct intel_x86_pwrok_signal pwrok_signal_assert_list[]; -extern const int pwrok_signal_assert_count; -extern const struct intel_x86_pwrok_signal pwrok_signal_deassert_list[]; -extern const int pwrok_signal_deassert_count; - -#endif /* __CROS_EC_ICELAKE_H */ diff --git a/include/power/intel_x86.h b/include/power/intel_x86.h deleted file mode 100644 index 303db20de7..0000000000 --- a/include/power/intel_x86.h +++ /dev/null @@ -1,105 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Intel X86 chipset power control module for Chrome EC */ - - -#ifndef __CROS_EC_INTEL_X86_H -#define __CROS_EC_INTEL_X86_H - -#include "espi.h" -#include "power.h" - -/* Chipset specific header files */ -#if defined(CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540) -#include "alderlake_slg4bd44540.h" -/* Geminilake and apollolake use same power sequencing. */ -#elif defined(CONFIG_CHIPSET_APL_GLK) -#include "apollolake.h" -#elif defined(CONFIG_CHIPSET_CANNONLAKE) -#include "cannonlake.h" -#elif defined(CONFIG_CHIPSET_COMETLAKE) -#include "cometlake.h" -#elif defined(CONFIG_CHIPSET_COMETLAKE_DISCRETE) -#include "cometlake-discrete.h" -#elif defined(CONFIG_CHIPSET_ICELAKE) -#include "icelake.h" -#elif defined(CONFIG_CHIPSET_SKYLAKE) -#include "skylake.h" -#endif - -/* GPIO for power signal */ -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S3 -#define SLP_S3_SIGNAL_L VW_SLP_S3_L -#else -#define SLP_S3_SIGNAL_L GPIO_PCH_SLP_S3_L -#endif -#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S4 -#define SLP_S4_SIGNAL_L VW_SLP_S4_L -#else -#define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L -#endif - -/** - * Handle RSMRST signal. - * - * @param state Current chipset state. - */ -void common_intel_x86_handle_rsmrst(enum power_state state); - -/** - * Force chipset to G3 state. - * - * @return power_state New chipset state. - */ -enum power_state chipset_force_g3(void); - -/** - * Handle power states. - * - * @param state Current chipset state. - * @return power_state New chipset state. - */ -enum power_state common_intel_x86_power_handle_state(enum power_state state); - -/** - * Wait for power-up to be allowed based on available power. - * - * This delays G3->S5 until there is enough power to boot the AP, waiting - * first until the charger (if any) is ready, then for there to be sufficient - * power. - * - * In case of error, the caller should not allow power-up past G3. - * - * @return EC_SUCCESS if OK. - */ -enum ec_error_list intel_x86_wait_power_up_ok(void); - -/** - * Get the value of PG_EC_DSW_PWROK. - * - * The default implementation is just to return the GPIO. But if a - * board doesn't have that GPIO, they may override this function. - */ -__override_proto int intel_x86_get_pg_ec_dsw_pwrok(void); - -/** - * Get the value of PG_EC_ALL_SYS_PWRGD. - * - * The default implementation is just to return the GPIO. But if a - * board doesn't have that GPIO, they may override this function. - */ -__override_proto int intel_x86_get_pg_ec_all_sys_pwrgd(void); - -/** - * Introduces SYS_RESET_L Debounce time delay - * - * The default implementation is to wait for a duration of 32 ms. - * If board needs a different debounce time delay, they may override - * this function - */ -__override_proto void intel_x86_sys_reset_delay(void); - -#endif /* __CROS_EC_INTEL_X86_H */ diff --git a/include/power/mt8192.h b/include/power/mt8192.h deleted file mode 100644 index e0c65c3bcc..0000000000 --- a/include/power/mt8192.h +++ /dev/null @@ -1,16 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_POWER_MT8192_H_ -#define __CROS_EC_POWER_MT8192_H_ - -enum power_signal { - PMIC_PWR_GOOD, - AP_IN_S3_L, - AP_WDT_ASSERTED, - POWER_SIGNAL_COUNT, -}; - -#endif /* __CROS_EC_POWER_MT8192_H_ */ diff --git a/include/power/qcom.h b/include/power/qcom.h deleted file mode 100644 index 5f5247fa87..0000000000 --- a/include/power/qcom.h +++ /dev/null @@ -1,28 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_POWER_QCOM_H_ -#define __CROS_EC_POWER_QCOM_H_ - -#if defined(CONFIG_CHIPSET_SC7180) || defined(CONFIG_CHIPSET_SC7280) -enum power_signal { - SC7X80_AP_RST_ASSERTED = 0, - SC7X80_PS_HOLD, - SC7X80_POWER_GOOD, - SC7X80_AP_SUSPEND, -#ifdef CONFIG_CHIPSET_SC7180 - SC7X80_WARM_RESET, - SC7X80_DEPRECATED_AP_RST_REQ, -#endif - POWER_SIGNAL_COUNT, -}; -#endif - -/* Swithcap functions */ -void board_set_switchcap_power(int enable); -int board_is_switchcap_enabled(void); -int board_is_switchcap_power_good(void); - -#endif /* __CROS_EC_POWER_QCOM_H_ */ diff --git a/include/power/skylake.h b/include/power/skylake.h deleted file mode 100644 index c8a656c6c5..0000000000 --- a/include/power/skylake.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Skylake IMVP8 / ROP PMIC chipset power control module for Chrome EC */ - -#ifndef __CROS_EC_SKYLAKE_H -#define __CROS_EC_SKYLAKE_H - -/* - * Input state flags. - * TODO: Normalize the power signal masks from board defines to SoC headers. - */ -#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED) -#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED) -#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED) - -#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \ - IN_PCH_SLP_S4_DEASSERTED | \ - IN_PCH_SLP_SUS_DEASSERTED) - -/* - * DPWROK is NC / stuffing option on initial boards. - * TODO(shawnn): Figure out proper control signals. - */ -#define IN_PGOOD_ALL_CORE 0 - -#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED) - -#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED - -#define CHARGER_INITIALIZED_DELAY_MS 100 -#define CHARGER_INITIALIZED_TRIES 40 - -/* Power signals list */ -enum power_signal { -#ifdef CONFIG_POWER_S0IX - X86_SLP_S0_DEASSERTED, -#endif - X86_SLP_S3_DEASSERTED, - X86_SLP_S4_DEASSERTED, - X86_SLP_SUS_DEASSERTED, - X86_RSMRST_L_PWRGD, - X86_PMIC_DPWROK, - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT -}; - -/* - * Board can define this function to indicate to the skylake - * power code that it does not have working reset flags. - */ -int board_has_working_reset_flags(void); - -#endif /* __CROS_EC_SKYLAKE_H */ diff --git a/include/power_button.h b/include/power_button.h deleted file mode 100644 index 167ca21e2b..0000000000 --- a/include/power_button.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Power button API for Chrome EC */ - -#ifndef __CROS_EC_POWER_BUTTON_H -#define __CROS_EC_POWER_BUTTON_H - -#include "common.h" - -/** - * Return non-zero if power button is pressed. - * - * Uses the debounced button state, not the raw signal from the GPIO. - */ -int power_button_is_pressed(void); - -/** - * Wait for the power button to be released - * - * @param timeout_us Timeout in microseconds, or -1 to wait forever - * @return EC_SUCCESS if ok, or - * EC_ERROR_TIMEOUT if power button failed to release - */ -int power_button_wait_for_release(int timeout_us); - -/** - * Return non-zero if power button signal asserted at hardware input. - * - */ -int power_button_signal_asserted(void); - -/** - * Interrupt handler for power button. - * - * @param signal Signal which triggered the interrupt. - */ -void power_button_interrupt(enum gpio_signal signal); - -/** - * For x86 systems, force-assert the power button signal to the PCH. - */ -void power_button_pch_press(void); - -/** - * For x86 systems, force-deassert the power button signal to the PCH. - */ -void power_button_pch_release(void); - -/** - * For x86 systems, force a pulse of the power button signal to the PCH. - */ -void power_button_pch_pulse(void); - -/** - * Returns the time when DSW_PWROK was asserted. It should be customized - * by each board. See CONFIG_DELAY_DSW_PWROK_TO_PWRBTN for details. - * - * @return time in usec when DSW_PWROK was asserted. - */ -int64_t get_time_dsw_pwrok(void); - -/** - * This must be defined when CONFIG_POWER_BUTTON_TO_PCH_CUSTOM is defined. This - * allows a board to override the default behavior of - * gpio_set_level(GPIO_PCH_PWRBTN_L, level). - */ -void board_pwrbtn_to_pch(int level); - -#endif /* __CROS_EC_POWER_BUTTON_H */ diff --git a/include/power_led.h b/include/power_led.h deleted file mode 100644 index 05ea7ead3c..0000000000 --- a/include/power_led.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Power button LED control for Chrome EC */ - -#ifndef __CROS_EC_POWER_LED_H -#define __CROS_EC_POWER_LED_H - -#include "common.h" - -enum powerled_state { - POWERLED_STATE_OFF, - POWERLED_STATE_ON, - POWERLED_STATE_SUSPEND, - POWERLED_STATE_COUNT -}; - -#ifdef HAS_TASK_POWERLED - -/** - * Set the power LED - * - * @param state Target state - */ -void powerled_set_state(enum powerled_state state); - -#else - -static inline void powerled_set_state(enum powerled_state state) {} - -#endif - -#endif /* __CROS_EC_POWER_LED_H */ diff --git a/include/pwm.h b/include/pwm.h deleted file mode 100644 index 401d3dc0ec..0000000000 --- a/include/pwm.h +++ /dev/null @@ -1,72 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_PWM_H -#define __CROS_EC_PWM_H - -/* The values are defined in board.h */ -enum pwm_channel; - -/** - * Enable/disable a PWM channel. - */ -void pwm_enable(enum pwm_channel ch, int enabled); - -/** - * Get PWM channel enabled status. - */ -int pwm_get_enabled(enum pwm_channel ch); - -/** - * Set PWM channel duty cycle (0-65535). - */ -void pwm_set_raw_duty(enum pwm_channel ch, uint16_t duty); - -/** - * Get PWM channel duty cycle. - */ -uint16_t pwm_get_raw_duty(enum pwm_channel ch); - -/** - * Set PWM channel duty cycle (0-100). - */ -void pwm_set_duty(enum pwm_channel ch, int percent); - -/** - * Get PWM channel duty cycle. - */ -int pwm_get_duty(enum pwm_channel ch); - - -/* Flags for PWM config table */ - -/** - * PWM output signal is inverted, so 100% duty means always low - */ -#define PWM_CONFIG_ACTIVE_LOW BIT(0) -/** - * PWM channel has a fan controller with a tach input and can auto-adjust - * its duty cycle to produce a given fan RPM. - */ -#define PWM_CONFIG_HAS_RPM_MODE BIT(1) -/** - * PWM clock select alternate source. The actual clock and alternate - * source are chip dependent. - */ -#define PWM_CONFIG_ALT_CLOCK BIT(2) -/** - * PWM channel has a complementary output signal which should be enabled in - * addition to the primary output. - */ -#define PWM_CONFIG_COMPLEMENTARY_OUTPUT BIT(3) -/** - * PWM channel must stay active in low-power idle, if enabled. - */ -#define PWM_CONFIG_DSLEEP BIT(4) -/** - * PWM channel's IO type is open-drain, if enabled. (default IO is push-pull.) - */ -#define PWM_CONFIG_OPEN_DRAIN BIT(5) -#endif /* __CROS_EC_PWM_H */ diff --git a/include/pwr_defs.h b/include/pwr_defs.h deleted file mode 100644 index c01e602397..0000000000 --- a/include/pwr_defs.h +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_PWR_DEFS_H -#define __CROS_EC_PWR_DEFS_H - -#include "system.h" - -struct pwr_con_t { - uint16_t volts; - uint16_t milli_amps; -}; - -/* - * Return power (in milliwatts) corresponding to input power connection - * struct entry. - */ -inline int pwr_con_to_milliwatts(struct pwr_con_t *pwr) -{ - return (pwr->volts * pwr->milli_amps); -} - -#endif diff --git a/include/regulator.h b/include/regulator.h deleted file mode 100644 index 9dae7233c1..0000000000 --- a/include/regulator.h +++ /dev/null @@ -1,55 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_REGULATOR_H -#define __CROS_EC_REGULATOR_H - -#include "common.h" - -/* - * Board dependent hooks on voltage regulators. - * - * These functions should be implemented by boards which - * CONFIG_HOSTCMD_REGULATOR is defined. - */ - -/* - * Get basic info of voltage regulator for given index. - * - * Note that the maximum length of name is EC_REGULATOR_NAME_MAX_LEN, and the - * maximum length of the voltages_mv list is EC_REGULATOR_VOLTAGE_MAX_COUNT. - */ -int board_regulator_get_info(uint32_t index, char *name, - uint16_t *voltage_count, uint16_t *voltages_mv); - -/* - * Configure the regulator as enabled / disabled. - */ -int board_regulator_enable(uint32_t index, uint8_t enable); - -/* - * Query if the regulator is enabled. - */ -int board_regulator_is_enabled(uint32_t index, uint8_t *enabled); - -/* - * Set voltage for the voltage regulator within the range specified. - * - * The driver should select the voltage in range closest to min_mv. - * - * Also note that this might be called before the regulator is enabled, and the - * setting should be in effect after the regulator is enabled. - */ -int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, - uint32_t max_mv); - -/* - * Get the currently configured voltage for the voltage regulator. - * - * Note that this might be called before the regulator is enabled. - */ -int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv); - -#endif /* !defined(__CROS_EC_REGULATOR_H) */ diff --git a/include/rma_auth.h b/include/rma_auth.h deleted file mode 100644 index 0a4d7c7e71..0000000000 --- a/include/rma_auth.h +++ /dev/null @@ -1,81 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* RMA challenge-response */ - -#ifndef __CROS_EC_RMA_AUTH_H -#define __CROS_EC_RMA_AUTH_H - -#include <stdint.h> - -#include "common.h" /* For __packed. */ - -/* Current challenge protocol version */ -#define RMA_CHALLENGE_VERSION 0 - -/* Getters and setters for version_key_id byte */ -#define RMA_CHALLENGE_VKID_BYTE(version, keyid) \ - (((version) << 6) | ((keyid) & 0x3f)) -#define RMA_CHALLENGE_GET_VERSION(vkidbyte) ((vkidbyte) >> 6) -#define RMA_CHALLENGE_GET_KEY_ID(vkidbyte) ((vkidbyte) & 0x3f) - -#define RMA_DEVICE_ID_SIZE 8 - -struct __packed rma_challenge { - /* Top 2 bits are protocol version; bottom 6 are server KeyID */ - uint8_t version_key_id; - - /* Ephemeral public key from device */ - uint8_t device_pub_key[32]; - - /* Board ID (.type) */ - uint8_t board_id[4]; - - /* Device ID */ - uint8_t device_id[RMA_DEVICE_ID_SIZE]; -}; - -/* Size of encoded challenge and response, and buffer sizes to hold them */ -#define RMA_CHALLENGE_CHARS 80 -#define RMA_CHALLENGE_BUF_SIZE (RMA_CHALLENGE_CHARS + 1) - -#define RMA_AUTHCODE_CHARS 8 -#define RMA_AUTHCODE_BUF_SIZE (RMA_AUTHCODE_CHARS + 1) - -/** - * Create a new RMA challenge/response - * - * @return EC_SUCCESS, EC_ERROR_TIMEOUT if too soon since the last challenge, - * or other non-zero error code. - */ -int rma_create_challenge(void); - -/** - * Get the current challenge string - * - * @return a pointer to the challenge string. String will be empty if there - * is no active challenge. - */ -const char *rma_get_challenge(void); - -/** - * Try a RMA authorization code - * - * @param code Authorization code to try (buffer needs to be at least - * RMA_AUTHCODE_CHARS bytes long, no matter the actual string length, as the - * function uses safe_memcmp to prevent timing attacks). - * @return EC_SUCCESS if the response was correct, or non-zero error code. - */ -int rma_try_authcode(const char *code); - -/** - * Get the device ID returned in RMA response. - * - * @param rma_device_id Pointer to the buffer that will be filled with - * the ID. The buffer must be of size RMA_DEVICE_ID_SIZE. - */ -void get_rma_device_id(uint8_t rma_device_id[RMA_DEVICE_ID_SIZE]); - -#endif diff --git a/include/rtc.h b/include/rtc.h deleted file mode 100644 index cff1ee0f64..0000000000 --- a/include/rtc.h +++ /dev/null @@ -1,48 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* RTC cross-platform functions */ - -#ifndef __CROS_EC_RTC_H -#define __CROS_EC_RTC_H - -#include "common.h" - -#define SECS_PER_MINUTE 60 -#define SECS_PER_HOUR (60 * SECS_PER_MINUTE) -#define SECS_PER_DAY (24 * SECS_PER_HOUR) -#define SECS_PER_WEEK (7 * SECS_PER_DAY) -#define SECS_PER_YEAR (365 * SECS_PER_DAY) -/* The seconds elapsed from 01-01-1970 to 01-01-2000 */ -#define SECS_TILL_YEAR_2K (946684800) -#define IS_LEAP_YEAR(x) \ - (((x) % 4 == 0) && (((x) % 100 != 0) || ((x) % 400 == 0))) - -struct calendar_date { - /* The number of years since A.D. 2000, i.e. year = 17 for y2017 */ - uint8_t year; - /* 1-based indexing, i.e. valid values range from 1 to 12 */ - uint8_t month; - /* 1-based indexing, i.e. valid values range from 1 to 31 */ - uint8_t day; -}; - -/** - * Convert calendar date to seconds elapsed since epoch time. - * - * @param time The calendar date (years, months, and days). - * @return the seconds elapsed since epoch time (01-01-1970 00:00:00). - */ -uint32_t date_to_sec(struct calendar_date time); - -/** - * Convert seconds elapsed since epoch time to calendar date - * - * @param sec The seconds elapsed since epoch time (01-01-1970 00:00:00). - * @return the calendar date (years, months, and days). - */ -struct calendar_date sec_to_date(uint32_t sec); - -#endif /* __CROS_EC_RTC_H */ diff --git a/include/sfdp.h b/include/sfdp.h deleted file mode 100644 index 087708d799..0000000000 --- a/include/sfdp.h +++ /dev/null @@ -1,807 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* JEDEC Serial Flash Discoverable Parameters (SFDP) for Serial NOR Flash, - * covering v1.0 (JESD216) & v1.5 (JESD216A). */ -#ifndef __CROS_EC_SFDP_H -#define __CROS_EC_SFDP_H - -/** - * Helper macros to declare and access SFDP defined bitfields at a JEDEC SFDP - * defined double word (32b) granularity. - */ -#define SFDP_DEFINE_BITMASK_32(name, hi, lo) \ - static const uint32_t name = (((1ULL << ((hi) - (lo) + 1)) - 1UL) \ - << (lo)); -#define SFDP_DEFINE_SHIFT_32(name, hi, lo) \ - static const size_t name = (lo); -#define SFDP_DEFINE_BITFIELD(name, hi, lo) \ - SFDP_DEFINE_BITMASK_32(name ## _MASK, hi, lo) \ - SFDP_DEFINE_SHIFT_32(name ## _SHIFT, hi, lo) -#define SFDP_GET_BITFIELD(name, dw) \ - (((dw) & name ## _MASK) >> name ## _SHIFT) - -/** - * Helper macros to construct SFDP defined double words (32b). Note reserved or - * unused fields must always be set to all 1's. - */ -#define SFDP_BITFIELD(name, value) (((value) << name ## _SHIFT) & name ## _MASK) -#define SFDP_UNUSED(hi, lo) (((1ULL << ((hi) - (lo) + 1)) - 1UL) << (lo)) - -/******************************************************************************/ -/* SFDP Header, always located at SFDP offset 0x0. Note that the SFDP space is - * always read in 3 Byte addressing mode with a single cycle, where the - * expected SFDP address space layout looks like the following: - * - * ------------------0x00 - * | SFDP Header | (specifying X number of Parameter Headers) - * ------------------0x08 - * | Parameter Header 1 | (specifying Y Parameter Table Pointer & Length L) - * ------------------0x10 - * - - - - * --------------X * 0x08 - * | Parameter Header X | (specifying Z Parameter Table Pointer & Length K) - * --------(X + 1) * 0x08 - * - - - - * ---------------------Y - * | Parameter Table 1 | - * -------------------Y+L - * - - - - * ---------------------Z Key: ------start_sfdp_offset - * | Parameter Table X | | Region Name | - * -------------------Z+K ------limit_sfdp_offset - */ - -/* - * SFDP Header 1st DWORD - * --------------------- - * <31:24> : Fourth signature byte == 'P' - * <23:16> : Third signature byte == 'D' - * <15:8> : Second signature byte == 'F' - * <7:0> : First signature byte == 'S' - */ -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW1_P, 31, 24); -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW1_D, 23, 16); -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW1_F, 15, 8); -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW1_S, 7, 0); -#define SFDP_HEADER_DWORD_1(s, f, d, p) \ - (SFDP_BITFIELD(SFDP_HEADER_DW1_P, p) | \ - SFDP_BITFIELD(SFDP_HEADER_DW1_D, d) | \ - SFDP_BITFIELD(SFDP_HEADER_DW1_F, f) | \ - SFDP_BITFIELD(SFDP_HEADER_DW1_S, s)) - -#define SFDP_HEADER_DW1_SFDP_SIGNATURE_VALID(x) (x == 0x50444653) - -/* - * SFDP Header 2nd DWORD - * --------------------- - * <31:24> : Unused - * <23:16> : Number of Parameter Headers (0-based, 0 indicates 1) - * <15:8> : SFDP Major Revision Number - * <7:0> : SFDP Minor Revision Number - */ -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW2_NPH, 23, 16); -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW2_SFDP_MAJOR, 15, 8); -SFDP_DEFINE_BITFIELD(SFDP_HEADER_DW2_SFDP_MINOR, 7, 0); -#define SFDP_HEADER_DWORD_2(nph, major, minor) \ - (SFDP_UNUSED(31, 24) | \ - SFDP_BITFIELD(SFDP_HEADER_DW2_NPH, nph) | \ - SFDP_BITFIELD(SFDP_HEADER_DW2_SFDP_MAJOR, major) | \ - SFDP_BITFIELD(SFDP_HEADER_DW2_SFDP_MINOR, minor)) - -/******************************************************************************/ -/* SFDP v1.0 Parameter Headers, starts at SFDP offset 0x8 and there are as many - * as specified in the v1.0 SFDP header. */ - -/* In SFDP v1.0, the only reserved ID was the Basic Flash Parameter Table ID of - * 0x00. Otherwise this field must be set to the vendor's manufacturer ID. Note, - * the spec does not call out how to report the manufacturer bank number. */ - #define BASIC_FLASH_PARAMETER_TABLE_1_0_ID 0x00 - -/* - * SFDP v1.0: Parameter Header 1st DWORD - * -------------------------- - * <31:24> : Parameter Table Length (1-based, 1 indicates 1) - * <23:16> : Parameter Table Major Revision Number - * <15:8> : Parameter Table Minor Revision Number - * <7:0> : ID number - */ -SFDP_DEFINE_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_PTL, 31, 24); -SFDP_DEFINE_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_TABLE_MAJOR, 23, 16); -SFDP_DEFINE_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_TABLE_MINOR, 15, 8); -SFDP_DEFINE_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_ID, 7, 0); -#define SFDP_1_0_PARAMETER_HEADER_DWORD_1(ptl, major, minor, id) \ - (SFDP_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_PTL, ptl) | \ - SFDP_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_TABLE_MAJOR, major) | \ - SFDP_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_TABLE_MINOR, minor) | \ - SFDP_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW1_ID, id)) - -/* - * SFDP v1.0: Parameter Header 2nd DWORD - * -------------------------- - * <31:24> : Unused (0xFF) - * <23:0> : Parameter Table Pointer (SFDP offset which must be word aligned) - */ -SFDP_DEFINE_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW2_PTP, 23, 0); -#define SFDP_1_0_PARAMETER_HEADER_DWORD_2(ptp) \ - (SFDP_UNUSED(31, 24) | \ - SFDP_BITFIELD(SFDP_1_0_PARAMETER_HEADER_DW2_PTP, ptp)) - -/******************************************************************************/ -/* SFDP v1.5 Parameter Headers, starts at SFDP offset 0x8 and there are as many - * as specified in the v1.5 SFDP header. */ - -/* Parameter ID MSB | Parameter ID LSB | Type | Owner - * ========================================================================== - * 0x00 | All | Reserved | JEDEC JC42.4 - * -------------------------------------------------------------------------- - * 0x01 - 0x7F | odd parity | JEDEC JEP106 | Vendor - * | | Manufacturer ID | - * | | (mfn=LSB, bank=MSB) | - * -------------------------------------------------------------------------- - * 0x01 - 0x7F | even parity | Function Specific | Vendor - * -------------------------------------------------------------------------- - * 0x80 - 0xFE | even parity | Function Specific | JEDEC JC42.4 - * -------------------------------------------------------------------------- - * 0xFF | 0x00 | Basic Flash Parameter | JEDEC JC42.4 - * | | Table | - * -------------------------------------------------------------------------- */ - -#define BASIC_FLASH_PARAMETER_TABLE_1_5_ID_MSB 0xFF -#define BASIC_FLASH_PARAMETER_TABLE_1_5_ID_LSB 0x00 - -/* - * SFDP v1.5: Parameter Header 1st DWORD - * -------------------------- - * <31:24> : Parameter Table Length (1-based, 1 indicates 1) - * <23:16> : Parameter Table Major Revision Number - * <15:8> : Parameter Table Minor Revision Number - * <7:0> : Parameter ID LSB - */ -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_PTL, 31, 24); -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_TABLE_MAJOR, 23, 16); -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_TABLE_MINOR, 15, 8); -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_ID_LSB, 7, 0); -#define SFDP_1_5_PARAMETER_HEADER_DWORD_1(ptl, major, minor, idlsb) \ - (SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_PTL, ptl) | \ - SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_TABLE_MAJOR, major) | \ - SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_TABLE_MINOR, minor) | \ - SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW1_ID_LSB, idlsb)) - -/* - * SFDP v1.5: Parameter Header 2nd DWORD - * -------------------------- - * <31:24> : Parameter ID MSB - * <23:0> : Parameter Table Pointer (SFDP offset which must be word aligned) - */ -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW2_ID_MSB, 31, 24); -SFDP_DEFINE_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW2_PTP, 23, 0); -#define SFDP_1_5_PARAMETER_HEADER_DWORD_2(idmsb, ptp) \ - (SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW2_ID_MSB, idmsb) | \ - SFDP_BITFIELD(SFDP_1_5_PARAMETER_HEADER_DW2_PTP, ptp)) - -/******************************************************************************/ -/* JEDEC (SPI Protocol) Basic Flash Parameter Table v1.0. The reporting of at - * least one revision of this table is mandatory and must be specified by the - * first parameter header.*/ - -/* Basic Flash Parameter Table v1.0 1st DWORD - * ------------------------------------------ - * <31:23> : Unused - * <22> : Supports 1-1-4 Fast Read (1 if supported) - * <21> : Supports 1-4-4 Fast Read (1 if supported) - * <20> : Supports 1-2-2 Fast Read (1 if supported) - * <19> : Supports Double Transfer Rate (DTR) Clocking (1 if supported) - * <18:17> : Address Bytes: - * - 0x0 if 3 Byte addressing only - * - 0x1 if defaults to 3B addressing, enters 4B on command - * - 0x2 if 4 Byte addressing only - * <16> : Supports 1-1-2 Fast Read (1 if supported) - * <15:8> : 4KiB Erase Opcode (0xFF if unsupported) - * <7:5> : Unused - * <4> : Write Enable Opcode Select for Writing to Volatile Status Register: - * - 0x0 if 0x50 is the opcode to enable a status register write - * - 0x1 if 0x06 is the opcode to enable a status register write - * <3> : Write Enable Instruction Required for writing to Volatile Status - * Register: - * - 0x0 if target flash only has nonvolatile status bits and does - * not require status register to be written every power on - * - 0x1 if target flash requires 0x00 to be written to the status - * register in order to allow writes and erases - * <2> : Write granularity (0 if the buffer is less than 64B, 1 if larger) - * <1:0> : Block/Sector Erase granularity available for the entirety of flash: - * - 0x1 if 4KiB is uniformly available - * - 0x3 if 4KiB is unavailable - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_1_1_4_SUPPORTED, 22, 22); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_1_4_4_SUPPORTED, 21, 21); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_1_2_2_SUPPORTED, 20, 20); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_DTR_SUPPORTED, 19, 19); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_ADDR_BYTES, 18, 17); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_1_1_2_SUPPORTED, 16, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_4KIB_ERASE_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_WREN_OPCODE_SELECT, 4, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_WREN_REQ, 3, 3); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_WRITE_GRANULARITY, 2, 2); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW1_4KIB_AVAILABILITY, 1, 0); -#define BFPT_1_0_DWORD_1(fr114, fr144, fr122, dtr, addr, fr112, \ - rm4kb, wrenop, wrenrq, wrgr, ergr) \ - (SFDP_UNUSED(31, 23) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_1_1_4_SUPPORTED, fr114) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_1_4_4_SUPPORTED, fr144) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_1_2_2_SUPPORTED, fr122) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_DTR_SUPPORTED, dtr) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_ADDR_BYTES, addr) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_1_1_2_SUPPORTED, fr112) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_4KIB_ERASE_OPCODE, rm4kb) | \ - SFDP_UNUSED(7, 5) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_WREN_OPCODE_SELECT, wrenop) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_WREN_REQ, wrenrq) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_WRITE_GRANULARITY, wrgr) | \ - SFDP_BITFIELD(BFPT_1_0_DW1_4KIB_AVAILABILITY, ergr)) - -/* Basic Flash Parameter Table v1.0 2nd DWORD - * ------------------------------------------ - * <31> : Density greater than 2 gibibits - * <30:0> : N, where: - * - if =< 2 gibibits, flash memory density is N+1 bits - * - if > 2 gibibits, flash memory density is 2^N bits - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW2_GT_2_GIBIBITS, 31, 31); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW2_N, 30, 0); -#define BFPT_1_0_DWORD_2(gt_2_gibibits, n) \ - (SFDP_BITFIELD(BFPT_1_0_DW2_GT_2_GIBIBITS, gt_2_gibibits) | \ - SFDP_BITFIELD(BFPT_1_0_DW2_N, n)) - -/* Basic Flash Parameter Table v1.0 3rd DWORD - * ------------------------------------------ - * <31:24> : 1-1-4 Fast Read Opcode - * <23:21> : 1-1-4 Fast Read Number of Mode Bits (0 if unsupported) - * <20:16> : 1-1-4 Fast Read Number of Wait States (Wait State Clocks) - * <15:8> : 1-4-4 Fast Read Opcode - * <7:5> : 1-4-4 Fast Read Number of Mode Bits (0 if unsupported) - * <4:0> : 1-4-4 Fast Read Number of Wait States (Wait State CLocks) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_1_4_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_1_4_MODE_BITS, 23, 21); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_1_4_WAIT_STATE_CLOCKS, 20, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_4_4_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_4_4_MODE_BITS, 7, 5); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW3_1_4_4_WAIT_STATE_CLOCKS, 4, 0); -#define BFPT_1_0_DWORD_3(fr114op, fr114mb, fr114dc, \ - fr144op, fr144mb, fr144dc) \ - (SFDP_BITFIELD(BFPT_1_0_DW3_1_1_4_OPCODE, fr114op) | \ - SFDP_BITFIELD(BFPT_1_0_DW3_1_1_4_MODE_BITS, fr114mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW3_1_1_4_WAIT_STATE_CLOCKS, fr114dc) | \ - SFDP_BITFIELD(BFPT_1_0_DW3_1_4_4_OPCODE, fr144op) | \ - SFDP_BITFIELD(BFPT_1_0_DW3_1_4_4_MODE_BITS, fr144mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW3_1_4_4_WAIT_STATE_CLOCKS, fr144dc)) - -/* Basic Flash Parameter Table v1.0 4th DWORD - * ------------------------------------------ - * <31:24> : 1-2-2 Fast Read Opcode - * <23:21> : 1-2-2 Fast Read Number of Mode Bits (0 if unsupported) - * <20:16> : 1-2-2 Fast Read Number of Wait States (Wait State Clocks) - * <15:8> : 1-1-2 Fast Read Opcode - * <7:5> : 1-1-2 Fast Read Number of Mode Bits (0 if unsupported) - * <4:0> : 1-1-2 Fast Read Number of Wait States (Wait State CLocks) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_2_2_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_2_2_MODE_BITS, 23, 21); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_2_2_WAIT_STATE_CLOCKS, 20, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_1_2_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_1_2_MODE_BITS, 7, 5); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW4_1_1_2_WAIT_STATE_CLOCKS, 4, 0); -#define BFPT_1_0_DWORD_4(fr122op, fr122mb, fr122dc, \ - fr112op, fr112mb, fr112dc) \ - (SFDP_BITFIELD(BFPT_1_0_DW4_1_2_2_OPCODE, fr122op) | \ - SFDP_BITFIELD(BFPT_1_0_DW4_1_2_2_MODE_BITS, fr122mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW4_1_2_2_WAIT_STATE_CLOCKS, fr122dc) | \ - SFDP_BITFIELD(BFPT_1_0_DW4_1_1_2_OPCODE, fr112op) | \ - SFDP_BITFIELD(BFPT_1_0_DW4_1_1_2_MODE_BITS, fr112mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW4_1_1_2_WAIT_STATE_CLOCKS, fr112dc)) - -/* Basic Flash Parameter Table v1.0 5th DWORD - * ------------------------------------------ - * <31:5> : Reserved (0x7FFFFFF) - * <4> : Supports 4-4-4 Fast Read (1 if supported) - * <3:1> : Reserved (0x7) - * <0> : Supports 2-2-2 Fast Read (1 if supported) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW5_4_4_4_SUPPORTED, 4, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW5_2_2_2_SUPPORTED, 0, 0); -#define BFPT_1_0_DWORD_5(fr444, fr222) \ - (SFDP_UNUSED(31, 5) | \ - SFDP_BITFIELD(BFPT_1_0_DW5_4_4_4_SUPPORTED, fr444) | \ - SFDP_UNUSED(3, 1) | \ - SFDP_BITFIELD(BFPT_1_0_DW5_2_2_2_SUPPORTED, fr222)) - -/* Basic Flash Parameter Table v1.0 6th DWORD - * ------------------------------------------ - * <31:24> : 2-2-2 Fast Read Opcode - * <23:21> : 2-2-2 Fast Read Number of Mode Bits (0 if unsupported) - * <20:16> : 2-2-2 Fast Read Number of Wait States (Wait State Clocks) - * <15:0> : Reserved (0xFFFF) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW6_2_2_2_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW6_2_2_2_MODE_BITS, 23, 21); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW6_2_2_2_WAIT_STATE_CLOCKS, 20, 16); -#define BFPT_1_0_DWORD_6(fr222op, fr222mb, fr222dc) \ - (SFDP_BITFIELD(BFPT_1_0_DW6_2_2_2_OPCODE, fr222op) | \ - SFDP_BITFIELD(BFPT_1_0_DW6_2_2_2_MODE_BITS, fr222mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW6_2_2_2_WAIT_STATE_CLOCKS, fr222dc) | \ - SFDP_UNUSED(15, 0)) - -/* Basic Flash Parameter Table v1.0 7th DWORD - * ------------------------------------------ - * <31:24> : 4-4-4 Fast Read Opcode - * <23:21> : 4-4-4 Fast Read Number of Mode Bits (0 if unsupported) - * <20:16> : 4-4-4 Fast Read Number of Wait States (Wait State Clocks) - * <15:0> : Reserved (0xFFFF) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW7_4_4_4_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW7_4_4_4_MODE_BITS, 23, 21); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW7_4_4_4_WAIT_STATE_CLOCKS, 20, 16); -#define BFPT_1_0_DWORD_7(fr444op, fr444mb, fr444dc) \ - (SFDP_BITFIELD(BFPT_1_0_DW7_4_4_4_OPCODE, fr444op) | \ - SFDP_BITFIELD(BFPT_1_0_DW7_4_4_4_MODE_BITS, fr444mb) | \ - SFDP_BITFIELD(BFPT_1_0_DW7_4_4_4_WAIT_STATE_CLOCKS, fr444dc) | \ - SFDP_UNUSED(15, 0)) - -/* Basic Flash Parameter Table v1.0 8th DWORD - * ------------------------------------------ - * <31:24> : Sector Type 2 Erase Opcode - * <23:16> : Sector Type 2 Erase Size (2^N Bytes, 0 if unavailable) - * <15:8> : Sector Type 1 Erase Opcode - * <7:0> : Sector Type 1 Erase Size (2^N Bytes, 0 if unavailable) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_2_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_2_SIZE, 23, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_1_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_1_SIZE, 7, 0); -#define BFPT_1_0_DWORD_8(rm2op, rm2sz, rm1op, rm1sz) \ - (SFDP_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_2_OPCODE, rm2op) | \ - SFDP_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_2_SIZE, rm2sz) | \ - SFDP_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_1_OPCODE, rm1op) | \ - SFDP_BITFIELD(BFPT_1_0_DW8_ERASE_TYPE_1_SIZE, rm1sz)) - -/* Basic Flash Parameter Table v1.0 9th DWORD - * ------------------------------------------ - * <31:24> : Sector Type 4 Erase Opcode - * <23:16> : Sector Type 4 Erase Size (2^N Bytes, 0 if unavailable) - * <15:8> : Sector Type 3 Erase Opcode - * <7:0> : Sector Type 3 Erase Size (2^N Bytes, 0 if unavailable) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_4_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_4_SIZE, 23, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_3_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_3_SIZE, 7, 0); -#define BFPT_1_0_DWORD_9(rm4op, rm4sz, rm3op, rm3sz) \ - (SFDP_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_4_OPCODE, rm4op) | \ - SFDP_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_4_SIZE, rm4sz) | \ - SFDP_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_3_OPCODE, rm3op) | \ - SFDP_BITFIELD(BFPT_1_0_DW9_ERASE_TYPE_3_SIZE, rm3sz)) - -/******************************************************************************/ -/* JEDEC (SPI Protocol) Basic Flash Parameter Table v1.5. The reporting of at - * least one revision of this table is mandatory and must be specified by the - * first parameter header. Note that DWORDs 1-9 are identical to v1.0. */ - -/* Basic Flash Parameter Table v1.5 10th DWORD - * ------------------------------------------ - * <31:30> : Sector Type 4 Erase, Typical time units, where - * 0x0: 1ms, 0x1: 16ms, 0x2: 128ms, 0x3: 1s - * <29:25> : Sector Type 4 Erase, Typical time count, where - * time = (count + 1) * units - * <24:23> : Sector Type 3 Erase, Typical time units, where - * 0x0: 1ms, 0x1: 16ms, 0x2: 128ms, 0x3: 1s - * <22:18> : Sector Type 3 Erase, Typical time count, where - * time = (count + 1) * units - * <17:16> : Sector Type 2 Erase, Typical time units, where - * 0x0: 1ms, 0x1: 16ms, 0x2: 128ms, 0x3: 1s - * <15:11> : Sector Type 2 Erase, Typical time count, where - * time = (count + 1) * units - * <10:9> : Sector Type 1 Erase, Typical time units, where - * 0x0: 1ms, 0x1: 16ms, 0x2: 128ms, 0x3: 1s - * <8:4> : Sector Type 1 Erase, Typical time count, where - * time = (count + 1) * units - * <3:0> : Multiplier from typical to maximum erase time, where - * maximum_time = 2 * (multiplier + 1) * typical_time - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_4_TIME_UNIT, 31, 30); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_4_TIME_CNT, 29, 25); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_3_TIME_UNIT, 24, 23); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_3_TIME_CNT, 22, 18); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_2_TIME_UNIT, 17, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_2_TIME_CNT, 15, 11); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_1_TIME_UNIT, 10, 9); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_1_TIME_CNT, 8, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW10_ERASE_TIME_MAX_MULT, 3, 0); -#define BFPT_1_5_DWORD_10(rm4unit, rm4count, rm3unit, \ - rm3count, rm2unit, rm2count, \ - rm1unit, rm1count, maxmult) \ - (SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_4_TIME_UNIT, rm4unit) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_4_TIME_CNT, rm4count) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_3_TIME_UNIT, rm3unit) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_3_TIME_CNT, rm3count) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_2_TIME_UNIT, rm2unit) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_2_TIME_CNT, rm2count) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_1_TIME_UNIT, rm1unit) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_1_TIME_CNT, rm1count) | \ - SFDP_BITFIELD(BFPT_1_5_DW10_ERASE_TIME_MAX_MULT, maxmult)) - -/* Basic Flash Parameter Table v1.5 11th DWORD - * ------------------------------------------ - * <31> : Reserved (0x1) - * <30:29> : Chip Erase, Typical time units, where - * 0x0: 16ms, 0x1: 256ms, 0x2: 4s, 0x3: 64s - * <28:24> : Chip Erase, Typical time count, where time = (count + 1) * units - * <23> : Additional Byte Program, Typical time units (0: 1us, 1: 8us) - * <22:19> : Additional Byte Program, Typical time count, where each byte takes - * time = (count + 1) * units * bytes. This should not be - * used if the additional bytes count exceeds 1/2 a page size. - * <18> : First Byte Program, Typical time units (0: 1us, 1: 8us) - * <17:14> : First Byte Program, Typical time count, where each byte takes - * time = (count + 1) * units * bytes - * <13> : Page Program, Typical time units (0: 8us, 1: 64us) - * <12:8> : Page Program, Typical time count, where time = (count + 1) * units - * <7:4> : Page Size (2^N Bytes) - * <3:0> : Multiplier from typical time to max time for programming, where - * maximum_time = 2 * (multiplier + 1) * typical_time - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_CHIP_ERASE_TIME_UNIT, 30, 29); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_CHIP_ERASE_TIME_CNT, 28, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_MORE_BYTE_WR_TIME_UNIT, 23, 23); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_MORE_BYTE_WR_TIME_CNT, 22, 19); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_INIT_BYTE_WR_TIME_UNIT, 18, 18); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_INIT_BYTE_WR_TIME_CNT, 17, 14); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_PAGE_WR_TIME_UNIT, 13, 13); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_PAGE_WR_TIME_CNT, 12, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_PAGE_SIZE, 7, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW11_WR_TIME_MAX_MULT, 3, 0); -#define BFPT_1_5_DWORD_11(crmunit, crmcount, mrbunit, mrbcount, initunit, \ - initcount, pgwrunit, pgwrcount, pagesz, maxmult) \ - (SFDP_UNUSED(31, 31) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_CHIP_ERASE_TIME_UNIT, \ - crmunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_CHIP_ERASE_TIME_CNT, \ - crmcount) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_MORE_BYTE_WR_TIME_UNIT, \ - mrbunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_MORE_BYTE_WR_TIME_CNT, \ - mrbcount) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_INIT_BYTE_WR_TIME_UNIT, \ - initunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_INIT_BYTE_WR_TIME_CNT, \ - initcount) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_PAGE_WR_TIME_UNIT, pgwrunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_PAGE_WR_TIME_CNT, pgwrcount) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_PAGE_SIZE, pagesz) | \ - SFDP_BITFIELD(BFPT_1_5_DW11_WR_TIME_MAX_MULT, maxmult)) - -/* Basic Flash Parameter Table v1.5 12th DWORD - * ------------------------------------------ - * <31> : Suspend / Resume unsupported (1 unsupported, 0 supported) - * <30:29> : Suspend in-progress erase max latency units, where - * 0x0: 128ns, 0x1: 1us, 0x2: 8us, 0x3: 64us - * <28:24> : Suspend in-progress erase max latency count, where - * max latency = (count + 1) * units - * <23:20> : Erase resume to suspend minimum interval, (count + 1) * 64us - * <19:18> : Suspend in-progress program max latency units, where - * 0x0: 128ns, 0x1: 1us, 0x2: 8us, 0x3: 64us - * <17:13> : Suspend in-progress program max latency count, where - * max latency = (count + 1) * units - * <12:9> : Program resume to suspend minimum internal, (count + 1) * 64us - * <8> : Reserved (0x1) - * <7:4> : Prohibited Operations During Erase Suspend flags, where - * xxx0b May not initiate a new erase anywhere - * (erase nesting not permitted) - * xxx1b May not initiate a new erase in the erase suspended sector - * size - * xx0xb May not initiate a page program anywhere - * xx1xb May not initiate a page program in the erase suspended - * sector size - * x0xxb Refer to vendor datasheet for read restrictions - * x1xxb May not initiate a read in the erase suspended sector size - * 0xxxb Additional erase or program restrictions apply - * 1xxxb The erase and program restrictions in bits 5:4 are - * sufficient - * <3:0> : Prohibited Operations During Program Suspend flags, where - * xxx0b May not initiate a new erase anywhere - * (erase nesting not permitted) - * xxx1b May not initiate a new erase in the program suspended page - * size - * xx0xb May not initiate a new page program anywhere - * (program nesting not permitted) - * xx1xb May not initiate a new page program in the program suspended - * page size - * x0xxb Refer to vendor datasheet for read restrictions - * x1xxb May not initiate a read in the program suspended page size - * 0xxxb Additional erase or program restrictions apply - * 1xxxb The erase and program restrictions in bits 1:0 are - * sufficient - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_SUSPEND_UNSUPPORTED, 31, 31); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_SUSP_RM_MAX_LAT_UNIT, 30, 29); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_SUSP_RM_MAX_LAT_CNT, 28, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_RM_RES_TO_SUSP_LAT_CNT, 23, 20); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_SUSP_WR_MAX_LAT_UNIT, 19, 18) -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_SUSP_WR_MAX_LAT_CNT, 17, 13); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_WR_RES_TO_SUSP_LAT_CNT, 12, 9); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_PROHIB_OPS_DURING_RM_SUSP, 7, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW12_PROHIB_OPS_DURING_WR_SUSP, 3, 0); -#define BFPT_1_5_DWORD_12(unsup, susprmlatun, susprmlatcnt, rmressusplatcnt, \ - suspwrmaxlatunit, suspwrmaxlatcnt, wrressuspcnt, \ - prohibopsrmsusp, prohibopswrsusp) \ - (SFDP_BITFIELD(BFPT_1_5_DW12_SUSPEND_UNSUPPORTED, unsup) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_SUSP_RM_MAX_LAT_UNIT, \ - susprmlatun) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_SUSP_RM_MAX_LAT_CNT, \ - susprmlatcnt) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_RM_RES_TO_SUSP_LAT_CNT, \ - rmressusplatcnt) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_SUSP_WR_MAX_LAT_UNIT, \ - suspwrmaxlatunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_SUSP_WR_MAX_LAT_CNT, \ - suspwrmaxlatcnt) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_WR_RES_TO_SUSP_LAT_CNT, \ - wrressuspcnt) | \ - SFDP_UNUSED(8, 8) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_PROHIB_OPS_DURING_RM_SUSP, \ - prohibopsrmsusp) | \ - SFDP_BITFIELD(BFPT_1_5_DW12_PROHIB_OPS_DURING_WR_SUSP, \ - prohibopswrsusp)) - -/* Basic Flash Parameter Table v1.5 13th DWORD - * ------------------------------------------ - * <31:24> : Suspend Instruction used to suspend a write or erase type operation - * <23:16> : Resume Instruction used to resume a write or erase type operation - * <15:8> : Program Suspend Instruction used to suspend a program operation - * <7:0> : Program Resume Instruction used to resume a program operation - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW13_SUSPEND_OPCODE, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW13_RESUME_OPCODE, 23, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW13_WR_SUSPEND_OPCODE, 15, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW13_WR_RESUME_OPCODE, 7, 0); -#define BFPT_1_5_DWORD_13(suspop, resop, wrsspop, wrresop) \ - (SFDP_BITFIELD(BFPT_1_5_DW13_SUSPEND_OPCODE, suspop) | \ - SFDP_BITFIELD(BFPT_1_5_DW13_RESUME_OPCODE, resop) | \ - SFDP_BITFIELD(BFPT_1_5_DW13_WR_SUSPEND_OPCODE, wrsspop) | \ - SFDP_BITFIELD(BFPT_1_5_DW13_WR_RESUME_OPCODE, wrresop)) - -/* Basic Flash Parameter Table v1.5 14th DWORD - * ------------------------------------------ - * <31> : Deep powerdown unsupported (1 unsupported, 0 supported) - * <30:23> : Enter deep powerdown instruction - * <22:15> : Exit deep powerdown instruction - * <14:13> : Exit deep powerdown to next operation delay units, where - * 0x0: 128ns, 0x1: 1us, 0x2: 8us, 0x3: 64us - * <12:8> : Exit deep powerdown to next operation delay count, where - * delay = = (count + 1) * units - * <7:2> : Status Register Polling Device Busy Flags, where - * xx_xx1xb Bit 7 of the Flag Status Register may be polled any time - * a Program, Erase, Suspend/Resume command is issued, or - * after a Reset command while the device is busy. The read - * instruction is 70h. Flag Status Register bit definitions: - * bit[7]: Program or erase controller status - * (0=busy; 1=ready) - * xx_xxx1b Use of legacy polling is supported by reading the Status - * Register with 05h instruction and checking WIP bit[0] - * (0=ready; 1=busy). - * <1:0> : Reserved (0x3) - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_POWER_DOWN_UNSUPPORTED, 31, 31); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_POWER_DOWN_OPCODE, 30, 23); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_POWER_UP_OPCODE, 22, 15); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_POWER_UP_TIME_UNIT, 14, 13); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_POWER_UP_TIME_CNT, 12, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW14_BUSY_FLAGS, 7, 2); -#define BFPT_1_5_DWORD_14(pwrdwnunsup, pwrdwnop, pwrupop, pwrupunit, pwrupcnt, \ - busypollflags) \ - (SFDP_BITFIELD(BFPT_1_5_DW14_POWER_DOWN_UNSUPPORTED, \ - pwrdwnunsup) | \ - SFDP_BITFIELD(BFPT_1_5_DW14_POWER_DOWN_OPCODE, pwrdwnop) | \ - SFDP_BITFIELD(BFPT_1_5_DW14_POWER_UP_OPCODE, pwrupop) | \ - SFDP_BITFIELD(BFPT_1_5_DW14_POWER_UP_TIME_UNIT, \ - pwrupunit) | \ - SFDP_BITFIELD(BFPT_1_5_DW14_POWER_UP_TIME_CNT, pwrupcnt) | \ - SFDP_BITFIELD(BFPT_1_5_DW14_BUSY_FLAGS, busypollflags) | \ - SFDP_UNUSED(1, 0)) - -/* Basic Flash Parameter Table v1.5 15th DWORD - * ------------------------------------------ - * <31:24> : Reserved (0xFF) - * <23> : HOLD and WIP disable supported by setting the non-volatile extended - * configuration register's bit 4 to 0. - * <22:20> : Quad Enable Requirements (1-1-4, 1-4-4, 4-4-4 Fast Reads), where - * 000b Device does not have a QE bit. Device detects 1-1-4 and 1-4-4 - * reads based on instruction. DQ3/HOLD# functions as hold during - * instruction phase. - * 001b QE is bit 1 of status register 2. It is set via Write Status - * with two data bytes where bit 1 of the second byte is one. It - * is cleared via Write Status with two data bytes where bit - * 1 of the second byte is zero. Writing only one byte to the - * status register has the side-effect of clearing status - * register 2, including the QE bit. The 100b code is used if - * writing one byte to the status register does not modify status - * register 2. - * 010b QE is bit 6 of status register 1. It is set via Write Status - * with one data byte where bit 6 is one. It is cleared via Write - * Status with one data byte where bit 6 is zero. - * 011b QE is bit 7 of status register 2. It is set via Write status - * register 2 instruction 3Eh with one data byte where bit 7 is - * one. It is cleared via Write status register 2 instruction - * 3Eh with one data byte where bit 7 is zero. The status - * register 2 is read using instruction 3Fh. - * 100b QE is bit 1 of status register 2. It is set via Write Status - * with two data bytes where bit 1 of the second byte is one. It - * is cleared via Write Status with two data bytes where bit 1 - * of the second byte is zero. In contrast to the 001b code, - * writing one byte to the status register does not modify status - * register 2. - * 101b QE is bit 1 of the status register 2. Status register 1 is - * read using Read Status instruction 05h. Status register 2 is - * read using instruction 35h. QE is set via Write Status - * instruction 01h with two data bytes where bit 1 of the second - * byte is one. It is cleared via Write Status with two data - * bytes where bit 1 of the second byte is zero. - * <19:16> : 0-4-4 Mode Entry Method, where - * xxx1b Mode Bits[7:0] = A5h Note: QE must be set prior to using this - * mode - * xx1xb Read the 8-bit volatile configuration register with - * instruction 85h, set XIP bit[3] in the data read, and write - * the modified data using the instruction 81h, then Mode Bits - * [7:0] = 01h - * <15:10> : 0-4-4 Mode Exit Method, where - * xx_xxx1b Mode Bits[7:0] = 00h will terminate this mode at the end - * of the current read operation - * xx_xx1xb If 3-Byte address active, input Fh on DQ0-DQ3 for 8 - * clocks. If 4-Byte address active, input Fh on DQ0-DQ3 for - * 10 clocks. This will terminate the mode prior to the next - * read operation. - * xx_1xxxb Input Fh (mode bit reset) on DQ0-DQ3 for 8 clocks. This - * will terminate the mode prior to the next read operation. - * <9> : 0-4-4 mode supported (1 supported, 0 unsupported) - * <8:4> : 4-4-4 mode enable sequences, where - * x_xxx1b set QE per QER description above, then issue - * instruction 38h - * x_xx1xb issue instruction 38h - * x_x1xxb issue instruction 35h - * x_1xxxb device uses a read-modify-write sequence of operations: - * read configuration using instruction 65h followed by - * address 800003h, set bit 6, - * write configuration using instruction 71h followed by - * address 800003h. This configuration is volatile. - * <3:0> : 4-4-4 mode disable sequences, where - * xxx1b issue FFh instruction - * xx1xb issue F5h instruction - * x1xxb device uses a read-modify-write sequence of operations: - * read configuration using instruction 65h followed by address - * 800003h, clear bit 6, - * write configuration using instruction 71h followed by - * address 800003h. This configuration is volatile. - * 1xxxb issue the Soft Reset 66/99 sequence - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_HOLD_WP_DISABLE, 23, 23); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_QE_REQ, 22, 20); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_0_4_4_ENTRY, 19, 16); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_0_4_4_EXIT, 15, 10); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_0_4_4_SUPPORTED, 9, 9); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_4_4_4_ENTRY, 8, 4); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW15_4_4_4_EXIT, 3, 0); -#define BFPT_1_5_DWORD_15(holdwpdis, qereq, fr044entry, fr044exit, fr044sup, \ - fr444entry, fr444exit) \ - (SFDP_UNUSED(31, 24) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_HOLD_WP_DISABLE, holdwpdis) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_QE_REQ, qereq) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_0_4_4_ENTRY, fr044entry) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_0_4_4_EXIT, fr044exit) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_0_4_4_SUPPORTED, fr044sup) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_4_4_4_ENTRY, fr444entry) | \ - SFDP_BITFIELD(BFPT_1_5_DW15_4_4_4_EXIT, fr444exit)) - - -/* Basic Flash Parameter Table v1.5 16th DWORD - * ------------------------------------------- - * <31:24> : Enter 4-Byte Addressing, where - * xxxx_xxx1b issue instruction B7h - * (preceding write enable not required) - * xxxx_xx1xb issue write enable instruction 06h, then issue - * instruction B7h - * xxxx_x1xxb 8-bit volatile extended address register used to define - * A[31:24] bits. Read with instruction C8h. Write - * instruction is C5h with 1 byte of data. Select the - * active 128 Mbit memory segment by setting the - * appropriate A[31:24] bits and use 3-Byte addressing. - * xxxx_1xxxb 8-bit volatile bank register used to define A[30:A24] - * bits. MSB (bit[7]) is used to enable/disable 4-byte - * address mode. When MSB is set to ‘1’, 4-byte address - * mode is active and A[30:24] bits are don’t care. Read - * with instruction 16h. Write instruction is 17h with 1 - * byte of data. When MSB is cleared to ‘0’, select the - * active 128 Mbit segment by setting the appropriate - * A[30:24] bits and use 3-Byte addressing. - * xxx1_xxxxb A 16-bit nonvolatile configuration register controls - * 3-Byte/4-Byte address mode. Read instruction is B5h. - * Bit[0] controls address mode [0=3-Byte; 1=4-Byte]. Write - * configuration register instruction is B1h, data length - * is 2 bytes. - * xx1x_xxxxb Supports dedicated 4-Byte address instruction set. - * Consult vendor data sheet for the instruction set - * definition. - * x1xx_xxxxb Always operates in 4-Byte address mode - * <23:14> : Exit 4-Byte Addressing, where - * xx_xxxx_xxx1b issue instruction E9h to exit 4-Byte address mode - * (write enable instruction 06h is not required) - * xx_xxxx_xx1xb issue write enable instruction 06h, then issue - * instruction E9h to exit 4-Byte address mode - * xx_xxxx_x1xxb 8-bit volatile extended address register used to - * define A[31:A24] bits. Read with instruction C8h. - * Write instruction is C5h, data length is 1 byte. - * Return to lowest memory segment by setting A[31:24] - * to 00h and use 3-Byte addressing. - * xx_xxxx_1xxxb 8-bit volatile bank register used to define A[30:A24] - * bits. MSB (bit[7]) is used to enable/disable 4-byte - * address mode. When MSB is cleared to ‘0’, 3-byte - * address mode is active and A30:A24 are used to select - * the active 128 Mbit memory segment. Read with - * instruction 16h. Write instruction is 17h, data - * length is 1 byte. - * xx_xxx1_xxxxb A 16-bit nonvolatile configuration register controls - * 3-Byte/4-Byte address mode. Read instruction is B5h. - * Bit[0] controls address mode [0=3-Byte; 1=4-Byte]. - * Write configuration register instruction is B1h, data - * length is 2 bytes. - * xx_xx1x_xxxxb Hardware reset - * xx_x1xx_xxxxb Software reset (see bits 13:8 in this DWORD) - * xx_1xxx_xxxxb Power cycle - * <13:8> : Soft Reset and Rescue Sequence Support, where - * 00_0000b no software reset instruction is supported - * xx_xxx1b drive Fh on all 4 data wires for 8 clocks - * xx_xx1xb drive Fh on all 4 data wires for 10 clocks if device is - * operating in 4-byte address mode - * xx_x1xxb drive Fh on all 4 data wires for 16 clocks - * xx_1xxxb issue instruction F0h - * x1_xxxxb issue reset enable instruction 66h, then issue reset - * instruction 99h. The reset enable, reset sequence may be - * issued on 1, 2, or 4 wires depending on the device - * operating mode. - * 1x_xxxxb exit 0-4-4 mode is required prior to other reset sequences - * above if the device may be operating in this mode. - * <7> : Reserved (0x1) - * <6:0> : Volatile or Non-Volatile Register and Write Enable Instruction for - * Status Register 1, where - * xx0_0000b status register is read only - * xxx_xxx1b Non-Volatile Status Register 1, powers-up to last written - * value, use instruction 06h to enable write - * xxx_xx1xb Volatile Status Register 1, status register powers-up - * with bits set to "1"s, use instruction 06h to enable - * write - * xxx_x1xxb Volatile Status Register 1, status register powers-up - * with bits set to "1"s, use instruction 50h to enable - * write - * xxx_1xxxb Non-Volatile/Volatile status register 1 powers-up to last - * written value in the non-volatile status register, use - * instruction 06h to enable write to non-volatile status - * register. Volatile status register may be activated after - * power-up to override the non-volatile status register, - * use instruction 50h to enable write and activate the - * volatile status register. - * xx1_xxxxb Status Register 1 contains a mix of volatile and - * non-volatile bits. The 06h instruction is used to enable - * writing of the register. - */ -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW16_4_BYTE_ENTRY, 31, 24); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW16_4_BYTE_EXIT, 23, 14); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW16_SOFT_RESET, 13, 8); -SFDP_DEFINE_BITFIELD(BFPT_1_5_DW16_STATUS_REG_1, 6, 0); -#define BFPT_1_5_DWORD_16(entry, exit, softreset, statusreg1) \ - (SFDP_BITFIELD(BFPT_1_5_DW16_4_BYTE_ENTRY, entry) | \ - SFDP_BITFIELD(BFPT_1_5_DW16_4_BYTE_EXIT, exit) | \ - SFDP_BITFIELD(BFPT_1_5_DW16_SOFT_RESET, softreset) | \ - SFDP_UNUSED(7, 7) | \ - SFDP_BITFIELD(BFPT_1_5_DW16_STATUS_REG_1, statusreg1)) - -#endif /* __CROS_EC_SFDP_H */ diff --git a/include/sha1.h b/include/sha1.h deleted file mode 100644 index 42c0f2612f..0000000000 --- a/include/sha1.h +++ /dev/null @@ -1,36 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* SHA-1 functions */ - -#ifndef __CROS_EC_SHA1_H -#define __CROS_EC_SHA1_H - -#include "common.h" -#ifdef HOST_TOOLS_BUILD -#include <string.h> -#define DIV_ROUND_UP(x, y) (((x) + ((y) - 1)) / (y)) -#else -#include "util.h" -#endif - -#define SHA1_DIGEST_SIZE 20 -#define SHA1_BLOCK_SIZE 64 - -/* SHA-1 context */ -struct sha1_ctx { - uint32_t count; - uint32_t state[5]; - union { - uint8_t b[SHA1_BLOCK_SIZE]; - uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))]; - } buf; -}; - -void sha1_init(struct sha1_ctx *ctx); -void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len); -uint8_t *sha1_final(struct sha1_ctx *ctx); - -#endif /* __CROS_EC_SHA1_H */ diff --git a/include/spi_flash_reg.h b/include/spi_flash_reg.h deleted file mode 100644 index a0ffefc721..0000000000 --- a/include/spi_flash_reg.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * SPI flash protection register translation functions for Chrome OS EC. - */ - -#ifndef __CROS_EC_SPI_FLASH_REG_H -#define __CROS_EC_SPI_FLASH_REG_H - -#include "common.h" - -/* - * Common register bits for SPI flash. All registers / bits may not be valid - * for all parts. - */ -#define SPI_FLASH_SR2_SUS BIT(7) -#define SPI_FLASH_SR2_CMP BIT(6) -#define SPI_FLASH_SR2_LB3 BIT(5) -#define SPI_FLASH_SR2_LB2 BIT(4) -#define SPI_FLASH_SR2_LB1 BIT(3) -#define SPI_FLASH_SR2_QE BIT(1) -#define SPI_FLASH_SR2_SRP1 BIT(0) -#define SPI_FLASH_SR1_SRP0 BIT(7) -#define SPI_FLASH_SR1_SEC BIT(6) -#define SPI_FLASH_SR1_TB BIT(5) -#define SPI_FLASH_SR1_BP2 BIT(4) -#define SPI_FLASH_SR1_BP1 BIT(3) -#define SPI_FLASH_SR1_BP0 BIT(2) -#define SPI_FLASH_SR1_WEL BIT(1) -#define SPI_FLASH_SR1_BUSY BIT(0) - -/* SR2 register existence based upon chip */ -#ifdef CONFIG_SPI_FLASH_W25X40 -#undef CONFIG_SPI_FLASH_HAS_SR2 -#elif defined(CONFIG_SPI_FLASH_W25Q64) || defined(CONFIG_SPI_FLASH_GD25Q41B) -#define CONFIG_SPI_FLASH_HAS_SR2 -#endif - -/* W25Q128 16 Mbyte SPI flash for testing */ -#ifdef CONFIG_SPI_FLASH_W25Q128 -#define CONFIG_SPI_FLASH_HAS_SR2 -#endif - -/** - * Computes block write protection range from registers - * Returns start == len == 0 for no protection - * - * @param sr1 Status register 1 - * @param sr2 Status register 2 - * @param start Output pointer for protection start offset - * @param len Output pointer for protection length - * - * @return EC_SUCCESS, or non-zero if any error. - */ -int spi_flash_reg_to_protect(uint8_t sr1, uint8_t sr2, unsigned int *start, - unsigned int *len); - -/** - * Computes block write protection registers from range - * - * @param start Desired protection start offset - * @param len Desired protection length - * @param sr1 Output pointer for status register 1 - * @param sr2 Output pointer for status register 2 - * - * @return EC_SUCCESS, or non-zero if any error. - */ -int spi_flash_protect_to_reg(unsigned int start, unsigned int len, uint8_t *sr1, - uint8_t *sr2); - -#endif /* __CROS_EC_SPI_FLASH_REG_H */ diff --git a/include/spi_nor.h b/include/spi_nor.h deleted file mode 100644 index f0c379cd43..0000000000 --- a/include/spi_nor.h +++ /dev/null @@ -1,185 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* SPI Serial NOR Flash driver module for Chrome EC */ - -#ifndef __CROS_EC_SPI_NOR_H -#define __CROS_EC_SPI_NOR_H - -#include "common.h" -#include "console.h" -#include "shared_mem.h" -#include "task.h" -#include "util.h" - -/* Driver compatibility requirements based on JEDEC SFDP support: - * - * Parameter | SFDP v1.(5+) | SFDP v1.0 | All others - * ============================================================================ - * Capacity | N/A | N/A | Uses instantiated default - * -------------------------------------------------------------- - * | The capacity must be less than 4GiB for compatibility. - * ---------------------------------------------------------------------------- - * Page Size | N/A | 1B or 64B | Uses instantiated default - * ---------------------------------------------------------------------------- - * Erase Opcodes | 4KiB Erase with an opcode of 0x20 is always required. - * ---------------------------------------------------------------------------- - * 4B Addressing | 4B addressing mode must be supported if the part is larger - * | than 16MiB. 4B mode entry will be attempted through opcode - * | 0xB7 and exit through 0xE9 where writes are enabled for both - * | in case it is required - * ---------------------------------------------------------------------------- - */ - -/* Boards which use SPI NOR devices must provide enum spi_device indexing all - * spi_device_t's in the board.h file. */ -enum spi_device; - -struct spi_nor_device_t { - /* Name of the Serial NOR Flash device. */ - const char *name; - - /* Index of the SPI controller which this device is connected - * through. - */ - const enum spi_device spi_controller; - - /* Maximum timeout per command in microseconds. */ - const uint32_t timeout_usec; - - /* when instantiating this device, the initialization values for the - * following fields will be the default values. Note that the values - * below may change on the fly based on device state and SFDP - * discovery. */ - uint32_t capacity; - size_t page_size; - int in_4b_addressing_mode; -}; - -extern struct spi_nor_device_t spi_nor_devices[]; -extern const unsigned int spi_nor_devices_used; - -/* Industry standard Serial NOR Flash opcodes. All other opcodes are part - * specific and require SFDP discovery. */ -#define SPI_NOR_OPCODE_WRITE_STATUS 0x01 /* Write Status Register (1 Byte) */ -#define SPI_NOR_OPCODE_PAGE_PROGRAM 0x02 /* Page program */ -#define SPI_NOR_OPCODE_SLOW_READ 0x03 /* Read data (low frequency) */ -#define SPI_NOR_OPCODE_WRITE_DISABLE 0x04 -#define SPI_NOR_OPCODE_READ_STATUS 0x05 /* Read Status Register */ -#define SPI_NOR_OPCODE_WRITE_ENABLE 0x06 -#define SPI_NOR_OPCODE_FAST_READ 0x0b /* Read data (high frequency) */ -#define SPI_NOR_OPCODE_SFDP 0x5a /* Read JEDEC SFDP */ -#define SPI_NOR_OPCODE_JEDEC_ID 0x9f /* Read JEDEC ID */ -#define SPI_NOR_OPCODE_WREAR 0xc5 /* Write extended address register */ -#define SPI_NOR_OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */ -#define SPI_NOR_OPCODE_RDEAR 0xc8 /* Read extended address register */ - -/* Flags for SPI_NOR_OPCODE_READ_STATUS */ -#define SPI_NOR_STATUS_REGISTER_WIP BIT(0) /* Write in progres */ -#define SPI_NOR_STATUS_REGISTER_WEL BIT(1) /* Write enabled latch */ - -/* If needed in the future this driver can be extended to discover SFDP - * advertised erase sizes and opcodes for SFDP v1.0+. */ -#define SPI_NOR_DRIVER_SPECIFIED_OPCODE_4KIB_ERASE 0x20 -#define SPI_NOR_DRIVER_SPECIFIED_OPCODE_64KIB_ERASE 0xd8 - -/* If needed in the future this driver can be extended to discover 4B entry and - * exit methods for SFDP v1.5+. */ -#define SPI_NOR_DRIVER_SPECIFIED_OPCODE_ENTER_4B 0xb7 -#define SPI_NOR_DRIVER_SPECIFIED_OPCODE_EXIT_4B 0xe9 - -/* JEDEC JEP106AR specifies 9 Manufacturer ID banks, read 12 to be sure. */ -#define SPI_NOR_JEDEC_ID_BANKS 12 - -/** - * Initialize the module, assumes the Serial NOR Flash devices are currently - * all available for initialization. As part of the initialization the driver - * will check if the part has a compatible SFDP Basic Flash Parameter table - * and update the part's page_size, capacity, and forces the addressing mode. - * Parts with more than 16MiB of capacity are initialized into 4B addressing - * and parts with less are initialized into 3B addressing mode. - * - * WARNING: This must successfully return before invoking any other Serial NOR - * Flash APIs. - */ -int spi_nor_init(void); - -/** - * Forces the Serial NOR Flash device to enter (or exit) 4 Byte addressing mode. - * - * WARNING: - * 1) In 3 Byte addressing mode only 16MiB of Serial NOR Flash is accessible. - * 2) If there's a second SPI controller communicating with this Serial - * NOR Flash part on the board, the user is responsible for ensuring - * addressing mode compatibility and cooperation. - * 3) The user must ensure that multiple users do not trample on each other - * by having multiple parties changing the device's addressing mode. - * - * @param spi_nor_device The Serial NOR Flash device to use. - * @param enter_4b_addressing_mode Whether to enter (1) or exit (0) 4B mode. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_set_4b_mode(struct spi_nor_device_t *spi_nor_device, - int enter_4b_addressing_mode); - -/** - * Read JEDEC Identifier. - * - * @param spi_nor_device The Serial NOR Flash device to use. - * @param size Number of Bytes to read. - * @param data Destination buffer for data. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_read_jedec_id(const struct spi_nor_device_t *spi_nor_device, - size_t size, uint8_t *data); - -/** - * Read from the Serial NOR Flash device. - * - * @param spi_nor_device The Serial NOR Flash device to use. - * @param offset Flash offset to read. - * @param size Number of Bytes to read. - * @param data Destination buffer for data. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_read(const struct spi_nor_device_t *spi_nor_device, - uint32_t offset, size_t size, uint8_t *data); - -/** - * Erase flash on the Serial Flash Device. - * - * @param spi_nor_device The Serial NOR Flash device to use. - * @param offset Flash offset to erase, must be aligned to the minimum physical - * erase size. - * @param size Number of Bytes to erase, must be a multiple of the the minimum - * physical erase size. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_erase(const struct spi_nor_device_t *spi_nor_device, - uint32_t offset, size_t size); - -/** - * Write to the Serial NOR Flash device. Assumes already erased. - * - * @param spi_nor_device The Serial NOR Flash device to use. - * @param offset Flash offset to write. - * @param size Number of Bytes to write. - * @param data Data to write to flash. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_write(const struct spi_nor_device_t *spi_nor_device, - uint32_t offset, size_t size, const uint8_t *data); - -/** - * Write to the extended address register. - * @param spi_nor_device The Serial NOR Flash device to use. - * @param value The value to write. - * @return ec_error_list (non-zero on error and timeout). - */ -int spi_nor_write_ear(const struct spi_nor_device_t *spi_nor_device, - const uint8_t value); - - -#endif /* __CROS_EC_SPI_NOR_H */ diff --git a/include/stillness_detector.h b/include/stillness_detector.h deleted file mode 100644 index 65598d4d5c..0000000000 --- a/include/stillness_detector.h +++ /dev/null @@ -1,71 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_STILLNESS_DETECTOR_H -#define __CROS_EC_STILLNESS_DETECTOR_H - -#include "common.h" -#include "math_util.h" -#include "stdbool.h" -#include <stdint.h> - -struct still_det { - /** Variance threshold for the stillness confidence score. [units]^2 */ - fp_t var_threshold; - - /** The minimum window duration to consider a still sample. */ - uint32_t min_batch_window; - - /** The maximum window duration to consider a still sample. */ - uint32_t max_batch_window; - - /** - * The minimum number of samples in a window to consider a still sample. - */ - uint16_t min_batch_size; - - /** The timestamp of the first sample in the current batch. */ - uint32_t window_start_time; - - /** The number of samples in the current batch. */ - uint16_t num_samples; - - /** Accumulators used for calculating stillness. */ - fp_t acc_x, acc_y, acc_z, acc_xx, acc_yy, acc_zz, mean_x, mean_y, - mean_z; -}; - -#define STILL_DET(VAR_THRES, MIN_BATCH_WIN, MAX_BATCH_WIN, MIN_BATCH_SIZE) \ - ((struct still_det){ \ - .var_threshold = VAR_THRES, \ - .min_batch_window = MIN_BATCH_WIN, \ - .max_batch_window = MAX_BATCH_WIN, \ - .min_batch_size = MIN_BATCH_SIZE, \ - .window_start_time = 0, \ - .acc_x = 0.0f, \ - .acc_y = 0.0f, \ - .acc_z = 0.0f, \ - .acc_xx = 0.0f, \ - .acc_yy = 0.0f, \ - .acc_zz = 0.0f, \ - .mean_x = 0.0f, \ - .mean_y = 0.0f, \ - .mean_z = 0.0f, \ - }) - -/** - * Update a stillness detector with a new sample. - * - * @param sample_time The timestamp of the sample to add. - * @param x The x component of the sample to add. - * @param y The y component of the sample to add. - * @param z The z component of the sample to add. - * @return True if the sample triggered a complete batch and mean_* are now - * valid. - */ -bool still_det_update(struct still_det *still_det, uint32_t sample_time, fp_t x, - fp_t y, fp_t z); - -#endif /* __CROS_EC_STILLNESS_DETECTOR_H */ diff --git a/include/switch.h b/include/switch.h deleted file mode 100644 index e026408af9..0000000000 --- a/include/switch.h +++ /dev/null @@ -1,25 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Switch module for Chrome EC */ - -#ifndef __CROS_EC_SWITCH_H -#define __CROS_EC_SWITCH_H - -#include "common.h" -#include "gpio.h" - -#ifdef CONFIG_SWITCH -/** - * Interrupt handler for switch inputs. - * - * @param signal Signal which triggered the interrupt. - */ -void switch_interrupt(enum gpio_signal signal); -#else -static inline void switch_interrupt(enum gpio_signal signal) { } -#endif /* !CONFIG_SWITCH */ - -#endif /* __CROS_EC_SWITCH_H */ diff --git a/include/temp_sensor.h b/include/temp_sensor.h deleted file mode 100644 index 50a174193f..0000000000 --- a/include/temp_sensor.h +++ /dev/null @@ -1,80 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Temperature sensor module for Chrome EC */ - -#ifndef __CROS_EC_TEMP_SENSOR_H -#define __CROS_EC_TEMP_SENSOR_H - -#include "common.h" - -/* "enum temp_sensor_id" must be defined for each board in board.h. */ -enum temp_sensor_id; - -/* Type of temperature sensors. */ -enum temp_sensor_type { - /* Ignore this temperature sensor. */ - TEMP_SENSOR_TYPE_IGNORED = -1, - /* CPU temperature sensors. */ - TEMP_SENSOR_TYPE_CPU = 0, - /* Other on-board temperature sensors. */ - TEMP_SENSOR_TYPE_BOARD, - /* Case temperature sensors. */ - TEMP_SENSOR_TYPE_CASE, - /* Battery temperature sensors. */ - TEMP_SENSOR_TYPE_BATTERY, - - TEMP_SENSOR_TYPE_COUNT -}; - -struct temp_sensor_t { - const char *name; - /* Temperature sensor type. */ - enum temp_sensor_type type; - /* - * TODO(b:201081891) Refactor temp_sensor_t references - * to all use OO style sensor argument to get adc idx. - */ -#ifdef CONFIG_ZEPHYR - /* Read sensor value in K into temp_ptr; return non-zero if error. */ - int (*read)(const struct temp_sensor_t *sensor, int *temp_ptr); - struct thermistor_info *thermistor; -#else - /* Read sensor value in K into temp_ptr; return non-zero if error. */ - int (*read)(int idx, int *temp_ptr); -#endif - /* Index among the same kind of sensors. */ - int idx; -}; - -#ifdef CONFIG_TEMP_SENSOR -/* - * Defined in board_temp_sensor.c. Must be in the same order as - * in enum temp_sensor_id. - */ -extern const struct temp_sensor_t temp_sensors[]; -#endif - -/** - * Get the most recently measured temperature (in degrees K) for the sensor. - * - * @param id Sensor ID - * @param temp_ptr Destination for temperature - * - * @return EC_SUCCESS, or non-zero if error. - */ -int temp_sensor_read(enum temp_sensor_id id, int *temp_ptr); - -/** - * Console command to print temperature sensor values - * - * @param argc argument count (Set argc = 1) - * @param argv argument vector (Set argv = NULL) - * - * @return EC_SUCCESS, or non-zero if error. - */ -int console_command_temps(int argc, char **argv); - -#endif /* __CROS_EC_TEMP_SENSOR_H */ diff --git a/include/temp_sensor_chip.h b/include/temp_sensor_chip.h deleted file mode 100644 index 4f9ddf0bc0..0000000000 --- a/include/temp_sensor_chip.h +++ /dev/null @@ -1,21 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Temperature sensor module for LM4 chip */ - -#ifndef __CROS_EC_TEMP_SENSOR_CHIP_H -#define __CROS_EC_TEMP_SENSOR_CHIP_H - -/** - * Get the last polled value of the sensor. - * - * @param idx Sensor index to read. - * @param temp_ptr Destination for temperature in K. - * - * @return EC_SUCCESS if successful, non-zero if error. - */ -int chip_temp_sensor_get_val(int idx, int *temp_ptr); - -#endif /* __CROS_EC_TEMP_SENSOR_CHIP_H */ diff --git a/include/tests/enum_strings.h b/include/tests/enum_strings.h deleted file mode 100644 index ece2df362f..0000000000 --- a/include/tests/enum_strings.h +++ /dev/null @@ -1,94 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Defines helper function that convert Enums to strings for prints in tests */ - -#include "usb_pd_tcpm.h" -#include "usb_pd.h" - -#ifndef __CROS_EC_TEST_ENUM_STINGS_H -#define __CROS_EC_TEST_ENUM_STINGS_H - -#ifndef TEST_BUILD -#error enum_strings.h can only be used in test builds -#endif - -static inline const char *from_tcpc_rp_value(enum tcpc_rp_value value) -{ - switch (value) { - case TYPEC_RP_USB: - return "USB-DEFAULT"; - case TYPEC_RP_1A5: - return "1A5"; - case TYPEC_RP_3A0: - return "3A0"; - case TYPEC_RP_RESERVED: - return "RESERVED"; - default: - return "UNKNOWN"; - } -} - -static inline const char *from_tcpc_cc_pull(enum tcpc_cc_pull value) -{ - switch (value) { - case TYPEC_CC_RA: - return "RA"; - case TYPEC_CC_RP: - return "RP"; - case TYPEC_CC_RD: - return "RD"; - case TYPEC_CC_OPEN: - return "OPEN"; - case TYPEC_CC_RA_RD: - return "RA_RD"; - default: - return "UNKNOWN"; - } -} - -static inline const char *from_tcpc_cc_polarity(enum tcpc_cc_polarity value) -{ - switch (value) { - case POLARITY_CC1: - return "CC1"; - case POLARITY_CC2: - return "CC2"; - case POLARITY_CC1_DTS: - return "CC1 DTS"; - case POLARITY_CC2_DTS: - return "CC2 DTS"; - default: - return "UNKNOWN"; - } -} - -static inline const char *from_pd_power_role(enum pd_power_role value) -{ - switch (value) { - case PD_ROLE_SINK: - return "SNK"; - case PD_ROLE_SOURCE: - return "SRC"; - default: - return "UNKNOWN"; - } -} - -static inline const char *from_pd_data_role(enum pd_data_role value) -{ - switch (value) { - case PD_ROLE_UFP: - return "UFP"; - case PD_ROLE_DFP: - return "DRP"; - case PD_ROLE_DISCONNECTED: - return "DISCONNECTED"; - default: - return "UNKNOWN"; - } -} - -#endif /* __CROS_EC_TEST_ENUM_STINGS_H */ diff --git a/include/thermal.h b/include/thermal.h deleted file mode 100644 index 29d8073ca0..0000000000 --- a/include/thermal.h +++ /dev/null @@ -1,30 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Thermal engine module for Chrome EC */ - -#ifndef __CROS_EC_THERMAL_H -#define __CROS_EC_THERMAL_H - -/* The thermal configuration for a single temp sensor is defined here. */ -#include "ec_commands.h" - -/* We need to to hold a config for each board's sensors. Not const, so we can - * tweak it at run-time if we have to. - */ -extern struct ec_thermal_config thermal_params[]; - -/* Helper function to compute percent cooling */ -int thermal_fan_percent(int low, int high, int cur); - -/* Allow board custom fan control. Called after reading temperature sensors. - * - * @param fan Fan ID to control (0 to CONFIG_FANS) - * @param tmp Array of temperatures (C) for each temperature sensor (size - * TEMP_SENSOR_COUNT) - */ -void board_override_fan_control(int fan, int *tmp); - -#endif /* __CROS_EC_THERMAL_H */ diff --git a/include/throttle_ap.h b/include/throttle_ap.h deleted file mode 100644 index fbfa36aed3..0000000000 --- a/include/throttle_ap.h +++ /dev/null @@ -1,75 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Common interface to throttle the AP */ - -#ifndef __CROS_EC_THROTTLE_AP_H -#define __CROS_EC_THROTTLE_AP_H - -/** - * Level of throttling desired. - */ -enum throttle_level { - THROTTLE_OFF = 0, - THROTTLE_ON, -}; - -/** - * Types of throttling desired. These are independent. - */ -enum throttle_type { - THROTTLE_SOFT = 0, /* for example, host events */ - THROTTLE_HARD, /* for example, PROCHOT */ - NUM_THROTTLE_TYPES -}; - -/** - * Possible sources for CPU throttling requests. - */ -enum throttle_sources { - THROTTLE_SRC_THERMAL = 0, - THROTTLE_SRC_BAT_DISCHG_CURRENT, - THROTTLE_SRC_BAT_VOLTAGE, -}; - -/** - * Enable/disable CPU throttling. - * - * This is a virtual "OR" operation. Any caller can enable CPU throttling of - * any type, but all callers must agree in order to disable that type. - * - * @param level Level of throttling desired - * @param type Type of throttling desired - * @param source Which task is requesting throttling - */ -#if defined(CONFIG_THROTTLE_AP) || \ - defined(CONFIG_THROTTLE_AP_ON_BAT_DISCHG_CURRENT) || \ - defined(CONFIG_THROTTLE_AP_ON_BAT_VOLTAGE) - -void throttle_ap(enum throttle_level level, - enum throttle_type type, - enum throttle_sources source); - -/** - * Interrupt handler to monitor PROCHOT input to the EC. The PROCHOT signal - * can be asserted by the AP or by other devices on the board, such as chargers - * and voltage regulators. - * - * The board initialization is responsible for enabling the interrupt. - * - * @param signal GPIO signal connected to PROCHOT input. The polarity of this - * signal is active high unless CONFIG_CPU_PROCHOT_ACTIVE_LOW - * is defined. - */ -void throttle_ap_prochot_input_interrupt(enum gpio_signal signal); - -#else -static inline void throttle_ap(enum throttle_level level, - enum throttle_type type, - enum throttle_sources source) -{} -#endif - -#endif /* __CROS_EC_THROTTLE_AP_H */ diff --git a/include/touchpad.h b/include/touchpad.h deleted file mode 100644 index 4e746d8dc1..0000000000 --- a/include/touchpad.h +++ /dev/null @@ -1,14 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_TOUCHPAD_H -#define __CROS_EC_TOUCHPAD_H - -void touchpad_interrupt(enum gpio_signal signal); - -/* Reset the touchpad, mainly used to recover it from malfunction. */ -void board_touchpad_reset(void); - -#endif diff --git a/include/trng.h b/include/trng.h deleted file mode 100644 index cea4555b41..0000000000 --- a/include/trng.h +++ /dev/null @@ -1,45 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#ifndef __EC_INCLUDE_TRNG_H -#define __EC_INCLUDE_TRNG_H - -#include <common.h> -#include <stddef.h> -#include <stdint.h> - -/** - * Initialize the true random number generator. - * - * Not supported by all platforms. - **/ -void init_trng(void); - -/** - * Shutdown the true random number generator. - * - * The opposite operation of init_trng(), disable the hardware resources - * used by the TRNG to save power. - * - * Not supported by all platforms. - **/ -void exit_trng(void); - -/** - * Retrieve a 32 bit random value. - * - * Not supported on all platforms. - **/ -#ifndef HIDE_EC_STDLIB -uint32_t rand(void); -#endif - -/** - * Output len random bytes into buffer. - * - * Not supported on all platforms. - **/ -void rand_bytes(void *buffer, size_t len); - -#endif /* __EC_INCLUDE_TRNG_H */ diff --git a/include/update_fw.h b/include/update_fw.h deleted file mode 100644 index d345c4f667..0000000000 --- a/include/update_fw.h +++ /dev/null @@ -1,289 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_UPDATE_FW_H -#define __CROS_EC_UPDATE_FW_H - -#include <stddef.h> - -#include "compile_time_macros.h" - -/* - * This file contains structures used to facilitate EC firmware updates - * over USB (and over TPM for cr50). - * - * The firmware update protocol consists of two phases: connection - * establishment and actual image transfer. - * - * Image transfer is done in 1K blocks. The host supplying the image - * encapsulates blocks in PDUs by prepending a header including the flash - * offset where the block is destined and its digest. - * - * The EC device responds to each PDU with a confirmation which is 1 byte - * response. Zero value means success, non zero value is the error code - * reported by EC. - * - * To establish the connection, the host sends a different PDU, which - * contains no data and is destined to offset 0. Receiving such a PDU - * signals the EC that the host intends to transfer a new image. - * - * The connection establishment response is described by the - * first_response_pdu structure below. - */ - -#define UPDATE_PROTOCOL_VERSION 6 - -/* - * This is the format of the update PDU header. - * - * block digest: the first four bytes of the sha1 digest of the rest of the - * structure (can be 0 on boards where digest is ignored). - * block_base: offset of this PDU into the flash SPI. - */ -struct update_command { - uint32_t block_digest; - uint32_t block_base; - /* The actual payload goes here. */ -} __packed; - -/* - * This is the frame format the host uses when sending update PDUs over USB. - * - * The PDUs are up to 1K bytes in size, they are fragmented into USB chunks of - * 64 bytes each and reassembled on the receive side before being passed to - * the flash update function. - * - * The flash update function receives the unframed PDU body (starting at the - * cmd field below), and puts its reply into the same buffer the PDU was in. - */ -struct update_frame_header { - uint32_t block_size; /* Total frame size, including this field. */ - struct update_command cmd; -}; - -/* - * A convenience structure which allows to group together various revision - * fields of the header created by the signer (cr50-specific). - * - * These fields are compared when deciding if versions of two images are the - * same or when deciding which one of the available images to run. - */ -struct signed_header_version { - uint32_t minor; - uint32_t major; - uint32_t epoch; -}; - -/* - * Response to the connection establishment request. - * - * When responding to the very first packet of the update sequence, the - * original USB update implementation was responding with a four byte value, - * just as to any other block of the transfer sequence. - * - * It became clear that there is a need to be able to enhance the update - * protocol, while staying backwards compatible. - * - * All newer protocol versions (starting with version 2) respond to the very - * first packet with an 8 byte or larger response, where the first 4 bytes are - * a version specific data, and the second 4 bytes - the protocol version - * number. - * - * This way the host receiving of a four byte value in response to the first - * packet is considered an indication of the target running the 'legacy' - * protocol, version 1. Receiving of an 8 byte or longer response would - * communicates the protocol version in the second 4 bytes. - */ -struct first_response_pdu { - uint32_t return_value; - - /* The below fields are present in versions 2 and up. */ - - /* Type of header following (one of first_response_pdu_header_type) */ - uint16_t header_type; - - /* Must be UPDATE_PROTOCOL_VERSION */ - uint16_t protocol_version; - - /* In version 6 and up, a board-specific header follows. */ - union { - /* cr50 (header_type = UPDATE_HEADER_TYPE_CR50) */ - struct { - /* The below fields are present in versions 3 and up. */ - uint32_t backup_ro_offset; - uint32_t backup_rw_offset; - - /* The below fields are present in versions 4 and up. */ - /* - * Versions of the currently active RO and RW sections. - */ - struct signed_header_version shv[2]; - - /* The below fields are present in versions 5 and up */ - /* keyids of the currently active RO and RW sections. */ - uint32_t keyid[2]; - } cr50; - /* Common code (header_type = UPDATE_HEADER_TYPE_COMMON) */ - struct { - /* Maximum PDU size */ - uint32_t maximum_pdu_size; - - /* Flash protection status */ - uint32_t flash_protection; - - /* Offset of the other region */ - uint32_t offset; - - /* Version string of the other region */ - char version[32]; - - /* Minimum rollback version that RO will accept */ - int32_t min_rollback; - - /* RO public key version */ - uint32_t key_version; - } common; - }; -}; - -enum first_response_pdu_header_type { - UPDATE_HEADER_TYPE_CR50 = 0, /* Must be 0 for backwards compatibility */ - UPDATE_HEADER_TYPE_COMMON = 1, -}; - -/* TODO: Handle this in update_fw.c, not usb_update.c */ -#define UPDATE_DONE 0xB007AB1E -#define UPDATE_EXTRA_CMD 0xB007AB1F - -enum update_extra_command { - UPDATE_EXTRA_CMD_IMMEDIATE_RESET = 0, - UPDATE_EXTRA_CMD_JUMP_TO_RW = 1, - UPDATE_EXTRA_CMD_STAY_IN_RO = 2, - UPDATE_EXTRA_CMD_UNLOCK_RW = 3, - UPDATE_EXTRA_CMD_UNLOCK_ROLLBACK = 4, - UPDATE_EXTRA_CMD_INJECT_ENTROPY = 5, - UPDATE_EXTRA_CMD_PAIR_CHALLENGE = 6, - UPDATE_EXTRA_CMD_TOUCHPAD_INFO = 7, - UPDATE_EXTRA_CMD_TOUCHPAD_DEBUG = 8, - UPDATE_EXTRA_CMD_CONSOLE_READ_INIT = 9, - UPDATE_EXTRA_CMD_CONSOLE_READ_NEXT = 10, -}; - -/* - * Pair challenge (from host), note that the packet, with header, must fit - * in a single USB packet (64 bytes), so its maximum length is 50 bytes. - */ -struct pair_challenge { - uint8_t host_public[32]; /* X22519 public key from host */ - uint8_t nonce[16]; /* nonce to be used for HMAC */ -}; - -/* - * Pair challenge response (from device). - */ -struct pair_challenge_response { - uint8_t status; /* = EC_RES_SUCCESS */ - uint8_t device_public[32]; /* X22519 device public key of device */ - /* - * Truncated output of - * HMAC_SHA256(x25519(device_private, host_public), nonce) - */ - uint8_t authenticator[16]; -} __packed; - -struct touchpad_info { - uint8_t status; /* = EC_RES_SUCCESS */ - uint8_t reserved; /* padding */ - uint16_t vendor; /* Vendor USB id */ - - /* - * Virtual address to write to to update TP FW over USB update protocol, - * and FW size. Both are 0 if unsupported. - */ - uint32_t fw_address; - uint32_t fw_size; - - /* - * SHA256 hash of the trackpad FW accepted by this EC image. - * This is used by the updater to make sure we do not attempt to flash - * a touchpad FW that does not match the one shipped by the EC. - */ - uint8_t allowed_fw_hash[32]; - - /* Vendor specific data. */ - union { - struct { - uint16_t id; - uint16_t fw_version; - uint16_t fw_checksum; - } elan __packed; - struct { - uint16_t id; - uint16_t fw_version; - uint16_t fw_checksum; - } st __packed; - } __packed; -} __packed; - -/* - * The response message must not exceed 64 bytes. - * And our protocol has a 14 bytes header. - * So the size of `struct touchpad_info` must be less - * than or equal to 50 bytes - */ -BUILD_ASSERT(sizeof(struct touchpad_info) <= 50); - -void fw_update_command_handler(void *body, - size_t cmd_size, - size_t *response_size); - -/* Used to tell fw update the update ran successfully and is finished */ -void fw_update_complete(void); - -/* Verify integrity of the PDU received. */ -int update_pdu_valid(struct update_command *cmd_body, size_t cmd_size); - -/* Various update command return values. */ -enum { - UPDATE_SUCCESS = 0, - UPDATE_BAD_ADDR = 1, - UPDATE_ERASE_FAILURE = 2, - UPDATE_DATA_ERROR = 3, - UPDATE_WRITE_FAILURE = 4, - UPDATE_VERIFY_ERROR = 5, - UPDATE_GEN_ERROR = 6, - UPDATE_MALLOC_ERROR = 7, - UPDATE_ROLLBACK_ERROR = 8, - UPDATE_RATE_LIMIT_ERROR = 9, - UPDATE_RWSIG_BUSY = 10, -}; - -/* Obtain touchpad information */ -int touchpad_get_info(struct touchpad_info *tp); - -/* Touchpad FW update: Write a FW block. */ -int touchpad_update_write(int offset, int size, const uint8_t *data); - -/** - * Touchpad debugging interface, called whenever UPDATE_EXTRA_CMD_TOUCHPAD_DEBUG - * is received. Behaviour is touchpad-vendor dependent, with the following - * restrictions: data must be allocated statically, and must not be larger than - * 64 bytes. - * - * @param param Data passed as parameter to command. - * @param param_size Number of bytes passed as parameter. - * @param data Data to write back to host, needs to be allocated - * statically by touchpad handler. - * @param data_size Amount of data to write back to host (up to 64 bytes). - * - * @return EC_RES_SUCCESS on success, any other EC_RES_* status on error. - */ -int touchpad_debug(const uint8_t *param, unsigned int param_size, - uint8_t **data, unsigned int *data_size); - -/* SHA256 hash of the touchpad firmware expected by this image. */ -extern const uint8_t touchpad_fw_full_hash[32]; - -#endif /* ! __CROS_EC_UPDATE_FW_H */ diff --git a/include/usb_api.h b/include/usb_api.h deleted file mode 100644 index 79ee9406e9..0000000000 --- a/include/usb_api.h +++ /dev/null @@ -1,85 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * USB API definitions. - * - * This file includes definitions needed by common code that wants to control - * the state of the USB peripheral, but doesn't need to know about the specific - * implementation. - */ - -#ifndef __CROS_EC_USB_API_H -#define __CROS_EC_USB_API_H - -/* - * Initialize the USB peripheral, enabling its clock and configuring the DP/DN - * GPIOs correctly. This function is called via an init hook (unless the board - * defined CONFIG_USB_INHIBIT_INIT), but may need to be called again if - * usb_release is called. This function will call usb_connect by default - * unless CONFIG_USB_INHIBIT_CONNECT is defined. - */ -void usb_init(void); - -/* Check if USB peripheral is enabled. */ -int usb_is_enabled(void); - -/* - * Enable the pullup on the DP line to signal that this device exists to the - * host and to start the enumeration process. - */ -void usb_connect(void); - -/* - * Disable the pullup on the DP line. This causes the device to be disconnected - * from the host. - */ -void usb_disconnect(void); - -/* - * Disconnect from the host by calling usb_disconnect and then turn off the USB - * peripheral, releasing its GPIOs and disabling its clock. - */ -void usb_release(void); - -/* - * Returns true if USB device is currently suspended. - * Requires CONFIG_USB_SUSPEND to be defined. - */ -int usb_is_suspended(void); - -/* - * Returns true if USB remote wakeup is currently enabled by host. - * Requires CONFIG_USB_SUSPEND to be defined, always return 0 if - * CONFIG_USB_REMOTE_WAKEUP is not defined. - */ -int usb_is_remote_wakeup_enabled(void); - -/* - * Preserve in non-volatile memory the state of the USB hardware registers - * which cannot be simply re-initialized when powered up again. - */ -void usb_save_suspended_state(void); - -/* - * Restore from non-volatile memory the state of the USB hardware registers - * which was lost by powering them down. - */ -void usb_restore_suspended_state(void); - -/* - * Tell the host to wake up. Does nothing if CONFIG_USB_REMOTE_WAKEUP is not - * defined. - * - * Returns immediately, suspend status can be checked using usb_is_suspended. - */ -#ifdef CONFIG_USB_REMOTE_WAKEUP -void usb_wake(void); -#else -static inline void usb_wake(void) {} -#endif - -/* Board-specific USB wake, for side-band wake, called by usb_wake above. */ -void board_usb_wake(void); - -#endif /* __CROS_EC_USB_API_H */ diff --git a/include/usb_bb.h b/include/usb_bb.h deleted file mode 100644 index 24225250be..0000000000 --- a/include/usb_bb.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * USB billboard definitions. - */ - -#ifndef __CROS_EC_USB_BB_H -#define __CROS_EC_USB_BB_H - -/* per Billboard Device Class Spec Revision 1.0 */ - -/* device descriptor fields */ -#define USB_BB_BCDUSB_MIN 0x0201 /* v2.01 minimum */ -#define USB_BB_SUBCLASS 0x00 -#define USB_BB_PROTOCOL 0x00 -#define USB_BB_EP0_PACKET_SIZE 8 -#define USB_BB_CAP_DESC_TYPE 0x0d - - -#define USB_BB_CAPS_SVID_SIZE 4 -struct usb_bb_caps_svid_descriptor { - uint16_t wSVID; - uint8_t bAlternateMode; - uint8_t iAlternateModeString; -} __packed; - -#define USB_BB_CAPS_BASE_SIZE 44 -struct usb_bb_caps_base_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bDevCapabilityType; - uint8_t iAdditionalInfoURL; - uint8_t bNumberOfAlternateModes; - uint8_t bPreferredAlternateMode; - uint16_t VconnPower; - uint8_t bmConfigured[32]; /* 2b per SVID w/ 128 SVIDs allowed. */ - uint32_t bReserved; /* SBZ */ -} __packed; - - -#define USB_BB_VCONN_PWRON(x) (x << 15) -#define USB_BB_VCONN_PWR_1W 0 -#define USB_BB_VCONN_PWR_1p5W 1 -#define USB_BB_VCONN_PWR_2W 2 -#define USB_BB_VCONN_PWR_3W 3 -#define USB_BB_VCONN_PWR_4W 4 -#define USB_BB_VCONN_PWR_5W 5 -#define USB_BB_VCONN_PWR_6W 6 -/* Note, 7W (111b) is reserved */ - - -#endif /* __CROS_EC_USB_BB_H */ - diff --git a/include/usb_charge.h b/include/usb_charge.h deleted file mode 100644 index 0dc009721e..0000000000 --- a/include/usb_charge.h +++ /dev/null @@ -1,207 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB charging control module for Chrome EC */ - -#ifndef __CROS_EC_USB_CHARGE_H -#define __CROS_EC_USB_CHARGE_H - -#include "charge_manager.h" -#include "common.h" -#include "ec_commands.h" -#include "task.h" - -/* USB charger voltage */ -#define USB_CHARGER_VOLTAGE_MV 5000 -/* USB charger minimum current */ -#define USB_CHARGER_MIN_CURR_MA 500 -/* - * USB charger maximum current - * - * The USB Type-C specification limits the maximum amount of current from BC 1.2 - * suppliers to 1.5A. Technically, proprietary methods are not allowed, but we - * will continue to allow those. - */ -#define USB_CHARGER_MAX_CURR_MA 1500 - -#define USB_SYSJUMP_TAG 0x5550 /* "UP" - Usb Port */ -#define USB_HOOK_VERSION 1 - -#ifdef CONFIG_USB_PORT_POWER_SMART -#define USB_PORT_ENABLE_COUNT CONFIG_USB_PORT_POWER_SMART_PORT_COUNT -#elif defined(CONFIG_USB_PORT_POWER_DUMB) -#define USB_PORT_ENABLE_COUNT USB_PORT_COUNT -#endif - -/* GPIOs to enable/disable USB ports. Board specific. */ -#ifdef USB_PORT_ENABLE_COUNT -#ifdef CONFIG_USB_PORT_ENABLE_DYNAMIC -extern int usb_port_enable[USB_PORT_ENABLE_COUNT]; -#else -extern const int usb_port_enable[USB_PORT_ENABLE_COUNT]; -#endif -#endif /* USB_PORT_ENABLE_COUNT */ - -/** - * Set USB charge mode for the port. - * - * @param usb_port_id Port to set. - * @param mode New mode for port. - * @param inhibit_charge Inhibit charging during system suspend. - * @return EC_SUCCESS, or non-zero if error. - */ -int usb_charge_set_mode(int usb_port_id, enum usb_charge_mode mode, - enum usb_suspend_charge inhibit_charge); - -#define USB_CHG_EVENT_BC12 TASK_EVENT_CUSTOM_BIT(0) -#define USB_CHG_EVENT_VBUS TASK_EVENT_CUSTOM_BIT(1) -#define USB_CHG_EVENT_INTR TASK_EVENT_CUSTOM_BIT(2) -#define USB_CHG_EVENT_DR_UFP TASK_EVENT_CUSTOM_BIT(3) -#define USB_CHG_EVENT_DR_DFP TASK_EVENT_CUSTOM_BIT(4) -#define USB_CHG_EVENT_CC_OPEN TASK_EVENT_CUSTOM_BIT(5) -#define USB_CHG_EVENT_MUX TASK_EVENT_CUSTOM_BIT(6) - -/* Number of USB_CHG_* tasks */ -#ifdef HAS_TASK_USB_CHG_P2 -#define USB_CHG_TASK_COUNT 3 -#elif defined(HAS_TASK_USB_CHG_P1) -#define USB_CHG_TASK_COUNT 2 -#elif defined(HAS_TASK_USB_CHG_P0) || defined(HAS_TASK_USB_CHG) -#define USB_CHG_TASK_COUNT 1 -#else -#define USB_CHG_TASK_COUNT 0 -#endif - -/* - * Define USB_CHG_PORT_TO_TASK_ID() and TASK_ID_TO_USB_CHG__PORT() macros to - * go between USB_CHG port number and task ID. Assume that TASK_ID_USB_CHG_P0, - * is the lowest task ID and IDs are on a continuous range. - */ -#ifdef HAS_TASK_USB_CHG_P0 -#define USB_CHG_PORT_TO_TASK_ID(port) (TASK_ID_USB_CHG_P0 + (port)) -#define TASK_ID_TO_USB_CHG_PORT(id) ((id) - TASK_ID_USB_CHG_P0) -#else -#define USB_CHG_PORT_TO_TASK_ID(port) -1 /* stub task ID */ -#define TASK_ID_TO_USB_CHG_PORT(id) 0 -#endif /* HAS_TASK_USB_CHG_P0 */ - -/** - * Returns true if the passed port is a power source. - * - * @param port Port number. - * @return True if port is sourcing vbus. - */ -int usb_charger_port_is_sourcing_vbus(int port); - -enum usb_switch { - USB_SWITCH_CONNECT, - USB_SWITCH_DISCONNECT, - USB_SWITCH_RESTORE, -}; - -struct bc12_drv { - /* All fields below are optional */ - - /* BC1.2 detection task for this chip */ - void (*usb_charger_task)(int port); - /* Configure USB data switches on type-C port */ - void (*set_switches)(int port, enum usb_switch setting); - /* Check if ramping is allowed for given supplier */ - int (*ramp_allowed)(int supplier); - /* Get the maximum current limit that we are allowed to ramp to */ - int (*ramp_max)(int supplier, int sup_curr); -}; - -struct bc12_config { - const struct bc12_drv *drv; -}; -/** - * An array of length CHARGE_PORT_COUNT which associates each - * pd port / dedicated charge port to bc12 driver. - * - * If CONFIG_BC12_SINGLE_DRIVER is defined, bc12 driver will provide a - * definition of this array. Otherwise, board should define this by themselves. - */ -extern struct bc12_config bc12_ports[]; - -/** - * Configure USB data switches on type-C port. - * - * @param port port number. - * @param setting new switch setting to configure. - */ -static inline void usb_charger_set_switches(int port, enum usb_switch setting) -{ - if (bc12_ports[port].drv->set_switches) - bc12_ports[port].drv->set_switches(port, setting); -} - -/** - * Notify USB_CHG task that VBUS level has changed. - * - * @param port port number. - * @param vbus_level new VBUS level - */ -void usb_charger_vbus_change(int port, int vbus_level); - -/** - * Check if ramping is allowed for given supplier - * - * @param port port number. - * @supplier Supplier to check - * - * @return Ramping is allowed for given supplier - */ -static inline int usb_charger_ramp_allowed(int port, int supplier) -{ - if (port < 0 || !bc12_ports[port].drv->ramp_allowed) - return 0; - return bc12_ports[port].drv->ramp_allowed(supplier); -} - -/** - * Get the maximum current limit that we are allowed to ramp to - * - * @param port port number. - * @supplier Active supplier type - * @sup_curr Input current limit based on supplier - * - * @return Maximum current in mA - */ -static inline int usb_charger_ramp_max(int port, int supplier, int sup_curr) -{ - if (port < 0 || !bc12_ports[port].drv->ramp_max) - return 0; - return bc12_ports[port].drv->ramp_max(supplier, sup_curr); -} - -/** - * Reset available BC 1.2 chargers on all ports - * @param port - */ -void usb_charger_reset_charge(int port); - -/** - * Check if a particular port is sourcing VBUS - * - * This function is typically defined in the board file - * - * @param port port number - * @return 0 if not source, non-zero if sourcing - */ -int board_is_sourcing_vbus(int port); - -/** - * Enable VBUS sink for a given port - * - * This function is typically defined in the board file - * - * @param port port number - * @param enable 0 to disable, 1 to enable - * @return EC_SUCCESS if OK, EC_ERROR_INVAL if @port is invalid - */ -int board_vbus_sink_enable(int port, int enable); - -#endif /* __CROS_EC_USB_CHARGE_H */ diff --git a/include/usb_common.h b/include/usb_common.h deleted file mode 100644 index 5fc215798f..0000000000 --- a/include/usb_common.h +++ /dev/null @@ -1,285 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ -#ifndef __CROS_EC_USB_COMMON_H -#define __CROS_EC_USB_COMMON_H - -/* Functions that are shared between old and new PD stacks */ -#include "usb_pd.h" -#include "usb_pd_tcpm.h" - -enum pd_drp_next_states { - DRP_TC_DEFAULT, - DRP_TC_UNATTACHED_SNK, - DRP_TC_ATTACHED_WAIT_SNK, - DRP_TC_UNATTACHED_SRC, - DRP_TC_ATTACHED_WAIT_SRC, - DRP_TC_DRP_AUTO_TOGGLE -}; - -/** - * Returns the next state to transition to while in the drp auto toggle state. - * - * @param drp_sink_time timer for handling TOGGLE_OFF/FORCE_SINK mode when - * auto-toggle enabled. This is an in/out variable. - * @param power_role current power role - * @param drp_state dual role states - * @param cc1 value of CC1 set by tcpm_get_cc - * @param cc2 value of CC2 set by tcpm_get_cc - * @param auto_toggle_supported indicates hardware auto toggle support. - * Hardware auto toggle support will perform the - * unattached to attached debouncing before notifying - * us of a connection. - * - */ -enum pd_drp_next_states drp_auto_toggle_next_state(uint64_t *drp_sink_time, - enum pd_power_role power_role, enum pd_dual_role_states drp_state, - enum tcpc_cc_voltage_status cc1, enum tcpc_cc_voltage_status cc2, - bool auto_toggle_supported); - -enum pd_pref_type { - /* prefer voltage larger than or equal to pd_pref_config.mv */ - PD_PREFER_BUCK, - /* prefer voltage less than or equal to pd_pref_config.mv */ - PD_PREFER_BOOST, -}; - -struct pd_pref_config_t { - /* Preferred PD voltage in mV */ - int mv; - /* above which percent the battery is in constant voltage stage */ - int cv; - /* System PLT (minimum consuming) power in mW. */ - int plt_mw; - /* Preferred PD voltage pick strategy */ - enum pd_pref_type type; -}; - -/* - * This function converts an 8 character ascii string with hex digits, without - * the 0x prefix, into a signed 32-bit number. - * - * @param str pointer to hex string to convert - * @param val pointer to where the integer version is stored - * @return EC_SUCCSSS on success else EC_ERROR_INVAL on failure - */ -int hex8tou32(char *str, uint32_t *val); - -/* - * Flash a USB PD device using the ChromeOS Vendor Defined Command. - * - * @param argc number arguments in argv. Must be greater than 3. - * @param argv [1] is the usb port - * [2] unused - * [3] is the command {"erase", "rebooot", "signature", - * "info", "version", "write"} - * [4] if command was "write", then this will be the - * start of the data that will be written. - * @return EC_SUCCESS on success, else EC_ERROR_PARAM_COUNT or EC_ERROR_PARAM2 - * on failure. - */ -int remote_flashing(int argc, char **argv); - -/* - * When AP requests to suspend PD traffic on the EC so it can do - * firmware upgrade (retimer firmware, or TCPC chips firmware), - * it calls this function to check if power is ready for performing - * the upgrade. - * @param port USB-C port number - * @dreturn true - power is ready - * false - power is not ready - */ -bool pd_firmware_upgrade_check_power_readiness(int port); - -/* Returns the battery percentage [0-100] of the system. */ -int usb_get_battery_soc(void); - -/* - * Returns type C current limit (mA), potentially with the DTS flag, based upon - * states of the CC lines on the partner side. - * - * @param polarity port polarity - * @param cc1 value of CC1 set by tcpm_get_cc - * @param cc2 value of CC2 set by tcpm_get_cc - * @return current limit (mA) with DTS flag set if appropriate - */ -typec_current_t usb_get_typec_current_limit(enum tcpc_cc_polarity polarity, - enum tcpc_cc_voltage_status cc1, enum tcpc_cc_voltage_status cc2); - -/** - * Returns the polarity of a Sink. - * - * @param cc1 value of CC1 set by tcpm_get_cc - * @param cc2 value of CC2 set by tcpm_get_cc - * @return polarity - */ -enum tcpc_cc_polarity get_snk_polarity(enum tcpc_cc_voltage_status cc1, - enum tcpc_cc_voltage_status cc2); - -/** - * Returns the polarity of a Source. - * - * @param cc1 value of CC1 set by tcpm_get_cc - * @param cc2 value of CC2 set by tcpm_get_cc - * @return polarity - */ -enum tcpc_cc_polarity get_src_polarity(enum tcpc_cc_voltage_status cc1, - enum tcpc_cc_voltage_status cc2); - -/** - * Find PDO index that offers the most amount of power and stays within - * max_mv voltage. - * - * @param src_cap_cnt - * @param src_caps - * @param max_mv maximum voltage (or -1 if no limit) - * @param pdo raw pdo corresponding to index, or index 0 on error (output) - * @return index of PDO within source cap packet - */ -int pd_find_pdo_index(uint32_t src_cap_cnt, const uint32_t * const src_caps, - int max_mv, uint32_t *selected_pdo); - -/** - * Extract power information out of a Power Data Object (PDO) - * - * @param pdo raw pdo to extract - * @param ma current of the PDO (output) - * @param max_mv maximum voltage of the PDO (output) - * @param min_mv minimum voltage of the PDO (output) - */ -void pd_extract_pdo_power(uint32_t pdo, uint32_t *ma, uint32_t *max_mv, - uint32_t *min_mv); - -/** - * Decide which PDO to choose from the source capabilities. - * - * @param vpd_vdo VPD VDO - * @param rdo requested Request Data Object. - * @param ma selected current limit (stored on success) - * @param mv selected supply voltage (stored on success) - * @param port USB-C port number - */ -void pd_build_request(int32_t vpd_vdo, uint32_t *rdo, uint32_t *ma, - uint32_t *mv, int port); - -/** - * Notifies a task that is waiting on a system jump, that it's complete. - */ -void notify_sysjump_ready(void); - -/** - * Set USB MUX with current data role - * - * @param port USB-C port number - */ -void set_usb_mux_with_current_data_role(int port); - -/** - * Check if the mux should be set to enable USB3.1 mode based only on being in a - * UFP data role. This is mode is required when attached to a port partner that - * is type-c only, but still needs to enable USB3.1 mode. - * - * @param port USB-C port number - * @return true if USB3 mode should be enabled, false otherwise - */ -__override_proto bool usb_ufp_check_usb3_enable(int port); - -/** - * Configure the USB MUX in safe mode. - * Before entering into alternate mode, state of the USB-C MUX needs to be in - * safe mode. - * Ref: USB Type-C Cable and Connector Specification - * Section E.2.2 Alternate Mode Electrical Requirements - * - * @param port The PD port number - */ -void usb_mux_set_safe_mode(int port); - -/** - * Configure the USB MUX in safe mode while exiting an alternate mode. - * Although the TCSS (virtual mux) has a distinct safe mode state, it - * needs to be in a disconnected state to properly exit an alternate - * mode. Therefore, do not treat the virtual mux as a special case, as - * usb_mux_set_safe_mode does. - * - * @param port The PD port number - */ -void usb_mux_set_safe_mode_exit(int port); - -/** - * Get the PD flags stored in BB Ram - * - * @param port USB-C port number - * @param flags pointer where flags are written to - * @return EC_SUCCESS on success - */ -int pd_get_saved_port_flags(int port, uint8_t *flags); - -/** - * Update the flag in BB Ram with the give value - * - * @param port USB-C port number - * @param flag BB Ram flag to update - * @param do_set value written to the BB Ram flag - */ -void pd_update_saved_port_flags(int port, uint8_t flag, uint8_t do_set); - -/** - * Build PD alert message - * - * @param msg pointer where message is stored - * @param len pointer where length of message is stored in bytes - * @param pr current PD power role - * @return EC_SUCCESS on success else EC_ERROR_INVAL - */ -int pd_build_alert_msg(uint32_t *msg, uint32_t *len, enum pd_power_role pr); - -/** - * During USB retimer firmware update, process operation - * requested by AP - * - * @param port USB-C port number - * @param op - * 0 - USB_RETIMER_FW_UPDATE_QUERY_PORT - * 1 - USB_RETIMER_FW_UPDATE_SUSPEND_PD - * 2 - USB_RETIMER_FW_UPDATE_RESUME_PD - * 3 - USB_RETIMER_FW_UPDATE_GET_MUX - * 4 - USB_RETIMER_FW_UPDATE_SET_USB - * 5 - USB_RETIMER_FW_UPDATE_SET_SAFE - * 6 - USB_RETIMER_FW_UPDATE_SET_TBT - * 7 - USB_RETIMER_FW_UPDATE_DISCONNECT - */ -void usb_retimer_fw_update_process_op(int port, int op); - -/** - * Get result of last USB retimer firmware update operation requested - * by AP. Result is passed to AP via EC_CMD_ACPI_READ. - * - * @return Result of last operation. It's - * which port has retimer if last operation is - * USB_RETIMER_FW_UPDATE_QUERY_PORT; - * PD task is enabled or not if last operations are - * USB_RETIMER_FW_UPDATE_SUSPEND_PD or - * USB_RETIMER_FW_UPDATE_QUERY_PORT; - * current mux if last operations are - * USB_RETIMER_FW_UPDATE_GET_MUX, USB_RETIMER_FW_UPDATE_SET_USB, - * USB_RETIMER_FW_UPDATE_SET_SAFE, USB_RETIMER_FW_UPDATE_SET_TBT, - * or USB_RETIMER_FW_UPDATE_DISCONNECT. - */ -int usb_retimer_fw_update_get_result(void); - -/** - * Process deferred retimer firmware update operations. - * - * @param port USB-C port number - */ -void usb_retimer_fw_update_process_op_cb(int port); - -/** - * Dump SourceCap information. - * - * @param port USB-C port number - */ -void pd_srccaps_dump(int port); -#endif /* __CROS_EC_USB_COMMON_H */ diff --git a/include/usb_descriptor.h b/include/usb_descriptor.h deleted file mode 100644 index 49114c38e0..0000000000 --- a/include/usb_descriptor.h +++ /dev/null @@ -1,349 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * USB definitions. - */ - -#ifndef __CROS_EC_USB_DESCRIPTOR_H -#define __CROS_EC_USB_DESCRIPTOR_H - -#include <stddef.h> /* for wchar_t */ - -#define USB_MAX_PACKET_SIZE 64 - -/* USB 2.0 chapter 9 definitions */ - -/* Descriptor types */ -#define USB_DT_DEVICE 0x01 -#define USB_DT_CONFIGURATION 0x02 -#define USB_DT_STRING 0x03 -#define USB_DT_INTERFACE 0x04 -#define USB_DT_ENDPOINT 0x05 -#define USB_DT_DEVICE_QUALIFIER 0x06 -#define USB_DT_OTHER_SPEED_CONFIG 0x07 -#define USB_DT_INTERFACE_POWER 0x08 -#define USB_DT_DEBUG 0x0a -#define USB_DT_BOS 0x0f -#define USB_DT_DEVICE_CAPABILITY 0x10 - -/* USB Device Descriptor */ -struct usb_device_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize0; - uint16_t idVendor; - uint16_t idProduct; - uint16_t bcdDevice; - uint8_t iManufacturer; - uint8_t iProduct; - uint8_t iSerialNumber; - uint8_t bNumConfigurations; -} __packed; -#define USB_DT_DEVICE_SIZE 18 - -/* BOS Descriptor ( USB3.1 rev1 Section 9.6.2 ) */ -struct bos_context { - void *descp; - int size; -}; - -struct usb_bos_hdr_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; /* USB_DT_BOS */ - uint16_t wTotalLength; /* Total length of of hdr + all dev caps */ - uint8_t bNumDeviceCaps; /* Container ID Descriptor + others */ -} __packed; -#define USB_DT_BOS_SIZE 5 - -/* Container ID Descriptor */ -struct usb_contid_caps_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; /* USB_DT_DEVICE_CAPABILITY */ - uint8_t bDevCapabilityType; /* USB_DC_DTYPE_xxx */ - uint8_t bReserved; /* SBZ */ - uint8_t ContainerID[16]; /* UUID */ -} __packed; -#define USB_DT_CONTID_SIZE 20 - -/* Device Cap Type Codes ( offset 2 of Device Capability Descriptor */ -#define USB_DC_DTYPE_WIRELESS 0x01 -#define USB_DC_DTYPE_USB20EXT 0x02 -#define USB_DC_DTYPE_USBSS 0x03 -#define USB_DC_DTYPE_CONTID 0x04 -#define USB_DC_DTYPE_PLATFORM 0x05 -#define USB_DC_DTYPE_PD 0x06 -#define USB_DC_DTYPE_BATTINFO 0x07 -#define USB_DC_DTYPE_CONSUMER 0x08 -#define USB_DC_DTYPE_PRODUCER 0x09 -#define USB_DC_DTYPE_USBSSP 0x0a -#define USB_DC_DTYPE_PCSTIME 0x0b -#define USB_DC_DTYPE_WUSBEXT 0x0c -#define USB_DC_DTYPE_BILLBOARD 0x0d -/* RESERVED 0x00, 0xOe - 0xff */ - -/* Platform descriptor */ -struct usb_platform_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; /* USB_DT_DEVICE_CAPABILITY */ - uint8_t bDevCapabilityType; /* USB_DC_DTYPE_PLATFORM */ - uint8_t bReserved; /* SBZ */ - uint8_t PlatformCapUUID[16]; /* USB_PLAT_CAP_xxx */ - uint16_t bcdVersion; /* 0x0100 */ - uint8_t bVendorCode; - uint8_t iLandingPage; -} __packed; -#define USB_DT_PLATFORM_SIZE 24 - -/* Platform Capability UUIDs */ -#define USB_PLAT_CAP_WEBUSB /*{3408b638-09a9-47a0-8bfd-a0768815b665}*/ \ - {0x38, 0xB6, 0x08, 0x34, 0xA9, 0x09, 0xA0, 0x47, \ - 0x8B, 0xFD, 0xA0, 0x76, 0x88, 0x15, 0xB6, 0x65} - -/* Qualifier Descriptor */ -struct usb_qualifier_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize0; - uint8_t bNumConfigurations; - uint8_t bReserved; -} __packed; -#define USB_DT_QUALIFIER_SIZE 10 - -/* Configuration Descriptor */ -struct usb_config_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wTotalLength; - uint8_t bNumInterfaces; - uint8_t bConfigurationValue; - uint8_t iConfiguration; - uint8_t bmAttributes; - uint8_t bMaxPower; -} __packed; -#define USB_DT_CONFIG_SIZE 9 - -/* String Descriptor */ -struct usb_string_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t wData[1]; -} __packed; - -/* Interface Descriptor */ -struct usb_interface_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bInterfaceNumber; - uint8_t bAlternateSetting; - uint8_t bNumEndpoints; - uint8_t bInterfaceClass; - uint8_t bInterfaceSubClass; - uint8_t bInterfaceProtocol; - uint8_t iInterface; -} __packed; -#define USB_DT_INTERFACE_SIZE 9 - -/* Endpoint Descriptor */ -struct usb_endpoint_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; -} __packed; -#define USB_DT_ENDPOINT_SIZE 7 - -/* USB Class codes */ -#define USB_CLASS_PER_INTERFACE 0x00 -#define USB_CLASS_AUDIO 0x01 -#define USB_CLASS_COMM 0x02 -#define USB_CLASS_HID 0x03 -#define USB_CLASS_PHYSICAL 0x05 -#define USB_CLASS_STILL_IMAGE 0x06 -#define USB_CLASS_PRINTER 0x07 -#define USB_CLASS_MASS_STORAGE 0x08 -#define USB_CLASS_HUB 0x09 -#define USB_CLASS_CDC_DATA 0x0a -#define USB_CLASS_CSCID 0x0b -#define USB_CLASS_CONTENT_SEC 0x0d -#define USB_CLASS_VIDEO 0x0e -#define USB_CLASS_BILLBOARD 0x11 -#define USB_CLASS_WIRELESS_CONTROLLER 0xe0 -#define USB_CLASS_MISC 0xef -#define USB_CLASS_APP_SPEC 0xfe -#define USB_CLASS_VENDOR_SPEC 0xff - -/* USB Vendor ID assigned to Google Inc. */ -#define USB_VID_GOOGLE 0x18d1 - -/* Google specific SubClass/Protocol assignments */ -#define USB_SUBCLASS_GOOGLE_SERIAL 0x50 -#define USB_PROTOCOL_GOOGLE_SERIAL 0x01 - -#define USB_SUBCLASS_GOOGLE_SPI 0x51 -#define USB_PROTOCOL_GOOGLE_SPI 0x02 - -#define USB_SUBCLASS_GOOGLE_I2C 0x52 -#define USB_PROTOCOL_GOOGLE_I2C 0x01 - -#define USB_SUBCLASS_GOOGLE_UPDATE 0x53 -#define USB_PROTOCOL_GOOGLE_UPDATE 0xff - -/* Double define for cr50 code freeze. - * TODO(vbendeb): dedupe this. */ -#define USB_SUBCLASS_GOOGLE_CR50 0x53 -/* We can use any protocol we want */ -#define USB_PROTOCOL_GOOGLE_CR50_NON_HC_FW_UPDATE 0xff - -#define USB_SUBCLASS_GOOGLE_POWER 0x54 -#define USB_PROTOCOL_GOOGLE_POWER 0x01 - -#define USB_SUBCLASS_GOOGLE_HEATMAP 0x55 -#define USB_PROTOCOL_GOOGLE_HEATMAP 0x01 - -/* Control requests */ - -/* bRequestType fields */ -/* direction field */ -#define USB_DIR_OUT 0 /* from host to uC */ -#define USB_DIR_IN 0x80 /* from uC to host */ -/* type field */ -#define USB_TYPE_MASK (0x03 << 5) -#define USB_TYPE_STANDARD (0x00 << 5) -#define USB_TYPE_CLASS (0x01 << 5) -#define USB_TYPE_VENDOR (0x02 << 5) -#define USB_TYPE_RESERVED (0x03 << 5) -/* recipient field */ -#define USB_RECIP_MASK 0x1f -#define USB_RECIP_DEVICE 0x00 -#define USB_RECIP_INTERFACE 0x01 -#define USB_RECIP_ENDPOINT 0x02 -#define USB_RECIP_OTHER 0x03 - -/* Standard requests for bRequest field in a SETUP packet. */ -#define USB_REQ_GET_STATUS 0x00 -#define USB_REQ_GET_STATUS_SELF_POWERED BIT(0) -#define USB_REQ_GET_STATUS_REMOTE_WAKEUP BIT(1) -#define USB_REQ_CLEAR_FEATURE 0x01 -#define USB_REQ_SET_FEATURE 0x03 -#define USB_REQ_FEATURE_ENDPOINT_HALT 0x0000 -#define USB_REQ_FEATURE_DEVICE_REMOTE_WAKEUP 0x0001 -#define USB_REQ_FEATURE_TEST_MODE 0x0002 -#define USB_REQ_SET_ADDRESS 0x05 -#define USB_REQ_GET_DESCRIPTOR 0x06 -#define USB_REQ_SET_DESCRIPTOR 0x07 -#define USB_REQ_GET_CONFIGURATION 0x08 -#define USB_REQ_SET_CONFIGURATION 0x09 -#define USB_REQ_GET_INTERFACE 0x0A -#define USB_REQ_SET_INTERFACE 0x0B -#define USB_REQ_SYNCH_FRAME 0x0C - -/* WebUSB URL descriptors */ -#define WEBUSB_REQ_GET_URL 0x02 -#define USB_DT_WEBUSB_URL 0x03 - -#define USB_URL_SCHEME_HTTP 0x00 -#define USB_URL_SCHEME_HTTPS 0x01 -#define USB_URL_SCHEME_NONE 0xff - -/* - * URL descriptor helper. - * (similar to string descriptor but UTF-8 instead of UTF-16) - */ -#define USB_URL_DESC(scheme, str) \ - (const void *)&(const struct { \ - uint8_t _len; \ - uint8_t _type; \ - uint8_t _scheme; \ - char _data[sizeof(str)]; \ - }) { \ - /* Total size of the descriptor is : \ - * size of the UTF-8 text plus the len/type fields \ - * minus the string 0-termination \ - */ \ - sizeof(str) + 3 - 1, \ - USB_DT_WEBUSB_URL, \ - USB_URL_SCHEME_##scheme, \ - str \ - } - -/* Setup Packet */ -struct usb_setup_packet { - uint8_t bmRequestType; - uint8_t bRequest; - uint16_t wValue; - uint16_t wIndex; - uint16_t wLength; -}; - -/* Helpers for descriptors */ - -#define WIDESTR(quote) WIDESTR2(quote) -#define WIDESTR2(quote) L##quote - -#define USB_STRING_DESC(str) \ - (const void *)&(const struct { \ - uint8_t _len; \ - uint8_t _type; \ - wchar_t _data[sizeof(str)]; \ - }) { \ - /* Total size of the descriptor is : \ - * size of the UTF-16 text plus the len/type fields \ - * minus the string 0-termination \ - */ \ - sizeof(WIDESTR(str)) + 2 - 2, \ - USB_DT_STRING, \ - WIDESTR(str) \ - } - -#ifdef CONFIG_USB_SERIALNO -/* String Descriptor for USB, for editable strings. */ -struct usb_string_desc { - uint8_t _len; - uint8_t _type; - wchar_t _data[CONFIG_SERIALNO_LEN]; -}; -#define USB_WR_STRING_DESC(str) \ - (&(struct usb_string_desc) { \ - /* As above, two bytes metadata, no null terminator. */ \ - sizeof(WIDESTR(str)) + 2 - 2, \ - USB_DT_STRING, \ - WIDESTR(str) \ -}) -extern struct usb_string_desc *usb_serialno_desc; -#endif - -/* Use these macros for declaring descriptors, to order them properly */ -#define USB_CONF_DESC_VAR(name, varname) varname \ - __keep __attribute__((section(".rodata.usb_desc_" STRINGIFY(name)))) -#define USB_CONF_DESC(name) USB_CONF_DESC_VAR(name, CONCAT2(usb_desc_, name)) -#define USB_IFACE_DESC(num) USB_CONF_DESC(CONCAT3(iface, num, _0iface)) -#define USB_CUSTOM_DESC_VAR(i, name, varname) \ - USB_CONF_DESC_VAR(CONCAT4(iface, i, _1, name), varname) -#define USB_CUSTOM_DESC(i, name) USB_CONF_DESC(CONCAT4(iface, i, _1, name)) -#define USB_EP_DESC(i, num) USB_CONF_DESC(CONCAT4(iface, i, _2ep, num)) - -/* USB Linker data */ -extern const uint8_t __usb_desc[]; -extern const uint8_t __usb_desc_end[]; -#define USB_DESC_SIZE (__usb_desc_end - __usb_desc) - -/* These descriptors defined in board code */ -extern const void * const usb_strings[]; -extern const uint8_t usb_string_desc[]; -/* USB string descriptor with the firmware version */ -extern const void * const usb_fw_version; -extern const struct bos_context bos_ctx; -extern const void *webusb_url; - -#endif /* __CROS_EC_USB_DESCRIPTOR_H */ diff --git a/include/usb_dp_alt_mode.h b/include/usb_dp_alt_mode.h deleted file mode 100644 index ea824ea476..0000000000 --- a/include/usb_dp_alt_mode.h +++ /dev/null @@ -1,77 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * DisplayPort alternate mode support - * Refer to VESA DisplayPort Alt Mode on USB Type-C Standard, version 2.0, - * section 5.2 - */ - -#ifndef __CROS_EC_USB_DP_ALT_MODE_H -#define __CROS_EC_USB_DP_ALT_MODE_H - -#include <stdint.h> - -#include "tcpm/tcpm.h" - -/* - * Initialize DP state for the specified port. - * - * @param port USB-C port number - */ -void dp_init(int port); - -/* - * Returns True if DisplayPort mode is in active state - * - * @param port USB-C port number - * @return True if DisplayPort mode is in active state - * False otherwise - */ -bool dp_is_active(int port); - -/* - * Checks whether the mode entry sequence for DisplayPort alternate mode is done - * for a port. - * - * @param port USB-C port number - * @return True if entry sequence for DisplayPort mode is completed - * False otherwise - */ -bool dp_entry_is_done(int port); - -/* - * Handles received DisplayPort VDM ACKs. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for received ACK - * @param vdo_count The number of VDOs in the ACK VDM - * @param vdm VDM from ACK - */ -void dp_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, - uint32_t *vdm); - -/* - * Handles NAKed (or Not Supported or timed out) DisplayPort VDM requests. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for request - * @param svid The SVID of the request - * @param vdm_cmd The VDM command of the request - */ -void dp_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd); - -/* - * Construct the next DisplayPort VDM that should be sent. - * - * @param port USB-C port number - * @param vdo_count The number of VDOs in vdm; must be at least VDO_MAX_SIZE - * @param vdm The VDM payload to be sent; output; must point to at least - * VDO_MAX_SIZE elements - * @return The number of VDOs written to VDM or -1 to indicate error - */ -int dp_setup_next_vdm(int port, int vdo_count, uint32_t *vdm); - -#endif /* __CROS_EC_USB_DP_ALT_MODE_H */ diff --git a/include/usb_emsg.h b/include/usb_emsg.h deleted file mode 100644 index 7b418cefdc..0000000000 --- a/include/usb_emsg.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Extended message buffer */ - -#ifndef __CROS_EC_USB_EBUF_H -#define __CROS_EC_USB_EBUF_H - -#ifdef CONFIG_USB_PD_REV30 -#define EXTENDED_BUFFER_SIZE 260 -#else -#define EXTENDED_BUFFER_SIZE 28 -#endif - -struct extended_msg { - uint32_t header; - uint32_t len; - uint8_t buf[EXTENDED_BUFFER_SIZE]; -}; - -/* Defined in usb_prl_sm.c */ -extern struct extended_msg tx_emsg[CONFIG_USB_PD_PORT_MAX_COUNT]; -extern struct extended_msg rx_emsg[CONFIG_USB_PD_PORT_MAX_COUNT]; -#endif /* __CROS_EC_USB_EBUF_H */ diff --git a/include/usb_hid.h b/include/usb_hid.h deleted file mode 100644 index e7b1cfe74b..0000000000 --- a/include/usb_hid.h +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * USB HID definitions. - */ - -#ifndef __CROS_EC_USB_HID_H -#define __CROS_EC_USB_HID_H - -#define USB_HID_SUBCLASS_BOOT 1 -#define USB_HID_PROTOCOL_KEYBOARD 1 -#define USB_HID_PROTOCOL_MOUSE 2 - -/* USB HID Class requests */ -#define USB_HID_REQ_GET_REPORT 0x01 -#define USB_HID_REQ_GET_IDLE 0x02 -#define USB_HID_REQ_GET_PROTOCOL 0x03 -#define USB_HID_REQ_SET_REPORT 0x09 -#define USB_HID_REQ_SET_IDLE 0x0A -#define USB_HID_REQ_SET_PROTOCOL 0x0B - -/* USB HID class descriptor types */ -#define USB_HID_DT_HID (USB_TYPE_CLASS | 0x01) -#define USB_HID_DT_REPORT (USB_TYPE_CLASS | 0x02) -#define USB_HID_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) - -/* Pre-defined report types */ -#define REPORT_TYPE_INPUT 0x01 -#define REPORT_TYPE_OUTPUT 0x02 -#define REPORT_TYPE_FEATURE 0x03 - -struct usb_hid_class_descriptor { - uint8_t bDescriptorType; - uint16_t wDescriptorLength; -} __packed; - -struct usb_hid_descriptor { - uint8_t bLength; - uint8_t bDescriptorType; - uint16_t bcdHID; - uint8_t bCountryCode; - uint8_t bNumDescriptors; - struct usb_hid_class_descriptor desc[1]; -} __packed; - -#endif /* USB_H */ diff --git a/include/usb_hid_touchpad.h b/include/usb_hid_touchpad.h deleted file mode 100644 index 1e6d4cf832..0000000000 --- a/include/usb_hid_touchpad.h +++ /dev/null @@ -1,40 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - * - * USB HID definitions. - */ - -#ifndef __CROS_EC_USB_HID_TOUCHPAD_H -#define __CROS_EC_USB_HID_TOUCHPAD_H - -#define USB_HID_TOUCHPAD_TIMESTAMP_UNIT 100 /* usec */ - -#define REPORT_ID_TOUCHPAD 0x01 -#define REPORT_ID_DEVICE_CAPS 0x0A -#define REPORT_ID_DEVICE_CERT 0x0B - -#define MAX_FINGERS 5 - -struct usb_hid_touchpad_report { - uint8_t id; /* 0x01 */ - struct { - uint16_t confidence:1; - uint16_t tip:1; - uint16_t inrange:1; - uint16_t id:4; - uint16_t pressure:9; - uint16_t width:12; - uint16_t height:12; - uint16_t x:12; - uint16_t y:12; - } __packed finger[MAX_FINGERS]; - uint8_t count:7; - uint8_t button:1; - uint16_t timestamp; -} __packed; - -/* class implementation interfaces */ -void set_touchpad_report(struct usb_hid_touchpad_report *report); - -#endif diff --git a/include/usb_i2c.h b/include/usb_i2c.h deleted file mode 100644 index fd79293014..0000000000 --- a/include/usb_i2c.h +++ /dev/null @@ -1,234 +0,0 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "consumer.h" -#include "producer.h" -#include "registers.h" -#include "task.h" -#include "usb_descriptor.h" -#include "util.h" - -#ifndef __CROS_USB_I2C_H -#define __CROS_USB_I2C_H - -/* - * This header file describes i2c encapsulation when communicated over USB. - * - * Note that current implementation assumes that there is only one instance of - * interface of this kind per device. - * - * 2 forms of command are supported: - * - When write payload + header is larger than 64 bytes, which exceed the - * common USB packet (64 bytes), remaining payload should send without - * header. - * - * - CONFIG_USB_I2C_MAX_WRITE_COUNT / CONFIG_USB_I2C_MAX_READ_COUNT have to - * be defined properly based on the use cases. - * - * - Read less than 128 (0x80) bytes. - * +---------+------+----+----+---------------+ - * | wc/port | addr | wc | rc | write payload | - * +---------+------+----+----+---------------+ - * | 1B | 1B | 1B | 1B | < 256 bytes | - * +---------+------+----+----+---------------+ - * - * - Read less than 32768 (0x8000) bytes. - * +---------+------+----+----+-----+----------+---------------+ - * | wc/port | addr | wc | rc | rc1 | reserved | write payload | - * +---------+------+----+----+----------------+---------------+ - * | 1B | 1B | 1B | 1B | 1B | 1B | < 256 bytes | - * +---------+------+----+----+----------------+---------------+ - * - * - Special notes for rc and rc1: - * If the most significant bit in rc is set (rc >= 0x80), this indicates - * that we want to read back more than 127 bytes, so the first byte of - * data contains rc1 (read count continuation), and the final read count - * will be (rc1 << 7) | (rc & 0x7F). - * - * Fields: - * - * - wc/port: 1 byte: 4 top bits are the 4 top bits of the 12 bit write - * counter, the 4 bottom bits are the port address, i2c interface - * index. - * - * - addr: peripheral address, 1 byte, i2c 7-bit bus address. - * - * - wc: write count, 1 byte, zero based count of bytes to write. If the - * indicated write count cause the payload + header exceeds 64 bytes, - * Following packets are expected to continue the payload without - * header. - * - * - rc: read count, 1 byte, zero based count of bytes to read. To read more - * than 127 (0x7F) bytes please see the special notes above. - * - * - data: payload of data to write. See wc above for more information. - * - * - rc1: extended read count, 1 byte. An extended version indicates we want - * to read more data. While the most significant bits is set in read - * count (rc >= 0x80), rc1 will concatenate with rc together. See the - * special notes above for concatenating details. - * - * - reserved: reserved byte, 1 byte. - * - * Response: - * +-------------+---+---+--------------+ - * | status : 2B | 0 | 0 | read payload | - * +-------------+---+---+--------------+ - * - * - read payload might not fit into a single USB packets. Remaining will be - * transimitted witout header. Receiving side should concatenate them. - * - * status: 2 byte status - * 0x0000: Success - * 0x0001: I2C timeout - * 0x0002: Busy, try again - * This can happen if someone else has acquired the shared memory - * buffer that the I2C driver uses as /dev/null - * 0x0003: Write count invalid (mismatch with merged payload) - * 0x0004: Read count invalid (e.g. larger than available buffer) - * 0x0005: The port specified is invalid. - * 0x0006: The I2C interface is disabled. - * 0x8000: Unknown error mask - * The bottom 15 bits will contain the bottom 15 bits from the EC - * error code. - * - * read payload: Depends on the buffer size and implementation. Length will - * match requested read count - */ - -enum usb_i2c_error { - USB_I2C_SUCCESS = 0x0000, - USB_I2C_TIMEOUT = 0x0001, - USB_I2C_BUSY = 0x0002, - USB_I2C_WRITE_COUNT_INVALID = 0x0003, - USB_I2C_READ_COUNT_INVALID = 0x0004, - USB_I2C_PORT_INVALID = 0x0005, - USB_I2C_DISABLED = 0x0006, - USB_I2C_MISSING_HANDLER = 0x0007, - USB_I2C_UNSUPPORTED_COMMAND = 0x0008, - USB_I2C_UNKNOWN_ERROR = 0x8000, -}; - - -#define USB_I2C_WRITE_BUFFER (CONFIG_USB_I2C_MAX_WRITE_COUNT + 4) -/* If read payload is larger or equal to 128 bytes, header contains rc1 */ -#define USB_I2C_READ_BUFFER ((CONFIG_USB_I2C_MAX_READ_COUNT < 128) ? \ - (CONFIG_USB_I2C_MAX_READ_COUNT + 4) : \ - (CONFIG_USB_I2C_MAX_READ_COUNT + 6)) - -#define USB_I2C_BUFFER_SIZE \ - (USB_I2C_READ_BUFFER > USB_I2C_WRITE_BUFFER ? \ - USB_I2C_READ_BUFFER : USB_I2C_WRITE_BUFFER) - -BUILD_ASSERT(POWER_OF_TWO(USB_I2C_READ_BUFFER)); -BUILD_ASSERT(POWER_OF_TWO(USB_I2C_WRITE_BUFFER)); - -/* - * Compile time Per-USB gpio configuration stored in flash. Instances of this - * structure are provided by the user of the USB i2c. This structure binds - * together all information required to operate a USB i2c. - */ -struct usb_i2c_config { - uint16_t *buffer; - - /* Deferred function to call to handle SPI request. */ - const struct deferred_data *deferred; - - struct consumer const consumer; - struct queue const *tx_queue; -}; - -extern struct consumer_ops const usb_i2c_consumer_ops; - -/* - * Convenience macro for defining a USB I2C bridge driver. - * - * NAME is used to construct the names of the trampoline functions and the - * usb_i2c_config struct, the latter is just called NAME. - * - * INTERFACE is the index of the USB interface to associate with this - * I2C driver. - * - * INTERFACE_NAME is the index of the USB string descriptor (iInterface). - * - * ENDPOINT is the index of the USB bulk endpoint used for receiving and - * transmitting bytes. - */ -#define USB_I2C_CONFIG(NAME, \ - INTERFACE, \ - INTERFACE_NAME, \ - ENDPOINT) \ - static uint16_t \ - CONCAT2(NAME, _buffer_) \ - [USB_I2C_BUFFER_SIZE / 2]; \ - static void CONCAT2(NAME, _deferred_)(void); \ - DECLARE_DEFERRED(CONCAT2(NAME, _deferred_)); \ - static struct queue const CONCAT2(NAME, _to_usb_); \ - static struct queue const CONCAT3(usb_to_, NAME, _); \ - USB_STREAM_CONFIG_FULL(CONCAT2(NAME, _usb_), \ - INTERFACE, \ - USB_CLASS_VENDOR_SPEC, \ - USB_SUBCLASS_GOOGLE_I2C, \ - USB_PROTOCOL_GOOGLE_I2C, \ - INTERFACE_NAME, \ - ENDPOINT, \ - USB_MAX_PACKET_SIZE, \ - USB_MAX_PACKET_SIZE, \ - CONCAT3(usb_to_, NAME, _), \ - CONCAT2(NAME, _to_usb_)) \ - struct usb_i2c_config const NAME = { \ - .buffer = CONCAT2(NAME, _buffer_), \ - .deferred = &CONCAT2(NAME, _deferred__data), \ - .consumer = { \ - .queue = &CONCAT3(usb_to_, NAME, _), \ - .ops = &usb_i2c_consumer_ops, \ - }, \ - .tx_queue = &CONCAT2(NAME, _to_usb_), \ - }; \ - static struct queue const CONCAT2(NAME, _to_usb_) = \ - QUEUE_DIRECT(USB_I2C_READ_BUFFER, uint8_t, \ - null_producer, CONCAT2(NAME, _usb_).consumer); \ - static struct queue const CONCAT3(usb_to_, NAME, _) = \ - QUEUE_DIRECT(USB_I2C_WRITE_BUFFER, uint8_t, \ - CONCAT2(NAME, _usb_).producer, NAME.consumer); \ - static void CONCAT2(NAME, _deferred_)(void) \ - { usb_i2c_deferred(&NAME); } - -/* - * Handle I2C request in a deferred callback. - */ -void usb_i2c_deferred(struct usb_i2c_config const *config); - -/* - * These functions should be implemented by the board to provide any board - * specific operations required to enable or disable access to the I2C device, - * and to return the current board enable state. - */ - -/** - * Check if the I2C device is enabled - * - * @return 1 if enabled, 0 if disabled. - */ -int usb_i2c_board_is_enabled(void); - -/* - * Special i2c address to use when the client is required to execute some - * command which does not directly involve the i2c controller driver. - */ -#define USB_I2C_CMD_ADDR_FLAGS 0x78 - -/* - * Function to call to register a handler for commands sent to the special i2c - * address above. - */ -int usb_i2c_register_cros_cmd_handler(int (*cmd_handler) - (void *data_in, - size_t in_size, - void *data_out, - size_t out_size)); - - -#endif /* __CROS_USB_I2C_H */ diff --git a/include/usb_mode.h b/include/usb_mode.h deleted file mode 100644 index 4333cc851e..0000000000 --- a/include/usb_mode.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * USB4 mode support - * Refer USB Type-C Cable and Connector Specification Release 2.0 Section 5 and - * USB Power Delivery Specification Revision 3.0, Version 2.0 Section 6.4.8 - */ - -#ifndef __CROS_EC_USB_MODE_H -#define __CROS_EC_USB_MODE_H - -#include <stdint.h> - -#include "tcpm/tcpm.h" -#include "usb_pd_tcpm.h" - -/* - * Initialize USB4 state for the specified port. - * - * @param port USB-C port number - */ -void enter_usb_init(int port); - -/* - * Checks whether the mode entry sequence for USB4 is done for a port. - * - * @param port USB-C port number - * @return True if entry sequence for USB4 is completed - * False otherwise - */ -bool enter_usb_entry_is_done(int port); - -/* - * Requests the retimer and mux to exit USB4 mode and re-initalizes the USB4 - * state machine. - * - * @param port USB-C port number - */ -void usb4_exit_mode_request(int port); - -/* - * Resets USB4 state and mux state. - * - * @param port USB-C port number - */ -void enter_usb_failed(int port); - -/* - * Returns True if port partner supports USB4 mode - * - * @param port USB-C port number - * @return True if USB4 mode is supported by the port partner, - * False otherwise - */ -bool enter_usb_port_partner_is_capable(int port); - -/* - * Returns True if cable supports USB4 mode - * - * @param port USB-C port number - * @return True if USB4 mode is supported by the cable, - * False otherwise - */ -bool enter_usb_cable_is_capable(int port); - -/* - * Handles accepted USB4 response - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP', SOP'') for request - */ -void enter_usb_accepted(int port, enum tcpci_msg_type type); - -/* - * Handles rejected USB4 response - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP', SOP'') for request - */ -void enter_usb_rejected(int port, enum tcpci_msg_type type); - -/* - * Constructs the next USB4 EUDO that should be sent. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP', SOP'') for request - */ -uint32_t enter_usb_setup_next_msg(int port, enum tcpci_msg_type *type); - -#endif diff --git a/include/usb_mux.h b/include/usb_mux.h deleted file mode 100644 index 9909f1c1c5..0000000000 --- a/include/usb_mux.h +++ /dev/null @@ -1,265 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB mux driver */ - -#ifndef __CROS_EC_USB_MUX_H -#define __CROS_EC_USB_MUX_H - -#include "ec_commands.h" -#include "i2c.h" -#include "tcpm/tcpm.h" -#include "usb_charge.h" -#include "usb_pd.h" - -/* Flags used for usb_mux.flags */ -#define USB_MUX_FLAG_NOT_TCPC BIT(0) /* TCPC/MUX device used only as MUX */ -#define USB_MUX_FLAG_SET_WITHOUT_FLIP BIT(1) /* SET should not flip */ -#define USB_MUX_FLAG_RESETS_IN_G3 BIT(2) /* Mux chip will reset in G3 */ - -/* - * USB-C mux state - * - * A bitwise combination of the USB_PD_MUX_* flags. - * Note: this is 8 bits right now to make ec_response_usb_pd_mux_info size. - */ -typedef uint8_t mux_state_t; - -/* Mux driver function pointers */ -struct usb_mux; -struct usb_mux_driver { - /** - * Initialize USB mux. This is called every time the MUX is - * access after being put in a fully disconnected state (low - * power mode). - * - * @param me usb_mux - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*init)(const struct usb_mux *me); - - /** - * Set USB mux state. - * - * @param[in] me usb_mux - * @param[in] mux_state State to set mux to. - * @param[out] bool ack_required - indication of whether this mux needs - * to wait on a host command ACK at the end of a set - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*set)(const struct usb_mux *me, mux_state_t mux_state, - bool *ack_required); - - /** - * Get current state of USB mux. - * - * @param me usb_mux - * @param mux_state Gets set to current state of mux. - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*get)(const struct usb_mux *me, mux_state_t *mux_state); - - /** - * Return if retimer supports firmware update - * - * @return true - supported - * false - not supported - */ - bool (*is_retimer_fw_update_capable)(void); - - /** - * Optional method that is called after the mux fully disconnects. - * - * Note: this method does not need to be defined for TCPC/MUX combos - * where the TCPC is actively used since the PD state machine - * will put the chip into lower power mode. - * - * @param me usb_mux - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*enter_low_power_mode)(const struct usb_mux *me); - - /** - * Optional method that is called on HOOK_CHIPSET_RESET. - * - * @param me usb_mux - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*chipset_reset)(const struct usb_mux *me); -}; - -/* Describes a USB mux present in the system */ -struct usb_mux { - /* - * This is index into usb_muxes that points to the start of the - * possible chain of usb_mux entries that this entry is on. - */ - int usb_port; - - /* - * I2C port and address. This is optional if your MUX is not - * an I2C interface. If this is the case, use usb_port to - * index an exernal array to track your connection parameters, - * if they are needed. One case of this would be a driver - * that will use usb_port as an index into tcpc_config_t to - * gather the necessary information to communicate with the MUX - */ - uint16_t i2c_port; - uint16_t i2c_addr_flags; - - /* Run-time flags with prefix USB_MUX_FLAG_ */ - uint32_t flags; - - /* Mux driver */ - const struct usb_mux_driver *driver; - - /* Linked list chain of secondary MUXes. NULL terminated */ - const struct usb_mux *next_mux; - - /** - * Optional method for tuning for USB mux during mux->driver->init(). - * - * @param me usb_mux - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*board_init)(const struct usb_mux *me); - - /* - * USB mux/retimer board specific set mux_state. - * - * @param me usb_mux - * @param mux_state State to set mode to. - * @return EC_SUCCESS on success, non-zero error code on failure. - */ - int (*board_set)(const struct usb_mux *me, mux_state_t mux_state); - - /* - * USB Type-C DP alt mode support. Notify Type-C controller - * there is DP dongle hot-plug. - * - * @param me usb_mux - * @param mux_state with HPD IRQ and HPD LVL flags set - * accordingly - */ - void (*hpd_update)(const struct usb_mux *me, - mux_state_t mux_state); -}; - -/* Supported USB mux drivers */ -extern const struct usb_mux_driver amd_fp5_usb_mux_driver; -extern const struct usb_mux_driver amd_fp6_usb_mux_driver; -extern const struct usb_mux_driver anx7440_usb_mux_driver; -extern const struct usb_mux_driver it5205_usb_mux_driver; -extern const struct usb_mux_driver pi3usb3x532_usb_mux_driver; -extern const struct usb_mux_driver ps8740_usb_mux_driver; -extern const struct usb_mux_driver ps8743_usb_mux_driver; -extern const struct usb_mux_driver ps8822_usb_mux_driver; -extern const struct usb_mux_driver tcpm_usb_mux_driver; -extern const struct usb_mux_driver tusb1064_usb_mux_driver; -extern const struct usb_mux_driver virtual_usb_mux_driver; - -/* USB muxes present in system, ordered by PD port #, defined at board-level */ -#ifdef CONFIG_USB_MUX_RUNTIME_CONFIG -extern struct usb_mux usb_muxes[]; -#else -extern const struct usb_mux usb_muxes[]; -#endif - -/* Supported hpd_update functions */ -void virtual_hpd_update(const struct usb_mux *me, mux_state_t mux_state); - -/* - * Helper methods that either use tcpc communication or direct i2c - * communication depending on how the TCPC/MUX device is configured. - */ -#ifdef CONFIG_USB_PD_TCPM_MUX -static inline int mux_write(const struct usb_mux *me, int reg, int val) -{ - return me->flags & USB_MUX_FLAG_NOT_TCPC - ? i2c_write8(me->i2c_port, me->i2c_addr_flags, reg, val) - : tcpc_write(me->usb_port, reg, val); -} - -static inline int mux_read(const struct usb_mux *me, int reg, int *val) -{ - return me->flags & USB_MUX_FLAG_NOT_TCPC - ? i2c_read8(me->i2c_port, me->i2c_addr_flags, reg, val) - : tcpc_read(me->usb_port, reg, val); -} - -static inline int mux_write16(const struct usb_mux *me, int reg, int val) -{ - return me->flags & USB_MUX_FLAG_NOT_TCPC - ? i2c_write16(me->i2c_port, me->i2c_addr_flags, reg, val) - : tcpc_write16(me->usb_port, reg, val); -} - -static inline int mux_read16(const struct usb_mux *me, int reg, int *val) -{ - return me->flags & USB_MUX_FLAG_NOT_TCPC - ? i2c_read16(me->i2c_port, me->i2c_addr_flags, reg, val) - : tcpc_read16(me->usb_port, reg, val); -} -#endif /* CONFIG_USB_PD_TCPM_MUX */ - -/** - * Initialize USB mux to its default state. - * - * @param port Port number. - */ -void usb_mux_init(int port); - -/** - * Configure superspeed muxes on type-C port. - * - * @param port port number. - * @param mux_mode mux selected function. - * @param usb_config usb2.0 selected function. - * @param polarity plug polarity (0=CC1, 1=CC2). - */ -void usb_mux_set(int port, mux_state_t mux_mode, - enum usb_switch usb_config, int polarity); - -/** - * Query superspeed mux status on type-C port. - * - * @param port port number. - * @return current MUX state (USB_PD_MUX_*). - */ -mux_state_t usb_mux_get(int port); - -/** - * Flip the superspeed muxes on type-C port. - * - * This is used for factory test automation. Note that this function should - * only flip the superspeed muxes and leave CC lines alone. Without further - * changes, this function MUST ONLY be used for testing purpose, because - * the protocol layer loses track of the superspeed polarity and DP/USB3.0 - * connection may break. - * - * @param port port number. - */ -void usb_mux_flip(int port); - -/** - * Update the hot-plug event. - * - * @param port port number. - * @param mux_state HPD IRQ and LVL mux flags - */ -void usb_mux_hpd_update(int port, mux_state_t mux_state); - -/** - * Port information about retimer firmware update support. - * - * @return which ports support retimer firmware update - * Bits[7:0]: represent PD ports 0-7; - * each bit - * = 1, this port supports retimer firmware update; - * = 0, not support. - */ -int usb_mux_retimer_fw_update_port_info(void); - -#endif diff --git a/include/usb_pd_dp_ufp.h b/include/usb_pd_dp_ufp.h deleted file mode 100644 index 64728d948e..0000000000 --- a/include/usb_pd_dp_ufp.h +++ /dev/null @@ -1,35 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Common functions for UFP-D devices. - */ - -#ifndef __CROS_EC_USB_PD_DP_UFP_H -#define __CROS_EC_USB_PD_DP_UFP_H - -struct hpd_to_pd_config_t { - int port; - enum gpio_signal signal; -}; - -extern const struct hpd_to_pd_config_t hpd_config; -/* - * Function used to handle hpd gpio interrupts. - * - * @param signal -> gpio signal associated with hpd interrupt - */ -void usb_pd_hpd_edge_event(int signal); - -/* - * Function used to enable/disable the hpd->dp attention protocol converter - * - called with enable when enter mode command is processed. - * - called with disable when exit mode command is processed. - * - * @param enable -> converter on/off - */ -void usb_pd_hpd_converter_enable(int enable); - -#endif /* __CROS_EC_USB_PD_DP_UFP_H */ diff --git a/include/usb_pd_dpm.h b/include/usb_pd_dpm.h deleted file mode 100644 index 19d4c4fe6b..0000000000 --- a/include/usb_pd_dpm.h +++ /dev/null @@ -1,111 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Device Policy Manager implementation - * Refer to USB PD 3.0 spec, version 2.0, sections 8.2 and 8.3 - */ - -#ifndef __CROS_EC_USB_DPM_H -#define __CROS_EC_USB_DPM_H - -#include "ec_commands.h" -#include "usb_pd_tcpm.h" - -/* - * Initializes DPM state for a port. - * - * @param port USB-C port number - */ -void dpm_init(int port); - -/* - * Informs the DPM that Exit Mode request is received - * - * @param port USB-C port number - */ -void dpm_set_mode_exit_request(int port); - -/* - * Informs the DPM that a VDM ACK was received. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for received ACK - * @param vdo_count The number of VDOs in vdm; must be at least 1 - * @param vdm The VDM payload of the ACK - */ -void dpm_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, - uint32_t *vdm); - -/* - * Informs the DPM that a VDM NAK was received. Also applies when a VDM request - * received a Not Supported response or timed out waiting for a response. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for request - * @param svid The SVID of the request - * @param vdm_cmd The VDM command of the request - */ -void dpm_vdm_naked(int port, enum tcpci_msg_type type, uint16_t svid, - uint8_t vdm_cmd); - -/* - * Drives the Policy Engine through entry/exit mode process - * - * @param port USB-C port number - */ -void dpm_run(int port); - -/* - * Determines the current allocation for the connection, past the basic - * CONFIG_USB_PD_PULLUP value set by the TC (generally 1.5 A) - * - * @param port USB-C port number - * @param vsafe5v_pdo Copy of first Sink_Capability PDO, which should - * represent the vSafe5V fixed PDO - */ -void dpm_evaluate_sink_fixed_pdo(int port, uint32_t vsafe5v_pdo); - -/* - * Registers port as a non-PD sink, so that can be taken into account when - * allocating current. - * - * @param port USB-C port number - */ -void dpm_add_non_pd_sink(int port); - -/* - * Remove this port as a sink, and reallocate maximum current as needed. - * - * @param port USB-C port number - */ -void dpm_remove_sink(int port); - -/* - * Remove this port as a source, and reallocate reserved FRS maximum current - * as needed. - * - * @param port USB-C port number - */ -void dpm_remove_source(int port); - -/* - * Return the appropriate Source Capability PDO to offer this port - * - * @param src_pdo Will point to appropriate PDO to offer - * @param port USB-C port number - * @return Number of PDOs - */ -int dpm_get_source_pdo(const uint32_t **src_pdo, const int port); - -/* - * Report offered source current for this port - * - * @param port USB-C port number - * @return Current offered, in mA - */ -int dpm_get_source_current(const int port); - -#endif /* __CROS_EC_USB_DPM_H */ diff --git a/include/usb_pd_policy.h b/include/usb_pd_policy.h deleted file mode 100644 index a4f0c64ea6..0000000000 --- a/include/usb_pd_policy.h +++ /dev/null @@ -1,41 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USBC PD Default Policies */ - -#ifndef __CROS_EC_USB_PD_POLICY_H -#define __CROS_EC_USB_PD_POLICY_H - -#include "usb_pe_sm.h" - -/** - * Port Discovery DR Swap Policy - * - * Different boards can implement its own DR swap policy during a port discovery - * by implementing this function. - * - * @param port USB-C port number - * @param dr current port data role - * @param dr_swap_flag Data Role Swap Flag bit - * @param return True if state machine should perform a DR swap, elsf False - */ -__override_proto bool port_discovery_dr_swap_policy(int port, - enum pd_data_role dr, bool dr_swap_flag); - -/** - * Port Discovery VCONN Swap Policy - * - * Different boards can implement its own VCONN swap policy during a port - * discovery by implementing this function. - * - * @param port USB-C port number - * @param vconn_swap_to_on_flag Vconn Swap to On Flag bit - * @param return True if state machine should perform a VCONN swap, elsf False - */ -__override_proto bool port_discovery_vconn_swap_policy(int port, - bool vconn_swap_flag); - -#endif /* __CROS_EC_USB_PD_POLICY_H */ - diff --git a/include/usb_pd_tcpc.h b/include/usb_pd_tcpc.h deleted file mode 100644 index 0a10f97e0e..0000000000 --- a/include/usb_pd_tcpc.h +++ /dev/null @@ -1,69 +0,0 @@ -/* Copyright 2015 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery port controller */ - -#ifndef __CROS_EC_USB_PD_TCPC_H -#define __CROS_EC_USB_PD_TCPC_H - -#include <stdint.h> -#include "usb_pd_tcpm.h" - -/* If we are a TCPC but not a TCPM, then we implement the peripheral TCPCI */ -#if defined(CONFIG_USB_PD_TCPC) && !defined(CONFIG_USB_PD_TCPM_STUB) -#define TCPCI_I2C_PERIPHERAL -#endif - -#ifdef TCPCI_I2C_PERIPHERAL -/* Convert TCPC address to type-C port number */ -#define TCPC_ADDR_TO_PORT(addr) ((addr) \ - - I2C_STRIP_FLAGS(CONFIG_TCPC_I2C_BASE_ADDR_FLAGS)) -/* Check if the i2c address belongs to TCPC */ -#define ADDR_IS_TCPC(addr) (((addr) & 0x7E) \ - == I2C_STRIP_FLAGS(CONFIG_TCPC_I2C_BASE_ADDR_FLAGS)) -#endif - -/** - * Process incoming TCPCI I2C command - * - * @param read This is a read request. If 0, this is a write request. - * @param len Length of incoming payload - * @param payload Pointer to incoming and outgoing data - * @param send_response Function to call to send response if necessary - */ -void tcpc_i2c_process(int read, int port, int len, uint8_t *payload, - void (*send_response)(int)); - -/** - * Handle VBUS wake interrupts - * - * @param signal The VBUS wake interrupt signal - */ -void pd_vbus_evt_p0(enum gpio_signal signal); -void pd_vbus_evt_p1(enum gpio_signal signal); - -/* - * Methods for TCPCI peripherals (e.g. zinger) to get/set their internal - * state - */ -int tcpc_alert_status(int port, int *alert); -int tcpc_alert_status_clear(int port, uint16_t mask); -int tcpc_alert_mask_set(int port, uint16_t mask); -int tcpc_get_cc(int port, enum tcpc_cc_voltage_status *cc1, - enum tcpc_cc_voltage_status *cc2); -int tcpc_select_rp_value(int port, int rp); -int tcpc_set_cc(int port, int pull); -int tcpc_set_polarity(int port, int polarity); -int tcpc_set_power_status_mask(int port, uint8_t mask); -int tcpc_set_vconn(int port, int enable); -int tcpc_set_msg_header(int port, int power_role, int data_role); -int tcpc_set_rx_enable(int port, int enable); -int tcpc_get_message(int port, uint32_t *payload, int *head); -int tcpc_transmit(int port, enum tcpci_msg_type type, uint16_t header, - const uint32_t *data); -int rx_buf_is_empty(int port); -void rx_buf_clear(int port); - -#endif /* __CROS_EC_USB_PD_TCPC_H */ diff --git a/include/usb_pd_timer.h b/include/usb_pd_timer.h deleted file mode 100644 index 5757bd7ada..0000000000 --- a/include/usb_pd_timer.h +++ /dev/null @@ -1,298 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Power delivery module */ - -#ifndef __CROS_EC_USB_PD_TIMER_H -#define __CROS_EC_USB_PD_TIMER_H - -#include <stdbool.h> - -/* - * List of all timers that will be managed by usb_pd_timer - */ -enum pd_task_timer { - /* - * In BIST_TX mode, this timer is used by a UUT to ensure that a - * Continuous BIST Mode (i.e. BIST Carrier Mode) is exited in a timely - * fashion. - * - * In BIST_RX mode, this timer is used to give the port partner time - * to respond. - */ - PE_TIMER_BIST_CONT_MODE, - - /* - * PD 3.0, version 2.0, section 6.6.18.1: The ChunkingNotSupportedTimer - * is used by a Source or Sink which does not support multi-chunk - * Chunking but has received a Message Chunk. The - * ChunkingNotSupportedTimer Shall be started when the last bit of the - * EOP of a Message Chunk of a multi-chunk Message is received. The - * Policy Engine Shall Not send its Not_Supported Message before the - * ChunkingNotSupportedTimer expires. - */ - PE_TIMER_CHUNKING_NOT_SUPPORTED, - - /* - * This timer is used during an Explicit Contract when discovering - * whether a Port Partner is PD Capable using SOP'. - */ - PE_TIMER_DISCOVER_IDENTITY, - - /* - * The NoResponseTimer is used by the Policy Engine in a Source - * to determine that its Port Partner is not responding after a - * Hard Reset. - */ - PE_TIMER_NO_RESPONSE, - - /* - * This timer tracks the time after receiving a Wait message in - * response to a PR_Swap message. - */ - PE_TIMER_PR_SWAP_WAIT, - - /* - * This timer is used in a Source to ensure that the Sink has had - * sufficient time to process Hard Reset Signaling before turning - * off its power supply to VBUS. - */ - PE_TIMER_PS_HARD_RESET, - - /* - * This timer combines the PSSourceOffTimer and PSSourceOnTimer timers. - * For PSSourceOffTimer, when this DRP device is currently acting as a - * Sink, this timer times out on a PS_RDY Message during a Power Role - * Swap sequence. - * - * For PSSourceOnTimer, when this DRP device is currently acting as a - * Source that has just stopped sourcing power and is waiting to start - * sinking power to timeout on a PS_RDY Message during a Power Role - * Swap. - */ - PE_TIMER_PS_SOURCE, - - /* - * This timer is started when a request for a new Capability has been - * accepted and will timeout after PD_T_PS_TRANSITION if a PS_RDY - * Message has not been received. - */ - PE_TIMER_PS_TRANSITION, - - /* - * This timer is used to ensure that a Message requesting a response - * (e.g. Get_Source_Cap Message) is responded to within a bounded time - * of PD_T_SENDER_RESPONSE. - */ - PE_TIMER_SENDER_RESPONSE, - - /* - * This timer is used to ensure that the time before the next Sink - * Request Message, after a Wait Message has been received from the - * Source in response to a Sink Request Message. - */ - PE_TIMER_SINK_REQUEST, - - /* - * Prior to a successful negotiation, a Source Shall use the - * SourceCapabilityTimer to periodically send out a - * Source_Capabilities Message. - */ - PE_TIMER_SOURCE_CAP, - - /* - * Used to wait for tSrcTransition between sending an Accept for a - * Request or receiving a GoToMin and transitioning the power supply. - * See PD 3.0, table 7-11 and table 7-22 This is not a named timer in - * the spec. - */ - PE_TIMER_SRC_TRANSITION, - - /* - * This timer is used by the new Source, after a Power Role Swap or - * Fast Role Swap, to ensure that it does not send Source_Capabilities - * Message before the new Sink is ready to receive the - * Source_Capabilities Message. - */ - PE_TIMER_SWAP_SOURCE_START, - - /* Temporary available timeout timer */ - PE_TIMER_TIMEOUT, - - /* - * This timer is used during a VCONN Swap. - */ - PE_TIMER_VCONN_ON, - - /* - * This timer is used by the Initiator’s Policy Engine to ensure that - * a Structured VDM Command request needing a response (e.g. Discover - * Identity Command request) is responded to within a bounded time of - * tVDMSenderResponse. - */ - PE_TIMER_VDM_RESPONSE, - - /* - * For PD2.0, this timer is used to wait 400ms and add some - * jitter of up to 100ms before sending a message. - * NOTE: This timer is not part of the TypeC/PD spec. - */ - PE_TIMER_WAIT_AND_ADD_JITTER, - - - /* Chunk Sender Response timer */ - PR_TIMER_CHUNK_SENDER_RESPONSE, - - /* Chunk Sender Request timer */ - PR_TIMER_CHUNK_SENDER_REQUEST, - - /* Hard Reset Complete timer */ - PR_TIMER_HARD_RESET_COMPLETE, - - /* Sink TX timer */ - PR_TIMER_SINK_TX, - - /* timeout to limit waiting on TCPC response (not in spec) */ - PR_TIMER_TCPC_TX_TIMEOUT, - - - /* Time a port shall wait before it can determine it is attached */ - TC_TIMER_CC_DEBOUNCE, - - /* Time to debounce exit low power mode */ - TC_TIMER_LOW_POWER_EXIT_TIME, - - /* Time to enter low power mode */ - TC_TIMER_LOW_POWER_TIME, - - /* Role toggle timer */ - TC_TIMER_NEXT_ROLE_SWAP, - - /* - * Time a Sink port shall wait before it can determine it is detached - * due to the potential for USB PD signaling on CC as described in - * the state definitions. - */ - TC_TIMER_PD_DEBOUNCE, - - /* Generic timer */ - TC_TIMER_TIMEOUT, - - /* - * Time a port shall wait before it can determine it is - * re-attached during the try-wait process. - */ - TC_TIMER_TRY_WAIT_DEBOUNCE, - - /* - * Time to ignore Vbus absence due to external IC debounce detection - * logic immediately after a power role swap. - */ - TC_TIMER_VBUS_DEBOUNCE, - - PD_TIMER_COUNT -}; -BUILD_ASSERT(PD_TIMER_COUNT <= 32); - -enum pd_timer_range { - PE_TIMER_RANGE, - PR_TIMER_RANGE, - TC_TIMER_RANGE, -}; -#define PE_TIMER_START PE_TIMER_BIST_CONT_MODE -#define PE_TIMER_END PE_TIMER_WAIT_AND_ADD_JITTER - -#define PR_TIMER_START PR_TIMER_CHUNK_SENDER_RESPONSE -#define PR_TIMER_END PR_TIMER_TCPC_TX_TIMEOUT - -#define TC_TIMER_START TC_TIMER_CC_DEBOUNCE -#define TC_TIMER_END TC_TIMER_VBUS_DEBOUNCE - -/* - * pd_timer_init - * Initialize Power Delivery Timer module - * - * @param port USB-C port number - */ -void pd_timer_init(int port); - -/* - * pd_timer_enable - * Initiate an enabled timer - * - * @param port USB-C port number - * @param timer Requested pd_task_timer - * @param expires_us Expiration time relative to "now" - */ -void pd_timer_enable(int port, enum pd_task_timer timer, uint32_t expires_us); - -/* - * pd_timer_disable - * Disable a timer - * - * @param port USB-C port number - * @param timer Requested pd_task_timer - */ -void pd_timer_disable(int port, enum pd_task_timer timer); - -/* - * pd_timer_disable_range - * Disable all of the timers in a group range - * - * @param port USB-C port number - * @param range Group range to disable - */ -void pd_timer_disable_range(int port, enum pd_timer_range range); - -/* - * pd_timer_is_disabled - * Determine if a timer is currently disabled - * - * @param port USB-C port number - * @param timer Requested pd_task_timer - * @return True if the timer is disabled, otherwise false - */ -bool pd_timer_is_disabled(int port, enum pd_task_timer timer); - -/* - * pd_timer_is_expired - * Determine if a timer is expired - * - * @param port USB-C port number - * @param timer Requested pd_task_timer - * @return True if the timer is enabled and expired, otherwise false - */ -bool pd_timer_is_expired(int port, enum pd_task_timer timer); - -/* - * pd_timer_manage_expired - * Convert an active/expired timer to be inactive/expired. This will allow - * the code to continue to check for expired without having this timer as - * part of the pd_timer_next_expiration decision. - * - * @param port USB-C port number - */ -void pd_timer_manage_expired(int port); - -/* - * pd_timer_next_expiration - * Retrieve the next active expiration time - * - * @param port USB-C port number - * @return >= 0 is the number of uSeconds until we should wake up. - * -1 no pending timeout - */ -int pd_timer_next_expiration(int port); - - -/* - * pd_timer_dump - * Debug display of the timers for a given port - * - * @param port USB-C port number - */ -void pd_timer_dump(int port); - -#endif /* __CROS_EC_USB_PD_TIMER_H */ diff --git a/include/usb_pe_sm.h b/include/usb_pe_sm.h deleted file mode 100644 index d6ecb4d400..0000000000 --- a/include/usb_pe_sm.h +++ /dev/null @@ -1,188 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Policy Engine module */ - -#ifndef __CROS_EC_USB_PE_H -#define __CROS_EC_USB_PE_H - -#include "usb_pd_tcpm.h" -#include "usb_sm.h" - -/* Policy Engine Receive and Transmit Errors */ -enum pe_error { - ERR_RCH_CHUNKED, - ERR_RCH_MSG_REC, - ERR_RCH_CHUNK_WAIT_TIMEOUT, - ERR_TCH_CHUNKED, - ERR_TCH_XMIT, -}; - -/** - * Runs the Policy Engine State Machine - * - * @param port USB-C port number - * @param evt system event, ie: PD_EVENT_RX - * @param en 0 to disable the machine, 1 to enable the machine - */ -void pe_run(int port, int evt, int en); - -/** - * Sets the debug level for the PRL layer - * - * @param level debug level - */ -void pe_set_debug_level(enum debug_level level); - -/** - * Informs the Policy Engine that a message was successfully sent - * - * @param port USB-C port number - */ -void pe_message_sent(int port); - -/** - * Informs the Policy Engine of an error. - * - * @param port USB-C port number - * @param e error - * @param type port address where error was generated - */ -void pe_report_error(int port, enum pe_error e, enum tcpci_msg_type type); - -/** - * Informs the Policy Engine of a discard. - * - * @param port USB-C port number - */ -void pe_report_discard(int port); - -/** - * Called by the Protocol Layer to informs the Policy Engine - * that a message has been received. - * - * @param port USB-C port number - */ -void pe_message_received(int port); - -/** - * Informs the Policy Engine that a hard reset was received. - * - * @param port USB-C port number - */ -void pe_got_hard_reset(int port); - -/** - * Informs the Policy Engine that a soft reset was received. - * - * @param port USB-C port number - */ -void pe_got_soft_reset(int port); - -/** - * Informs the Policy Engine that a hard reset was sent. - * - * @param port USB-C port number - */ -void pe_hard_reset_sent(int port); - -/** - * Get the id of the current Policy Engine state - * - * @param port USB-C port number - */ -enum pe_states pe_get_state_id(int port); - -/** - * Indicates if the Policy Engine State Machine is running. - * - * @param port USB-C port number - * @return 1 if policy engine state machine is running, else 0 - */ -int pe_is_running(int port); - -/** - * Informs the Policy Engine that the Power Supply is at it's default state - * - * @param port USB-C port number - */ -void pe_ps_reset_complete(int port); - -/** - * Informs the Policy Engine that a VCONN Swap has completed - * - * @param port USB-C port number - */ -void pe_vconn_swap_complete(int port); - -/** - * Indicates if an explicit contract is in place - * - * @param port USB-C port number - * @return 1 if an explicit contract is in place, else 0 - */ -int pe_is_explicit_contract(int port); - -/* - * Return true if port partner is dualrole capable - * - * @param port USB-C port number - */ -int pd_is_port_partner_dualrole(int port); - -/* - * Informs the Policy Engine that it should invalidate the - * explicit contract. - * - * @param port USB-C port number - */ -void pe_invalidate_explicit_contract(int port); - -/* - * Return true if the PE is in middle of a fast role swap (FRS). If so, the - * Rp/Rd will be flipped from the actual power roles. - * - * - * @param port USB-C port number - */ -bool pe_in_frs_mode(int port); - -/* - * Return true if the PE is is within an atomic - * messaging sequence that it initiated with a SOP* port partner. - * - * Note the PRL layer polls this instead of using AMS_START and AMS_END - * notification from the PE that is called out by the spec - * - * @param port USB-C port number - */ -bool pe_in_local_ams(int port); - -/** - * Returns the name of the current PE state - * - * @param port USB-C port number - * @return name of current pe state - */ -const char *pe_get_current_state(int port); - -/** - * Returns the flag mask of the PE state machine - * - * @param port USB-C port number - * @return flag mask of the pe state machine - */ -uint32_t pe_get_flags(int port); - -#ifdef TEST_BUILD -/** - * Clears all internal port data, as we would on a detach event - * - * @param port USB-C port number - */ -void pe_clear_port_data(int port); -#endif /* TEST_BUILD */ - -#endif /* __CROS_EC_USB_PE_H */ diff --git a/include/usb_prl_sm.h b/include/usb_prl_sm.h deleted file mode 100644 index 6607bd2824..0000000000 --- a/include/usb_prl_sm.h +++ /dev/null @@ -1,139 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Protocol Layer module */ - -#ifndef __CROS_EC_USB_PRL_H -#define __CROS_EC_USB_PRL_H -#include "common.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" -#include "usb_sm.h" -#include "timer.h" -#include "usb_pd_tcpm.h" - -/** - * Returns TX success time stamp. - * - * @param port USB-C port number - * @return the time stamp of TCPC tx success. - **/ -timestamp_t prl_get_tcpc_tx_success_ts(int port); - -/** - * Returns true if Protocol Layer State Machine is in run mode - * - * @param port USB-C port number - * @return 1 if state machine is running, else 0 - */ -int prl_is_running(int port); - -/** - * Returns true if the Protocol Layer State Machine is in the - * process of transmitting or receiving chunked messages. - * - * @param port USB-C port number - * @return true if sending or receiving a chunked message, else false - */ -bool prl_is_busy(int port); - -/** - * Sets the debug level for the PRL layer - * - * @param level debug level - */ -void prl_set_debug_level(enum debug_level level); - -/** - * Resets the Protocol Layer state machine but does not reset the stored PD - * revisions of the partners. - * - * @param port USB-C port number - */ -void prl_reset_soft(int port); - -/** - * resets the stored pd revisions for each sop type to their default value, the - * highest revision supported by this implementation. per pd r3.0 v2.0, - * ss6.2.1.1.5, this should only happen upon detach, hard reset, or error - * recovery. - * - * @param port USB-C port number - */ -void prl_set_default_pd_revision(int port); - -/** - * Runs the Protocol Layer State Machine - * - * @param port USB-C port number - * @param evt system event, ie: PD_EVENT_RX - * @param en 0 to disable the machine, 1 to enable the machine - */ -void prl_run(int port, int evt, int en); - -/** - * Set the PD revision - * - * @param port USB-C port number - * @param type port address - * @param rev revision - */ -void prl_set_rev(int port, enum tcpci_msg_type type, - enum pd_rev_type rev); - -/** - * Get the PD revision - * - * @param port USB-C port number - * @param type port address - * @return pd rev - */ -enum pd_rev_type prl_get_rev(int port, enum tcpci_msg_type type); - -/** - * Sends a PD control message - * - * @param port USB-C port number - * @param type Transmit type - * @param msg Control message type - */ -void prl_send_ctrl_msg(int port, enum tcpci_msg_type type, - enum pd_ctrl_msg_type msg); - -/** - * Sends a PD data message - * - * @param port USB-C port number - * @param type Transmit type - * @param msg Data message type - */ -void prl_send_data_msg(int port, enum tcpci_msg_type type, - enum pd_data_msg_type msg); - -/** - * Sends a PD extended data message - * - * @param port USB-C port number - * @param type Transmit type - * @param msg Extended data message type - */ -void prl_send_ext_data_msg(int port, enum tcpci_msg_type type, - enum pd_ext_msg_type msg); - -/** - * Informs the Protocol Layer that a hard reset has completed - * - * @param port USB-C port number - */ -void prl_hard_reset_complete(int port); - -/** - * Policy Engine calls this function to execute a hard reset. - * - * @param port USB-C port number - */ -void prl_execute_hard_reset(int port); - -#endif /* __CROS_EC_USB_PRL_H */ diff --git a/include/usb_sm.h b/include/usb_sm.h deleted file mode 100644 index 2b5939bc04..0000000000 --- a/include/usb_sm.h +++ /dev/null @@ -1,113 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB State Machine Framework */ - -#ifndef __CROS_EC_USB_SM_H -#define __CROS_EC_USB_SM_H - -#include "compiler.h" /* for typeof() on Zephyr */ - -/* Function pointer that implements a portion of a usb state */ -typedef void (*state_execution)(const int port); - -/* - * General usb state that can be used in multiple state machines. - * - * entry - Optional method that will be run when this state is entered - * run - Optional method that will be run repeatedly during state machine loop - * exit - Optional method that will be run when this state exists - * parent- Optional parent usb_state that contains common entry/run/exit - * implementation among various child usb_states. - * entry: Parent function executes BEFORE child function. - * run: Parent function executes AFTER child function. - * exit: Parent function executes AFTER child function. - * - * Note: When transitioning between two child states with a shared parent, - * that parent's exit and entry functions do not execute. - */ -struct usb_state { - const state_execution entry; - const state_execution run; - const state_execution exit; - const struct usb_state *parent; -}; - -typedef const struct usb_state *usb_state_ptr; - -/* Defines the current context of the usb statemachine. */ -struct sm_ctx { - usb_state_ptr current; - usb_state_ptr previous; - /* We use intptr_t type to accommodate host tests ptr size variance */ - intptr_t internal[2]; -}; - -/* Local state machine states */ -enum sm_local_state { - SM_INIT = 0, /* Ensure static variables initialize to SM_INIT */ - SM_RUN, - SM_PAUSED, -}; - -/* - * A state machine can use these debug levels to regulate the amount of debug - * information printed on the EC console - * - * The states currently defined are - * Level 0: disabled - * Level 1: state names - * - * Note that higher log level causes timing changes and thus may affect - * performance. - */ -enum debug_level { - DEBUG_DISABLE, - DEBUG_LEVEL_1, - DEBUG_LEVEL_2, - DEBUG_LEVEL_3, - DEBUG_LEVEL_MAX = DEBUG_LEVEL_3 -}; - -/** - * Changes a state machines state. This handles exiting the previous state and - * entering the target state. A common parent state will not exited nor be - * re-entered. - * - * @param port USB-C port number - * @param ctx State machine context - * @param new_state State to transition to (NULL is valid and exits all states) - */ -void set_state(int port, struct sm_ctx *ctx, usb_state_ptr new_state); - -/** - * Runs one iteration of a state machine (including any parent states) - * - * @param port USB-C port number - * @param ctx State machine context - */ -void run_state(int port, struct sm_ctx *ctx); - -#ifdef TEST_BUILD -/* - * Struct for test builds that allow unit tests to easily iterate through - * state machines - */ -struct test_sm_data { - /* Base pointer of the state machine array */ - const usb_state_ptr base; - /* Size fo the state machine array above */ - const int size; - /* The array of names for states, can be NULL */ - const char * const * const names; - /* The size of the above names array */ - const int names_size; -}; -#endif - -/* Creates a state machine state that will never link. Useful with IS_ENABLED */ -#define GEN_NOT_SUPPORTED(state) extern typeof(state) state ## _NOT_SUPPORTED - -#endif /* __CROS_EC_USB_SM_H */ diff --git a/include/usb_tbt_alt_mode.h b/include/usb_tbt_alt_mode.h deleted file mode 100644 index 1ea4828059..0000000000 --- a/include/usb_tbt_alt_mode.h +++ /dev/null @@ -1,105 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* - * Thunderbolt alternate mode support - * Refer to USB Type-C Cable and Connector Specification Release 2.0 Section F - */ - -#ifndef __CROS_EC_USB_TBT_ALT_MODE_H -#define __CROS_EC_USB_TBT_ALT_MODE_H - -#include <stdint.h> - -#include "tcpm/tcpm.h" -#include "usb_pd_tcpm.h" - -/* - * Initialize Thunderbolt state for the specified port. - * - * @param port USB-C port number - */ -void tbt_init(int port); - -/* - * Requests to exit the Thunderbolt alternate mode - * - * @param port USB-C port number - */ -void tbt_exit_mode_request(int port); - -/* - * Checks whether Thunderbolt cable mode entry is required prior to entering - * USB4. - * - * @param port USB-C port number - * @return True if Thunderbolt cable mode entry is required - * False otherwise - */ -bool tbt_cable_entry_required_for_usb4(int port); - -/* - * Checks whether the mode entry sequence for Thunderbolt alternate mode is - * done for a port. - * - * @param port USB-C port number - * @return True if entry sequence for Thunderbolt mode is completed - * False otherwise - */ -bool tbt_entry_is_done(int port); - -/* - * Checks if the cable entry into Thunderbolt alternate mode is done - * - * @param port USB-C port number - * @return True if TBT_FLAG_CABLE_ENTRY_DONE is set - * False otherwise - */ -bool tbt_cable_entry_is_done(int port); - -/* - * Returns True if Thunderbolt mode is not in inactive state - * - * @param port USB-C port number - * @return True if Thunderbolt mode is not in inactive state - * False otherwise - */ -bool tbt_is_active(int port); - -/* - * Handles received Thunderbolt VDM ACKs. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for received ACK - * @param vdo_count The number of VDOs in the ACK VDM - * @param vdm VDM from ACK - */ -void intel_vdm_acked(int port, enum tcpci_msg_type type, int vdo_count, - uint32_t *vdm); - -/* - * Handles NAKed (or Not Supported or timed out) Thunderbolt VDM requests. - * - * @param port USB-C port number - * @param type Transmit type (SOP, SOP') for request - * @param svid The SVID of the request - * @param vdm_cmd The VDM command of the request - */ -void intel_vdm_naked(int port, enum tcpci_msg_type type, uint8_t vdm_cmd); - -/* - * Construct the next Thunderbolt VDM that should be sent. - * - * @param port USB-C port number - * @param vdo_count The number of VDOs in vdm; must be at least VDO_MAX_SIZE - * @param vdm The VDM payload to be sent; output; must point to at least - * VDO_MAX_SIZE elements - * @param tx_type Transmit type(SOP, SOP', SOP'') for next VDM to be sent - * @return The number of VDOs written to VDM or -1 to indicate error - */ -int tbt_setup_next_vdm(int port, int vdo_count, uint32_t *vdm, - enum tcpci_msg_type *tx_type); - -#endif diff --git a/include/usb_tc_sm.h b/include/usb_tc_sm.h deleted file mode 100644 index 71b895b78f..0000000000 --- a/include/usb_tc_sm.h +++ /dev/null @@ -1,397 +0,0 @@ -/* Copyright 2019 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* USB Type-C module */ - -#ifndef __CROS_EC_USB_TC_H -#define __CROS_EC_USB_TC_H - -#include "usb_sm.h" -#include "usb_pd.h" -#include "usb_pd_tcpm.h" - -enum try_src_override_t { - TRY_SRC_OVERRIDE_OFF, - TRY_SRC_OVERRIDE_ON, - TRY_SRC_NO_OVERRIDE -}; - -/* - * Type C supply voltage (mV) - * - * This is the maximum voltage a sink can request - * while charging. - */ -#define TYPE_C_VOLTAGE 5000 /* mV */ - -/* - * Type C default sink current (mA) - * - * This is the maximum current a sink can draw if charging - * while in the Audio Accessory State. - */ -#define TYPE_C_AUDIO_ACC_CURRENT 500 /* mA */ - -/** - * Returns true if TypeC State machine is in attached source state. - * - * @param port USB-C port number - * @return 1 if in attached source state, else 0 - */ -int tc_is_attached_src(int port); - -/** - * Returns true if TypeC State machine is in attached sink state. - * - * @param port USB-C port number - * @return 1 if in attached source state, else 0 - */ -int tc_is_attached_snk(int port); - -/** - * Get cable plug setting. This should be constant per build. This replaces - * the power role bit in PD header for SOP' and SOP" packets. - * - * @param port USB-C port number - * @return PD cable plug setting - */ -enum pd_cable_plug tc_get_cable_plug(int port); - -/** - * Get current polarity - * - * @param port USB-C port number - * @return 0 for CC1 as primary, 1 for CC2 as primary - */ -uint8_t tc_get_polarity(int port); - -/** - * Get Power Deliever communication state. If disabled, both protocol and policy - * engine are disabled and should not run. - * - * @param port USB-C port number - * @return 0 if pd is disabled, 1 is pd is enabled - */ -uint8_t tc_get_pd_enabled(int port); - -/** - * Set the power role - * - * @param port USB-C port number - * @param role power role - */ -void tc_set_power_role(int port, enum pd_power_role role); - -/** - * Set the data role - * - * @param port USB-C port number - * @param role data role - */ -void tc_set_data_role(int port, enum pd_data_role role); - -/** - * Sets the USB Mux depending on current data role - * Mux is connected except when: - * 1) PD is disconnected - * 2) Current data role is UFP and we only support DFP - * - * @param port USB-C port number - */ -void set_usb_mux_with_current_data_role(int port); - -/** - * Policy Engine informs the Type-C state machine if the port partner - * is dualrole power. - * - * @param port USB_C port number - * @param en 1 if port partner is dualrole power, else 0 - */ -void tc_partner_dr_power(int port, int en); - -/** - * Policy Engine informs the Type-C state machine if the port partner - * has unconstrained power - * - * @param port USB_C port number - * @param en 1 if port partner has unconstrained power, else 0 - */ -void tc_partner_unconstrainedpower(int port, int en); - -/** - * Policy Engine informs the Type-C state machine if the port partner - * is USB comms. - * - * @param port USB_C port number - * @param en 1 if port partner is USB comms, else 0 - */ -void tc_partner_usb_comm(int port, int en); - -/** - * Policy Engine informs the Type-C state machine if the port partner - * is dualrole data. - * - * @param port USB_C port number - * @param en 1 if port partner is dualrole data, else 0 - */ -void tc_partner_dr_data(int port, int en); - -/** - * Policy Engine informs the Type-C state machine if the port partner - * had a previous pd connection - * - * @param port USB_C port number - * @param en 1 if port partner had a previous pd connection, else 0 - */ -void tc_pd_connection(int port, int en); - -/** - * Initiates a Power Role Swap from Attached.SRC to Attached.SNK. This function - * has no effect if the current Type-C state is not Attached.SRC. - * - * @param port USB_C port number - */ -void tc_prs_src_snk_assert_rd(int port); - -/** - * Initiates a Power Role Swap from Attached.SNK to Attached.SRC. This function - * has no effect if the current Type-C state is not Attached.SNK. - * - * @param port USB_C port number - */ -void tc_prs_snk_src_assert_rp(int port); - -/** - * Informs the Type-C State Machine that a Power Role Swap is starting. - * This function is called from the Policy Engine. - * - * @parm port USB_C port number - */ -void tc_request_power_swap(int port); - -/** - * Informs the Type-C State Machine that a Power Role Swap is complete. - * This function is called from the Policy Engine. - * - * @param port USB_C port number - * @param success swap completed normally - */ -void tc_pr_swap_complete(int port, bool success); - -/** - * Instructs the Attached.SNK to stop drawing power. This function is called - * from the Policy Engine and only has effect if the current Type-C state - * Attached.SNK. - * - * @param port USB_C port number - */ -void tc_snk_power_off(int port); - -/** - * Instructs the Attached.SRC to stop supplying power. The function has - * no effect if the current Type-C state is not Attached.SRC. - * - * @param port USB_C port number - */ -void tc_src_power_off(int port); - -/** - * Instructs the Attached.SRC to start supplying power. The function has - * no effect if the current Type-C state is not Attached.SRC. - * - * @param port USB_C port number - */ -int tc_src_power_on(int port); - -/** - * Tests if a VCONN Swap is possible. - * - * @param port USB_C port number - * @return 1 if vconn swap is possible, else 0 - */ -int tc_check_vconn_swap(int port); - -/** - * Checks if VCONN is being sourced. - * - * @param port USB_C port number - * @return 1 if vconn is being sourced, 0 if it's not. - */ -int tc_is_vconn_src(int port); - -/** - * Instructs the Attached.SRC or Attached.SNK to start sourcing VCONN. - * This function is called from the Policy Engine and only has effect - * if the current Type-C state Attached.SRC or Attached.SNK. - * - * @param port USB_C port number - */ -void pd_request_vconn_swap_on(int port); - -/** - * Instructs the Attached.SRC or Attached.SNK to stop sourcing VCONN. - * This function is called from the Policy Engine and only has effect - * if the current Type-C state Attached.SRC or Attached.SNK. - * - * @param port USB_C port number - */ -void pd_request_vconn_swap_off(int port); - -/** - * Returns the polarity of a Sink. - * - * @param cc1 value of CC1 set by tcpm_get_cc - * @param cc2 value of CC2 set by tcpm_get_cc - * @return 0 if cc1 is connected, else 1 for cc2 - */ -enum tcpc_cc_polarity get_snk_polarity(enum tcpc_cc_voltage_status cc1, - enum tcpc_cc_voltage_status cc2); - -/** - * Called by the state machine framework to initialize the - * TypeC state machine - * - * @param port USB-C port number - */ -void tc_state_init(int port); - -/** - * Called by the state machine framework to handle events - * that affect the state machine as a whole - * - * @param port USB-C port number - * @param evt event - */ -void tc_event_check(int port, int evt); - -/** - * Runs the TypeC layer statemachine - * - * @param port USB-C port number - */ -void tc_run(const int port); - -/** - * Sets the debug level for the TC layer - * - * @param level debug level - */ -void tc_set_debug_level(enum debug_level level); - -/** - * Start error recovery - * - * @param port USB-C port number - */ -void tc_start_error_recovery(int port); - -/** - * Hard Reset the TypeC port - * - * @param port USB-C port number - */ -void tc_hard_reset_request(int port); - -/** - * Hard Reset is complete for the TypeC port - * - * @param port USB-C port number - */ -void tc_hard_reset_complete(int port); - -/** - * Start the state machine event loop - * - * @param port USB-C port number - */ -void tc_start_event_loop(int port); - -/** - * Pauses the state machine event loop - * - * @param port USB-C port number - */ -void tc_pause_event_loop(int port); - -/** - * Determine if the state machine event loop is paused - * - * @param port USB-C port number - * @return true if paused, else false - */ -bool tc_event_loop_is_paused(int port); - -/** - * Allow system to override the control of TrySrc - * - * @param en TRY_SRC_OVERRIDE_OFF - Force TrySrc OFF - * TRY_SRC_OVERRIDE_ON - Force TrySrc ON - * TRY_SRC_NO_OVERRIDE - Allow state machine to control TrySrc - */ -void tc_try_src_override(enum try_src_override_t ov); - -/** - * Get state of try_src_override - * - * @return TRY_SRC_OVERRIDE_OFF - TrySrc is forced OFF - * TRY_SRC_OVERRIDE_ON - TrySrc is forced ON - * TRY_SRC_NO_OVERRIDE - TypeC state machine controls TrySrc - */ -enum try_src_override_t tc_get_try_src_override(void); - -/** - * Returns the name of the current typeC state - * - * @param port USB-C port number - * @return name of current typeC state - */ -const char *tc_get_current_state(int port); - -/** - * Returns the flag mask of the typeC state machine - * - * @param port USB-C port number - * @return flag mask of the typeC state machine - */ -uint32_t tc_get_flags(int port); - -/** - * USB retimer firmware update set run flag - * Setting this flag indicates firmware update operations can be - * processed unconditionally. - * - * @param port USB-C port number - */ -void tc_usb_firmware_fw_update_run(int port); - -/** - * USB retimer firmware update set limited run flag - * Setting this flag indicates firmware update operations can be - * processed under limitation: PD task has to be suspended. - * - * @param port USB-C port number - */ -void tc_usb_firmware_fw_update_limited_run(int port); - -#ifdef CONFIG_USB_CTVPD - -/** - * Resets the charge-through support timer. This can be - * called many times but the support timer will only - * reset once, while in the Attached.SNK state. - * - * @param port USB-C port number - */ -void tc_reset_support_timer(int port); - -#else - -/** - * - */ -void tc_ctvpd_detected(int port); -#endif /* CONFIG_USB_CTVPD */ -#endif /* __CROS_EC_USB_TC_H */ - diff --git a/include/usbc_ocp.h b/include/usbc_ocp.h deleted file mode 100644 index d31ce57724..0000000000 --- a/include/usbc_ocp.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Copyright 2020 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_USBC_OCP_H -#define __CROS_EC_USBC_OCP_H - -/* Common APIs for USB Type-C Overcurrent Protection (OCP) Module */ - -/** - * Increment the overcurrent event counter. - * - * @param port: The Type-C port that has overcurrented. - * @return EC_SUCCESS on success, EC_ERROR_INVAL if non-existent port. - */ -int usbc_ocp_add_event(int port); - -/** - * Clear the overcurrent event counter - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, EC_ERROR_INVAL if non-existent port - */ -int usbc_ocp_clear_event_counter(int port); - -/** - * Is the port latched off due to multiple overcurrent events in succession? - * - * @param port: The Type-C port number. - * @return 1 if the port is latched off, 0 if it is not latched off. - */ -int usbc_ocp_is_port_latched_off(int port); - -/** - * Register a port as having a sink connected - * - * @param port: The Type-C port number. - * @param connected: true if sink is now connected on port - */ -void usbc_ocp_snk_is_connected(int port, bool connected); - -/** - * Board specific callback when a port overcurrents. - * - * @param port: The Type-C port which overcurrented. - * @param is_overcurrented: 1 if port overcurrented, 0 if the condition is gone. - */ -__override_proto void board_overcurrent_event(int port, int is_overcurrented); - -#endif /* !defined(__CROS_EC_USBC_OCP_H) */ diff --git a/include/usbc_ppc.h b/include/usbc_ppc.h deleted file mode 100644 index 8c18857961..0000000000 --- a/include/usbc_ppc.h +++ /dev/null @@ -1,314 +0,0 @@ -/* Copyright 2017 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __CROS_EC_USBC_PPC_H -#define __CROS_EC_USBC_PPC_H - -#include "common.h" -#include "usb_pd_tcpm.h" - -/* Common APIs for USB Type-C Power Path Controllers (PPC) */ - -/* The role of connected device. */ -enum ppc_device_role { - PPC_DEV_SNK, - PPC_DEV_SRC, - PPC_DEV_DISCONNECTED, -}; - -/* - * NOTE: The pointers to functions in the ppc_drv structure can now be NULL - * which will indicate and return NOT_IMPLEMENTED from the main calling - * function - */ -struct ppc_drv { - /** - * Initialize the PPC. - * - * @param port: The Type-C port number. - * @return EC_SUCCESS when init was successful, error otherwise. - */ - int (*init)(int port); - - /** - * Is the port sourcing Vbus? - * - * @param port: The Type-C port number. - * @return 1 if sourcing Vbus, 0 if not. - */ - int (*is_sourcing_vbus)(int port); - - /** - * Turn on/off the charge path FET, such that current flows into the - * system. - * - * @param port: The Type-C port number. - * @param enable: 1: Turn on the FET, 0: turn off the FET. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*vbus_sink_enable)(int port, int enable); - - /** - * Turn on/off the source path FET, such that current flows from the - * system. - * - * @param port: The Type-C port number. - * @param enable: 1: Turn on the FET, 0: turn off the FET. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*vbus_source_enable)(int port, int enable); - -#ifdef CONFIG_USBC_PPC_POLARITY - /** - * Inform the PPC of the polarity of the CC pins. - * - * @param port: The Type-C port number. - * @param polarity: 1: CC2 used for comms, 0: CC1 used for comms. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*set_polarity)(int port, int polarity); -#endif - - /** - * Set the Vbus source path current limit - * - * @param port: The Type-C port number. - * @param rp: The Rp value which to approximately set the current limit. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*set_vbus_source_current_limit)(int port, enum tcpc_rp_value rp); - - /** - * Discharge PD VBUS on src/sink disconnect & power role swap - * - * @param port: The Type-C port number. - * @param enable: 1 -> discharge vbus, 0 -> stop discharging vbus - * @return EC_SUCCESS on success, error otherwise. - */ - int (*discharge_vbus)(int port, int enable); - - /** - * Inform the PPC of the device is connected or disconnected. - * - * @param port: The Type-C port number. - * @param dev: PPC_DEV_SNK if a sink is connected, PPC_DEV_SRC if a - * source is connected, PPC_DEV_DISCONNECTED if the device - * is disconnected. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*dev_is_connected)(int port, enum ppc_device_role dev); - -#ifdef CONFIG_USBC_PPC_SBU - /** - * Turn on/off the SBU FETs. - * - * @param port: The Type-C port number. - * @param enable: 1: enable SBU FETs 0: disable SBU FETs. - */ - int (*set_sbu)(int port, int enable); -#endif /* CONFIG_USBC_PPC_SBU */ - -#ifdef CONFIG_USBC_PPC_VCONN - /** - * Turn on/off the VCONN FET. - * - * @param port: The Type-C port number. - * @param enable: 1: enable VCONN FET 0: disable VCONN FET. - */ - int (*set_vconn)(int port, int enable); -#endif - -#ifdef CONFIG_USB_PD_FRS_PPC - /** - * Turn on/off the FRS trigger - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise - */ - int (*set_frs_enable)(int port, int enable); -#endif - -#ifdef CONFIG_CMD_PPC_DUMP - /** - * Perform a register dump of the PPC. - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*reg_dump)(int port); -#endif /* defined(CONFIG_CMD_PPC_DUMP) */ - -#ifdef CONFIG_USB_PD_VBUS_DETECT_PPC - /** - * Determine if VBUS is present or not. - * - * @param port: The Type-C port number. - * @return 1 if VBUS is present, 0 if not. - */ - int (*is_vbus_present)(int port); -#endif /* defined(CONFIG_USB_PD_VBUS_DETECT_PPC) */ - - /** - * Optional method to put the PPC into its lowest power state. In this - * state it should still fire interrupts if Vbus changes etc. - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise. - */ - int (*enter_low_power_mode)(int port); -}; - -struct ppc_config_t { - int i2c_port; - uint16_t i2c_addr_flags; - const struct ppc_drv *drv; - int frs_en; -}; - -extern struct ppc_config_t ppc_chips[]; -extern unsigned int ppc_cnt; - -/** - * Common CPRINTS implementation so that PPC driver messages are consistent. - * - * @param string: message string to display on the console. - * @param port: The Type-C port number - */ -int ppc_prints(const char *string, int port); - -/** - * Common CPRINTS for PPC drivers with an error code. - * - * @param string: message string to display on the console. - * @param port: The Type-C port number - * @param error: The error code to display at the end of the message. - */ -int ppc_err_prints(const char *string, int port, int error); - -/** - * Discharge PD VBUS on src/sink disconnect & power role swap - * - * @param port: The Type-C port number. - * @param enable: 1 -> discharge vbus, 0 -> stop discharging vbus - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_discharge_vbus(int port, int enable); - -/** - * Initializes the PPC for the specified port. - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_init(int port); - -/** - * Is the port sourcing Vbus? - * - * @param port: The Type-C port number. - * @return 1 if sourcing Vbus, 0 if not. - */ -int ppc_is_sourcing_vbus(int port); - -/** - * Determine if VBUS is present or not. - * - * @param port: The Type-C port number. - * @return 1 if VBUS is present, 0 if not. - */ -int ppc_is_vbus_present(int port); - -/** - * Inform the PPC module that a device (either sink or source) is connected. - * - * This is used such that it can determine when to clear the overcurrent events, - * and disable discharge VBUS on a source device connected. - * @param port: The Type-C port number. - * @param dev: PPC_DEV_SNK if a sink is connected, PPC_DEV_SRC if a source is - * connected, PPC_DEV_DISCONNECTED if the device is disconnected. - */ -int ppc_dev_is_connected(int port, enum ppc_device_role dev); - -/** - * Inform the PPC of the polarity of the CC pins. - * - * @param port: The Type-C port number. - * @param polarity: 1: CC2 used for comms, 0: CC1 used for comms. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_set_polarity(int port, int polarity); - -/** - * Set the Vbus source path current limit - * - * @param port: The Type-C port number. - * @param rp: The Rp value which to approximately set the current limit. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp); - -/** - * Turn on/off the SBU FETs. - * - * @param port: The Type-C port number. - * @param enable: 1: enable SBU FETs 0: disable SBU FETs. - */ -int ppc_set_sbu(int port, int enable); - -/** - * Turn on/off the VCONN FET. - * - * @param port: The Type-C port number. - * @param enable: 1: enable VCONN FET 0: disable VCONN FET. - */ -int ppc_set_vconn(int port, int enable); - -/** - * Turn on/off the charge path FET, such that current flows into the - * system. - * - * @param port: The Type-C port number. - * @param enable: 1: Turn on the FET, 0: turn off the FET. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_vbus_sink_enable(int port, int enable); - -/** - * Turn on/off the source path FET, such that current flows from the - * system. - * - * @param port: The Type-C port number. - * @param enable: 1: Turn on the FET, 0: turn off the FET. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_vbus_source_enable(int port, int enable); - -/** - * Put the PPC into its lowest power state. In this state it should still fire - * interrupts if Vbus changes etc. This is called by board-specific code when - * appropriate. - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise. - */ -int ppc_enter_low_power_mode(int port); - -/** - * Board specific callback to check if the PPC interrupt is still asserted - * - * @param port: The Type-C port number to check - * @return 0 if interrupt is cleared, 1 if it is still on - */ -int ppc_get_alert_status(int port); - -/** - * Turn on/off the FRS trigger - * - * @param port: The Type-C port number. - * @return EC_SUCCESS on success, error otherwise - */ -int ppc_set_frs_enable(int port, int enable); - -#endif /* !defined(__CROS_EC_USBC_PPC_H) */ diff --git a/include/vboot_hash.h b/include/vboot_hash.h deleted file mode 100644 index 126872393e..0000000000 --- a/include/vboot_hash.h +++ /dev/null @@ -1,52 +0,0 @@ -/* Copyright 2012 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Verified boot hashing memory module for Chrome EC */ - -#ifndef __CROS_EC_VBOOT_HASH_H -#define __CROS_EC_VBOOT_HASH_H - -#include "common.h" - -/** - * Get hash of RW image. - * - * Your task will be blocked until hash computation is done. Hashing can be - * aborted only due to internal errors (e.g. read error) but not external - * causes. - * - * This is expected to be called before tasks are initialized. If it's called - * after tasks are started, it may starve lower priority tasks. - * - * See chromium:1047870 for some optimization. - * - * @param dst (OUT) Address where computed hash is stored. - * @return enum ec_error_list. - */ -int vboot_get_rw_hash(const uint8_t **dst); - -/** - * Invalidate the hash if the hashed data overlaps the specified region. - * - * @param offset Region start offset in flash - * @param size Size of region in bytes - * - * @return non-zero if the region overlapped the hashed region. - */ -int vboot_hash_invalidate(int offset, int size); - -/** - * Get vboot progress status. - * - * @return 1 if vboot hashing is in progress, 0 otherwise. - */ -int vboot_hash_in_progress(void); - -/** - * Abort hash currently in progress, and invalidate any completed hash. - */ -void vboot_hash_abort(void); - -#endif /* __CROS_EC_VBOOT_HASH_H */ diff --git a/include/wireless.h b/include/wireless.h deleted file mode 100644 index d209d69fed..0000000000 --- a/include/wireless.h +++ /dev/null @@ -1,29 +0,0 @@ -/* Copyright 2013 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -/* Wireless API for Chrome EC */ - -#ifndef __CROS_EC_WIRELESS_H -#define __CROS_EC_WIRELESS_H - -#include "common.h" - -/* Wireless power state for wireless_set_state() */ -enum wireless_power_state { - WIRELESS_OFF, - WIRELESS_SUSPEND, - WIRELESS_ON -}; - -/** - * Set wireless power state. - */ -#ifdef CONFIG_WIRELESS -void wireless_set_state(enum wireless_power_state state); -#else -static inline void wireless_set_state(enum wireless_power_state state) { } -#endif - -#endif /* __CROS_EC_WIRELESS_H */ |