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Diffstat (limited to 'zephyr/Kconfig.powerseq')
| -rw-r--r-- | zephyr/Kconfig.powerseq | 190 |
1 files changed, 0 insertions, 190 deletions
diff --git a/zephyr/Kconfig.powerseq b/zephyr/Kconfig.powerseq deleted file mode 100644 index 0045a69ad8..0000000000 --- a/zephyr/Kconfig.powerseq +++ /dev/null @@ -1,190 +0,0 @@ -# Copyright 2020 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -menuconfig PLATFORM_EC_POWERSEQ - bool "Power sequencing" - depends on AP - select HAS_TASK_CHIPSET - help - Enable shimming the platform/ec AP power sequencing code. This - handles powering the chipset on and off. - - Enabling this automatically enables HAS_TASK_CHIPSET since power - sequencing must run in its own task. - -if PLATFORM_EC_POWERSEQ - -config PLATFORM_EC_POWERSEQ_HOST_SLEEP - bool "Track host sleep states" - help - Enable EC code to track the AP sleep states. This is - required for S0ix support on Intel platforms, and optional - for boards without S0ix support. - -config PLATFORM_EC_POWER_SLEEP_FAILURE_DETECTION - bool "Detect failure to enter a sleep state (S0ix/S3)" - depends on PLATFORM_EC_POWERSEQ_HOST_SLEEP - help - Enables detection of the AP failing to go to sleep, perhaps due to a - bug in the internal SoC periodic housekeeping code. - - Failure information is reported via the EC_CMD_HOST_SLEEP_EVENT host - command. - -config PLATFORM_EC_HOSTCMD_AP_RESET - bool "Host command: EC_CMD_AP_RESET" - depends on PLATFORM_EC_HOSTCMD - help - Enable support for EC_CMD_AP_RESET, used by the AP to request that - the EC perform a reset of the AP. - - Warning: This command skips the normal reset mechanism on the AP and - may leave data unsaved. - -config PLATFORM_EC_POWERSEQ_PP5000_CONTROL - bool "Enable a task-safe way to control the PP5000 rail" - depends on !AP_X86_AMD - default y - help - Guard access to the PP5000 GPIO using mutex locks, allowing - the rail to be changed in a task-safe manner. - -menuconfig PLATFORM_EC_POWERSEQ_AMD - bool "AMD power sequencing" - depends on AP_X86_AMD - select HAS_TASK_POWERBTN - default y - help - Enable AMD power sequencing code. - -if PLATFORM_EC_POWERSEQ_AMD - -config PLATFORM_EC_POWER_BUTTON_TO_PCH_CUSTOM - bool "Custom board_pwrbtn_to_pch" - help - The board support code provides a custom function, - board_pwrbtn_to_pch, that replaces the standard GPIO set - level to the SoC. - -endif # PLATFORM_EC_POWERSEQ_AMD - -menuconfig PLATFORM_EC_POWERSEQ_INTEL - bool "Enable shimming common Intel power sequencing code" - depends on AP_X86_INTEL - select HAS_TASK_POWERBTN - default y - help - Enable shimming platform/ec AP power sequencing code for - Intel. - -if PLATFORM_EC_POWERSEQ_INTEL - -config PLATFORM_EC_POWERSEQ_CPU_PROCHOT_ACTIVE_LOW - bool "The CPU_PROCHOT signal is an active low signal" - default y - help - If CPU_PROCHOT should be treated as active-low, enable this - configuration option. - -config PLATFORM_EC_POWERSEQ_RSMRST_DELAY - bool "Wait at least 10ms before deasserting RSMRST to PCH" - default y if AP_X86_INTEL_TGL - help - Wait at least 10ms between power signals going high and - deasserting RSMRST to PCH. - -config PLATFORM_EC_POWERSEQ_RTC_RESET - bool "Board has an RTC reset" - help - This project has a gpio named GPIO_PCH_RTCRST defined in - gpio_map.h, which can be used to reset the AP's RTC when set - high. - -config PLATFORM_EC_POWERSEQ_S0IX - bool "Enable S0ix sleep states" - select PLATFORM_EC_POWERSEQ_HOST_SLEEP - help - Enable the CONFIG_POWER_S0IX platform/ec configuration - option, Intel's low-power idle sleep state, also known as - "modern sleep". - -config PLATFORM_EC_POWERSEQ_COMETLAKE - bool "Use common Comet Lake code for power sequencing" - depends on AP_X86_INTEL_CML - default y - help - Use the Comet Lake code for power sequencing. - -menuconfig PLATFORM_EC_POWERSEQ_ICELAKE - bool "Use common Icelake code for power sequencing" - default y if AP_X86_INTEL_TGL - default y if AP_X86_INTEL_ADL - help - Use the Icelake common code for power sequencing. Note that - this applies to more platforms than just Icelake. For - example, Tigerlake uses this code too. - -if PLATFORM_EC_POWERSEQ_ICELAKE - -config PLATFORM_EC_POWERSEQ_SLP_S3_L_OVERRIDE - bool "Enable a quirk to release SLP_S3_L after DSW_PWROK is high" - default y if AP_X86_INTEL_TGL - help - Enable a quirk to reconfigure SLP_S3_L back to an input a - short delay after DSW_PWROK goes high. - -config PLATFORM_EC_POWERSEQ_PP3300_RAIL_FIRST - bool "Turn on the PP3300 rail before PP5000" - default y if AP_X86_INTEL_TGL - help - When switching from G3 to S5, turn on the PP3300 rail before - the PP5500 rail. - -endif # PLATFORM_EC_POWERSEQ_ICELAKE - -endif # PLATFORM_EC_POWERSEQ_INTEL - -menuconfig PLATFORM_EC_POWERSEQ_IT8XXX2 - bool "Enable shimming common ITE8xxx2 power sequencing code" - depends on AP_ARM_MTK_MT8192 - default y - help - Enable shimming platform/ec AP power sequencing code for - IT8xxx2. - -if PLATFORM_EC_POWERSEQ_IT8XXX2 - -config PLATFORM_EC_POWERSEQ_MT8192 - bool "Use common MT8192 code for power sequencing" - default y - help - Use the Comet Lake code for power sequencing. - -endif # PLATFORM_EC_POWERSEQ_ITE8XXX2 - -config PLATFORM_EC_POWERSEQ_SC7180 - bool "SC7180 power sequencing" - depends on AP_ARM_QUALCOMM_SC7180 - default y - help - Enable power sequencing for the Qualcomm Snapdragon SC7180 - chipset. - -config PLATFORM_EC_POWERSEQ_SC7280 - bool "SC7280 power sequencing" - depends on AP_ARM_QUALCOMM_SC7280 - default y - help - Enable power sequencing for the Qualcomm Snapdragon SC7280 - chipset. - -config PLATFORM_EC_CONSOLE_CMD_S5_TIMEOUT - bool "Console command: s5_timeout" - help - Enable the console command 's5_timeout'. This command is used to - change the timeout waiting for inactivity in the S5 power state before - transitioning to the G3 state. This command is useful for power - testing. - -endif # PLATFORM_EC_POWERSEQ |