summaryrefslogtreecommitdiff
path: root/zephyr/drivers/cros_kb_raw
diff options
context:
space:
mode:
Diffstat (limited to 'zephyr/drivers/cros_kb_raw')
-rw-r--r--zephyr/drivers/cros_kb_raw/CMakeLists.txt4
-rw-r--r--zephyr/drivers/cros_kb_raw/Kconfig34
-rw-r--r--zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c187
-rw-r--r--zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c241
4 files changed, 0 insertions, 466 deletions
diff --git a/zephyr/drivers/cros_kb_raw/CMakeLists.txt b/zephyr/drivers/cros_kb_raw/CMakeLists.txt
deleted file mode 100644
index a9ef2b4bb2..0000000000
--- a/zephyr/drivers/cros_kb_raw/CMakeLists.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0
-
-zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_NPCX cros_kb_raw_npcx.c)
-zephyr_library_sources_ifdef(CONFIG_CROS_KB_RAW_ITE cros_kb_raw_ite.c)
diff --git a/zephyr/drivers/cros_kb_raw/Kconfig b/zephyr/drivers/cros_kb_raw/Kconfig
deleted file mode 100644
index a037cdd451..0000000000
--- a/zephyr/drivers/cros_kb_raw/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-menuconfig CROS_KB_RAW_NPCX
- bool "Nuvoton NPCX raw-keyboard-scan driver for the Zephyr shim"
- depends on SOC_FAMILY_NPCX
- default y
- help
- This option enables a driver for providing raw access to the
- keyboard-scan peripheral in the chip. This is used instead of the
- kscan interface so we can continue to use most of the existing
- keyboard-scanning code in ECOS.
-
-if CROS_KB_RAW_NPCX
-
-config CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE
- bool "Enable quasi-bidirectional buffers for KSO pins"
- help
- This option enables quasi-bidirectional buffers for KSO pins. The
- low-impedance high drive is active when ec changes the output data
- buffers from 0 to 1, thereby reducing the low-to-high transition time.
-
-endif # CROS_KB_RAW_NPCX
-
-menuconfig CROS_KB_RAW_ITE
- bool "ITE raw-keyboard-scan driver for the Zephyr shim"
- depends on SOC_FAMILY_RISCV_ITE
- default y
- help
- This option enables a driver for providing raw access to the
- keyboard-scan peripheral in the chip. This is used instead of the
- kscan interface so we can continue to use most of the existing
- keyboard-scanning code in ECOS.
diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c
deleted file mode 100644
index 85b2a1a8ee..0000000000
--- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_ite.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#define DT_DRV_COMPAT ite_it8xxx2_cros_kb_raw
-
-#include <assert.h>
-#include <drivers/cros_kb_raw.h>
-#include <drivers/clock_control.h>
-#include <drivers/gpio.h>
-#include <kernel.h>
-#include <soc.h>
-#include <soc/ite_it8xxx2/reg_def_cros.h>
-
-#include "ec_tasks.h"
-#include "keyboard_raw.h"
-#include "task.h"
-
-#include <logging/log.h>
-LOG_MODULE_REGISTER(cros_kb_raw, LOG_LEVEL_ERR);
-
-#define KSOH_PIN_MASK (((1 << (KEYBOARD_COLS_MAX - 8)) - 1) & 0xff)
-
-/* Device config */
-struct cros_kb_raw_ite_config {
- /* keyboard scan controller base address */
- uintptr_t base;
- /* Keyboard scan input (KSI) wake-up irq */
- int irq;
-};
-
-/* Driver convenience defines */
-#define DRV_CONFIG(dev) ((const struct cros_kb_raw_ite_config *)(dev)->config)
-#define HAL_INSTANCE(dev) (struct kbs_reg *)(DRV_CONFIG(dev)->base)
-
-static int kb_raw_ite_init(const struct device *dev)
-{
- ARG_UNUSED(dev);
-
- /* Clock default is on */
- return 0;
-}
-
-/* Cros ec keyboard raw api functions */
-static int cros_kb_raw_ite_enable_interrupt(const struct device *dev,
- int enable)
-{
- const struct cros_kb_raw_ite_config *const config = DRV_CONFIG(dev);
-
- if (enable) {
- ECREG(IT8XXX2_WUC_WUESR3) = 0xFF;
- ite_intc_isr_clear(config->irq);
- irq_enable(config->irq);
- } else {
- irq_disable(config->irq);
- }
-
- return 0;
-}
-
-static int cros_kb_raw_ite_read_row(const struct device *dev)
-{
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
-
- /* Bits are active-low, so invert returned levels */
- return ((inst->KBS_KSI) ^ 0xff);
-}
-
-static int cros_kb_raw_ite_drive_column(const struct device *dev, int col)
-{
- int mask;
- unsigned int key;
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
-
- /* Tri-state all outputs */
- if (col == KEYBOARD_COLUMN_NONE)
- mask = 0xffff;
- /* Assert all outputs */
- else if (col == KEYBOARD_COLUMN_ALL)
- mask = 0;
- /* Assert a single output */
- else
- mask = 0xffff ^ BIT(col);
-#ifdef CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED
- /* KSO[2] is inverted. */
- mask ^= BIT(2);
-#endif
- inst->KBS_KSOL = mask & 0xff;
- /* critical section with interrupts off */
- key = irq_lock();
- /*
- * Because IT8XXX2_KBS_KSOH1 register is shared by keyboard scan
- * out and GPIO output mode, so we don't drive all KSOH pins
- * here (this depends on how many keyboard matrix output pin
- * we are using).
- */
- inst->KBS_KSOH1 = ((inst->KBS_KSOH1) & ~KSOH_PIN_MASK) |
- ((mask >> 8) & KSOH_PIN_MASK);
- /* restore interrupts */
- irq_unlock(key);
-
- return 0;
-}
-
-static void cros_kb_raw_ite_ksi_isr(const struct device *dev)
-{
- ARG_UNUSED(dev);
-
- /*
- * We clear IT8XXX2_IRQ_WKINTC irq status in
- * ite_intc_irq_handler(), after interrupt was fired.
- */
- /* W/C wakeup interrupt status for KSI[0-7] */
- ECREG(IT8XXX2_WUC_WUESR3) = 0xFF;
-
- /* Wake-up keyboard scan task */
- task_wake(TASK_ID_KEYSCAN);
-}
-
-static int cros_kb_raw_ite_init(const struct device *dev)
-{
- unsigned int key;
- const struct cros_kb_raw_ite_config *const config = DRV_CONFIG(dev);
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
-
- /* Ensure top-level interrupt is disabled */
- cros_kb_raw_ite_enable_interrupt(dev, 0);
-
- /*
- * bit2, Setting 1 enables the internal pull-up of the KSO[15:0] pins.
- * To pull up KSO[17:16], set the GPCR registers of their
- * corresponding GPIO ports.
- * bit0, Setting 1 enables the open-drain mode of the KSO[17:0] pins.
- */
- inst->KBS_KSOCTRL = (IT8XXX2_KBS_KSOPU | IT8XXX2_KBS_KSOOD);
- /* bit2, 1 enables the internal pull-up of the KSI[7:0] pins. */
- inst->KBS_KSICTRL = IT8XXX2_KBS_KSIPU;
-#ifdef CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED
- /* KSO[2] output high, others output low. */
- inst->KBS_KSOL = BIT(2);
- /* Enable KSO2's push-pull */
- inst->KBS_KSOLGCTRL |= IT8XXX2_KBS_KSO2GCTRL;
- inst->KBS_KSOLGOEN |= IT8XXX2_KBS_KSO2GOEN;
-#else
- /* KSO[7:0] pins output low. */
- inst->KBS_KSOL = 0x00;
-#endif
- /* critical section with interrupts off */
- key = irq_lock();
- /*
- * KSO[COLS_MAX:8] pins low.
- * NOTE: KSO[15:8] pins can part be enabled for keyboard function and
- * rest be configured as GPIO output mode. In this case that we
- * disable the ISR in critical section to avoid race condition.
- */
- inst->KBS_KSOH1 &= ~KSOH_PIN_MASK;
- /* restore interrupts */
- irq_unlock(key);
- /* Select falling-edge triggered of wakeup interrupt for KSI[0-7] */
- ECREG(IT8XXX2_WUC_WUEMR3) = 0xFF;
- /* W/C wakeup interrupt status for KSI[0-7] */
- ECREG(IT8XXX2_WUC_WUESR3) = 0xFF;
- ite_intc_isr_clear(config->irq);
- /* Enable wakeup interrupt for KSI[0-7] */
- ECREG(IT8XXX2_WUC_WUENR3) = 0xFF;
-
- IRQ_CONNECT(DT_INST_IRQN(0), 0, cros_kb_raw_ite_ksi_isr, NULL, 0);
-
- return 0;
-}
-
-static const struct cros_kb_raw_driver_api cros_kb_raw_ite_driver_api = {
- .init = cros_kb_raw_ite_init,
- .drive_colum = cros_kb_raw_ite_drive_column,
- .read_rows = cros_kb_raw_ite_read_row,
- .enable_interrupt = cros_kb_raw_ite_enable_interrupt,
-};
-
-static const struct cros_kb_raw_ite_config cros_kb_raw_cfg = {
- .base = DT_INST_REG_ADDR(0),
- .irq = DT_INST_IRQN(0),
-};
-
-DEVICE_DT_INST_DEFINE(0, kb_raw_ite_init, NULL, NULL, &cros_kb_raw_cfg,
- PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
- &cros_kb_raw_ite_driver_api);
diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c
deleted file mode 100644
index 00965b74ca..0000000000
--- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#define DT_DRV_COMPAT nuvoton_npcx_cros_kb_raw
-
-#include <assert.h>
-#include <dt-bindings/clock/npcx_clock.h>
-#include <drivers/cros_kb_raw.h>
-#include <drivers/clock_control.h>
-#include <drivers/gpio.h>
-#include <kernel.h>
-#include <soc.h>
-#include <soc/nuvoton_npcx/reg_def_cros.h>
-
-#include "ec_tasks.h"
-#include "keyboard_raw.h"
-#include "soc_miwu.h"
-#include "task.h"
-
-#include <logging/log.h>
-LOG_MODULE_REGISTER(cros_kb_raw, LOG_LEVEL_ERR);
-
-#define NPCX_MAX_KEY_COLS 18 /* Maximum rows of keyboard matrix */
-#define NPCX_MAX_KEY_ROWS 8 /* Maximum columns of keyboard matrix */
-#define NPCX_KB_ROW_MASK (BIT(NPCX_MAX_KEY_ROWS) - 1)
-
-/* Device config */
-struct cros_kb_raw_npcx_config {
- /* keyboard scan controller base address */
- uintptr_t base;
- /* clock configuration */
- struct npcx_clk_cfg clk_cfg;
- /* pinmux configuration */
- const uint8_t alts_size;
- const struct npcx_alt *alts_list;
- /* Keyboard scan input (KSI) wake-up irq */
- int irq;
- /* Size of keyboard inputs-wui mapping array */
- int wui_size;
- /* Mapping table between keyboard inputs and wui */
- struct npcx_wui wui_maps[];
-};
-
-/* Driver convenience defines */
-#define DRV_CONFIG(dev) ((const struct cros_kb_raw_npcx_config *)(dev)->config)
-#define HAL_INSTANCE(dev) (struct kbs_reg *)(DRV_CONFIG(dev)->base)
-
-/* Keyboard Scan local functions */
-static struct miwu_dev_callback ksi_callback[NPCX_MAX_KEY_ROWS];
-
-static void kb_raw_npcx_init_ksi_wui_callback(
- const struct device *dev, struct miwu_dev_callback *callback,
- const struct npcx_wui *wui, miwu_dev_callback_handler_t handler)
-{
- /* KSI signal which has no wake-up input source */
- if (wui->table == NPCX_MIWU_TABLE_NONE)
- return;
-
- /* Install callback function */
- npcx_miwu_init_dev_callback(callback, wui, handler, dev);
- npcx_miwu_manage_dev_callback(callback, 1);
-
- /* Configure MIWU setting and enable its interrupt */
- npcx_miwu_interrupt_configure(wui, NPCX_MIWU_MODE_EDGE,
- NPCX_MIWU_TRIG_BOTH);
- npcx_miwu_irq_enable(wui);
-}
-
-static int kb_raw_npcx_init(const struct device *dev)
-{
- const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
- const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE);
- int ret;
-
- /* Turn on device clock first and get source clock freq. */
- ret = clock_control_on(clk_dev,
- (clock_control_subsys_t *)&config->clk_cfg);
- if (ret < 0) {
- LOG_ERR("Turn on KSCAN clock fail %d", ret);
- return ret;
- }
-
- return 0;
-}
-
-/* Cros ec keyboard raw api functions */
-static int cros_kb_raw_npcx_enable_interrupt(const struct device *dev,
- int enable)
-{
- const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
-
- if (enable)
- irq_enable(config->irq);
- else
- irq_disable(config->irq);
-
- return 0;
-}
-
-static int cros_kb_raw_npcx_read_row(const struct device *dev)
-{
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
- int val;
-
- val = inst->KBSIN;
- LOG_DBG("rows raw %02x", val);
-
- /* 1 means key pressed, otherwise means key released. */
- return (~val & NPCX_KB_ROW_MASK);
-}
-
-static int cros_kb_raw_npcx_drive_column(const struct device *dev, int col)
-{
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
-
- /*
- * Nuvoton 'Keyboard Scan' module supports 18x8 matrix
- * It also support automatic scan functionality.
- */
- uint32_t mask, col_out;
-
- /* Add support for CONFIG_KEYBOARD_KSO_BASE shifting */
- col_out = col + CONFIG_KEYBOARD_KSO_BASE;
-
- /* Drive all lines to high. ie. Key detection is disabled. */
- if (col == KEYBOARD_COLUMN_NONE) {
- mask = ~0;
- if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
- gpio_set_level(GPIO_KBD_KSO2, 0);
- }
- }
- /* Drive all lines to low for detection any key press */
- else if (col == KEYBOARD_COLUMN_ALL) {
- mask = ~(BIT(keyboard_cols) - 1);
- if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
- gpio_set_level(GPIO_KBD_KSO2, 1);
- }
- }
- /* Drive one line to low for determining which key's state changed. */
- else {
- if (IS_ENABLED(CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED)) {
- if (col == 2)
- gpio_set_level(GPIO_KBD_KSO2, 1);
- else
- gpio_set_level(GPIO_KBD_KSO2, 0);
- }
- mask = ~BIT(col_out);
- }
-
- /* Set KBSOUT */
- inst->KBSOUT0 = (mask & 0xFFFF);
- inst->KBSOUT1 = ((mask >> 16) & 0x03);
-
- return 0;
-}
-
-static void cros_kb_raw_npcx_ksi_isr(const struct device *dev,
- struct npcx_wui *wui)
-{
- ARG_UNUSED(dev);
- ARG_UNUSED(wui);
-
- LOG_DBG("%s: KSI%d is changed", __func__, wui->bit);
- /* Wake-up keyboard scan task */
- task_wake(TASK_ID_KEYSCAN);
-}
-
-static int cros_kb_raw_npcx_init(const struct device *dev)
-{
- const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev);
- struct kbs_reg *const inst = HAL_INSTANCE(dev);
-
- /* Pull-up KBSIN0-7 internally */
- inst->KBSINPU = 0xFF;
-
- /*
- * Keyboard Scan Control Register
- *
- * [6:7] - KBHDRV KBSOUTn signals output buffers are open-drain.
- * [3] - KBSINC Auto-increment of Buffer Data register is disabled
- * [2] - KBSIEN Interrupt of Auto-Scan is disabled
- * [1] - KBSMODE Key detection mechanism is implemented by firmware
- * [0] - START Write 0 to this field is not affected
- */
- inst->KBSCTL = 0x00;
-
- /*
- * Select quasi-bidirectional buffers for KSO pins. It reduces the
- * low-to-high transition time. This feature only supports in npcx7.
- */
- if (IS_ENABLED(CONFIG_CROS_KB_RAW_NPCX_KSO_HIGH_DRIVE)) {
- SET_FIELD(inst->KBSCTL, NPCX_KBSCTL_KBHDRV_FIELD, 0x01);
- }
-
- /* Configure pin-mux for kscan device */
- npcx_pinctrl_mux_configure(config->alts_list, config->alts_size, 1);
-
- /* Drive all column lines to low for detection any key press */
- cros_kb_raw_npcx_drive_column(dev, KEYBOARD_COLUMN_ALL);
-
- /* Configure wake-up input and callback for keyboard input signal */
- for (int i = 0; i < ARRAY_SIZE(ksi_callback); i++)
- kb_raw_npcx_init_ksi_wui_callback(dev, &ksi_callback[i],
- &config->wui_maps[i],
- cros_kb_raw_npcx_ksi_isr);
-
- return 0;
-}
-
-static const struct cros_kb_raw_driver_api cros_kb_raw_npcx_driver_api = {
- .init = cros_kb_raw_npcx_init,
- .drive_colum = cros_kb_raw_npcx_drive_column,
- .read_rows = cros_kb_raw_npcx_read_row,
- .enable_interrupt = cros_kb_raw_npcx_enable_interrupt,
-};
-
-static const struct npcx_alt cros_kb_raw_alts[] = NPCX_DT_ALT_ITEMS_LIST(0);
-
-static const struct cros_kb_raw_npcx_config cros_kb_raw_cfg = {
- .base = DT_INST_REG_ADDR(0),
- .alts_size = ARRAY_SIZE(cros_kb_raw_alts),
- .alts_list = cros_kb_raw_alts,
- .clk_cfg = NPCX_DT_CLK_CFG_ITEM(0),
- .irq = DT_INST_IRQN(0),
- .wui_size = NPCX_DT_WUI_ITEMS_LEN(0),
- .wui_maps = NPCX_DT_WUI_ITEMS_LIST(0),
-};
-
-/* Verify there's exactly 1 enabled cros,kb-raw-npcx node. */
-BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) == 1);
-DEVICE_DT_INST_DEFINE(0, kb_raw_npcx_init, NULL, NULL, &cros_kb_raw_cfg,
- PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
- &cros_kb_raw_npcx_driver_api);
-
-/* KBS register structure check */
-NPCX_REG_SIZE_CHECK(kbs_reg, 0x010);
-NPCX_REG_OFFSET_CHECK(kbs_reg, KBSIN, 0x004);
-NPCX_REG_OFFSET_CHECK(kbs_reg, KBSOUT0, 0x006);
-NPCX_REG_OFFSET_CHECK(kbs_reg, KBS_BUF_INDX, 0x00a);