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-rw-r--r--zephyr/drivers/cros_shi/Kconfig11
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_it8xxx2.c18
-rw-r--r--zephyr/drivers/cros_shi/cros_shi_npcx.c20
3 files changed, 21 insertions, 28 deletions
diff --git a/zephyr/drivers/cros_shi/Kconfig b/zephyr/drivers/cros_shi/Kconfig
index 3b93ad48ee..ebcd937c7d 100644
--- a/zephyr/drivers/cros_shi/Kconfig
+++ b/zephyr/drivers/cros_shi/Kconfig
@@ -2,19 +2,17 @@
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
-if PLATFORM_EC_HOST_INTERFACE_SHI
-
config CROS_SHI_NPCX
bool
+ depends on SOC_FAMILY_NPCX
+ depends on PLATFORM_EC_HOST_INTERFACE_SHI
default y
- depends on DT_HAS_NUVOTON_NPCX_CROS_SHI_ENABLED
help
This option enables Serial Host Interface driver for the NPCX family
of processors. This is used for host-command communication on the
platform which AP is ARM-based SoC.
if CROS_SHI_NPCX
-
config CROS_SHI_MAX_REQUEST
hex "Max data size for the version 3 request packet"
default 0x220
@@ -40,8 +38,9 @@ endif # CROS_SHI_NPCX
config CROS_SHI_IT8XXX2
bool
+ depends on SOC_FAMILY_RISCV_ITE
+ depends on PLATFORM_EC_HOST_INTERFACE_SHI
default y
- depends on DT_HAS_ITE_IT8XXX2_CROS_SHI_ENABLED
help
This option enables spi host interface driver which is required to
communicate with the EC when the CPU is the ARM processor.
@@ -59,5 +58,3 @@ config CROS_SHI_IT8XXX2_INIT_PRIORITY
configuration these pins to alt function of SHI.
endif # CROS_SHI_IT8XXX2
-
-endif # PLATFORM_EC_HOST_INTERFACE_SHI
diff --git a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
index 15b5daf85b..ee6ce3f7a4 100644
--- a/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
+++ b/zephyr/drivers/cros_shi/cros_shi_it8xxx2.c
@@ -5,22 +5,20 @@
#define DT_DRV_COMPAT ite_it8xxx2_cros_shi
-#include "chipset.h"
-#include "console.h"
-#include "gpio/gpio_int.h"
-#include "host_command.h"
-
-#include <errno.h>
-
#include <zephyr/device.h>
-#include <zephyr/drivers/pinctrl.h>
-#include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
+#include <errno.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
-
#include <soc.h>
#include <soc_dt.h>
+#include <zephyr/drivers/pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/it8xxx2-pinctrl.h>
+
+#include "chipset.h"
+#include "console.h"
+#include "gpio/gpio_int.h"
+#include "host_command.h"
/* Console output macros */
#define CPRINTS(format, args...) cprints(CC_SPI, format, ##args)
diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c
index 79bc79db2e..ce3279288b 100644
--- a/zephyr/drivers/cros_shi/cros_shi_npcx.c
+++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c
@@ -5,24 +5,22 @@
#define DT_DRV_COMPAT nuvoton_npcx_cros_shi
-#include "host_command.h"
-#include "soc_miwu.h"
-#include "system.h"
-
-#include <assert.h>
-
#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <assert.h>
+#include <zephyr/dt-bindings/clock/npcx_clock.h>
#include <zephyr/drivers/clock_control.h>
-#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/pinctrl.h>
-#include <zephyr/dt-bindings/clock/npcx_clock.h>
-#include <zephyr/kernel.h>
-#include <zephyr/logging/log.h>
-
#include <drivers/cros_shi.h>
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/logging/log.h>
+#include <zephyr/kernel.h>
#include <soc.h>
#include <soc/nuvoton_npcx/reg_def_cros.h>
+#include "host_command.h"
+#include "soc_miwu.h"
+#include "system.h"
+
#ifdef CONFIG_CROS_SHI_NPCX_DEBUG
#define DEBUG_CPRINTS(format, args...) cprints(CC_SPI, format, ##args)
#define DEBUG_CPRINTF(format, args...) cprintf(CC_SPI, format, ##args)