diff options
Diffstat (limited to 'zephyr/projects/guybrush')
| -rw-r--r-- | zephyr/projects/guybrush/CMakeLists.txt | 17 | ||||
| -rw-r--r-- | zephyr/projects/guybrush/gpio.dts | 336 | ||||
| -rw-r--r-- | zephyr/projects/guybrush/include/gpio_map.h | 63 | ||||
| -rw-r--r-- | zephyr/projects/guybrush/power_signals.c | 95 | ||||
| -rw-r--r-- | zephyr/projects/guybrush/prj.conf | 47 | ||||
| -rw-r--r-- | zephyr/projects/guybrush/zmake.yaml | 13 |
6 files changed, 0 insertions, 571 deletions
diff --git a/zephyr/projects/guybrush/CMakeLists.txt b/zephyr/projects/guybrush/CMakeLists.txt deleted file mode 100644 index b565aad308..0000000000 --- a/zephyr/projects/guybrush/CMakeLists.txt +++ /dev/null @@ -1,17 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -cmake_minimum_required(VERSION 3.13.1) - -find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) -project(guybrush) - -zephyr_library_include_directories(include) - -set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/guybrush" CACHE PATH - "Path to the platform/ec baseboard directory") -set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/guybrush" CACHE PATH - "Path to the platform/ec board directory") - -zephyr_library_sources("power_signals.c") diff --git a/zephyr/projects/guybrush/gpio.dts b/zephyr/projects/guybrush/gpio.dts deleted file mode 100644 index 221b5f7182..0000000000 --- a/zephyr/projects/guybrush/gpio.dts +++ /dev/null @@ -1,336 +0,0 @@ -/ { - named-gpios { - compatible = "named-gpios"; - - ec_wp_l { - gpios = <&gpio5 0 GPIO_INPUT>; - label = "EC_WP_L"; - enum-name = "GPIO_WP_L"; - }; - ccd_mode_odl { - gpios = <&gpioc 6 GPIO_ODR_HIGH>; - label = "CCD_MODE_ODL"; - }; - ec_gsc_packet_mode { - gpios = <&gpiob 1 GPIO_OUT_LOW>; - label = "EC_GSC_PACKET_MODE"; - }; - mech_pwr_btn_odl { - gpios = <&gpiod 2 GPIO_INPUT>; - label = "MECH_PWR_BTN_ODL"; - enum-name = "GPIO_POWER_BUTTON_L"; - }; - ec_pwr_btn_odl { - gpios = <&gpio0 1 GPIO_INPUT>; - label = "EC_PWR_BTN_ODL"; - enum-name = "GPIO_EC_PWR_BTN_ODL"; - }; - slp_s3_l { - gpios = <&gpio6 1 GPIO_INPUT>; - label = "SLP_S3_L"; - enum-name = "GPIO_PCH_SLP_S3_L"; - }; - slp_s5_l { - gpios = <&gpio7 2 GPIO_INPUT>; - label = "SLP_S5_L"; - enum-name = "GPIO_PCH_SLP_S5_L"; - }; - slp_s3_s0i3_l { - gpios = <&gpio7 4 GPIO_INPUT>; - label = "SLP_S3_S0I3_L"; - enum-name = "GPIO_PCH_SLP_S0_L"; - }; - pg_pwr_s5 { - gpios = <&gpioc 0 GPIO_INPUT>; - label = "PG_PWR_S5"; - enum-name = "GPIO_S5_PGOOD"; - }; - pg_pcore_s0_r_od { - gpios = <&gpiob 6 GPIO_INPUT>; - label = "PG_PCORE_S0_R_OD"; - enum-name = "GPIO_S0_PGOOD"; - }; - acok_od { - gpios = <&gpio0 0 GPIO_INPUT>; - label = "ACOK_OD"; - enum-name = "GPIO_AC_PRESENT"; - }; - ec_pcore_int_odl { - gpios = <&gpiof 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PCORE_INT_ODL"; - enum-name = "GPIO_EC_PCORE_INT_ODL"; - }; - pg_groupc_s0_od { - gpios = <&gpioa 3 GPIO_INPUT>; - label = "PG_GROUPC_S0_OD"; - enum-name = "GPIO_PG_GROUPC_S0_OD"; - }; - pg_lpddr4x_s3_od { - gpios = <&gpio9 5 GPIO_INPUT>; - label = "PG_LPDDR4X_S3_OD"; - enum-name = "GPIO_PG_LPDDR4X_S3_OD"; - }; - en_pwr_s5 { - gpios = <&gpiob 7 GPIO_OUT_LOW>; - label = "EN_PWR_S5"; - enum-name = "GPIO_EN_PWR_A"; - }; - en_pwr_s0_r { - gpios = <&gpiof 1 GPIO_OUT_LOW>; - label = "EN_PWR_S0_R"; - enum-name = "GPIO_EN_PWR_S0_R"; - }; - en_pwr_pcore_s0_r { - gpios = <&gpioe 1 GPIO_OUT_LOW>; - label = "EN_PWR_PCORE_S0_R"; - enum-name = "GPIO_EN_PWR_PCORE_S0_R"; - }; - ec_entering_rw { - gpios = <&gpio6 6 GPIO_OUT_LOW>; - label = "EC_ENTERING_RW"; - enum-name = "GPIO_ENTERING_RW"; - }; - ec_sys_rst_l { - gpios = <&gpio7 6 GPIO_ODR_HIGH>; - label = "EC_SYS_RST_L"; - enum-name = "GPIO_SYS_RESET_L"; - }; - ec_soc_rsmrst_l { - gpios = <&gpioc 5 GPIO_OUT_LOW>; - label = "EC_SOC_RSMRST_L"; - enum-name = "GPIO_PCH_RSMRST_L"; - }; - ec_clr_cmos { - gpios = <&gpioa 1 GPIO_OUT_LOW>; - label = "EC_CLR_CMOS"; - }; - ec_mem_event { - gpios = <&gpioa 5 GPIO_OUT_LOW>; - label = "EC_MEM_EVENT"; - }; - ec_soc_pwr_btn_l { - gpios = <&gpio6 3 GPIO_OUT_HIGH>; - label = "EC_SOC_PWR_BTN_L"; - enum-name = "GPIO_PCH_PWRBTN_L"; - }; - ec_soc_pwr_good { - gpios = <&gpiod 3 GPIO_OUT_LOW>; - label = "EC_SOC_PWR_GOOD"; - enum-name = "GPIO_PCH_SYS_PWROK"; - }; - ec_soc_wake_l { - gpios = <&gpio0 3 GPIO_OUT_HIGH>; - label = "EC_SOC_WAKE_L"; - enum-name = "GPIO_EC_PCH_WAKE_ODL"; - }; - ec_soc_int_l { - gpios = <&gpio8 3 GPIO_OUT_HIGH>; - label = "EC_SOC_INT_L"; - }; - prochot_odl { - gpios = <&gpiod 5 GPIO_ODR_HIGH>; - label = "PROCHOT_ODL"; - enum-name = "GPIO_CPU_PROCHOT"; - }; - soc_alert_ec_l { - gpios = <&gpioe 2 GPIO_INPUT>; - label = "SOC_ALERT_EC_L"; - }; - soc_thermtrip_odl { - gpios = <&gpioe 5 GPIO_INPUT>; - label = "SOC_THERMTRIP_ODL"; - }; - usb_c0_tcpc_int_odl { - gpios = <&gpioe 0 GPIO_INPUT>; - label = "USB_C0_TCPC_INT_ODL"; - }; - usb_c1_tcpc_int_odl { - gpios = <&gpioc 7 GPIO_INPUT>; - label = "USB_C1_TCPC_INT_ODL"; - }; - usb_c0_ppc_int_odl { - gpios = <&gpio7 5 GPIO_INPUT>; - label = "USB_C0_PPC_INT_ODL"; - }; - usb_c1_ppc_int_odl { - gpios = <&gpiod 4 GPIO_INPUT>; - label = "USB_C1_PPC_INT_ODL"; - }; - usb_c0_bc12_int_odl { - gpios = <&gpioa 4 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "USB_C0_BC12_INT_ODL"; - }; - usb_c1_bc12_int_odl { - gpios = <&gpio9 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "USB_C1_BC12_INT_ODL"; - }; - usb_c0_c1_fault_odl { - gpios = <&gpio7 3 GPIO_ODR_HIGH>; - label = "USB_C0_C1_FAULT_ODL"; - }; - usb_c0_tcpc_rst_l { - gpios = <&gpio3 4 GPIO_OUT_HIGH>; - label = "USB_C0_TCPC_RST_L"; - }; - usb_c1_tcpc_rst_l { - gpios = <&gpio3 7 GPIO_OUT_HIGH>; - label = "USB_C1_TCPC_RST_L"; - }; - usb_c0_hpd { - gpios = <&gpiof 5 GPIO_OUT_LOW>; - label = "USB_C0_HPD"; - }; - usb_c1_hpd { - gpios = <&gpiof 4 GPIO_OUT_LOW>; - label = "USB_C1_HPD"; - }; - 3axis_int_l { - gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>; - label = "3AXIS_INT_L"; - }; - lid_open { - gpios = <&gpio0 2 GPIO_INPUT>; - label = "LID_OPEN"; - enum-name = "GPIO_LID_OPEN"; - }; - voldn_btn_odl { - gpios = <&gpioa 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "VOLDN_BTN_ODL"; - enum-name = "GPIO_VOLUME_DOWN_L"; - }; - volup_btn_odl { - gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "VOLUP_BTN_ODL"; - enum-name = "GPIO_VOLUME_UP_L"; - }; - ec_batt_pres_odl { - gpios = <&gpio9 4 GPIO_INPUT>; - label = "EC_BATT_PRES_ODL"; - }; - ec_disable_disp_bl { - gpios = <&gpioa 6 GPIO_OUT_HIGH>; - label = "EC_DISABLE_DISP_BL"; - }; - ec_i2c_usb_a0_c0_scl { - gpios = <&gpiob 5 GPIO_INPUT>; - label = "EC_I2C_USB_A0_C0_SCL"; - }; - ec_i2c_usb_a0_c0_sda { - gpios = <&gpiob 4 GPIO_INPUT>; - label = "EC_I2C_USB_A0_C0_SDA"; - }; - ec_i2c_usb_a1_c1_scl { - gpios = <&gpio9 0 GPIO_INPUT>; - label = "EC_I2C_USB_A1_C1_SCL"; - }; - ec_i2c_usb_a1_c1_sda { - gpios = <&gpio8 7 GPIO_INPUT>; - label = "EC_I2C_USB_A1_C1_SDA"; - }; - ec_i2c_batt_scl { - gpios = <&gpio9 2 GPIO_INPUT>; - label = "EC_I2C_BATT_SCL"; - }; - ec_i2c_batt_sda { - gpios = <&gpio9 1 GPIO_INPUT>; - label = "EC_I2C_BATT_SDA"; - }; - ec_i2c_usbc_mux_scl { - gpios = <&gpiod 1 GPIO_INPUT>; - label = "EC_I2C_USBC_MUX_SCL"; - }; - ec_i2c_usbc_mux_sda { - gpios = <&gpiod 0 GPIO_INPUT>; - label = "EC_I2C_USBC_MUX_SDA"; - }; - ec_i2c_power_scl { - gpios = <&gpiof 3 GPIO_INPUT>; - label = "EC_I2C_POWER_SCL"; - }; - ec_i2c_power_sda { - gpios = <&gpiof 2 GPIO_INPUT>; - label = "EC_I2C_POWER_SDA"; - }; - ec_i2c_cbi_scl { - gpios = <&gpio3 3 GPIO_INPUT>; - label = "EC_I2C_CBI_SCL"; - }; - ec_i2c_cbi_sda { - gpios = <&gpio3 6 GPIO_INPUT>; - label = "EC_I2C_CBI_SDA"; - }; - ec_i2c_sensor_scl { - gpios = <&gpioe 4 GPIO_INPUT>; - label = "EC_I2C_SENSOR_SCL"; - }; - ec_i2c_sensor_sda { - gpios = <&gpioe 3 GPIO_INPUT>; - label = "EC_I2C_SENSOR_SDA"; - }; - ec_i2c_soc_sic { - gpios = <&gpiob 3 GPIO_INPUT>; - label = "EC_I2C_SOC_SIC"; - }; - ec_i2c_soc_sid { - gpios = <&gpiob 2 GPIO_INPUT>; - label = "EC_I2C_SOC_SID"; - }; - en_kb_bl { - gpios = <&gpio9 7 GPIO_OUT_HIGH>; - label = "EN_KB_BL"; - }; - ec_kso_02_inv { - gpios = <&gpio1 7 GPIO_OUT_LOW>; - label = "EC_KSO_02_INV"; - enum-name = "GPIO_KBD_KSO2"; - }; - ec_espi_rst_l { - gpios = <&gpio5 4 GPIO_PULL_UP>; - label = "EC_ESPI_RST_L"; - }; - 6axis_int_l { - gpios = <&gpioa 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "6AXIS_INT_L"; - }; - tablet_mode { - gpios = <&gpioc 1 GPIO_INPUT>; - label = "TABLET_MODE"; - }; - ec_gpio56 { - gpios = <&gpio5 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIO56"; - }; - ec_ps2_clk { - gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_CLK"; - }; - ec_ps2_dat { - gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_DAT"; - }; - ec_ps2_rst { - gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PS2_RST"; - }; - ec_gpiob0 { - gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIOB0"; - }; - ec_gpio81 { - gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_GPIO81"; - }; - ec_flprg2 { - gpios = <&gpio8 6 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_FLPRG2"; - }; - ec_psl_gpo { - gpios = <&gpiod 7 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PSL_GPO"; - }; - ec_pwm7 { - gpios = <&gpio6 0 (GPIO_INPUT | GPIO_PULL_UP)>; - label = "EC_PWM7"; - }; - }; -}; diff --git a/zephyr/projects/guybrush/include/gpio_map.h b/zephyr/projects/guybrush/include/gpio_map.h deleted file mode 100644 index 5af244bead..0000000000 --- a/zephyr/projects/guybrush/include/gpio_map.h +++ /dev/null @@ -1,63 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __ZEPHYR_GPIO_MAP_H -#define __ZEPHYR_GPIO_MAP_H - -#include <devicetree.h> -#include <gpio_signal.h> - -/* Power input signals */ -enum power_signal { - X86_SLP_S0_N, /* SOC -> SLP_S3_S0I3_L */ - X86_SLP_S3_N, /* SOC -> SLP_S3_L */ - X86_SLP_S5_N, /* SOC -> SLP_S5_L */ - - X86_S0_PGOOD, /* PMIC -> S0_PWROK_OD */ - X86_S5_PGOOD, /* PMIC -> S5_PWROK */ - - /* Number of X86 signals */ - POWER_SIGNAL_COUNT, -}; - -/* - * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. - * - * Each GPIO_INT requires three parameters: - * gpio_signal - The enum gpio_signal for the interrupt gpio - * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) - * handler - The platform/ec interrupt handler. - * - * Ensure that this files includes all necessary headers to declare all - * referenced handler functions. - * - * For example, one could use the follow definition: - * #define EC_CROS_GPIO_INTERRUPTS \ - * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) - */ -#define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_LID_OPEN, GPIO_INT_EDGE_BOTH, lid_interrupt) \ - GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ - GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH, \ - power_button_interrupt) \ - GPIO_INT(GPIO_EC_PWR_BTN_ODL, GPIO_INT_EDGE_BOTH, \ - power_button_interrupt) \ - GPIO_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ - GPIO_INT(GPIO_PCH_SLP_S5_L, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_S5_PGOOD, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0) \ - GPIO_INT(GPIO_S0_PGOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt) \ - GPIO_INT(GPIO_EC_PCORE_INT_ODL, GPIO_INT_EDGE_BOTH, \ - power_signal_interrupt) \ - GPIO_INT(GPIO_PG_GROUPC_S0_OD, GPIO_INT_EDGE_BOTH, \ - baseboard_en_pwr_pcore_s0) \ - GPIO_INT(GPIO_PG_LPDDR4X_S3_OD, GPIO_INT_EDGE_BOTH, \ - baseboard_en_pwr_pcore_s0) \ - GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt) \ - GPIO_INT(GPIO_VOLUME_DOWN_L, GPIO_INT_EDGE_BOTH, button_interrupt) - -#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/guybrush/power_signals.c b/zephyr/projects/guybrush/power_signals.c deleted file mode 100644 index 7d5781d0cb..0000000000 --- a/zephyr/projects/guybrush/power_signals.c +++ /dev/null @@ -1,95 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "chipset.h" -#include "config.h" -#include "gpio.h" -#include "power.h" -#include "timer.h" - -/* Wake Sources */ -const enum gpio_signal hibernate_wake_pins[] = { - GPIO_LID_OPEN, - GPIO_AC_PRESENT, - GPIO_POWER_BUTTON_L, -}; -const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); - -/* Power Signal Input List */ -const struct power_signal_info power_signal_list[] = { - [X86_SLP_S0_N] = { - .gpio = GPIO_PCH_SLP_S0_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S0_DEASSERTED", - }, - [X86_SLP_S3_N] = { - .gpio = GPIO_PCH_SLP_S3_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S3_DEASSERTED", - }, - [X86_SLP_S5_N] = { - .gpio = GPIO_PCH_SLP_S5_L, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "SLP_S5_DEASSERTED", - }, - [X86_S0_PGOOD] = { - .gpio = GPIO_S0_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S0_PGOOD", - }, - [X86_S5_PGOOD] = { - .gpio = GPIO_S5_PGOOD, - .flags = POWER_SIGNAL_ACTIVE_HIGH, - .name = "S5_PGOOD", - }, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - -/** - * b/175324615: On G3->S5, wait for RSMRST_L to be deasserted before asserting - * PCH_PWRBTN_L. - */ -void board_pwrbtn_to_pch(int level) -{ - timestamp_t start; - const uint32_t timeout_rsmrst_rise_us = 30 * MSEC; - - /* Add delay for G3 exit if asserting PWRBTN_L and RSMRST_L is low. */ - if (!level && !gpio_get_level(GPIO_PCH_RSMRST_L)) { - start = get_time(); - do { - usleep(200); - if (gpio_get_level(GPIO_PCH_RSMRST_L)) - break; - } while (time_since32(start) < timeout_rsmrst_rise_us); - - if (!gpio_get_level(GPIO_PCH_RSMRST_L)) - ccprints("Error pwrbtn: RSMRST_L still low"); - - msleep(16); - } - gpio_set_level(GPIO_PCH_PWRBTN_L, level); -} - -void baseboard_en_pwr_pcore_s0(enum gpio_signal signal) -{ - - /* EC must AND signals PG_LPDDR4X_S3_OD and PG_GROUPC_S0_OD */ - gpio_set_level(GPIO_EN_PWR_PCORE_S0_R, - gpio_get_level(GPIO_PG_LPDDR4X_S3_OD) && - gpio_get_level(GPIO_PG_GROUPC_S0_OD)); -} - -void baseboard_en_pwr_s0(enum gpio_signal signal) -{ - - /* EC must AND signals SLP_S3_L and PG_PWR_S5 */ - gpio_set_level(GPIO_EN_PWR_S0_R, - gpio_get_level(GPIO_PCH_SLP_S3_L) && - gpio_get_level(GPIO_S5_PGOOD)); - - /* Now chain off to the normal power signal interrupt handler. */ - power_signal_interrupt(signal); -} diff --git a/zephyr/projects/guybrush/prj.conf b/zephyr/projects/guybrush/prj.conf deleted file mode 100644 index d9f2b31d2f..0000000000 --- a/zephyr/projects/guybrush/prj.conf +++ /dev/null @@ -1,47 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -CONFIG_CROS_EC=y -CONFIG_PLATFORM_EC=y -CONFIG_SHIMMED_TASKS=y -CONFIG_ESPI=y - -# Shell features -CONFIG_SHELL_HELP=y -CONFIG_SHELL_HISTORY=y -CONFIG_SHELL_TAB_AUTOCOMPLETION=y -CONFIG_KERNEL_SHELL=y - -CONFIG_PLATFORM_EC_VBOOT_EFS2=n - -# Power sequencing -CONFIG_AP=y -CONFIG_AP_X86_AMD=y -CONFIG_PLATFORM_EC_POWERSEQ=y -CONFIG_PLATFORM_EC_POWER_BUTTON_TO_PCH_CUSTOM=y -CONFIG_PLATFORM_EC_PORT80=y - -# Power button -CONFIG_PLATFORM_EC_POWER_BUTTON=y - -# External power -CONFIG_PLATFORM_EC_HOSTCMD=y -CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y -CONFIG_PLATFORM_EC_BACKLIGHT_LID=n -CONFIG_PLATFORM_EC_SWITCH=n - -# Lid switch -CONFIG_PLATFORM_EC_LID_SWITCH=y - -# Keyboard -CONFIG_PLATFORM_EC_KEYBOARD=y -CONFIG_PLATFORM_EC_KEYBOARD_COL2_INVERTED=y -CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y - -CONFIG_SYSCON=y - -# This is not yet supported -CONFIG_PLATFORM_EC_ADC=n -CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n -CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/guybrush/zmake.yaml b/zephyr/projects/guybrush/zmake.yaml deleted file mode 100644 index 386ff315bf..0000000000 --- a/zephyr/projects/guybrush/zmake.yaml +++ /dev/null @@ -1,13 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -board: npcx9 -dts-overlays: - - gpio.dts -supported-toolchains: - - coreboot-sdk - - zephyr -supported-zephyr-versions: - - v2.6 -output-type: npcx |