diff options
Diffstat (limited to 'zephyr/projects/herobrine/src')
| -rw-r--r-- | zephyr/projects/herobrine/src/board_chipset.c | 83 | ||||
| -rw-r--r-- | zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c | 36 | ||||
| -rw-r--r-- | zephyr/projects/herobrine/src/i2c.c | 17 | ||||
| -rw-r--r-- | zephyr/projects/herobrine/src/usb_pd_policy.c | 254 | ||||
| -rw-r--r-- | zephyr/projects/herobrine/src/usbc_config.c | 278 |
5 files changed, 668 insertions, 0 deletions
diff --git a/zephyr/projects/herobrine/src/board_chipset.c b/zephyr/projects/herobrine/src/board_chipset.c new file mode 100644 index 0000000000..2312bdb1c4 --- /dev/null +++ b/zephyr/projects/herobrine/src/board_chipset.c @@ -0,0 +1,83 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Herobrine chipset-specific configuration */ + +#include "charger.h" +#include "common.h" +#include "console.h" +#include "battery.h" +#include "gpio.h" +#include "hooks.h" +#include "timer.h" +#include "usb_pd.h" + +#include "board_chipset.h" + +#define CPRINTS(format, args...) cprints(CC_HOOK, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_HOOK, format, ##args) + +/* + * A window of PD negotiation. It starts from the Type-C state reaching + * Attached.SNK, and ends when the PD contract is created. The VBUS may be + * raised anytime in this window. + * + * The current implementation is the worst case scenario: every message the PD + * negotiation is received at the last moment before timeout. More extra time + * is added to compensate the delay internally, like the decision of the DPM. + * + * TODO(waihong): Cancel this timer when the PD contract is negotiated. + */ +#define PD_READY_TIMEOUT \ + (PD_T_SINK_WAIT_CAP + PD_T_SENDER_RESPONSE + PD_T_SINK_TRANSITION + \ + 20 * MSEC) + +#define PD_READY_POLL_DELAY (10 * MSEC) + +static timestamp_t pd_ready_timeout; + +static bool pp5000_inited; + +__test_only void reset_pp5000_inited(void) +{ + pp5000_inited = false; +} + +/* Called on USB PD connected */ +static void board_usb_pd_connect(void) +{ + int soc = -1; + + /* First boot, battery unattached or low SOC */ + if (!pp5000_inited && + ((battery_state_of_charge_abs(&soc) != EC_SUCCESS || + soc < charger_get_min_bat_pct_for_power_on()))) { + pd_ready_timeout = get_time(); + pd_ready_timeout.val += PD_READY_TIMEOUT; + } +} +DECLARE_HOOK(HOOK_USB_PD_CONNECT, board_usb_pd_connect, HOOK_PRIO_DEFAULT); + +static void wait_pd_ready(void) +{ + CPRINTS("Wait PD negotiated VBUS transition %u", + pd_ready_timeout.le.lo); + while (pd_ready_timeout.val && get_time().val < pd_ready_timeout.val) + usleep(PD_READY_POLL_DELAY); +} + +/* Called on AP S5 -> S3 transition */ +static void board_chipset_pre_init(void) +{ + if (!pp5000_inited) { + if (pd_ready_timeout.val) { + wait_pd_ready(); + } + CPRINTS("Enable 5V rail"); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pp5000_s5), 1); + pp5000_inited = true; + } +} +DECLARE_HOOK(HOOK_CHIPSET_PRE_INIT, board_chipset_pre_init, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c b/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c new file mode 100644 index 0000000000..00acd509f4 --- /dev/null +++ b/zephyr/projects/herobrine/src/herobrine/alt_dev_replacement.c @@ -0,0 +1,36 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include <zephyr/logging/log.h> +#include "usbc/ppc.h" +#include "hooks.h" +#include "cros_board_info.h" + +LOG_MODULE_REGISTER(alt_dev_replacement); + +#define BOARD_VERSION_UNKNOWN 0xffffffff + +/* Check board version to decide which ppc is used. */ +static bool board_has_alt_ppc(void) +{ + static uint32_t board_version = BOARD_VERSION_UNKNOWN; + + if (board_version == BOARD_VERSION_UNKNOWN) { + if (cbi_get_board_version(&board_version) != EC_SUCCESS) { + LOG_ERR("Failed to get board version."); + board_version = 0; + } + } + + return (board_version >= 1); +} + +static void check_alternate_devices(void) +{ + /* Configure the PPC driver */ + if (board_has_alt_ppc()) + /* Arg is the USB port number */ + PPC_ENABLE_ALTERNATE(0); +} +DECLARE_HOOK(HOOK_INIT, check_alternate_devices, HOOK_PRIO_DEFAULT); diff --git a/zephyr/projects/herobrine/src/i2c.c b/zephyr/projects/herobrine/src/i2c.c new file mode 100644 index 0000000000..88b722c42d --- /dev/null +++ b/zephyr/projects/herobrine/src/i2c.c @@ -0,0 +1,17 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "i2c/i2c.h" +#include "i2c.h" + +/* Herobrine-NPCX9 board specific i2c implementation */ + +#ifdef CONFIG_PLATFORM_EC_I2C_PASSTHRU_RESTRICTED +int board_allow_i2c_passthru(const struct i2c_cmd_desc_t *cmd_desc) +{ + return (i2c_get_device_for_port(cmd_desc->port) == + i2c_get_device_for_port(I2C_PORT_VIRTUAL_BATTERY)); +} +#endif diff --git a/zephyr/projects/herobrine/src/usb_pd_policy.c b/zephyr/projects/herobrine/src/usb_pd_policy.c new file mode 100644 index 0000000000..adc517d3cb --- /dev/null +++ b/zephyr/projects/herobrine/src/usb_pd_policy.c @@ -0,0 +1,254 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/drivers/gpio.h> + +#include "charge_manager.h" +#include "chipset.h" +#include "console.h" +#include "system.h" +#include "usb_mux.h" +#include "usbc_ppc.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +int pd_check_vconn_swap(int port) +{ + /* In G3, do not allow vconn swap since PP5000 rail is off */ + return gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_en_pp5000_s5)); +} + +static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT]; + +static void board_vbus_update_source_current(int port) +{ + ppc_vbus_source_enable(port, vbus_en[port]); +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + prev_en = vbus_en[port]; + + /* Disable VBUS */ + vbus_en[port] = 0; + board_vbus_update_source_current(port); + + /* Enable discharge if we were previously sourcing 5V */ + if (prev_en) + pd_set_vbus_discharge(port, 1); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_set_power_supply_ready(int port) +{ + /* Disable charging */ + board_vbus_sink_enable(port, 0); + + pd_set_vbus_discharge(port, 0); + + /* Provide VBUS */ + vbus_en[port] = 1; + board_vbus_update_source_current(port); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; /* we are ready */ +} + +int board_vbus_source_enabled(int port) +{ + return vbus_en[port]; +} + +int pd_snk_is_vbus_provided(int port) +{ + return tcpm_check_vbus_level(port, VBUS_PRESENT); +} + +/* ----------------- Vendor Defined Messages ------------------ */ +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +__override int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, TCPCI_MSG_SOP, USB_SID_DISPLAYPORT); + uint8_t pin_mode = get_dp_pin_mode(port); + + if (!pin_mode) + return 0; + + /* + * Defer setting the usb_mux until HPD goes high, svdm_dp_attention(). + * The AP only supports one DP phy. An external DP mux switches between + * the two ports. Should switch those muxes when it is really used, + * i.e. HPD high; otherwise, the real use case is preempted, like: + * (1) plug a dongle without monitor connected to port-0, + * (2) plug a dongle without monitor connected to port-1, + * (3) plug a monitor to the port-1 dongle. + */ + + payload[0] = + VDO(USB_SID_DISPLAYPORT, 1, CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + +__override void svdm_dp_post_config(int port) +{ + dp_flags[port] |= DP_FLAGS_DP_ON; +} + +/** + * Is the port fine to be muxed its DisplayPort lines? + * + * Only one port can be muxed to DisplayPort at a time. + * + * @param port Port number of TCPC. + * @return 1 is fine; 0 is bad as other port is already muxed; + */ +static int is_dp_muxable(int port) +{ + int i; + + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) + if (i != port) { + if (usb_mux_get(i) & USB_PD_MUX_DP_ENABLED) + return 0; + } + + return 1; +} + +__override int svdm_dp_attention(int port, uint32_t *payload) +{ + const struct gpio_dt_spec *hpd = + GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det_r); + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + int cur_lvl = gpio_pin_get_dt(hpd); + mux_state_t mux_state; + + dp_status[port] = payload[1]; + + if (!is_dp_muxable(port)) { + /* TODO(waihong): Info user? */ + CPRINTS("p%d: The other port is already muxed.", port); + return 0; + } + + /* + * Initial implementation to handle HPD. Only the first-plugged port + * works, i.e. sending HPD signal to AP. The second-plugged port + * will be ignored. + * + * TODO(waihong): Continue the above case, if the first-plugged port + * is then unplugged, switch to the second-plugged port and signal AP? + */ + if (lvl) { + /* + * Enable and switch the DP port selection mux to the + * correct port. + * + * TODO(waihong): Better to move switching DP mux to + * the usb_mux abstraction. + */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_sel), + port == 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_oe_l), 0); + + /* Connect the SBU lines in PPC chip. */ + if (IS_ENABLED(CONFIG_USBC_PPC_SBU)) + ppc_set_sbu(port, 1); + + /* + * Connect the USB SS/DP lines in TCPC chip. + * + * When mf_pref not true, still use the dock muxing + * because of the board USB-C topology (limited to 2 + * lanes DP). + */ + usb_mux_set(port, USB_PD_MUX_DOCK, USB_SWITCH_CONNECT, + polarity_rm_dts(pd_get_polarity(port))); + } else { + /* Disconnect the DP port selection mux. */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_oe_l), 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_sel), 0); + + /* Disconnect the SBU lines in PPC chip. */ + if (IS_ENABLED(CONFIG_USBC_PPC_SBU)) + ppc_set_sbu(port, 0); + + /* Disconnect the DP but keep the USB SS lines in TCPC chip. */ + usb_mux_set(port, USB_PD_MUX_USB_ENABLED, USB_SWITCH_CONNECT, + polarity_rm_dts(pd_get_polarity(port))); + } + + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && (irq || lvl)) + /* + * Wake up the AP. IRQ or level high indicates a DP sink is now + * present. + */ + pd_notify_dp_alt_mode_entry(port); + + /* Configure TCPC for the HPD event, for proper muxing */ + mux_state = (lvl ? USB_PD_MUX_HPD_LVL : USB_PD_MUX_HPD_LVL_DEASSERTED) | + (irq ? USB_PD_MUX_HPD_IRQ : USB_PD_MUX_HPD_IRQ_DEASSERTED); + usb_mux_hpd_update(port, mux_state); + + /* Signal AP for the HPD event, through GPIO to AP */ + if (irq & cur_lvl) { + uint64_t now = get_time().val; + /* Wait for the minimum spacing between IRQ_HPD if needed */ + if (now < svdm_hpd_deadline[port]) + usleep(svdm_hpd_deadline[port] - now); + + /* Generate IRQ_HPD pulse */ + CPRINTS("C%d: Recv IRQ. HPD->0", port); + gpio_pin_set_dt(hpd, 0); + usleep(HPD_DSTREAM_DEBOUNCE_IRQ); + gpio_pin_set_dt(hpd, 1); + CPRINTS("C%d: Recv IRQ. HPD->1", port); + + /* Set the minimum time delay (2ms) for the next HPD IRQ */ + svdm_hpd_deadline[port] = + get_time().val + HPD_USTREAM_DEBOUNCE_LVL; + } else if (irq & !lvl) { + CPRINTF("ERR:HPD:IRQ&LOW\n"); + return 0; + } else { + CPRINTS("C%d: Recv lvl. HPD->%d", port, lvl); + gpio_pin_set_dt(hpd, lvl); + /* Set the minimum time delay (2ms) for the next HPD IRQ */ + svdm_hpd_deadline[port] = + get_time().val + HPD_USTREAM_DEBOUNCE_LVL; + } + + return 1; +} + +__override void svdm_exit_dp_mode(int port) +{ + CPRINTS("%s(%d)", __func__, port); + if (is_dp_muxable(port)) { + /* Disconnect the DP port selection mux. */ + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_oe_l), 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_mux_sel), 0); + + /* Signal AP for the HPD low event */ + usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | + USB_PD_MUX_HPD_IRQ_DEASSERTED); + CPRINTS("C%d: DP exit. HPD->0", port); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_dp_hot_plug_det_r), + 0); + } +} +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ diff --git a/zephyr/projects/herobrine/src/usbc_config.c b/zephyr/projects/herobrine/src/usbc_config.c new file mode 100644 index 0000000000..f040ab12cb --- /dev/null +++ b/zephyr/projects/herobrine/src/usbc_config.c @@ -0,0 +1,278 @@ +/* Copyright 2021 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Herobrine board-specific USB-C configuration */ + +#include <zephyr/drivers/gpio.h> + +#include "charger.h" +#include "charger/isl923x_public.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "common.h" +#include "config.h" +#include "cros_board_info.h" +#include "gpio/gpio_int.h" +#include "hooks.h" +#include "ppc/sn5s330_public.h" +#include "ppc/syv682x_public.h" +#include "system.h" +#include "tcpm/ps8xxx_public.h" +#include "tcpm/tcpci.h" +#include "timer.h" +#include "usb_pd.h" +#include "usb_mux.h" +#include "usbc_ocp.h" +#include "usbc_ppc.h" +#include "usbc/ppc.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* GPIO Interrupt Handlers */ +void tcpc_alert_event(enum gpio_signal signal) +{ + int port = -1; + + switch (signal) { + case GPIO_USB_C0_PD_INT_ODL: + port = 0; + break; + case GPIO_USB_C1_PD_INT_ODL: + port = 1; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +static void usba_oc_deferred(void) +{ + /* Use next number after all USB-C ports to indicate the USB-A port */ + board_overcurrent_event( + CONFIG_USB_PD_PORT_MAX_COUNT, + !gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_a0_oc_odl))); +} +DECLARE_DEFERRED(usba_oc_deferred); + +void usba_oc_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&usba_oc_deferred_data, 0); +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_SWCTL_INT_ODL: + ppc_chips[0].drv->interrupt(0); + break; + + case GPIO_USB_C1_SWCTL_INT_ODL: + ppc_chips[1].drv->interrupt(1); + break; + + default: + break; + } +} + +int charger_profile_override(struct charge_state_data *curr) +{ + int usb_mv; + int port; + + if (curr->state != ST_CHARGE) + return 0; + + /* Lower the max requested voltage to 5V when battery is full. */ + if (chipset_in_state(CHIPSET_STATE_ANY_OFF) && + !(curr->batt.flags & BATT_FLAG_BAD_STATUS) && + !(curr->batt.flags & BATT_FLAG_WANT_CHARGE) && + (curr->batt.status & STATUS_FULLY_CHARGED)) + usb_mv = 5000; + else + usb_mv = PD_MAX_VOLTAGE_MV; + + if (pd_get_max_voltage() != usb_mv) { + CPRINTS("VBUS limited to %dmV", usb_mv); + for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++) + pd_set_external_voltage_limit(port, usb_mv); + } + + return 0; +} + +enum ec_status charger_profile_override_get_param(uint32_t param, + uint32_t *value) +{ + return EC_RES_INVALID_PARAM; +} + +enum ec_status charger_profile_override_set_param(uint32_t param, + uint32_t value) +{ + return EC_RES_INVALID_PARAM; +} + +/* Initialize board USC-C things */ +static void board_init_usbc(void) +{ + /* Enable USB-A overcurrent interrupt */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_a0_oc)); +} +DECLARE_HOOK(HOOK_INIT, board_init_usbc, HOOK_PRIO_DEFAULT); + +void board_tcpc_init(void) +{ + /* Only reset TCPC if not sysjump */ + if (!system_jumped_late()) { + /* TODO(crosbug.com/p/61098): How long do we need to wait? */ + board_reset_pd_mcu(); + } + + /* Enable PPC interrupts */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_swctl)); + + /* Enable TCPC interrupts */ + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c0_pd)); + gpio_enable_dt_interrupt(GPIO_INT_FROM_NODELABEL(int_usb_c1_pd)); + + /* + * Initialize HPD to low; after sysjump SOC needs to see + * HPD pulse to enable video path + */ + for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) + usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED | + USB_PD_MUX_HPD_IRQ_DEASSERTED); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_POST_I2C); + +void board_reset_pd_mcu(void) +{ + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); + + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l), 0); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l), 0); + msleep(PS8XXX_RESET_DELAY_MS); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l), 1); + gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l), 1); + msleep(PS8805_FW_INIT_DELAY_MS); +} + +void board_set_tcpc_power_mode(int port, int mode) +{ + /* Ignore the "mode" to turn the chip on. We can only do a reset. */ + if (mode) + return; + + board_reset_pd_mcu(); +} + +int board_vbus_sink_enable(int port, int enable) +{ + /* Both ports are controlled by PPC SN5S330 */ + return ppc_vbus_sink_enable(port, enable); +} + +int board_is_sourcing_vbus(int port) +{ + /* Both ports are controlled by PPC SN5S330 */ + return ppc_is_sourcing_vbus(port); +} + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO(b/120231371): Notify AP */ + CPRINTS("p%d: overcurrent!", port); +} + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charging port"); + + /* Disable all ports. */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (board_vbus_sink_enable(i, 0)) + CPRINTS("Disabling p%d sink path failed.", i); + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (board_is_sourcing_vbus(port)) { + CPRINTS("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + + CPRINTS("New charge port: p%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (i == port) + continue; + + if (board_vbus_sink_enable(i, 0)) + CPRINTS("p%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (board_vbus_sink_enable(port, 1)) { + CPRINTS("p%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, int max_ma, + int charge_mv) +{ + /* + * Ignore lower charge ceiling on PD transition if our battery is + * critical, as we may brownout. + */ + if (supplier == CHARGE_SUPPLIER_PD && charge_ma < 1500 && + charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) { + CPRINTS("Using max ilim %d", max_ma); + charge_ma = max_ma; + } + + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_int_odl))) + if (gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_usb_c0_pd_rst_l))) + status |= PD_STATUS_TCPC_ALERT_0; + if (!gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_int_odl))) + if (gpio_pin_get_dt( + GPIO_DT_FROM_NODELABEL(gpio_usb_c1_pd_rst_l))) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} |