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Diffstat (limited to 'zephyr/projects/intelrvp/mtlrvp/ioex.dts')
-rw-r--r--zephyr/projects/intelrvp/mtlrvp/ioex.dts71
1 files changed, 71 insertions, 0 deletions
diff --git a/zephyr/projects/intelrvp/mtlrvp/ioex.dts b/zephyr/projects/intelrvp/mtlrvp/ioex.dts
new file mode 100644
index 0000000000..7d2f4b5820
--- /dev/null
+++ b/zephyr/projects/intelrvp/mtlrvp/ioex.dts
@@ -0,0 +1,71 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+ /* IOEX_KBD_GPIO IT8801 */
+ ioex-kbd-gpio {
+ compatible = "cros,ioex-chip";
+ i2c-port = <&i2c_charger>;
+ i2c-addr = <0x39>;
+ drv = "it8801_ioexpander_drv";
+ flags = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ioex_it8801_port0: it8801_port@0 {
+ compatible = "cros,ioex-port";
+ reg = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+
+ ioex_it8801_port1: it8801_port@1 {
+ compatible = "cros,ioex-port";
+ reg = <1>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+ };
+ /* IOEX_C2_CCGXXF */
+ ioex-c2 {
+ compatible = "cros,ioex-chip";
+ i2c-port = <&typec_aic2>;
+ i2c-addr = <0x0B>;
+ drv = "ccgxxf_ioexpander_drv";
+ flags = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ioex_c2_port0: ioex-c2-port@0 {
+ compatible = "cros,ioex-port";
+ reg = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+ ioex_c2_port1: ioex-c2-port@1 {
+ compatible = "cros,ioex-port";
+ reg = <1>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+ ioex_c2_port2: ioex-c2-port@2 {
+ compatible = "cros,ioex-port";
+ reg = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+ ioex_c2_port3: ioex-c2-port@3 {
+ compatible = "cros,ioex-port";
+ reg = <3>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ };
+ };
+};