diff options
Diffstat (limited to 'zephyr/projects/skyrim/src/skyrim')
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/alt_charger.c | 31 | ||||
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/fan.c | 62 | ||||
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/form_factor.c | 37 | ||||
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/keyboard.c | 29 | ||||
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/ppc_config.c | 46 | ||||
| -rw-r--r-- | zephyr/projects/skyrim/src/skyrim/usb_mux_config.c | 142 |
6 files changed, 347 insertions, 0 deletions
diff --git a/zephyr/projects/skyrim/src/skyrim/alt_charger.c b/zephyr/projects/skyrim/src/skyrim/alt_charger.c new file mode 100644 index 0000000000..4b717901cd --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/alt_charger.c @@ -0,0 +1,31 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> + +#include "charger_chips.h" +#include "common.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "hooks.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +static void alt_charger_init(void) +{ + int ret; + uint32_t val; + + ret = cros_cbi_get_fw_config(FW_CHARGER, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_CHARGER); + return; + } + + if (val == FW_CHARGER_ISL9538) + CHG_ENABLE_ALTERNATE(0); +} +DECLARE_HOOK(HOOK_INIT, alt_charger_init, HOOK_PRIO_POST_FIRST); diff --git a/zephyr/projects/skyrim/src/skyrim/fan.c b/zephyr/projects/skyrim/src/skyrim/fan.c new file mode 100644 index 0000000000..0a368ee6f0 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/fan.c @@ -0,0 +1,62 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/drivers/gpio.h> +#include <zephyr/logging/log.h> + +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "fan.h" +#include "gpio/gpio.h" +#include "hooks.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +/* + * Skyrim fan support + */ +static void fan_init(void) +{ + int ret; + uint32_t val; + uint32_t board_version; + /* + * Retrieve the fan config. + */ + ret = cros_cbi_get_fw_config(FW_FAN, &val); + if (ret != 0) { + LOG_ERR("Error retrieving CBI FW_CONFIG field %d", FW_FAN); + return; + } + + ret = cbi_get_board_version(&board_version); + if (ret != EC_SUCCESS) { + LOG_ERR("Error retrieving CBI board version"); + return; + } + + if ((board_version >= 3) && (val != FW_FAN_PRESENT)) { + /* Disable the fan */ + fan_set_count(0); + } +} +DECLARE_HOOK(HOOK_INIT, fan_init, HOOK_PRIO_POST_FIRST); + +/* + * Pcore OCP support + * Note: early boards should note enable this interrupt as they are not + * correctly configured for it. + */ +__override bool board_supports_pcore_ocp(void) +{ + uint32_t board_version; + + if (cbi_get_board_version(&board_version) == EC_SUCCESS && + board_version > 3) + return true; + + return false; +} diff --git a/zephyr/projects/skyrim/src/skyrim/form_factor.c b/zephyr/projects/skyrim/src/skyrim/form_factor.c new file mode 100644 index 0000000000..f137c6db31 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/form_factor.c @@ -0,0 +1,37 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include <zephyr/logging/log.h> +#include "common.h" +#include "accelgyro.h" +#include "cros_board_info.h" +#include "hooks.h" +#include "motionsense_sensors.h" + +LOG_MODULE_DECLARE(skyrim, CONFIG_SKYRIM_LOG_LEVEL); + +/* + * Mainboard orientation support. + */ + +#define ALT_MAT SENSOR_ROT_STD_REF_NAME(DT_NODELABEL(lid_rot_ref1)) +#define LID_ACCEL SENSOR_ID(DT_NODELABEL(lid_accel)) + +static void form_factor_init(void) +{ + int ret; + uint32_t val; + /* + * If the board version >=4 + * use ver1 rotation matrix. + */ + ret = cbi_get_board_version(&val); + if (ret == EC_SUCCESS && val >= 4) { + LOG_INF("Switching to ver1 lid"); + motion_sensors[LID_ACCEL].rot_standard_ref = &ALT_MAT; + } +} +DECLARE_HOOK(HOOK_INIT, form_factor_init, HOOK_PRIO_POST_I2C); diff --git a/zephyr/projects/skyrim/src/skyrim/keyboard.c b/zephyr/projects/skyrim/src/skyrim/keyboard.c new file mode 100644 index 0000000000..e261321e86 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/keyboard.c @@ -0,0 +1,29 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ec_commands.h" + +static const struct ec_response_keybd_config skyrim_kb = { + .num_top_row_keys = 10, + .action_keys = { + TK_BACK, /* T1 */ + TK_REFRESH, /* T2 */ + TK_FULLSCREEN, /* T3 */ + TK_OVERVIEW, /* T4 */ + TK_SNAPSHOT, /* T5 */ + TK_BRIGHTNESS_DOWN, /* T6 */ + TK_BRIGHTNESS_UP, /* T7 */ + TK_VOL_MUTE, /* T8 */ + TK_VOL_DOWN, /* T9 */ + TK_VOL_UP, /* T10 */ + }, + .capabilities = KEYBD_CAP_SCRNLOCK_KEY, +}; + +__override const struct ec_response_keybd_config * +board_vivaldi_keybd_config(void) +{ + return &skyrim_kb; +} diff --git a/zephyr/projects/skyrim/src/skyrim/ppc_config.c b/zephyr/projects/skyrim/src/skyrim/ppc_config.c new file mode 100644 index 0000000000..bebc8adcc7 --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/ppc_config.c @@ -0,0 +1,46 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Skyrim board-specific PPC code */ + +#include <zephyr/drivers/gpio.h> + +#include "driver/ppc/nx20p348x.h" +#include "driver/ppc/aoz1380_public.h" +#include "usbc_ppc.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * In the AOZ1380 PPC, there are no programmable features. We use + * the attached NCT3807 to control a GPIO to indicate 1A5 or 3A0 + * current limits. + */ +int board_aoz1380_set_vbus_source_current_limit(int port, enum tcpc_rp_value rp) +{ + int rv = EC_SUCCESS; + + rv = gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(ioex_usb_c0_ilim_3a_en), + (rp == TYPEC_RP_3A0) ? 1 : 0); + + return rv; +} + +void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_PPC_INT_ODL: + aoz1380_interrupt(0); + break; + + case GPIO_USB_C1_PPC_INT_ODL: + nx20p348x_interrupt(1); + break; + + default: + break; + } +} diff --git a/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c new file mode 100644 index 0000000000..6c65e56d9e --- /dev/null +++ b/zephyr/projects/skyrim/src/skyrim/usb_mux_config.c @@ -0,0 +1,142 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Skyrim board-specific USB-C mux configuration */ + +#include <zephyr/drivers/gpio.h> + +#include "console.h" +#include "cros_board_info.h" +#include "cros_cbi.h" +#include "driver/retimer/anx7483_public.h" +#include "hooks.h" +#include "ioexpander.h" +#include "usb_mux.h" +#include "usbc/usb_muxes.h" + +#define CPRINTSUSB(format, args...) cprints(CC_USBCHARGE, format, ##args) +#define CPRINTFUSB(format, args...) cprintf(CC_USBCHARGE, format, ##args) + +/* + * USB C0 (general) and C1 (just ANX DB) use IOEX pins to + * indicate flipped polarity to a protection switch. + */ +static int ioex_set_flip(int port, mux_state_t mux_state) +{ + if (port == 0) { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c0_sbu_flip), + 0); + } else { + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 1); + else + gpio_pin_set_dt( + GPIO_DT_FROM_NODELABEL(ioex_usb_c1_sbu_flip), + 0); + } + + return EC_SUCCESS; +} + +int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + return anx7483_set_default_tuning(me, mux_state); +} + +int board_anx7483_c1_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + bool flipped = mux_state & USB_PD_MUX_POLARITY_INVERTED; + + /* Set the SBU polarity mux */ + RETURN_ERROR(ioex_set_flip(me->usb_port, mux_state)); + + /* Remove flipped from the state for easier compraisons */ + mux_state = mux_state & ~USB_PD_MUX_POLARITY_INVERTED; + + RETURN_ERROR(anx7483_set_default_tuning(me, mux_state)); + + if (mux_state == USB_PD_MUX_USB_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DP_ENABLED) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && !flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX2, + ANX7483_EQ_SETTING_12_5DB)); + } else if (mux_state == USB_PD_MUX_DOCK && flipped) { + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_URX2, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_UTX1, + ANX7483_EQ_SETTING_12_5DB)); + RETURN_ERROR(anx7483_set_eq(me, ANX7483_PIN_DRX2, + ANX7483_EQ_SETTING_12_5DB)); + } + + return EC_SUCCESS; +} + +int board_c1_ps8818_mux_set(const struct usb_mux *me, mux_state_t mux_state) +{ + CPRINTSUSB("C1: PS8818 mux using default tuning"); + + /* Once a DP connection is established, we need to set IN_HPD */ + if (mux_state & USB_PD_MUX_DP_ENABLED) + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 1); + else + ioex_set_level(IOEX_USB_C1_HPD_IN_DB, 0); + + return 0; +} + +static void setup_mux(void) +{ + uint32_t val; + + if (cros_cbi_get_fw_config(FW_IO_DB, &val) != 0) + CPRINTSUSB("Error finding FW_DB_IO in CBI FW_CONFIG"); + /* Val will have our dts default on error, so continue setup */ + + if (val == FW_IO_DB_PS8811_PS8818) { + CPRINTSUSB("C1: Setting PS8818 mux"); + USB_MUX_ENABLE_ALTERNATIVE(usb_mux_chain_ps8818_port1); + } else if (val == FW_IO_DB_NONE_ANX7483) { + CPRINTSUSB("C1: Setting ANX7483 mux"); + } else { + CPRINTSUSB("Unexpected DB_IO board: %d", val); + } +} +DECLARE_HOOK(HOOK_INIT, setup_mux, HOOK_PRIO_INIT_I2C); |