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-rw-r--r--zephyr/shim/chip/it8xxx2/CMakeLists.txt2
-rw-r--r--zephyr/shim/chip/it8xxx2/clock.c23
-rw-r--r--zephyr/shim/chip/it8xxx2/gpio.c2
-rw-r--r--zephyr/shim/chip/it8xxx2/include/flash_chip.h24
-rw-r--r--zephyr/shim/chip/it8xxx2/keyboard_raw.c4
-rw-r--r--zephyr/shim/chip/it8xxx2/power_policy.c8
-rw-r--r--zephyr/shim/chip/it8xxx2/system.c2
7 files changed, 28 insertions, 37 deletions
diff --git a/zephyr/shim/chip/it8xxx2/CMakeLists.txt b/zephyr/shim/chip/it8xxx2/CMakeLists.txt
index 539fd9f029..2a1c9d5909 100644
--- a/zephyr/shim/chip/it8xxx2/CMakeLists.txt
+++ b/zephyr/shim/chip/it8xxx2/CMakeLists.txt
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
diff --git a/zephyr/shim/chip/it8xxx2/clock.c b/zephyr/shim/chip/it8xxx2/clock.c
index 0e7b7cb39e..14dbc0e7eb 100644
--- a/zephyr/shim/chip/it8xxx2/clock.c
+++ b/zephyr/shim/chip/it8xxx2/clock.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -8,7 +8,6 @@
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <soc.h>
-#include <zephyr/zephyr.h>
#include <soc/ite_it8xxx2/reg_def_cros.h>
#include <zephyr/sys/util.h>
@@ -16,21 +15,13 @@
LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR);
-#define ECPM_NODE DT_INST(0, ite_it8xxx2_ecpm)
-#define HAL_ECPM_REG_BASE_ADDR \
- ((struct ecpm_reg *)DT_REG_ADDR_BY_IDX(ECPM_NODE, 0))
-#define PLLFREQ_MASK 0xf
+#define ECPM_NODE DT_INST(0, ite_it8xxx2_ecpm)
+#define HAL_ECPM_REG_BASE_ADDR \
+ ((struct ecpm_reg *)DT_REG_ADDR_BY_IDX(ECPM_NODE, 0))
+#define PLLFREQ_MASK 0xf
-static const int pll_reg_to_freq[8] = {
- MHZ(8),
- MHZ(16),
- MHZ(24),
- MHZ(32),
- MHZ(48),
- MHZ(64),
- MHZ(72),
- MHZ(96)
-};
+static const int pll_reg_to_freq[8] = { MHZ(8), MHZ(16), MHZ(24), MHZ(32),
+ MHZ(48), MHZ(64), MHZ(72), MHZ(96) };
int clock_get_freq(void)
{
diff --git a/zephyr/shim/chip/it8xxx2/gpio.c b/zephyr/shim/chip/it8xxx2/gpio.c
index 3baf128eab..7106b2a294 100644
--- a/zephyr/shim/chip/it8xxx2/gpio.c
+++ b/zephyr/shim/chip/it8xxx2/gpio.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/shim/chip/it8xxx2/include/flash_chip.h b/zephyr/shim/chip/it8xxx2/include/flash_chip.h
index 692eaa9db0..00aaba05fd 100644
--- a/zephyr/shim/chip/it8xxx2/include/flash_chip.h
+++ b/zephyr/shim/chip/it8xxx2/include/flash_chip.h
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -9,25 +9,25 @@
* One page program instruction allows maximum 256 bytes (a page) of data
* to be programmed.
*/
-#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256
+#define CONFIG_FLASH_WRITE_IDEAL_SIZE 256
/* Minimum write size */
-#define CONFIG_FLASH_WRITE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \
- write_block_size)
+#define CONFIG_FLASH_WRITE_SIZE \
+ DT_PROP(DT_INST(0, soc_nv_flash), write_block_size)
/* Erase bank size */
-#define CONFIG_FLASH_ERASE_SIZE DT_PROP(DT_INST(0, soc_nv_flash), \
- erase_block_size)
+#define CONFIG_FLASH_ERASE_SIZE \
+ DT_PROP(DT_INST(0, soc_nv_flash), erase_block_size)
/* Protect bank size */
-#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE
+#define CONFIG_FLASH_BANK_SIZE CONFIG_FLASH_ERASE_SIZE
-#define CONFIG_RO_STORAGE_OFF 0x0
-#define CONFIG_RW_STORAGE_OFF 0x0
+#define CONFIG_RO_STORAGE_OFF 0x0
+#define CONFIG_RW_STORAGE_OFF 0x0
/*
* The EC uses the one bank of flash to emulate a SPI-like write protect
* register with persistent state.
*/
-#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE
-#define CONFIG_FW_PSTATE_OFF (CONFIG_FLASH_SIZE_BYTES / 2 - \
- CONFIG_FW_PSTATE_SIZE)
+#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE
+#define CONFIG_FW_PSTATE_OFF \
+ (CONFIG_RO_STORAGE_OFF + CONFIG_RO_SIZE - CONFIG_FW_PSTATE_SIZE)
#endif /* __CROS_EC_FLASH_CHIP_H */
diff --git a/zephyr/shim/chip/it8xxx2/keyboard_raw.c b/zephyr/shim/chip/it8xxx2/keyboard_raw.c
index 480d528e41..0a117cda14 100644
--- a/zephyr/shim/chip/it8xxx2/keyboard_raw.c
+++ b/zephyr/shim/chip/it8xxx2/keyboard_raw.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -8,7 +8,7 @@
#include <zephyr/device.h>
#include <zephyr/logging/log.h>
#include <soc.h>
-#include <zephyr/zephyr.h>
+#include <zephyr/kernel.h>
#include "drivers/cros_kb_raw.h"
#include "keyboard_raw.h"
diff --git a/zephyr/shim/chip/it8xxx2/power_policy.c b/zephyr/shim/chip/it8xxx2/power_policy.c
index 7c2e02e258..c8efb0ca96 100644
--- a/zephyr/shim/chip/it8xxx2/power_policy.c
+++ b/zephyr/shim/chip/it8xxx2/power_policy.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -6,7 +6,7 @@
#include <zephyr/pm/pm.h>
#include <zephyr/pm/policy.h>
#include <soc.h>
-#include <zephyr/zephyr.h>
+#include <zephyr/kernel.h>
#include "system.h"
@@ -29,8 +29,8 @@ const struct pm_state_info *pm_policy_next_state(uint8_t cpu, int32_t ticks)
* To check if given power state is enabled and
* could be used.
*/
- if (pm_policy_state_lock_is_active(
- pm_states[i].state, PM_ALL_SUBSTATES)) {
+ if (pm_policy_state_lock_is_active(pm_states[i].state,
+ PM_ALL_SUBSTATES)) {
continue;
}
diff --git a/zephyr/shim/chip/it8xxx2/system.c b/zephyr/shim/chip/it8xxx2/system.c
index d9dcd7ccfb..e5f9cc5cf0 100644
--- a/zephyr/shim/chip/it8xxx2/system.c
+++ b/zephyr/shim/chip/it8xxx2/system.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/