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Diffstat (limited to 'zephyr/shim/chip/npcx/clock.c')
-rw-r--r--zephyr/shim/chip/npcx/clock.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/zephyr/shim/chip/npcx/clock.c b/zephyr/shim/chip/npcx/clock.c
index 4fc9bd12c0..fc483ef775 100644
--- a/zephyr/shim/chip/npcx/clock.c
+++ b/zephyr/shim/chip/npcx/clock.c
@@ -1,4 +1,4 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+/* Copyright 2020 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -9,16 +9,15 @@
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <soc.h>
-#include <zephyr/zephyr.h>
#include "clock_chip.h"
#include "module_id.h"
LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR);
-#define CDCG_NODE DT_INST(0, nuvoton_npcx_pcc)
+#define CDCG_NODE DT_INST(0, nuvoton_npcx_pcc)
#define HAL_CDCG_REG_BASE_ADDR \
- ((struct cdcg_reg *)DT_REG_ADDR_BY_IDX(CDCG_NODE, 1))
+ ((struct cdcg_reg *)DT_REG_ADDR_BY_IDX(CDCG_NODE, 1))
int clock_get_freq(void)
{
@@ -63,7 +62,7 @@ void clock_normal(void)
struct cdcg_reg *const cdcg_base = HAL_CDCG_REG_BASE_ADDR;
cdcg_base->HFCGP = ((FPRED_VAL << 4) | AHB6DIV_VAL);
- cdcg_base->HFCBCD = (FIUDIV_VAL << 4);
+ cdcg_base->HFCBCD = (FIUDIV_VAL << 4);
}
void clock_enable_module(enum module_id module, int enable)