diff options
Diffstat (limited to 'zephyr/shim/include/config_chip.h')
| -rw-r--r-- | zephyr/shim/include/config_chip.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 7ecb3b0f13..fd97a9d72a 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -718,6 +718,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_SMBUS_PEC #endif +#undef CONFIG_I2C_NACK_RETRY_COUNT +#ifdef CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT +#define CONFIG_I2C_NACK_RETRY_COUNT CONFIG_PLATFORM_EC_I2C_NACK_RETRY_COUNT +#endif + #undef CONFIG_KEYBOARD_PROTOCOL_8042 #ifdef CONFIG_PLATFORM_EC_KEYBOARD_PROTOCOL_8042 #define CONFIG_KEYBOARD_PROTOCOL_8042 @@ -1543,9 +1548,19 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #undef CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT8XXX2 #define CONFIG_USB_PD_TCPM_DRIVER_IT8XXX2 +#if defined(CONFIG_SOC_IT81202_CX) || defined(CONFIG_SOC_IT81302_CX) +/* CCGCR 04h bit[3,2,1] Rp 3A value is changed to 000b. */ +#define IT8XXX2_USBPD_RP_3A0_VALUE_IS_ZERO +/* + * CCGCR 04h bit[7] is reserved, so we control the power of cc analog module + * by CCCSR 05h bit[7,3]. + */ +#define IT8XXX2_USBPD_CCGCR_BIT7_RESERVED +#else /* Individual setting CC1 and CC2 resistance. */ #define IT83XX_USBPD_CC1_CC2_RESISTANCE_SEPARATE #endif +#endif #undef CONFIG_USB_PD_TCPM_DRIVER_IT83XX #ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_DRIVER_IT83XX @@ -1722,6 +1737,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_USB_PD_ALT_MODE_UFP #endif +#undef CONFIG_USB_PD_DISCOVERY +#ifdef CONFIG_PLATFORM_EC_USB_PD_DISCOVERY +#define CONFIG_USB_PD_DISCOVERY +#endif + #undef CONFIG_USB_PD_DPS #ifdef CONFIG_PLATFORM_EC_USB_PD_DPS #define CONFIG_USB_PD_DPS @@ -1988,6 +2008,11 @@ extern char mock_jump_data[CONFIG_PLATFORM_EC_PRESERVED_END_OF_RAM_SIZE]; #define CONFIG_CMD_USB_PD_CABLE #endif +#undef CONFIG_USB_PD_DP_MODE +#ifdef CONFIG_PLATFORM_EC_USB_PD_DP_MODE +#define CONFIG_USB_PD_DP_MODE +#endif + #undef CONFIG_USB_PD_TBT_COMPAT_MODE #ifdef CONFIG_PLATFORM_EC_USB_PD_TBT_COMPAT_MODE #define CONFIG_USB_PD_TBT_COMPAT_MODE |