diff options
Diffstat (limited to 'zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h')
-rw-r--r-- | zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h index 9656d8982d..2f9b01fbee 100644 --- a/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h +++ b/zephyr/subsys/ap_pwrseq/include/x86_non_dsx_common_pwrseq_sm_handler.h @@ -10,20 +10,28 @@ #include <zephyr/kernel.h> #include <zephyr/types.h> +#ifdef CONFIG_AP_PWRSEQ_DRIVE +#include <ap_power/ap_pwrseq.h> +#else #include <ap_power/ap_power.h> #include <ap_power/ap_power_events.h> +#endif #include <ap_power_host_sleep.h> #include <x86_common_pwrseq.h> +#ifndef CONFIG_AP_PWRSEQ_DRIVER /* The wait time is ~150 msec, allow for safety margin. */ #define IN_PCH_SLP_SUS_WAIT_TIME_MS 250 enum power_states_ndsx chipset_pwr_sm_run(enum power_states_ndsx curr_state); -void init_chipset_pwr_seq_state(void); enum power_states_ndsx chipset_pwr_seq_get_state(void); -void request_start_from_g3(void); enum power_states_ndsx pwr_sm_get_state(void); const char *const pwr_sm_get_state_name(enum power_states_ndsx state); +#else +enum ap_pwrseq_state chipset_pwr_seq_get_state(void); +const char *const pwr_sm_get_state_name(enum ap_pwrseq_state state); +#endif +void request_start_from_g3(void); void apshutdown(void); void ap_pwrseq_handle_chipset_reset(void); void set_start_from_g3_delay_seconds(uint32_t d_time); |