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* flapjack: Fork usb_pd_policy from kukuistabilize-11686.BDaisuke Nojiri2019-02-011-1/+408
| | | | | | | | | | | | | | | | Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=none BRANCH=none TEST=buildall Change-Id: Ic0a2c43b49e96868ac3a2cd5ccc892a8f1cfdbcb Reviewed-on: https://chromium-review.googlesource.com/1446631 Commit-Ready: Kaka Ni <nigang@huaqin.corp-partner.google.com> Tested-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* flapjack/gpio: Modify GPIO configuration for Board Id 3Kaka Ni2019-02-013-39/+8
| | | | | | | | | | | | | | Modify GPIO and ADC confiturations for flapjack board_id 3 (P0B & P0C). CQ-DEPEND=CL:1445956 BUG=b:123498558 BRANCH=none TEST=BOOTBLOCK=... make BOARD=flapjack -j flash_ec; and see AP boots. Change-Id: Iac353c1a4ea92bd028003b6c11647965528ac30a Signed-off-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1438957 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* flash_fp_mcu: use bash per style guide and remove unused configTom Hughes2019-01-312-20/+6
| | | | | | | | | | | | | https://www.chromium.org/chromium-os/shell-style-guidelines BRANCH=nocturne,nami BUG=none TEST=flash_fp_mcu /opt/google/biod/fw/nocturne_fp_v2.2.110-b936c0a3c.bin Change-Id: Ic95ab83bf436f3b4bb3af93cc543da07f053fd82 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1446535 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* ps8xxx: put the PS8751's power role to sink stateJames_Chao2019-01-311-1/+17
| | | | | | | | | | | | BUG=b:123607435 BRANCH=octopus TEST=check the external monitor can work Change-Id: Ibe334576b907774df62865817af6ba5eb3e9d96f Reviewed-on: https://chromium-review.googlesource.com/1445137 Commit-Ready: James Chao <james_chao@asus.corp-partner.google.com> Tested-by: James Chao <james_chao@asus.corp-partner.google.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* hatch: Add support for PSL wake sourcesScott Collyer2019-01-314-8/+20
| | | | | | | | | | | | | | | | | | | | This CL adds the alternate function defines for the 4 PSL wake source pins, populates the wake pins table, and enables the config option for PSL mode. BRANCH=none BUG=b:123343366 TEST=Use EC console command to force hiberate and verified EC wakes from hibernate via power button, EC reset, connecting AC power, and opening of lid switch. Change-Id: I6d5ad282f53e9090aafd4164510741d7cfe7907a Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1435971 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
* make: improve buildall problems reportingVadim Bendebury2019-01-311-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When buildall fails for a reason other than failure to build a board image, it is difficult to figure out what exactly went wrong, the amount of output on the screen is overwhelming, the vast majority of it having nothing to do with the failure. Also, experience shows that the user does not really care about the exact build phase when a failure happened. As soon as the user detects file(s) in .failedboards directory, he/she can try building the board separately and see what the problem is. With this patch not only building the boards, but also running regular tests, fuzz and cts tests will create appropriate files in the ./.failedboards directory when starting the appropriate make step and will remove the files when succeeding. Management of ./.failedboards directory is also being simplified: its creation is enforced before building various targets, but cleaning happens only when the target is buildall. Now, after running 'make buildall' files in ./.failedboards give a better indication of what went wrong: - regular files - building board with this name failed - files host-XXXX_fuzz - fuzzer XXX_fuzz failed - files host-XXXX - test XXXX failed - files cts-XXXX-YYY cts test for board XXX test YYY failed BRANCH=none BUG=none TEST=created various failures and observed the appropriate leftovers in ./.failedboards Change-Id: Iadfe1c63da5db7fe37b8647b277b61a461de5399 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1444795 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* cr50: Change U2F key derivation to include user secrets.Louis Collard2019-01-314-25/+105
| | | | | | | | | | | | | | | | | Currently it is assumed that the user secret is passed to cr50 in plaintext for each command. A future CL will change this so that the user secret is sent once per 'session', but this will not impact key derivation. BUG=b:112603199 BRANCH=none TEST=manual tests on local device Change-Id: I25bc8986a25defbc60ac32311c8747db3071e469 Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1436975 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: Add new U2F generate, sign and attest commands.Louis Collard2019-01-313-0/+288
| | | | | | | | | | | | | | | | | These new commands expose a more generic API, which will allow a refactoring that removes most U2F-specific logic from cr50, and moves it into u2fd. CQ-DEPEND=CL:1371584 BRANCH=none BUG=b:123161715 TEST=local testing using g2ftool Signed-off-by: Louis Collard <louiscollard@chromium.org> Change-Id: I32067ce01e4bb31a331994b4e91d5b56d125cbb1 Reviewed-on: https://chromium-review.googlesource.com/1425137 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Andrey Pronin <apronin@chromium.org>
* cr50: add more obvious sections in gpio.incMary Ruthven2019-01-311-1/+11
| | | | | | | | | | | | | | | | Change the comments so it's more obvious what the sections are in gpio.inc BUG=none BRANCH=none TEST=none Change-Id: I11566aa1748519df8cdc3cf9269e2a0c90c2dad9 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1443869 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* cr50: add board_closed_loop_reset propertyMary Ruthven2019-01-313-1/+19
| | | | | | | | | | | | | BUG=b:123544145 BRANCH=cr50 TEST=none Change-Id: If9b12685f7f70f0653d137bbfa15f6a6232343e0 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1443868 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* ish: move setting start_called to proper placeHyungwoo Yang2019-01-313-5/+4
| | | | | | | | | | | | | | | | | | | | | | | Some functions(like enabling interrupt) should start after scheduler is ready and they use start_called which indicates if scheduler is ready or not. Currently start_called is set by the first task but it is away after the task did many things. So this patch moves the setting start_called to the place where the scheduler is ready. BRANCH=none BUG=none TEST=verified in Atlas platform Change-Id: I24d9cec411e91b7365f46fa8daf4a02fe43287dd Reviewed-on: https://chromium-review.googlesource.com/1444792 Commit-Ready: Hyungwoo Yang <hyungwoo.yang@intel.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish: remove unnecessary interrupt_enable() callHyungwoo Yang2019-01-312-4/+0
| | | | | | | | | | | | | | | | interrupt is already enabled when the first task(hook_task) scheduled. this patch removes unnecessary interrupt_enable(). BRANCH=none BUG=none TEST=verified in Atlas platform Change-Id: I4b1458a6ad2d72347720630181ef7e35bc7fc66b Reviewed-on: https://chromium-review.googlesource.com/1444538 Commit-Ready: Hyungwoo Yang <hyungwoo.yang@intel.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* flapjack: Fork board.h/board.c from kukuiKaka Ni2019-01-312-2/+669
| | | | | | | | | | | BUG=none BRANCH=none TEST=BOOTBLOCK=... make BOARD=flapjack -j flash_ec; and see AP boots. Change-Id: Ieea89948598e51d8d4623c9d761d8ef8e7c546b2 Signed-off-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/1445956 Reviewed-by: Nick Sanders <nsanders@chromium.org>
* ish: support task argumentHyungwoo Yang2019-01-301-1/+1
| | | | | | | | | | | | | | | | This patch supports the opaque parameter for task. the parameter is specified in ec.tasklist. BRANCH=none BUG=none TEST=verified in Atlas platform Change-Id: I7451c27784b9e889823f62d7f3de41dd7e2d2b43 Reviewed-on: https://chromium-review.googlesource.com/1442113 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* flash_ec: add "--read" and "--verify" flags for npcx chip.Namyoon Woo2019-01-301-50/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "--read" takes a following string as a path to store the image file. If it is specified, flash_ec reads only an EC firmware image and store it to the given path, but does not program EC firmware. "--verify" lets flash_ec read EC firmware image after flashing it, and compare the read image to the source image to check if they match. CQ-DEPEND=CL:1409497 BUG=b:123044471 BRANCH=none TEST=manually ran flash_ec on coral. util/flash_ec --board coral --image ${IMG_PATH} --verify --verbose util/flash_ec --board coral --read ${TEMP_IMG_PATH} --verbose util/flash_ec --board coral --read "/tmp/ec.co ral.bin" --verbose util/flash_ec --chip npcx_spi --raiden --image ${IMG_PATH} --verify util/flash_ec --chip npcx_spi --raiden --read ${TEMP_IMG_PATH} util/flash_ec --chip npcx_spi --raiden --read "/tmp/ec.co r al.bin" util/flash_ec --board nocturne --image ${IMG_PATH} --verify --verbose util/flash_ec --board nocturne --read ${TEMP_IMG_PATH} --verbose Change-Id: I5461ec7ce0c6d0bdb2eb984d9f7fb73c2f73a420 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1423126 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* ish: fix timer 0 periodic modeHyungwoo Yang2019-01-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | We are using timer 0 with periodic mode and in this mode, the value of timer 0 comparator should be automatically increased by the value last written when main counter equals the value. But due to mis-configuration, currently it is not automatically increased. This patch corrects the configuration for timer 0. BRANCH=none BUG=b:112750896 TEST=Tested on Atlas and verified increased value in timer 0 comparator. Change-Id: I1c98d980cd5c28226e223ca058b2181cf40b87f9 Reviewed-on: https://chromium-review.googlesource.com/1431874 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* cr50: change how u2f calculates recent power button pressesMary Ruthven2019-01-301-1/+2
| | | | | | | | | | | | | | | | | | | | | The logic was wrong, so we were ignoring power button presses for the first 10 seconds after cr50 reset. This changes the logic, so if there was a power button press and it happened in the last 10 seconds pop_check_presence will return that there was a power button press. BUG=b:123310652 BRANCH=none TEST=Reboot cr50. Press the power button 5s after boot. Use powerbtn command within 10 seconds of the press and make sure Presence shows 1. Press the power button. Wait 10 seconds and make sure Presence shows 0. Change-Id: Idd4a285619b1ee9d46ed8774c5b826dd8600eeed Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1432914 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org>
* cr50: dbg: add support for debugging u2fMary Ruthven2019-01-302-2/+10
| | | | | | | | | | | | | | | | | | | Cr50 only records power button presses in certain cases, and there isn't a clear way to check if cr50 thinks the power button has been pressed recently. Add a print statement in record_power_button and a call to pop_check_presence in the powerbtn console command. Only add these to DBG images. BUG=b:123310652 BRANCH=cr50 TEST=none Change-Id: Ie104ac10d97c080812e19e65342cfe35ed1ea238 Signed-off-by: Mary Ruthven <mruthven@google.com> Reviewed-on: https://chromium-review.googlesource.com/1432913 Commit-Ready: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
* ish: apply FPU context of the first taskHyungwoo Yang2019-01-301-0/+3
| | | | | | | | | | | | | | | | | | | FPU H/W configuration is available per task and it is initialized in task_pre_init() but currently the configuration for the first task is ignored due to lack of restoring(to H/W) in __task_start() function. This patch makes sure that the configuration restored to H/W. BRANCH=none BUG=none TEST=verified in Atlas platform Change-Id: I974fec779b3683fa7e9413dc73a4b8dcfb291596 Reviewed-on: https://chromium-review.googlesource.com/1435484 Commit-Ready: Hyungwoo Yang <hyungwoo.yang@intel.com> Tested-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-by: Jett Rink <jettrink@chromium.org>
* ish: fix task profilingJett Rink2019-01-307-52/+81
| | | | | | | | | | | | | | | | | | | | | | | | Previously when performing 'taskinfo' command on ISH5, the time spend in exception was very high. The time spent in each task was also negative. The task profiling was broken in many ways. This CL fixes the following: - Added correct exception start and end times through out - Updated exception (isr) start and end time to 32-bit so we don't have issues with 32-bit time rollover - Fixed time spending in task, exception, and IRQ distribution - Fixed code that determines which vector is being serviced. Calculation before was backwards previously. - The IRQ_COUNT for ish was too small so we couldn't correctly profile the IRQ distribution BRANCH=none BUG=b:121343650,b:112750896 TEST='taskinfo' behaves correctly on aracada (ISH5) Change-Id: I643d3133a608865a1862a70585cfeced4d24649d Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1389058 Reviewed-by: Hyungwoo Yang <hyungwoo.yang@intel.com>
* cr50: Make G2F attestation certificate available in vNVRAM.Louis Collard2019-01-304-0/+47
| | | | | | | | | | | | | | | As part of a refactor to reduce the amount of U2F-specific code in cr50, the certificate for the fixed G2F key used in U2F attestation needs to be made available to u2fd. BRANCH=none BUG=b:123161715 TEST=read nv space locally Change-Id: I4b457b1446bd13bdb125509218b577bc62f9355b Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1424043 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* flash_fp_mcu: convert tabs to two spaces to match shell style guideTom Hughes2019-01-302-47/+47
| | | | | | | | | | | | | | | | | | | tab2space -unix -t2 board/nocturne_fp/flash_fp_mcu > tmp mv tmp board/nocturne_fp/flash_fp_mcu chmod +x board/nocturne_fp/flash_fp_mcu tab2space -unix -t2 board/nami_fp/flash_fp_mcu > tmp mv tmp board/nami_fp/flash_fp_mcu chmod +x board/nami_fp/flash_fp_mcu BRANCH=nocturne,nami BUG=none TEST=flash_fp_mcu /opt/google/biod/fw/nocturne_fp_v2.2.110-b936c0a3c.bin Change-Id: Ie85aabf3d785a5bb69c4fd36a71dbbd5cc1e966d Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1444096 Reviewed-by: Nicolas Norvez <norvez@chromium.org>
* cr50: REFRESH+PWR recovery mode state lost to deep sleepKeith Short2019-01-301-0/+9
| | | | | | | | | | | | | | | | The recovery mode latched state gets lost due to deep sleep if the the Cr50 console is idle prior to capturing the REFRESH+PWR key combo. This change delays sleep so the AP has time to power back on and read the recovery state. BUG=b:123307572 BRANCH=cr50 TEST=make buildall. Verified boot to recovery mode screen with servo disconnected and verified boot to recovery mode with non dev image. Change-Id: Idf744c6967dc83c26a60429134ce3e8a9ab62ea3 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1432314 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* cr50: Add VENDOR_CC_GET_PWR_BTN to query power buttonKeith Short2019-01-302-0/+28
| | | | | | | | | | | | | | | | | Add the new TPM command VENDOR_CC_GET_PWR_BTN used to query whether there has been a recent (within 10 seconds) power button press by the user. This is used by coreboot on Sarien/Arcada to confirm user presence prior to enabling developer mode and prior to launching closed source diagnostics. BUG=b:119346609 BRANCH=cr50 TEST=make buildall. Tested power button query from coreboot recovery screen screen on Arcada and Sarien platforms. Change-Id: I20f91204fe30dda27b0d14b755bcd357938029f5 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1432313 Reviewed-by: Mary Ruthven <mruthven@chromium.org>
* Karma: Add PANEL_LM_SSK1 panel settings to OZ554Sue Chen2019-01-303-3/+41
| | | | | | | | | | | | | | | | | | | GPIOC5, GPIO01 and GPIOB1 are used for panel id. Register 0x02: setting LED current to 55(mA) (offset = 2, data = 0x55) BUG=b/120237453 BRANCH=kalista TEST=make buildall Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com> Change-Id: I6668d0930d150c0a10ab70d6539f1415ea231e8a Reviewed-on: https://chromium-review.googlesource.com/1418251 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* oz554: Add oz554_set_config APISue Chen2019-01-302-5/+32
| | | | | | | | | | | | | | | | | This patch adds oz554_set_config API and oz554_board_init callback so that oz554 initialization can be customized by each board. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> BUG=b/120237453 BRANCH=kalista TEST=make buildall Change-Id: I44e83e4cd25eb0794009b621e96d962a97a84fbb Reviewed-on: https://chromium-review.googlesource.com/1443520 Commit-Ready: Daisuke Nojiri <dnojiri@chromium.org> Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hatch: Fix battery name and add SMP-SDP battery supportScott Collyer2019-01-302-5/+34
| | | | | | | | | | | | | | | | | | This CL fixes the manufacturer name field for the battery used in factory bring up and adds support for the battery being shipped with P0 units. BRANCH=none BUG=b:123244947 TEST=Verifed that both the battery used in the factory and that being shipped with P0 units are found at init time. Change-Id: I572879fc32aaf8aad8289fc52a385262ea61cdc2 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1406495 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Add support for fan and temperature sensorsScott Collyer2019-01-305-3/+128
| | | | | | | | | | | | | BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Ib831eecb7e6df270a266f723e2fc5040b741e72f Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387592 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Enable UART alternate funciton for servoScott Collyer2019-01-301-0/+3
| | | | | | | | | | | | | | | BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Ie5821c746b86fb6ca2b6e4f48140f0eb45db3289 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387591 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add support for keyboard backlightScott Collyer2019-01-305-0/+23
| | | | | | | | | | | | | | | | This CL adds board specific config options, functions and GPIO signal required for keyboard backlight support. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Ib60a7c861d2a85939592556437bd6202e6815947 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387590 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* hatch: Add support for keyboard scanScott Collyer2019-01-304-0/+41
| | | | | | | | | | | | | | | | | | This CL adds config options and GPIO alternate function definitions required for adding keyboard scan functionality. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: I9511f936e12d25276fa2685afbf7edaa6330d2cf Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387589 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add smart control for USB-A portsScott Collyer2019-01-303-2/+13
| | | | | | | | | | | | | | | | | There are 2 USB-A ports, but 5V power is controlled by the same signal for both of them. This CL adds support for 5V control for these ports. BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: I21328688ec653d91f9e37d2c441a3b5f816206f3 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387588 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* usb_port_power_smart: turn on/off charging mode during system suspendZhuohao Lee2019-01-306-27/+86
| | | | | | | | | | | | | | | | This patch adds a feature to allow the userspace program turns on/off the usb type-a charging mode during system suspend. BUG=b:121438672 BRANCH=firmware-rammus-11275 TEST=make -j buildall ectool usbchargemode 0 0x2 0, CDP works in S0 and S0ix ectool usbchargemode 0 0x2 1, CDP works in S0 but not in S0ix Change-Id: Icb8ab1b3f1beb671fbd02f441bf40284ba74e097 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1424040 Reviewed-by: Jett Rink <jettrink@chromium.org>
* ectool: remove legacy "reboot_ec A" flagTom Hughes2019-01-301-6/+2
| | | | | | | | | | | | | | | | | | | | | The "A" flag was added in 2012 and a TODO was added in 2013. "repo grep reboot_ec" doesn't show any obvious places that the "A" flag is still used. BRANCH=none BUG=b:35507625,b:35518769 TEST=make buildall -j TEST=ectool --name=cros_fp reboot_ec; sleep 0.5; ectool --name=cros_fp rwsigaction abort; ectool --name=cros_fp version TEST=ectool --name=cros_fp reboot_ec RW; ectool --name=cros_fp version TEST=ectool --name=cros_fp reboot_ec A; echo $? Change-Id: I33c46a4a846b38743c121db08feb84c8b02747d3 Signed-off-by: Tom Hughes <tomhughes@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1441031 Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* hatch: Add vboot config options to baseboard.hScott Collyer2019-01-291-0/+5
| | | | | | | | | | | | | | BRANCH=none BUG=b:122251649 TEST=make buildall Change-Id: Iec06940c92fd430c7759c2e4ec25b7bc86344aa1 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387587 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
* hatch: Add support for 2 color LEDScott Collyer2019-01-297-1/+288
| | | | | | | | | | | | | | | | | | | This CL adds board specific files/functions required to support the battery LED. Similar to Coral or Octopus, the LEDs are controlled by GPIO on/off instead of PWM. BRANCH=none BUG=b:122251649 TEST=make buildall. Verfied charging LED turns when external power is connected. Change-Id: Ic16d4192aaeba6e765e97743ded772d52ca47111 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387586 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Zack Yang <zack_yang@compal.corp-partner.google.com>
* hatch: Add support for charging and USB type CScott Collyer2019-01-2913-1/+894
| | | | | | | | | | | | | | | | | This CL adds board specific files and functions required for both battery/charging and Type C support. BRANCH=none BUG=b:122251649 TEST=make buildall, tested both port 0/1 operation at factory. Battery can be charged via both ports. Change-Id: Ia01eabe109e3df780ec053831a71a16a41047f01 Signed-off-by: Scott Collyer <scollyer@google.com> Reviewed-on: https://chromium-review.googlesource.com/1387585 Commit-Ready: Scott Collyer <scollyer@chromium.org> Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
* cr50: Add NIST SP 800-90A HMAC DRBG.Louis Collard2019-01-298-179/+389
| | | | | | | | | | | | | | | | | | | This adds a new DRBG, and refactors the existing RFC6979 DRBG to make use of it. The new DRBG will initially be used to incorporate user-specific secrets into U2F key generation. CQ-DEPEND=CL:*729958,CL:*729959 BRANCH=none BUG=b:112603199 TEST=cr50 console rfc6979 test, hmac_drbg test, hmac_drbg_rand test Generate U2F key, patch CL, use U2F key Change-Id: I9af5da65cbd6fbfbd3570f40fb9e11ecef57532d Signed-off-by: Louis Collard <louiscollard@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1371584 Reviewed-by: Andrey Pronin <apronin@chromium.org>
* kukui/battery: Bounds max charging voltage by mt6370's 1% err rate.Yilun Lin2019-01-291-2/+2
| | | | | | | | | | | | | | | | | | The battery spec states the maximal charging voltage is 4.42V. Considering +-1% of voltage accuracy from rt9467/mt6370, we should lower the charging voltage to ensure it never hits 4.42V. BUG=b:118799175 BRANCH=None TEST=make BOARD=kukui Change-Id: Ibdbc78f7742efa340c821a12ed6ef43ac27eabc4 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1436644 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org>
* cortex/cortex-m/ec.lds.S: Preserve space for .data section's LMA.Yilun Lin2019-01-291-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | If .text, .rodata and .bss section are all puts in the same memory space, e.g. RAM (.data section's LMA is usually located right after .rodata section, and right before .bss section.). .data section's LMA might be overlapped with .bss section so that it would get cleared to zero on program startup. TEST=Remove ". = ALIGN(512);" in .bss section in linker script, and check build/kukui_scp/RW/ec.RW.smap, and we have __data_lma_start = 0x74b4 __bss_start = 0x74f8 __data_start = 0x8ae0 __data_end = 0x8b20 __data_end - __data_start = 64 __bss_start - __data_lma_start = 68 # .data is able to fit in. check .data section LMA won't be overlapped with .bss section VMA. BUG=b:122084384 BRANCH=None Change-Id: Ic6ae7ad7c6a080ce7aa6375c4f0e01ac9474cdc7 Signed-off-by: Yilun Lin <yllin@google.com> Reviewed-on: https://chromium-review.googlesource.com/1404640 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Yilun Lin <yllin@chromium.org> Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
* flash_ec: seprate npcx_int_spi from npcx_spi.Namyoon Woo2019-01-291-13/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let npcx_int_spi chips have their own chip_type, "npcx_int_spi." Before this CL, flash_ec failed with "--chip npcx_spi" arg instead of "--board ${BOARD}" in iteflash command. Until relevant servo board overlay files get updated with this new chip type, "BOARD" shall be checked to distinguish npcx_int_spi. BUG=b:123098518 BRANCH=none TEST=manually ran flash_ec. (servo_v4_with_servo_micro) ./util/flash_ec --chip npcx_int_spi --raiden --image ${LIARA_IMG} ./util/flash_ec --chip npcx_spi --raiden --image ${LIARA_IMG} ./util/flash_ec --board grunt --image ${LIARA_IMG} (servo_v4_with_ccd_cr50) ./util/flash_ec --chip npcx_int_spi --raiden --image ${IMG} ./util/flash_ec --chip npcx_spi --raiden --image ${IMG} ./util/flash_ec --board nocturne --image ${IMG} Change-Id: I374ecd473224dc07d0822b261783798f34289048 Signed-off-by: Namyoon Woo <namyoon@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1423598 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Wai-Hong Tam <waihong@google.com>
* chip: stm32: Enable additional I2C/UART DMA channels for STM32F412Moritz Fischer2019-01-291-5/+9
| | | | | | | | | | | | | | | | Enable additional I2C/UART DMA channel mappings for STM32F412 chip variant. Introduce new CHIP_VARIANT_STM32F41X define, to simplify further refactoring. BUG=none BRANCH=none TEST=build Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Change-Id: I61ed545619ddda8846e598fcb461cf971fc9b905 Reviewed-on: https://chromium-review.googlesource.com/1404103 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Reviewed-by: Philip Chen <philipchen@chromium.org>
* powerlog: Don't hijack logger when import as modulePuthikorn Voravootivat2019-01-291-5/+7
| | | | | | | | | | | BRANCH=master BUG=b:112865585,b:123259683 TEST=No log spam when import as module from autotest Change-Id: I7ced102bbb893bc1baa88c625b8c7279a1e32677 Signed-off-by: Puthikorn Voravootivat <puthik@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1437515 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
* liara: Reduce input voltage to 5V when battery fullEdward Hill2019-01-291-1/+28
| | | | | | | | | | | | | | | | To reduce power consumption, reduce USB-C PD input voltage to 5V when the battery is full and the system is off (S5/G3). BUG=b:121383620 BRANCH=grunt TEST=battery 90%: chgsup shows 15V or 20V, when battery full: chgsup shows 5V, power on AP: chgsup shows 15V or 20V Change-Id: I377bc02ca5ec352619b05ef619c7a9e184f547cb Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1401018 Reviewed-by: Jett Rink <jettrink@chromium.org>
* flapjack: seperate gpio.inc and led.c from kukui.Kaka Ni2019-01-2910-1/+224
| | | | | | | | | | | | | | | | | | | | There's a big difference between Kukui's GPIOs and Flapjck's. The LED number and behavior of them are different too. Kukui has differenct HW revisions and so does Flapajck. To avoid too many netsted "#if BOARD_REV" and "#ifdef BOARD_FLAPJACK", seperate gpio.inc and led.c from kukui. BUG=b:123376617 BRANCH=None TEST=1:)BOOTBLOCK=... make BOARD=kukui -j flash_ec; and see AP boots. 2:)BOOTBLOCK=... make BOARD=flapajck -j flash_ec; and see AP boots. Change-Id: I5a6e3c334aff8d4c7253e62ff47ba8e141d29d30 Reviewed-on: https://chromium-review.googlesource.com/1436714 Commit-Ready: Kaka Ni <nigang@huaqin.corp-partner.google.com> Tested-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-by: Kaka Ni <nigang@huaqin.corp-partner.google.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
* casta : charger overrideYongBeum Ha2019-01-281-0/+1
| | | | | | | | | | | | | | | Enable charger override. BUG=b:122868858 BRANCH=None TEST=flash EC & check charger current and voltage Change-Id: I338b45d6a2a3aa4a6e47f23136fd329b41bdd6bb Signed-off-by: YongBeum Ha <ybha@samsung.com> Reviewed-on: https://chromium-review.googlesource.com/1436715 Commit-Ready: Diana Z <dzigterman@chromium.org> Reviewed-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org>
* g/i2cs: Sample SDA multiple times before considering the bus wedgedRaul E Rangel2019-01-281-45/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cr50 tpm i2c protocol works as follows: 1. Master wants to read a register from the tpm. It writes the 1 byte register address to the tpm. 2. Master completes the transaction then waits for AP_INT to fire. 3. i2c write complete isr fires on the tpm. 1. register data is pushed into the tx fifo 2. AP_INT is pulsed to notify the master that the write has been processed, and the data is ready to be read. 3. tpm increments i2cs_read_irq_count 4. Master reads n bytes from the tpm. 5. Times passes 6a. Master decides to update a register on the TPM 1. Master writes n bytes to the tpm. 2. Master completes transaction then waits for AP_INT to fire. 3. i2c write complete isr fires on the tpm 1. tpm processes the write command 2. AP_INT is pulsed to notify the master that the read is ready. 4. Master receives AP_INT and continues issuing commands. 6b. Master decides to read a register from the TPM 1. goto 1 poll_read_state will currently poll SDA every 500 ms. If it sees that there have been no write completions since the last polling period and SDA is currently low, it assumes the bus is wedged and it resets the i2cs controller. This logic has the potential to terminate in flight transactions. For example: The poller runs at step 4 and notices that a write interrupt has occurred and it updates last_i2cs_read_irq_count. The master waits 499.99 ms and then initiates a new transaction (6a or 6b). This causes the master to start a new i2c write transaction. The poller then runs again at 500ms and notices that the write complete interrupt counter has not incremented and SDA is low because a 0 is currently being written by the master. The poller then resets the i2cs controller. This causes the master to receive a NAK. This cl changes the logic so that the poller requires SDA to be low for 3 consecutive periods between write completes before it resets the controller. See the comments in the code for the specifics. BUG=b:113880780 BRANCH=none TEST=Ran a reboot stress test for over 16 hours and did not see any transaction failures. Also manually grounded SDA to see if read_recovery_count incremented: [585.024822 I2CS bus is stuck] [585.475883 I2CS bus is stuck] [585.926944 I2CS bus is stuck] [586.378009 I2CS bus is stuck] [586.829067 I2CS bus is stuck] > i2cstpm rd fifo adjust cnt = 0 wr mismatch cnt = 0 read recovered cnt = 5 Change-Id: I7b6f446ee75b43e9d66a6a5e51dd077c60108f90 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1387346 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
* Fleex: Add new LED state for fully charged in S5Diana Z2019-01-283-3/+25
| | | | | | | | | | | | | | | | | | | This change adds another battery LED state to represent a fully charged system in S5, so that fleex systems can have their LED off when this occurs. This state will be optional, and the state machine will fall back to using the previously defined FULL_CHARGE state if this new state is not defined. BUG=b:122636016 BRANCH=octopus TEST=flashed orbatrix and ensured LED went off in S5 after EC reported it was charged, flashed another octopus board to ensure it didn't regress Change-Id: I0265b268818e7f1ec20339afe5cf3544c882926b Signed-off-by: Diana Z <dzigterman@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1419477 Reviewed-by: Jett Rink <jettrink@chromium.org>
* arcada: add hall sensor input GPIO and NB_MODE outJett Rink2019-01-281-1/+6
| | | | | | | | | | | | | | | Hook up input gpio for both hall sensors and output gpio for NB_MODE# that goes from ISH to EC. BRANCH=none BUG=b:120295222 TEST=verified that LID_CL_NB_L toggles when moving a magnet over HALL2 sensor Change-Id: I17797bfda00470392d578d7427cd163653bf1a96 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1435481 Reviewed-by: Diana Z <dzigterman@chromium.org>
* arcada: remove gpio lines for I2CJett Rink2019-01-283-8/+6
| | | | | | | | | | | | | | The ISH does not support putting the i2c in manual GPIO mode, so we should leave SCL and SDA fields on i2c_port_t unset BRANCH=none BUG=none TEST=i2c communications still works Change-Id: I060d41f97f09e26ceb224249b26308e56abc0da4 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1435480 Reviewed-by: Diana Z <dzigterman@chromium.org>
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