| Commit message (Collapse) | Author | Age | Files | Lines |
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modify for G sensor second source
BRANCH=main
BUG=b:212427391
TEST=make -j BOARD=taeko
Signed-off-by: amber.chen <amber.chen@lcfc.corp-partner.google.com>
Change-Id: Ideda0c4e41519ace1ce41cbbbd984b28ae1dfcbf
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369844
Reviewed-by: YH Lin <yueherngl@chromium.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
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Enable volume buttons in configuration.
BUG=b:213574019
TEST=zmake configure -b nivviks
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I27fb1728cdb4944f02609cb56a4b23e24f856a40
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3374084
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
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Update with pull-up options on GPIO.
BUG=b:201000844
TEST=zmake configure -b nereid
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: If64e7499902b7aa309f880b4bdddb46100220d63
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372080
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Commit-Queue: Peter Marheine <pmarheine@chromium.org>
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Remove all the bring-up features.
BUG=b:211884285
BRANCH=None
TEST=make -j BOARD=bugzzy
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I04a438e9c75b30393ff970db8fd26a7a8db139b2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372129
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Henry Sun <henrysun@google.com>
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The power of hall sensor and the LID_OPEN_EC on rev1 are
different, and it cause LID_OPEN_EC wake the EC immediately
when EC enter hibernate.
Remove GPIO_LID_OPEN from hibernate_wake_pins for
board_id <= 1 to let rev1 dut can enter hibernate.
Rev1 needs the workaround for ACOK can't go High to wake EC up.
Set GPIO_HIBERNATE_L always open-drain.
BUG=none
BRANCH=trogdor
TEST=Rev1 dut can enter hibernate
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: Idc533cb9e216b9e220bb9b2dcc5b2f98975c40d9
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3353051
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Bob Moragues <moragues@chromium.org>
Commit-Queue: Bob Moragues <moragues@chromium.org>
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Use EC_CMD_CHARGE_STATE to check the charging current and voltage after
attaching a USB charger.
BUG=b:209907297
TEST=zmake configure --test zephyr/test/drivers
BRANCH=none
Change-Id: If4095da3ab3f3c7787fd56afe9e187ce77753196
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3373633
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Sam Hurst <shurst@google.com>
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Turn on the smart battery config.
BUG=b:213410761
TEST=zmake configure -b nivviks
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I6eb3302b57b8bafabc1cb363cb288a5266fa2151
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372125
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
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The initial outline for an integration test: Emulate attaching a PD
charger. Verify that PD negotiation completes and starts charging at the
negotiated power.
BUG=b:209907297
TEST=zmake configure --test zephyr/test/drivers
BRANCH=none
Change-Id: I47fdec548a6625a850ea4578353e572e5130ed55
Signed-off-by: Abe Levkoy <alevkoy@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3359842
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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Add a trickle charging option that is enabled by
selected chargers.
BUG=b:213410761
TEST=zmake testall
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: I607739fda0ef6fdd09143f84b7e734389fe2c66c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372124
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
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This is needed to ensure the console print for cbi does
not depend on chipset task to be enabled.
BUG=b:203446068
BRANCH=main
TEST=make buildall & zephyr testall,
console prints verified.
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Change-Id: I221aff2c99fe708487907fdf49a3cf5bb92612c8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3370941
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Add some initial documentation focused around the config
formats (BUILD.py, CMakeLists.txt, and Kconfig), and how to use this
configuration to add a new program or variant.
BUG=b:193815337,b:180609783
BRANCH=none
TEST=view in Gitiles
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I3a18793fbd2e3b15dd29119b407f71962eb87482
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3256037
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Default battery configuration for ADL-P based sku is
3S based. Reconfiguration to 2s based battery configuration
at runtime for ADL M/N based RVPs can help in enabling single
binary for all ADL based skus, irrespective of it's
differences.
BUG=b:194163586
BRANCH=none
TEST=verified on ADL-P,M&N to get correct battery info
Signed-off-by: poornima tom <poornima.tom@intel.com>
Change-Id: I94eb45dbae7ad8c67e2aa6f0142e166a22ad1a0b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3220899
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Keith Short <keithshort@chromium.org>
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There are some battery types which cannot be identified
by normal manufacturing name or device name. For devices,
which uses this type of batteries can be configured
with CONFIG_BATTERY_NO_AUTO_DETECT to indicate the same.
Based on this config, the idea is to set the correct
battery type at runtime and then use the manufacturing or
device name to identify the battery later. The motivation
of this change is to have a single binary for multiple
platforms that have different battery configuration.
BUG=b:194163586
BRANCH=none
TEST=make buildall -j
Signed-off-by: poornima tom <poornima.tom@intel.com>
Change-Id: I488ca3d72250311630724381a8cfeb52d8dad657
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3216893
Reviewed-by: Keith Short <keithshort@chromium.org>
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This enables MKBP protocol based communication from EC to AP.
BUG=b:212210652
BRANCH=none
TEST=make configure -B ~/tmp/brya/ brya -b
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: Ie80da285f613b7c34f057e66a970450eeadc64f4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3358855
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Set the default HOOK_TICK_INTERVAL for all projects based on the it8xxx2
zephyr board to match the cros-ec setting (500ms).
This reduces power consumption.
BUG=none
BRANCH=b:192354255
TEST=zmake tesall
Change-Id: I1d7fc8d046a6b307d7daa6c4f6289e04fc9df818
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3373381
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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Add new config CONFIG_PLATFORM_EC_CONSOLE_DEBUG, which if enabled will
log all zephyr_print() messages (generally console logs), to printk
also.
Enable CONFIG_PLATFORM_EC_CONSOLE_DEBUG in drivers test.
BRANCH=None
BUG=None
TEST=zmake -l DEBUG -j 1 configure --test zephyr/test/drivers
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I18c179ecdb90998a57c67ff71ef7369015de623c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3370950
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Reviewed-by: Abe Levkoy <alevkoy@chromium.org>
Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
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BRANCH=none
BUG=none
TEST=view in gitiles
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ic8d4544ae2de5321ec45597d66e9252d0748bf62
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369649
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
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This CL implements vivaldi function row config for duck keyboard.
BUG=none
BRANCH=trogdor
TEST=make sure that all top row keys work correctly.
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I319b68c8758283bd3f0eef73888d48b19470226b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3364060
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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This patch re-allocating GPIO80 to turning on keyboard LEDs and
turns on keyboard LEDs power on S0. Turn off on S5/G3.
BUG=b:203664745
BRANCH=none
TEST=Verify the pin is ON on S0 and OFF on S5/G3.
Signed-off-by: Devin Lu <Devin.Lu@quantatw.com>
Change-Id: If2c7bc5d92027578b1e1fa33fa92e3de9a11d6df
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367360
Reviewed-by: caveh jalali <caveh@chromium.org>
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In order to meet the specification of LCD brightness,
it is necessary to set the current value of the LCD controller.
BUG=b:202344727
BRANCH=None
TEST=make -j BOARD=bugzzy
Signed-off-by: YongBeum.Ha <ybha@samsung.corp-partner.google.com>
Change-Id: I49a52c8cf813921bcf92580436dbb635aa9ee6ed
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3372130
Reviewed-by: Henry Sun <henrysun@google.com>
Commit-Queue: Henry Sun <henrysun@google.com>
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Refer b:210073795 comment#13.
LCFC power team would like to update prochot setting to enhance
protection policy because the battery's min. voltage is too closing
PPVAR 5V.
BRANCH=none
BUG=b:210073795
TEST=make buildall -j
Signed-off-by: tony.tang <tony.tang@lcfc.corp-partner.google.com>
Change-Id: Id671696bd395e18f23ac885a9947c2150e94b58c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367733
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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BUG=b:203739613
TEST=hostcommand is working at AP<->EC
BRANCH=main
Change-Id: I87e98dccb3156c5134c565cc7b8632b76f76cab0
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3302220
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
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Add TUSB1044 support in makefile.
(Kconfig already exists so it's not included in this CL)
BUG=b:210972023
TEST=`typec 1` on krabby and verify mux state:
`USB=1 DP=0 POLARITY=NORMAL`
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Icc7f06f20fe086003bbae05344c82e6b35754137
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3359069
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
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This CL enables mt8186 power sequence on Corsola devices.
BUG=b:206338930, b:203739613
TEST=1) zmake krabby/kingler
2) See CL:3233783 for more detailed tests
BRANCH=none
Cq-Depend: chromium:3233783
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I5c5e34034ca605797c6995769a888b4eb6ed201d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3366102
Tested-by: Ting Shen <phoenixshen@chromium.org>
Auto-Submit: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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MT8186 power sequence is a simplified version of 8192/95. EC does not
lie between AP and PMIC, so there's no need to forward the signals.
Other logics are almost the same.
BUG=b:206338930
TEST=Test following items on krabby CL:3233784
* Cold reset:
$ dut-control cold_reset:on sleep:0.2 cold_reset:off
Result: G3 -> S0
* Long power press to shutdown:
$ dut-control 'ec_uart_cmd:powerbtn 8200'
Result: S0 -> S5 -> G3
* Long power press to power-on but then shutdown:
$ dut-control 'ec_uart_cmd:powerbtn 8200'
Result: G3 -> S0 -> S5 -> G3
* Short power press to power-on:
$ dut-control 'ec_uart_cmd:powerbtn 200'
Result: G3 -> S0
* Console command: apreset
Result: S0 -> S5 -> S0, AP reboots
* Console command: apshutdown
Result: S0 -> S5 -> G3
* Lid open to power-on:
$ dut-control lid_open:no sleep:0.2 lid_open:yes
Result: G3 -> S0
BRANCH=none
Cq-Depend: chromium:3366102
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Iebfe77c8f6d127ee4d0685903b67afd215ca6682
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3233783
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
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fan_rpm:
rpm_min = 2400
rpm_start = 2400
rpm_max = 5300
BUG=b:195602767, b:210821390
BRANCH=puff
TEST=thermal test pass
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I7e46a08e2ad4ef0c759e3dfedb516246774967e4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367716
Reviewed-by: Joe Tessler <jrt@chromium.org>
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Use PEN_DETECT to detect if the pen input and
pull PEN_PWR_EN to charge/discharge the pen.
BUG=b:205163599
BRANCH=trogdor
TEST="make BOARD=quackingstick" pass
Signed-off-by: Sue Chen <sue.chen@quanta.corp-partner.google.com>
Change-Id: I5a3392c8f88ad372fc8e043fb24eb5cac3adaa86
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3351428
Reviewed-by: Bob Moragues <moragues@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
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Configure GPIO pins for KSI KB module
BUG=b:213505004
BRANCH=none
TEST=make buildall -j
Signed-off-by: Parth Malkan <parthmalkan@google.com>
Change-Id: I3eb96013c6a5198e03d654c0f38829cafc822181
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3370578
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-by: Arthur Lin <arthur.lin@lcfc.corp-partner.google.com>
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Remove board id different, ioexpander, bb retimer
related code, draco without those design.
BUG=b:210970640
BRANCH=none
TEST=make BOARD=draco
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I337112bababc6196f8ff55a5a770a2646443dbf1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3361057
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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Draco is clamshell device without ALS,
remove those code from EC.
BUG=b:210970640
BRANCH=none
TEST=make BOARD=draco
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I395b0ccdddf5fe99697b98d1d2c7da0958f2b250
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3359155
Reviewed-by: caveh jalali <caveh@chromium.org>
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BUG=b:212645255
BRANCH=none
TEST=make BOARD=draco
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I38fd9629beed91a342525fa2ef8162af21644144
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3357975
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
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Add tests for fw_config support, and normalise some common names
for matching "compatible" bindings to support tests.
BUG=b:212490923
TEST=zmake configure --test zephyr/test/drivers; zmake testall
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Cq-Depend: chromium:3367729
Change-Id: I245207ce0674f40a81e9c9fdbe7c9c2d4105a4fb
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367734
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
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Do not construct enum names, but instead use just the
name from the enum-name property directly.
It is up to whoever is adding the DTS to ensure that the
enum names are unique.
BUG=b:212758472
TEST=zmake testall; zmake configure -b nivviks
BRANCH=none
Signed-off-by: Andrew McRae <amcrae@google.com>
Change-Id: If6a54654d583fba33607e56db63ada92b6f8b74a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367729
Reviewed-by: Tristan Honscheid <honscheid@google.com>
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Enable power management configuration.
BUG=b:192354255
BRANCH=none
TEST=zmake testall
TEST=measure the current value of it8xxx2_evb:
Doze: ~5mA
Deep doze: ~0.3mA
Hibernate: ~0.05mA
Note: To achieve this measurement current, the following configuration
is required.
1. Enable CONFIG_PLATFORM_EC_KEYBOARD(KSO and KSI are internal pulled
up in cros_kb_raw_ite_init).
2. The setting mentioned in CL:3367358 commit message is necessary.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: If644af086cf1f9aafeec71518f725589f0a6b406
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3162475
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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IOEX_USB_C1_IN_HPD was not being correctly set in
board_c1_ps8818_mux_set. Code from Zork was incorrectly copied and
changed to set the HPD signal to the SOC instead of the HPD signal to
the PS8818 retimer. According to the PS8818 datasheet, asserting
IN_HPD will pull PS8818 out of DP Idle mode.
BUG=b:212640973
BRANCH=None
TEST=C1 to HDMI works on Nipperkin
Change-Id: I477e2f534dbddc4fa8771d4c2bf830d5c9e89d9c
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3368353
Reviewed-by: Diana Z <dzigterman@chromium.org>
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BUG=b:210970640
BRANCH=none
TEST=make BOARD=draco
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: Id143746ffc47d95e6fd9715b76c26fa392a06ff0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3354205
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
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The hook tick interval refers to the setting of it8xxx2 of CROS
adjusted to 500ms(default:250ms).
BUG=b:192354255
BRANCH=none
TEST=zmake testall
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: I79bcfadca10dc550527aa40c7448479bade0d5bd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367359
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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Adjust the initial state of gpio pin to prevent leakage on the
it8xxx2_evb board.
Note1: pch_smi_l, pch_sci_l, gate_a20_h, lpc_clkrun_l have been
moved to unused-pins.
Note2: The following GPIO pins cannot be set as unused-gpios because
there alternate function needs to be tested on it8xxx2_evb.
These pins need to be pulled down externally to prevent leakage.
SPI_CONTROLLER: GPIOA6, GPIOC3, GPIOC5, GPIOG0(output low), GPIOG2
TECH0A : GPIOD6
ADC0~ADC5 : GPIOI0~GPIOI5
BUG=b:192354255
BRANCH=none
TEST=zmake testall
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: Ib5669d45b6b6f7c6233e5742447e5defb84417c0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3367358
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
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* Add a test for the isl9238c_resume() function
BRANCH=None
BUG=b:184856906
TEST=zmake -D configure --test test-drivers
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Change-Id: I7c543308ea0c4ba4967ea9a860a784e2fba11e67
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3336698
Reviewed-by: Sam Hurst <shurst@google.com>
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Replace a bunch of instances of (GPIO_INPUT | GPIO_PULL_UP) and
(GPIO_INPUT | GPIO_PULL_DOWN) with the equivalent GPIO_INPUT_PULL_UP and
GPIO_INPUT_PULL_DOWN.
BRANCH=none
BUG=b:208436570
TEST=build on volteer
TEST=cq dry run
TEST=zmake testall
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change-Id: I6c66cbcdc2ae9a78431f0c5e5cf288534eb15012
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3370133
Reviewed-by: Aaron Massey <aaronmassey@google.com>
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BUG=b:213299504
BRANCH=none
TEST=with follow-on patches, switched I2C bus speed between 400 kHz
and 1 MHz.
Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com>
Change-Id: I3e813ff9eec7d549c8449b35fb41bc09dc927070
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369176
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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BUG=b:213299504
BRANCH=none
TEST=switched I2C bus speed between 400 kHz and 1 MHz.
Signed-off-by: Leo-Tsai <leocx_tsai@compal.corp-partner.google.com>
Change-Id: Ib0052f679b027e2a2ec7402fa3d697627d558ed5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3369177
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>
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TCPC discharge vbus should be called when CONFIG_USB_PD_DISCHARGE_TCPC
is enabled. CONFIG_USB_PD_DISCHARGE_PPC was erroneously being checked
instead.
BUG=b:205285137, b:199919093
BRANCH=None
TEST=Thinkvision P32p-20 works with Nipperkin on C0 and C1
Change-Id: Ifadff5fd43adb22a75428e4ac1a3a4b3e024766c
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3368352
Reviewed-by: Parth Malkan <parthmalkan@google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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After changing the atomic_t type from long to int the print format was
changed to %l, but the CrosEC print function doesn't support the 'l'
format if long is 4 bytes wide.
Cast the atomic_t to int and print it as a normal int variable.
BUG=b:207082842
TEST=make buildall && zmake testall && make sure the 'taskinfo' work
BRANCH=main
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I8643d8b843720e3583a29d83fc143d8e103e79c4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3359425
Tested-by: Patryk Duda <pdk@semihalf.com>
Reviewed-by: Patryk Duda <patrykd@google.com>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Patryk Duda <patrykd@google.com>
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Create the initial EC image for the dojo variant by copying the
cherry reference board EC files into a new directory named for
the variant.
(Auto-Generated by create_initial_ec_image.sh version 1.5.0).
BUG=b:211528578
BRANCH=None
TEST=make BOARD=dojo
Signed-off-by: Tommy Chung <tommy.chung@quanta.corp-partner.google.com>
Change-Id: I703a83e616914b69367fe4da129ee172ce6b878f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3350380
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
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BUG=b:203739613
TEST=uart:~$ rt1718s_gpio
C1 GPIO0 OD=1 PU=0 PD=0 OE=1 HL=0
C1 GPIO1 OD=1 PU=0 PD=0 OE=1 HL=0
C1 GPIO2 OD=1 PU=0 PD=0 OE=1 HL=0
BRANCH=none
Change-Id: I4292be49eed48000745e0965a26375955ad1e31b
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3336641
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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I2C0: 400K
Lid Accel: BMA422
Base IMU: BMI323
I2C1: 1M
C0 BC1.2: PI3USB9201
C0 TCPC: ANX3447
C0 PPC: NX20P3483
I2C2: 1M
C1 MUX: PS8743
C1 PPC: NX20P3483
C1 TCPC: RT1718S
I2C3: 400K
Charger: ISL9238C
CBI EEPROM
I2C5: 100K
Smart Battery
BUG=b:203739613
TEST=i2c scan;
BRANCH=main
Change-Id: I2826668c03f8cf822e389acf099226d29698f8d0
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3302221
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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If the charge port does not change, we don’t need
to stop the charge IC.
BUG=b:211080520,b:197199689
BRANCH=dedede
TEST=make BOARD=storo pass, the DUT can boot up
normally when only the 45W adapter is inserted
Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Change-Id: I5ca07d9cd91c2cecff4f90dc5ab1a62f502c86f0
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3347354
Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
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This reverts commit abc448dfbb68b8b94fbfaf1e8193d44b44cf1107.
Reason for revert: sinking must always be re-enabled during
the hard reset process, and due to timing differences, we may
not always go through the charge port of None in this sequence
Original change's description:
> Storo: Modify active charge port setting
>
> If the port is not changing, should not be doing anything.
> In order to solve the problem of sometimes unable to boot
> under AC only state, we can make a return early.
>
> BUG=b:197199689
> BRANCH=dedede
> TEST=make BOARD=storo pass, the DUT can boot up normally
> when only the 45W adapter is inserted
>
> Signed-off-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
> Change-Id: Icec7a5e9a0ed6efdd41489b4fd3e74325f4b81fa
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3167617
> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
> Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Bug: b:197199689,b:211080520
Change-Id: I21c34e7616e3797dba5c3c77f7591a37f19f3981
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3347352
Reviewed-by: wen zhang <zhangwen6@huaqin.corp-partner.google.com>
Tested-by: Mike Lee <mike5@huaqin.corp-partner.google.com>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Commit-Queue: Mike Lee <mike5@huaqin.corp-partner.google.com>
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BUG=b:203739613
TEST=uart:~$ adc
TEST=uart:~$ adc
ADC_CHARGER_PMON_R = 3345837 mV
ADC_EC_ID0 = 96 mV
ADC_EC_ID1 = 165 mV
ADC_AMON_R = 444 mV
BRANCH=none
Change-Id: I746a7d45b6993f87fd9fdb74f9b06f380cb8072d
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3302219
Reviewed-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
Auto-Submit: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
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