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path: root/chip/g/sps.c
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* cr50: sps: allow receive registration function set FIFO thresholdVadim Bendebury2015-08-131-5/+10
* cr50: code modifications to support FPGA B1Vadim Bendebury2015-08-111-0/+6
* Cr50: Enable TPM-protocol data over the SPI busVadim Bendebury2015-07-251-2/+6
* sps: expose RX FIFO write pointerVadim Bendebury2015-07-251-0/+5
* cr50: Use distinct configuration option for SPI Slave supportVadim Bendebury2015-07-251-2/+2
* cr50: restore SPS driver performanceVadim Bendebury2015-07-171-153/+348
* Cr50: Restore spstest commandBill Richardson2015-07-141-0/+18
* Cr50: Pass SPI and SPS modes to sps_register_rx_handler()Bill Richardson2015-07-131-18/+15
* Cr50: Clear the TX FIFO when the SPS CS deassertsBill Richardson2015-07-111-8/+12
* Cr50: Handle 11-bit SPS FIFO pointers correctlyBill Richardson2015-07-101-30/+52
* Cr50: Simplify the API for the SPS driverBill Richardson2015-07-071-321/+91
* cr50: add SPI Slave driverVadim Bendebury2015-05-071-0/+486
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