| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | COIL: chip/it83xx: Rename SPI MAX_FREQ config | Caveh Jalali | 2021-08-02 | 1 | -2/+5 |
| * | Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTES | Yuval Peress | 2021-01-15 | 1 | -2/+2 |
| * | Clean up: set embedded flash clock 48MHz as default | Ruibin Chang | 2020-08-17 | 1 | -0/+1 |
| * | chip/it83xx, it8xxx2: implement detect cc disconnection interrupt for SRC role | Ruibin Chang | 2020-07-31 | 1 | -2/+2 |
| * | chip/it8320, it81202: Implement fast role swap function | Ruibin Chang | 2020-07-23 | 1 | -0/+2 |
| * | driver/tcpm/it8xxx2: PD driver for chip it8xxx1/8xxx2 | Ruibin Chang | 2020-02-19 | 1 | -0/+4 |
| * | Cleanup: Add chip support pd physical port count configuration | Ruibin Chang | 2020-01-22 | 1 | -0/+4 |
| * | core:RISC-V / chip:IT83202 | Dino Li | 2019-06-11 | 1 | -0/+90 |
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index : delta/coreboot/chrome-ec.git | |
| review.coreboot.org: chrome-ec.git |
| summaryrefslogtreecommitdiff |