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path: root/chip/it83xx/irq.c
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* it83xx/nds32: Ensure EXT_IER has been disabled before enabling CPU interruptDino Li2021-09-021-1/+9
* it83xx/riscv: Ensure IER has been disabled before enabling CPU interruptDino Li2021-09-021-1/+9
* it83xx/irq: there is no need to configure IER on nds32 core chipDino Li2021-09-011-2/+10
* it8xxx2/irq: wait until two equal interrupt values are readDino Li2021-06-081-1/+5
* it8xxx2: return -1 if EC INT number isn't validDino Li2021-02-041-0/+3
* it83xx: Add support for interrupt and 1.8v selection of GPJ7Dino Li2020-08-041-1/+1
* core/riscv-rv32i: remove return valuesTzung-Bi Shih2020-06-041-9/+3
* core/riscv-rv32i: move interrupt details to IT83XX specificTzung-Bi Shih2020-05-191-0/+31
* chip/it8xxx1, chip/it8xxx2: GPIO, WUC and IRQ for chip it83201/it83202Ruibin Chang2019-11-221-3/+12
* LICENSE: remove unnecessary (c) after CopyrightTom Hughes2019-06-191-1/+1
* core:RISC-V / chip:IT83202Dino Li2019-06-111-5/+13
* common: bit change 1 << constants with BIT(constants)Gwendal Grignou2019-03-261-2/+2
* it83xx: IT8320 DX version compatibilityDino Li2018-07-111-3/+10
* it83xx: Complete EC interrupt liststabilize-8337.BDino Li2016-05-161-6/+6
* chip: it83xx: add USBPD moduleDino Li2016-04-181-1/+1
* it8380dev: fix irq, jtag and systemDino Li2015-11-011-1/+8
* it8380dev: fix hw timer and related function.Dino Li2015-10-011-1/+2
* it8380dev: add peci control modulestabilize-7204.BDino Li2015-06-241-1/+2
* ite: Add initial support for ITE IT8380 chipVincent Palatin2014-01-081-0/+87
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