summaryrefslogtreecommitdiff
path: root/chip/mt8192_scp
Commit message (Expand)AuthorAgeFilesLines
* chip/mt8192_scp: enlarge the stack size of idle taskTzung-Bi Shih2020-08-121-1/+1
* chip/mt8192_scp: add missing guard for TASK_HOSTCMDTzung-Bi Shih2020-08-121-0/+2
* ec: change usage of dummySam Hurst2020-08-052-3/+3
* chip/mt8192_scp: don't unset the THRI flag unless we are in the UART ISRTzung-Bi Shih2020-08-021-2/+15
* chip/mt8192_scp: add memory mapsTzung-Bi Shih2020-07-214-28/+145
* chip/mt8192_scp: support hostcmd over IPITzung-Bi Shih2020-07-164-0/+147
* chip/mt8192_scp: support IPI handlerTzung-Bi Shih2020-07-146-2/+155
* EC: Add additional stack sizesSam Hurst2020-07-071-0/+2
* chip/mt8192_scp: support ipi_send()Tzung-Bi Shih2020-07-034-0/+193
* chip/mt8192_scp: use 0 for dummy priority numberTzung-Bi Shih2020-07-022-2/+2
* chip/mt8192_scp: add static for non-exposed functionsTzung-Bi Shih2020-07-021-2/+2
* chip/mt8192_scp: read MRV micause for interrupt sourceTzung-Bi Shih2020-06-101-1/+1
* chip/mt8192_scp: use in_soft_interrupt_context()Tzung-Bi Shih2020-06-101-1/+1
* chip/mt8192_scp: support WDTTzung-Bi Shih2020-06-104-1/+44
* chip/mt8192_scp: add system tick timersTzung-Bi Shih2020-06-103-9/+209
* chip/mt8192_scp: support UARTTzung-Bi Shih2020-06-044-8/+262
* chip/mt8192_scp: support INTCTzung-Bi Shih2020-06-043-9/+435
* chip/mt8192_scp: add basic system settingsTzung-Bi Shih2020-06-032-0/+40
* chip/mt8192_scp: add dummy chip implementationsTzung-Bi Shih2020-06-039-0/+293