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* ish: Trim down the release branchstabilize-wristpin-14469.59.B-ishstabilize-voshyr-14637.B-ishstabilize-quickfix-14695.187.B-ishstabilize-quickfix-14695.124.B-ishstabilize-quickfix-14526.91.B-ishstabilize-14695.85.B-ishstabilize-14695.107.B-ishstabilize-14682.B-ishstabilize-14633.B-ishstabilize-14616.B-ishstabilize-14589.B-ishstabilize-14588.98.B-ishstabilize-14588.14.B-ishstabilize-14588.123.B-ishstabilize-14536.B-ishstabilize-14532.B-ishstabilize-14528.B-ishstabilize-14526.89.B-ishstabilize-14526.84.B-ishstabilize-14526.73.B-ishstabilize-14526.67.B-ishstabilize-14526.57.B-ishstabilize-14498.B-ishstabilize-14496.B-ishstabilize-14477.B-ishstabilize-14469.9.B-ishstabilize-14469.8.B-ishstabilize-14469.58.B-ishstabilize-14469.41.B-ishstabilize-14442.B-ishstabilize-14438.B-ishstabilize-14411.B-ishstabilize-14396.B-ishstabilize-14395.B-ishstabilize-14388.62.B-ishstabilize-14388.61.B-ishstabilize-14388.52.B-ishstabilize-14385.B-ishstabilize-14345.B-ishstabilize-14336.B-ishstabilize-14333.B-ishrelease-R99-14469.B-ishrelease-R98-14388.B-ishrelease-R102-14695.B-ishrelease-R101-14588.B-ishrelease-R100-14526.B-ishfirmware-cherry-14454.B-ishfirmware-brya-14505.B-ishfirmware-brya-14505.71.B-ishfactory-kukui-14374.B-ishfactory-guybrush-14600.B-ishfactory-cherry-14455.B-ishfactory-brya-14517.B-ishJack Rosenthal2021-11-0597-12564/+0
* core/minute-ia: Remove .func and .endfuncTom Hughes2021-09-291-8/+0
* core: Add forward declaration for IRQ handler routineTom Hughes2021-09-274-0/+5
* core/cortex-m0: Fix assemblyTom Hughes2021-09-271-1/+1
* core/cortex-m: Disable warning in vecttable.c when building with clangTom Hughes2021-09-231-0/+14
* cortex-m/panic: Introduce CONFIG_PANIC_STRIP_GPR optionPatryk Duda2021-09-161-1/+39
* cortex-m0/task: Check if interrupts are enabled before switching taskPatryk Duda2021-09-061-3/+11
* cortex-m/task: Check if interrupts are enabled before switching taskPatryk Duda2021-09-061-3/+14
* Provide 'is_interrupt_enabled' function for all coresPatryk Duda2021-09-066-0/+57
* builtin: Add math.hTom Hughes2021-08-315-15/+15
* riscv: panic: S0/S1 are clobbered registers in software_panic()Dino Li2021-08-231-2/+2
* Revert "make: Compile host tests in 32-bit mode"Evan Green2021-08-021-3/+1
* test: Start host test timer near 32-bit rolloverEvan Green2021-08-021-2/+12
* make: Compile host tests in 32-bit modeEvan Green2021-08-021-1/+3
* cortex-m*: make watchdog code more readableRicardo Quesada2021-07-302-4/+20
* atomic.h: atomic_clear_bits: return previously stored valueTing Shen2021-07-296-11/+14
* cortex-m/ec.lds.S: Add padding to manage RW image sizeEthan Huang2021-07-271-0/+11
* stm32/system: Disable caches before rebootPatryk Duda2021-06-102-3/+5
* cortex-m/watchdog: Flush and invalidate D-cache while handling watchdogPatryk Duda2021-06-091-0/+8
* cortex-m/panic: Flush D-cache after panic data is filledPatryk Duda2021-06-091-0/+5
* include/flash: rename the APIsTim Lin2021-06-091-1/+1
* panic.c: force sync before reenabling bus faultsJosie Nordrum2021-05-111-0/+5
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSJeremy Bettis2021-04-274-12/+12
* Revert "config: rename CONFIG_FLASH to CONFIG_FLASH_CROS"stabilize-13935.B-mainJack Rosenthal2021-04-244-12/+12
* config: rename CONFIG_FLASH to CONFIG_FLASH_CROSEric Yilun Lin2021-04-234-12/+12
* riscv-rv32i/task: Remove the remove_me functionDino Li2021-04-081-12/+0
* it8xxx2: add support option CONFIG_PRESERVE_LOGSDino Li2021-04-071-0/+19
* Hooks: Add HOOK_CHIPSET_HARD_OFFDiana Z2021-03-186-0/+24
* core/riscv-rv32i: rearrange symbols in ILMTing Shen2021-03-031-19/+21
* cortex-m/m0: Add Debug Halting Control and Status RegisterTom Hughes2021-02-236-2/+53
* core/riscv-rv32i: set in_interrupt at beginning of exception handlerTzung-Bi Shih2021-02-192-4/+8
* cortex-m0: convert "b" register constraints to "l"Peter Marheine2021-02-181-4/+4
* core/cortex-m/mpu.c does not compileDenis Brockus2021-02-051-1/+2
* riscv-rv32i: store EC interrupt number in panic infoDino Li2021-02-042-24/+26
* Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTESYuval Peress2021-01-154-4/+4
* core/riscv-rv32i: correct inline assembly constraint modifierTzung-Bi Shih2021-01-141-1/+1
* Revert "core/riscv-rv32i: Add exception_panic"Nicolas Boichat2021-01-112-16/+7
* core/riscv-rv32i: Use -fsanitize-undefined-trap-on-errorNicolas Boichat2021-01-112-11/+3
* core/riscv-rv32i: Enable integer division by zero UBSANNicolas Boichat2020-12-302-0/+12
* core/riscv-rv32i: Add exception_panicNicolas Boichat2020-12-302-7/+16
* core/riscv-rv32i: Make it possible to enable LTONicolas Boichat2020-12-291-0/+5
* it8xxx2: enable ILM0Dino Li2020-12-171-0/+6
* it83xx/flash: workaround of IMMU tag is nds32 onlyDino Li2020-12-171-2/+0
* task_set_event: remove the wait argumentDawid Niedzwiecki2020-12-146-45/+38
* cortex-m mpu: support configuring regions with difficult alignmentPeter Marheine2020-12-111-59/+95
* core/riscv-rv32i: support DRAM cacheTzung-Bi Shih2020-11-191-0/+64
* core/riscv-rv32i: move essential code to ram_code only if supportsTzung-Bi Shih2020-11-191-1/+3
* it83xx: pull more functions into __ram_code sectionDino Li2020-11-182-2/+4
* nds32/task: return invalid task id if task scheduling is not yet startDino Li2020-11-182-1/+7
* Zephyr: add more compliant implementation for irq_(un)lockYuval Peress2020-11-081-2/+2
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