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* baseboard/octopus: Enable CONFIG_BOARD_HAS_RTC_RESETKarthikeyan Ramasubramanian2018-12-051-0/+1
* power/rk3399: Remove unused power_seq_versionPhilip Chen2018-12-011-17/+11
* power/rk3399: Do not boot until power button is releasedPhilip Chen2018-11-191-2/+15
* power/mt8183: Fix power transition from S3 to S0.Yilun Lin2018-11-081-4/+4
* power/mt8183: Obey ap-off reset flag if PMIC is already upstabilize-11217.BNicolas Boichat2018-11-011-1/+7
* cheza: Do S0->S5->S0 transition after warm_reset-toggling finishedWai-Hong Tam2018-10-311-10/+26
* power/common: Wait some time before updating wake masksFurquan Shaikh2018-10-301-5/+35
* cheza: Monitor the WARM_RESET_L signal to hold APWai-Hong Tam2018-10-301-1/+64
* system: Remember if reset was due to AP watchdog triggeringNicolas Boichat2018-10-291-1/+6
* power/mt8183: Implement watchdog-initiated resetNicolas Boichat2018-10-251-0/+25
* power/mt8183: Pulse PMIC_FORCE_RESET_ODL for 10s to force resetNicolas Boichat2018-10-241-0/+20
* power/mt8183: Reboot EC before trying to boot AP for a second timeNicolas Boichat2018-10-151-3/+10
* intel_x86: Clear SCI/SMI masks only after host enters S0ixFurquan Shaikh2018-10-081-42/+43
* cheza: Turn off 3.3V rail on S5Wai-Hong Tam2018-10-041-2/+4
* mt8183: Hold power button 10s for hard shutdown.Yilun Lin2018-10-041-2/+2
* power: add chipset_in_or_transitioning_to_stateJett Rink2018-09-071-0/+31
* ICL: Modify force_shutdown to meet PCH timing requirementsScott Collyer2018-09-051-3/+10
* power/mt8183: Keep PMIC_WATCHDOG_L low in S5/S3Nicolas Boichat2018-08-311-2/+3
* power/mt8183: Fix power sequencingNicolas Boichat2018-08-311-6/+32
* cheza: Disable interrupts which are floating when switchcap offWai-Hong Tam2018-08-311-0/+9
* cheza: Use POWER_GOOD signal instead of AP_RST_LWai-Hong Tam2018-08-311-21/+21
* Revert "cheza: Support confirmation of power lost"Wai-Hong Tam2018-08-311-51/+2
* kukui: Change FORCE_RESET to ODLNicolas Boichat2018-08-291-3/+3
* cheza: Add more power signals for informative purposeWai-Hong Tam2018-08-291-1/+1
* power/mt8183: Power sequence from S5, not G3Nicolas Boichat2018-08-241-19/+22
* ICL: Fix the timeout value for SUS_SLP_L in G3S5 stateScott Collyer2018-08-221-3/+7
* cheza: Check switchcap GPIO0 which indicates outputting good voltageWai-Hong Tam2018-08-131-0/+43
* intel_x86: fix the build error when removing CONFIG_POWER_S0IXZhuohao Lee2018-08-091-0/+2
* icelake: Correct POWER_G3S5 exit statusVijay Hiremath2018-08-091-11/+4
* icelake: Add power sequencing support for icelakeScott Collyer2018-07-274-1/+178
* espi: Rename CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SLP_SIG...Furquan Shaikh2018-07-272-6/+6
* cheza: Remove the switchcap hackWai-Hong Tam2018-07-261-1/+1
* cheza: Change GPIO for the rev-1 boardWai-Hong Tam2018-07-261-5/+5
* reset: Log the reason for AP resets.Jonathan Brandmeyer2018-07-2611-55/+92
* power: Add power_get_state APIDaisuke Nojiri2018-07-251-0/+5
* power/mt8183: Fix PMIC_EN_ODL polarity, watchdog signalNicolas Boichat2018-07-231-2/+2
* power/mt8183: Remove use of GPIO_PP1800_S0_EN.Yilun Lin2018-06-201-2/+0
* Remove Kahlee boardMartin Roth2018-06-151-8/+0
* host_event: Handle SCI/SMI masks correctly when using S0ixFurquan Shaikh2018-06-151-0/+41
* power/mt8183: Power sequencing logic for MT8183Nicolas Boichat2018-06-142-0/+329
* power: Add CONFIG_* option for PROCHOT polarity.Aseda Aboagye2018-06-083-0/+17
* Fizz: add CONFIG_BOARD_HAS_RTC_RESETRyan Zhang2018-06-071-0/+5
* power: Rename rockchip to rk3288Nicolas Boichat2018-06-072-1/+1
* power: Rename mediatek to mt817xNicolas Boichat2018-06-072-2/+2
* stoney: Rename GPIO_PCH_RCIN_L to GPIO_SYS_RESET_LJonathan Brandmeyer2018-06-051-2/+2
* stoney: strip unused forcing_coldreset path.Jonathan Brandmeyer2018-06-041-12/+2
* APL/GLK: Clean up UART buffer before shutdownVijay Hiremath2018-05-231-0/+8
* espi: rename remaining eSPI optionsJett Rink2018-05-232-6/+6
* lpc/espi: convert remaning CONFIG_LPC to CONFIG_HOSTCMD_X86Jett Rink2018-05-221-1/+1
* cheza: Check power enough and enable PP5000 when power-on APWai-Hong Tam2018-05-221-0/+51
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