1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
|
/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "adc_chip.h"
#include "hooks.h"
#include "temp_sensor.h"
#include "thermal.h"
#include "temp_sensor/thermistor.h"
/* ADC configuration */
const struct adc_t adc_channels[] = {
[ADC_TEMP_SENSOR_1_DDR_SOC] = {
.name = "TEMP_DDR_SOC",
.input_ch = NPCX_ADC_CH0,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
[ADC_TEMP_SENSOR_2_SSD] = {
.name = "TEMP_SSD",
.input_ch = NPCX_ADC_CH1,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
[ADC_TEMP_SENSOR_3_CHARGER] = {
.name = "TEMP_CHARGER",
.input_ch = NPCX_ADC_CH6,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
[ADC_TEMP_SENSOR_4_MEMORY] = {
.name = "TEMP_MEMORY",
.input_ch = NPCX_ADC_CH9,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
[ADC_TEMP_SENSOR_5_USBC] = {
.name = "TEMP_USBC",
.input_ch = NPCX_ADC_CH2,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
[ADC_IADPT] = {
.name = "CHARGER_IADPT",
.input_ch = NPCX_ADC_CH3,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* Temperature sensor configuration */
const struct temp_sensor_t temp_sensors[] = {
[TEMP_SENSOR_1_DDR_SOC] = {
.name = "DDR and SOC",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_1_DDR_SOC
},
[TEMP_SENSOR_2_SSD] = {
.name = "SSD",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_2_SSD
},
[TEMP_SENSOR_3_CHARGER] = {
.name = "Charger",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_3_CHARGER
},
[TEMP_SENSOR_4_MEMORY] = {
.name = "MEMORY",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_4_MEMORY
},
[TEMP_SENSOR_5_USBC] = {
.name = "USBC",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_5_USBC
},
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
/*
* TODO(b/195901486): update for Alder Lake/primus
*
* Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at
* 130 C. However, sensor is located next to DDR, so we need to use the lower
* DDR temperature limit (85 C)
*/
/*
* TODO(b/202062363): Remove when clang is fixed.
*/
#define THERMAL_CPU \
{ \
.temp_host = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(70), \
[EC_TEMP_THRESH_HALT] = C_TO_K(90), \
}, \
.temp_host_release = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(65), \
}, \
.temp_fan_off = C_TO_K(35), \
.temp_fan_max = C_TO_K(50), \
}
__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU;
/*
* TODO(b/202062363): Remove when clang is fixed.
*/
#define THERMAL_SSD \
{ \
.temp_host = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(75), \
[EC_TEMP_THRESH_HALT] = C_TO_K(92), \
}, \
.temp_host_release = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(65), \
}, \
.temp_fan_off = C_TO_K(40), \
.temp_fan_max = C_TO_K(55), \
}
__maybe_unused static const struct ec_thermal_config thermal_ssd = THERMAL_SSD;
/*
* TODO(b/195901486): update for Alder Lake/primus
*
* Inductor limits - used for both charger and PP3300 regulator
*
* Need to use the lower of the charger IC, PP3300 regulator, and the inductors
*
* Charger max recommended temperature 100C, max absolute temperature 125C
* PP3300 regulator: operating range -40 C to 145 C
*
* Inductors: limit of 125c
* PCB: limit is 80c
*/
/*
* TODO(b/202062363): Remove when clang is fixed.
*/
#define THERMAL_INDUCTOR \
{ \
.temp_host = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(75), \
[EC_TEMP_THRESH_HALT] = C_TO_K(90), \
}, \
.temp_host_release = { \
[EC_TEMP_THRESH_HIGH] = C_TO_K(65), \
}, \
.temp_fan_off = C_TO_K(40), \
.temp_fan_max = C_TO_K(55), \
}
__maybe_unused static const struct ec_thermal_config thermal_inductor =
THERMAL_INDUCTOR;
/*
* TODO(b/195901486): Thermal table need to be fine tuned.
*/
struct ec_thermal_config thermal_params[] = {
[TEMP_SENSOR_1_DDR_SOC] = THERMAL_CPU,
[TEMP_SENSOR_2_SSD] = THERMAL_SSD,
[TEMP_SENSOR_3_CHARGER] = THERMAL_INDUCTOR,
[TEMP_SENSOR_4_MEMORY] = THERMAL_INDUCTOR,
[TEMP_SENSOR_5_USBC] = THERMAL_INDUCTOR,
};
BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
|
